34#include "ar9002/ar9285.ini"
35#include "ar9002/ar9285v2.ini"
36#include "ar9002/ar9280v2.ini"
76 const struct ieee80211_channel *chan);
88 .totalSizeDesired = { -55, -55, -55, -55, -62 },
89 .coarseHigh = { -14, -14, -14, -14, -12 },
90 .coarseLow = { -64, -64, -64, -64, -70 },
91 .firpwr = { -78, -78, -78, -78, -80 },
92 .maxSpurImmunityLevel = 7,
93 .cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 },
95 .firstep = { 0, 4, 8 },
128 ((pModal->
antdiv_ctl1 & 0x1) ?
"enabled" :
"disabled"),
129 ((pModal->
antdiv_ctl1 & 0x8) ?
"enabled" :
"disabled"));
149 __func__, sc, (
void*) st, (
void*) sh);
155 "%s: cannot allocate memory for state block\n", __func__);
219 "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n",
233 ar9285PciePhy_clkreq_always_on_L1_v2, 2);
238 ar9285PciePhy_clkreq_always_on_L1, 2);
288 "%s: 5G Radio Chip Rev 0x%02X is not supported by "
289 "this driver\n", __func__,
306 ath_hal_printf(ah,
"[ath] AR9285E_20 detected; using XE TX gain tables\n");
313 ar9285Modes_XE2_0_high_power, 6);
316 ar9285Modes_high_power_tx_gain_v2, 6);
321 ar9285Modes_XE2_0_normal_power, 6);
324 ar9285Modes_original_tx_gain_v2, 6);
358 "%s: error getting mac address from EEPROM\n", __func__);
416 val =
AH_PRIVATE(ah)->ah_config.ath_hal_war70c;
470 val &= (~AR_WA_D3_L1_DISABLE);
493 u_int modesIndex, freqIndex;
499 if (IEEE80211_IS_CHAN_HT40(chan))
501 else if (IEEE80211_IS_CHAN_108G(chan))
510 modesIndex, regWrites);
513 modesIndex, regWrites);
535 pCap->halWowMatchPatternDword =
AH_TRUE;
577 return "Atheros 9285";
579 return "Atheros 2427";
HAL_BOOL ath_hal_EepromDataRead(struct ath_hal *ah, u_int off, uint16_t *data)
int ath_hal_ini_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia, int col, int regWr)
@ HAL_ANI_NOISE_IMMUNITY_LEVEL
#define AR9285_DEVID_PCIE
#define AR2427_DEVID_PCIE
#define ATHEROS_VENDOR_ID
HAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah)
#define AR5416_EEP_TXGAIN_ORIG
#define AR5416_EEP_TXGAIN_HIGH_POWER
#define AR9285_RDEXT_DEFAULT
#define OS_REG_SET_BIT(_a, _r, _f)
#define HAL_INI_INIT(_ia, _data, _cols)
#define ath_hal_eepromGet(_ah, _param, _val)
#define OS_REG_CLR_BIT(_a, _r, _f)
void * ath_hal_malloc(size_t)
#define HALDEBUG(_ah, __m,...)
void ath_hal_printf(struct ath_hal *, const char *,...)
bus_space_tag_t HAL_BUS_TAG
#define OS_REG_WRITE(_ah, _reg, _val)
bus_space_handle_t HAL_BUS_HANDLE
#define OS_REG_READ(_ah, _reg)
#define MAX_TX_FIFO_THRESHOLD
HAL_BOOL ar5212ChipTest(struct ath_hal *ah)
#define AR_RADIO_SREV_MAJOR
void ar5416InitState(struct ath_hal_5416 *, uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
HAL_BOOL ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *, HAL_RESET_TYPE)
HAL_BOOL ar5416SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
void ar5416AttachPCIE(struct ath_hal *ah)
HAL_BOOL ar5416FillCapabilityInfo(struct ath_hal *ah)
void ar5416AniAttach(struct ath_hal *, const struct ar5212AniParams *, const struct ar5212AniParams *, HAL_BOOL ena)
HAL_BOOL ar5416SetResetReg(struct ath_hal *, uint32_t type)
uint32_t ar5416GetRadioRev(struct ath_hal *ah)
void ar5416InitNfHistBuff(struct ar5212NfCalHist *h)
#define PER_MAX_LOG_COUNT
void ar5416AdcDcCalCollect(struct ath_hal *ah)
void ar5416AdcDcCalibration(struct ath_hal *ah, uint8_t numChains)
void ar5416AdcGainCalibration(struct ath_hal *ah, uint8_t numChains)
void ar5416AdcGainCalCollect(struct ath_hal *ah)
void ar5416IQCalCollect(struct ath_hal *ah)
#define PER_MIN_LOG_COUNT
void ar5416IQCalibration(struct ath_hal *ah, uint8_t numChains)
#define AR_PHY_SEL_INTERNAL_ADDAC
#define AR_PHY_ADC_SERIAL_CTL
#define AR_RAD5133_SREV_MAJOR
#define AR_SREV_9285E_20(_ah)
#define AR_PCIE_PM_CTRL_ENA
#define AR_SREV_KITE_12_OR_LATER(_ah)
#define AR9285_WA_DEFAULT
#define AR_RAD2133_SREV_MAJOR
#define AR_XSREV_TYPE_HOST_MODE
#define AR_SREV_KITE_11_OR_LATER(_ah)
#define AR_XSREV_REVISION
#define AR_WA_D3_L1_DISABLE
#define AR9285_DEFAULT_RXCHAINMASK
#define AR9285_DEFAULT_TXCHAINMASK
void ar9280InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
void ar9280SpurMitigate(struct ath_hal *, const struct ieee80211_channel *)
HAL_BOOL ar9285RfAttach(struct ath_hal *ah, HAL_STATUS *status)
#define AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ
HAL_BOOL ar9285SetBoardValues(struct ath_hal *, const struct ieee80211_channel *)
void ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t value, u_int32_t type)
void ar9285BTCoexAntennaDiversity(struct ath_hal *ah)
#define AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ
HAL_BOOL ar9285SetTransmitPower(struct ath_hal *, const struct ieee80211_channel *, uint16_t *)
#define AR_PHY_CCA_NOM_VAL_9285_2GHZ
static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
static const HAL_PERCAL_DATA ar9280_iq_cal
static void ar9285_eeprom_print_diversity_settings(struct ath_hal *ah)
static const HAL_PERCAL_DATA ar9280_adc_gain_cal
static const char * ar9285_lna_conf[]
static const HAL_PERCAL_DATA ar9280_adc_dc_cal
static const char * ar9285Probe(uint16_t vendorid, uint16_t devid)
static struct ath_hal * ar9285Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal
static void ar9285AniSetup(struct ath_hal *ah)
static void ar9285DisablePCIE(struct ath_hal *ah)
AH_CHIP(AR9285, ar9285Probe, ar9285Attach)
static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah)
static void ar9285WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
HAL_BOOL ar9285InitCalHardware(struct ath_hal *ah, const struct ieee80211_channel *chan)
void ar9002_hw_pa_cal(struct ath_hal *ah, HAL_BOOL is_reset)
HAL_BOOL ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
HAL_BOOL ar9285_check_div_comb(struct ath_hal *ah)
void ar9285_antdiv_comb_conf_set(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf)
void ar9285_antdiv_comb_conf_get(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf)
uint32_t halMbssidAggrSupport
uint32_t halWowMatchPatternExact
uint32_t hal4AddrAggrSupport
uint32_t halAutoSleepSupport
uint32_t halRxUsingLnaMixing
uint32_t halTxStbcSupport
uint32_t halRifsTxSupport
uint32_t halUseCombinedRadarRssi
uint32_t halRxStbcSupport
uint32_t halBtCoexSupport
uint32_t halAntDivCombSupport
uint32_t halExtChanDfsSupport
uint32_t halSpectralScanSupport
uint32_t halHasRxSelfLinkedTail
uint32_t halRifsRxSupport
uint32_t hal4kbSplitTransSupport
struct ar5416eeprom_4k ee_base
int maxNoiseImmunityLevel
MODAL_EEP4K_HEADER modalHeader
HAL_INI_ARRAY ah_ini_common
uint8_t ah_macaddr[IEEE80211_ADDR_LEN]
struct ath_hal_private ah_priv
HAL_INI_ARRAY ah_ini_modes
HAL_INI_ARRAY ah_ini_txgain
HAL_INI_ARRAY ah_ini_rxgain
void __ahdecl(* ah_btCoexSetParameter)(struct ath_hal *, uint32_t, uint32_t)
void __ahdecl(* ah_divLnaConfGet)(struct ath_hal *, HAL_ANT_COMB_CONFIG *)
HAL_BOOL __ahdecl(* ah_setTxPower)(struct ath_hal *, const struct ieee80211_channel *, uint16_t *)
HAL_BOOL __ahdecl(* ah_setAntennaSwitch)(struct ath_hal *, HAL_ANT_SETTING)
void __ahdecl(* ah_divLnaConfSet)(struct ath_hal *, HAL_ANT_COMB_CONFIG *)
uint16_t ah_analog5GhzRev
void __ahdecl(* ah_detach)(struct ath_hal *)
void __ahdecl(* ah_disablePCIE)(struct ath_hal *)
void __ahdecl(* ah_configPCIE)(struct ath_hal *, HAL_BOOL restore, HAL_BOOL power_off)
HAL_BOOL __ahdecl(* ah_setBoardValues)(struct ath_hal *, const struct ieee80211_channel *)