FreeBSD kernel ATH device code
ar5416_ani.c
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1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD$
20 */
21#include "opt_ah.h"
22
23/*
24 * XXX this is virtually the same code as for 5212; we reuse
25 * storage in the 5212 state block; need to refactor.
26 */
27#include "ah.h"
28#include "ah_internal.h"
29#include "ah_desc.h"
30
31#include "ar5416/ar5416.h"
32#include "ar5416/ar5416reg.h"
33#include "ar5416/ar5416phy.h"
34
35/*
36 * Anti noise immunity support. We track phy errors and react
37 * to excessive errors by adjusting the noise immunity parameters.
38 */
39
40#define HAL_EP_RND(x, mul) \
41 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
42#define BEACON_RSSI(ahp) \
43 HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
44 HAL_RSSI_EP_MULTIPLIER)
45
46/*
47 * ANI processing tunes radio parameters according to PHY errors
48 * and related information. This is done for for noise and spur
49 * immunity in all operating modes if the device indicates it's
50 * capable at attach time. In addition, when there is a reference
51 * rssi value (e.g. beacon frames from an ap in station mode)
52 * further tuning is done.
53 *
54 * ANI_ENA indicates whether any ANI processing should be done;
55 * this is specified at attach time.
56 *
57 * ANI_ENA_RSSI indicates whether rssi-based processing should
58 * done, this is enabled based on operating mode and is meaningful
59 * only if ANI_ENA is true.
60 *
61 * ANI parameters are typically controlled only by the hal. The
62 * AniControl interface however permits manual tuning through the
63 * diagnostic api.
64 */
65#define ANI_ENA(ah) \
66 (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
67#define ANI_ENA_RSSI(ah) \
68 (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
69
70#define ah_mibStats ah_stats.ast_mibstats
71
72static void
73enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
74{
75 struct ath_hal_5212 *ahp = AH5212(ah);
76
77 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: "
78 "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n",
79 __func__, params->ofdmPhyErrBase, params->cckPhyErrBase);
80
83
88
89 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/
90 ar5212EnableMibCounters(ah); /* enable everything */
91}
92
93static void
95{
96 struct ath_hal_5212 *ahp = AH5212(ah);
97
98 HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n");
99
100 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */
101 ar5212DisableMibCounters(ah); /* disable everything */
102
105}
106
107static void
108setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
109{
110 if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) {
112 "OFDM Trigger %d is too high for hw counters, using max\n",
113 params->ofdmTrigHigh);
114 params->ofdmPhyErrBase = 0;
115 } else
116 params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh;
117 if (params->cckTrigHigh >= AR_PHY_COUNTMAX) {
119 "CCK Trigger %d is too high for hw counters, using max\n",
120 params->cckTrigHigh);
121 params->cckPhyErrBase = 0;
122 } else
123 params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh;
124}
125
126/*
127 * Setup ANI handling. Sets all thresholds and reset the
128 * channel statistics. Note that ar5416AniReset should be
129 * called by ar5416Reset before anything else happens and
130 * that's where we force initial settings.
131 */
132void
133ar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24,
134 const struct ar5212AniParams *params5, HAL_BOOL enable)
135{
136 struct ath_hal_5212 *ahp = AH5212(ah);
137
138 if (params24 != AH_NULL) {
139 OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
140 setPhyErrBase(ah, &ahp->ah_aniParams24);
141 }
142 if (params5 != AH_NULL) {
143 OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
144 setPhyErrBase(ah, &ahp->ah_aniParams5);
145 }
146
147 OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
148 /* Enable MIB Counters */
149 enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/);
150
151 if (enable) { /* Enable ani now */
152 HALASSERT(params24 != AH_NULL && params5 != AH_NULL);
154 } else {
155 ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
156 }
157}
158
159/*
160 * Cleanup any ANI state setup.
161 *
162 * This doesn't restore registers to their default settings!
163 */
164void
166{
167 HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n");
169}
170
171/*
172 * Control Adaptive Noise Immunity Parameters
173 */
175ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
176{
177 typedef int TABLE[];
178 struct ath_hal_5212 *ahp = AH5212(ah);
179 struct ar5212AniState *aniState = ahp->ah_curani;
180 const struct ar5212AniParams *params = AH_NULL;
181
182 /*
183 * This function may be called before there's a current
184 * channel (eg to disable ANI.)
185 */
186 if (aniState != AH_NULL)
187 params = aniState->params;
188
190
191 /* These commands can't be disabled */
192 if (cmd == HAL_ANI_PRESENT)
193 return AH_TRUE;
194
195 if (cmd == HAL_ANI_MODE) {
196 if (param == 0) {
197 ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
198 /* Turn off HW counters if we have them */
199 ar5416AniDetach(ah);
200 } else { /* normal/auto mode */
201 /* don't mess with state if already enabled */
202 if (! (ahp->ah_procPhyErr & HAL_ANI_ENA)) {
203 /* Enable MIB Counters */
204 /*
205 * XXX use 2.4ghz params if no channel is
206 * available
207 */
209 ahp->ah_curani != AH_NULL ?
210 ahp->ah_curani->params:
211 &ahp->ah_aniParams24);
213 }
214 }
215 return AH_TRUE;
216 }
217
218 /* Check whether the particular function is enabled */
219 if (((1 << cmd) & AH5416(ah)->ah_ani_function) == 0) {
220 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: command %d disabled\n",
221 __func__, cmd);
222 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd %d; mask %x\n", __func__, cmd, AH5416(ah)->ah_ani_function);
223 return AH_FALSE;
224 }
225
226 switch (cmd) {
228 u_int level = param;
229
230 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level);
231 if (level > params->maxNoiseImmunityLevel) {
233 "%s: immunity level out of range (%u > %u)\n",
234 __func__, level, params->maxNoiseImmunityLevel);
235 return AH_FALSE;
236 }
237
241 AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]);
245 AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]);
246
247 if (level > aniState->noiseImmunityLevel)
248 ahp->ah_stats.ast_ani_niup++;
249 else if (level < aniState->noiseImmunityLevel)
251 aniState->noiseImmunityLevel = level;
252 break;
253 }
255 static const TABLE m1ThreshLow = { 127, 50 };
256 static const TABLE m2ThreshLow = { 127, 40 };
257 static const TABLE m1Thresh = { 127, 0x4d };
258 static const TABLE m2Thresh = { 127, 0x40 };
259 static const TABLE m2CountThr = { 31, 16 };
260 static const TABLE m2CountThrLow = { 63, 48 };
261 u_int on = param ? 1 : 0;
262
263 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled");
265 AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
267 AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
269 AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
271 AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
273 AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
275 AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
276
278 AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]);
280 AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]);
282 AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]);
284 AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]);
285
286 if (on) {
289 } else {
292 }
293 if (on)
295 else
297 aniState->ofdmWeakSigDetectOff = !on;
298 break;
299 }
301 static const TABLE weakSigThrCck = { 8, 6 };
302 u_int high = param ? 1 : 0;
303
304 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low");
306 AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]);
307 if (high)
309 else
311 aniState->cckWeakSigThreshold = high;
312 break;
313 }
315 u_int level = param;
316
317 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level);
318 if (level > params->maxFirstepLevel) {
320 "%s: firstep level out of range (%u > %u)\n",
321 __func__, level, params->maxFirstepLevel);
322 return AH_FALSE;
323 }
325 AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]);
326 if (level > aniState->firstepLevel)
328 else if (level < aniState->firstepLevel)
330 aniState->firstepLevel = level;
331 break;
332 }
334 u_int level = param;
335
336 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level);
337 if (level > params->maxSpurImmunityLevel) {
339 "%s: spur immunity level out of range (%u > %u)\n",
340 __func__, level, params->maxSpurImmunityLevel);
341 return AH_FALSE;
342 }
344 AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
345
346 if (level > aniState->spurImmunityLevel)
348 else if (level < aniState->spurImmunityLevel)
350 aniState->spurImmunityLevel = level;
351 break;
352 }
353#ifdef AH_PRIVATE_DIAG
355 ahp->ah_stats.ast_ani_ofdmerrs = 0;
356 ahp->ah_stats.ast_ani_cckerrs = 0;
357 break;
358#endif /* AH_PRIVATE_DIAG */
359 default:
360 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n",
361 __func__, cmd);
362 return AH_FALSE;
363 }
364 return AH_TRUE;
365}
366
367static void
369{
370 struct ath_hal_5212 *ahp = AH5212(ah);
371 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
372 struct ar5212AniState *aniState;
373 const struct ar5212AniParams *params;
374
375 HALASSERT(chan != AH_NULL);
376
377 if (!ANI_ENA(ah))
378 return;
379
380 aniState = ahp->ah_curani;
381 params = aniState->params;
382 /* First, raise noise immunity level, up to max */
383 if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) {
385 aniState->noiseImmunityLevel + 1))
386 return;
387 }
388 /* then, raise spur immunity level, up to max */
389 if (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel) {
391 aniState->spurImmunityLevel + 1))
392 return;
393 }
394
395 /*
396 * In the case of AP mode operation, we cannot bucketize beacons
397 * according to RSSI. Instead, raise Firstep level, up to max, and
398 * simply return.
399 */
400 if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
401 if (aniState->firstepLevel < params->maxFirstepLevel) {
403 aniState->firstepLevel + 1))
404 return;
405 }
406 }
407 if (ANI_ENA_RSSI(ah)) {
408 int32_t rssi = BEACON_RSSI(ahp);
409 if (rssi > params->rssiThrHigh) {
410 /*
411 * Beacon rssi is high, can turn off ofdm
412 * weak sig detect.
413 */
414 if (!aniState->ofdmWeakSigDetectOff) {
417 AH_FALSE);
420 return;
421 }
422 /*
423 * If weak sig detect is already off, as last resort,
424 * raise firstep level
425 */
426 if (aniState->firstepLevel < params->maxFirstepLevel) {
428 aniState->firstepLevel + 1))
429 return;
430 }
431 } else if (rssi > params->rssiThrLow) {
432 /*
433 * Beacon rssi in mid range, need ofdm weak signal
434 * detect, but we can raise firststepLevel.
435 */
436 if (aniState->ofdmWeakSigDetectOff)
439 AH_TRUE);
440 if (aniState->firstepLevel < params->maxFirstepLevel)
442 aniState->firstepLevel + 1))
443 return;
444 } else {
445 /*
446 * Beacon rssi is low, if in 11b/g mode, turn off ofdm
447 * weak signal detection and zero firstepLevel to
448 * maximize CCK sensitivity
449 */
450 if (IEEE80211_IS_CHAN_CCK(chan)) {
451 if (!aniState->ofdmWeakSigDetectOff)
454 AH_FALSE);
455 if (aniState->firstepLevel > 0)
456 if (ar5416AniControl(ah,
458 return;
459 }
460 }
461 }
462}
463
464static void
466{
467 struct ath_hal_5212 *ahp = AH5212(ah);
468 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
469 struct ar5212AniState *aniState;
470 const struct ar5212AniParams *params;
471
472 HALASSERT(chan != AH_NULL);
473
474 if (!ANI_ENA(ah))
475 return;
476
477 /* first, raise noise immunity level, up to max */
478 aniState = ahp->ah_curani;
479 params = aniState->params;
480 if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL) &&
481 aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) {
483 aniState->noiseImmunityLevel + 1);
484 return;
485 }
486
487 if (ANI_ENA_RSSI(ah)) {
488 int32_t rssi = BEACON_RSSI(ahp);
489 if (rssi > params->rssiThrLow) {
490 /*
491 * Beacon signal in mid and high range,
492 * raise firstep level.
493 */
494 if (aniState->firstepLevel < params->maxFirstepLevel)
496 aniState->firstepLevel + 1);
497 } else {
498 /*
499 * Beacon rssi is low, zero firstep level to maximize
500 * CCK sensitivity in 11b/g mode.
501 */
502 if (IEEE80211_IS_CHAN_CCK(chan)) {
503 if (aniState->firstepLevel > 0)
506 }
507 }
508 }
509}
510
511static void
512ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
513{
514 struct ath_hal_5212 *ahp = AH5212(ah);
515 const struct ar5212AniParams *params = aniState->params;
516
517 aniState->listenTime = 0;
518 /*
519 * NB: these are written on reset based on the
520 * ini so we must re-write them!
521 */
523 "%s: Writing ofdmbase=%u cckbase=%u\n", __func__,
524 params->ofdmPhyErrBase, params->cckPhyErrBase);
529
530 /* Clear the mib counters and save them in the stats */
531 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
532 aniState->ofdmPhyErrCount = 0;
533 aniState->cckPhyErrCount = 0;
534}
535
536/*
537 * Restore/reset the ANI parameters and reset the statistics.
538 * This routine must be called for every channel change.
539 *
540 * NOTE: This is where ah_curani is set; other ani code assumes
541 * it is setup to reflect the current channel.
542 */
543void
544ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan,
545 HAL_OPMODE opmode, int restore)
546{
547 struct ath_hal_5212 *ahp = AH5212(ah);
549 /* XXX bounds check ic_devdata */
550 struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata];
551 uint32_t rxfilter;
552
553 if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) {
554 OS_MEMZERO(aniState, sizeof(*aniState));
555 if (IEEE80211_IS_CHAN_2GHZ(chan))
556 aniState->params = &ahp->ah_aniParams24;
557 else
558 aniState->params = &ahp->ah_aniParams5;
559 ichan->privFlags |= CHANNEL_ANI_INIT;
560 HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0);
561 }
562 ahp->ah_curani = aniState;
563#if 0
564 ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n",
565 __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
566 ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
567#else
568 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n",
569 __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
570 ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
571#endif
572 OS_MARK(ah, AH_MARK_ANI_RESET, opmode);
573
574 /*
575 * Turn off PHY error frame delivery while we futz with settings.
576 */
577 rxfilter = ah->ah_getRxFilter(ah);
578 ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR);
579
580 /*
581 * If ANI is disabled at this point, don't set the default
582 * ANI parameter settings - leave the HAL settings there.
583 * This is (currently) needed for reliable radar detection.
584 */
585 if (! ANI_ENA(ah)) {
586 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n",
587 __func__);
588 goto finish;
589 }
590
591 /*
592 * Use a restrictive set of ANI parameters for hostap mode.
593 */
594 if (opmode == HAL_M_HOSTAP) {
595 if (IEEE80211_IS_CHAN_2GHZ(chan))
596 AH5416(ah)->ah_ani_function =
598 else
599 AH5416(ah)->ah_ani_function = 0;
600 }
601
602 /*
603 * Automatic processing is done only in station mode right now.
604 */
605 if (opmode == HAL_M_STA)
607 else
608 ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA;
609 /*
610 * Set all ani parameters. We either set them to initial
611 * values or restore the previous ones for the channel.
612 * XXX if ANI follows hardware, we don't care what mode we're
613 * XXX in, we should keep the ani parameters
614 */
615 if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) {
617 aniState->noiseImmunityLevel);
619 aniState->spurImmunityLevel);
621 !aniState->ofdmWeakSigDetectOff);
623 aniState->cckWeakSigThreshold);
625 aniState->firstepLevel);
626 } else {
630 AH_FALSE);
634 }
635
636 /*
637 * In case the counters haven't yet been setup; set them up.
638 */
639 enableAniMIBCounters(ah, aniState->params);
640 ar5416AniRestart(ah, aniState);
641
642finish:
643 /* restore RX filter mask */
644 ah->ah_setRxFilter(ah, rxfilter);
645}
646
647/*
648 * Process a MIB interrupt. We may potentially be invoked because
649 * any of the MIB counters overflow/trigger so don't assume we're
650 * here because a PHY error counter triggered.
651 */
652void
654{
655 struct ath_hal_5212 *ahp = AH5212(ah);
656 uint32_t phyCnt1, phyCnt2;
657
658 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x "
659 "filtofdm 0x%x filtcck 0x%x\n",
660 __func__, OS_REG_READ(ah, AR_MIBC),
663
664 /*
665 * First order of business is to clear whatever caused
666 * the interrupt so we don't keep getting interrupted.
667 * We have the usual mib counters that are reset-on-read
668 * and the additional counters that appeared starting in
669 * Hainan. We collect the mib counters and explicitly
670 * zero additional counters we are not using. Anything
671 * else is reset only if it caused the interrupt.
672 */
673 /* NB: these are not reset-on-read */
674 phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
675 phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
676 /* not used, always reset them in case they are the cause */
678 OS_REG_WRITE(ah, AR_FILTCCK, 0);
681
682 /* Clear the mib counters and save them in the stats */
683 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
684 ahp->ah_stats.ast_nodestats = *stats;
685
686 /*
687 * Check for an ani stat hitting the trigger threshold.
688 * When this happens we get a MIB interrupt and the top
689 * 2 bits of the counter register will be 0b11, hence
690 * the mask check of phyCnt?.
691 */
692 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
693 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
694 struct ar5212AniState *aniState = ahp->ah_curani;
695 const struct ar5212AniParams *params = aniState->params;
696 uint32_t ofdmPhyErrCnt, cckPhyErrCnt;
697
698 ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
700 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
701 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
702
703 cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
705 cckPhyErrCnt - aniState->cckPhyErrCount;
706 aniState->cckPhyErrCount = cckPhyErrCnt;
707
708 /*
709 * NB: figure out which counter triggered. If both
710 * trigger we'll only deal with one as the processing
711 * clobbers the error counter so the trigger threshold
712 * check will never be true.
713 */
714 if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh)
716 if (aniState->cckPhyErrCount > params->cckTrigHigh)
718 /* NB: always restart to insure the h/w counters are reset */
719 ar5416AniRestart(ah, aniState);
720 }
721}
722
723static void
725{
726 struct ath_hal_5212 *ahp = AH5212(ah);
727 struct ar5212AniState *aniState;
728 const struct ar5212AniParams *params;
729
730 HALASSERT(ANI_ENA(ah));
731
732 aniState = ahp->ah_curani;
733 params = aniState->params;
734
735 /*
736 * In the case of AP mode operation, we cannot bucketize beacons
737 * according to RSSI. Instead, lower Firstep level, down to min, and
738 * simply return.
739 */
740 if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
741 if (aniState->firstepLevel > 0) {
743 aniState->firstepLevel - 1))
744 return;
745 }
746 }
747 if (ANI_ENA_RSSI(ah)) {
748 int32_t rssi = BEACON_RSSI(ahp);
749 if (rssi > params->rssiThrHigh) {
750 /*
751 * Beacon signal is high, leave ofdm weak signal
752 * detection off or it may oscillate. Let it fall
753 * through.
754 */
755 } else if (rssi > params->rssiThrLow) {
756 /*
757 * Beacon rssi in mid range, turn on ofdm weak signal
758 * detection or lower firstep level.
759 */
760 if (aniState->ofdmWeakSigDetectOff) {
761 if (ar5416AniControl(ah,
763 AH_TRUE))
764 return;
765 }
766 if (aniState->firstepLevel > 0) {
768 aniState->firstepLevel - 1))
769 return;
770 }
771 } else {
772 /*
773 * Beacon rssi is low, reduce firstep level.
774 */
775 if (aniState->firstepLevel > 0) {
777 aniState->firstepLevel - 1))
778 return;
779 }
780 }
781 }
782 /* then lower spur immunity level, down to zero */
783 if (aniState->spurImmunityLevel > 0) {
785 aniState->spurImmunityLevel - 1))
786 return;
787 }
788 /*
789 * if all else fails, lower noise immunity level down to a min value
790 * zero for now
791 */
792 if (aniState->noiseImmunityLevel > 0) {
794 aniState->noiseImmunityLevel - 1))
795 return;
796 }
797}
798
799#define CLOCK_RATE 44000 /* XXX use mac_usec or similar */
800/* convert HW counter values to ms using 11g clock rate, goo9d enough
801 for 11a and Turbo */
802
803/*
804 * Return an approximation of the time spent ``listening'' by
805 * deducting the cycles spent tx'ing and rx'ing from the total
806 * cycle count since our last call. A return value <0 indicates
807 * an invalid/inconsistent time.
808 *
809 * This may be called with ANI disabled; in which case simply keep
810 * the statistics and don't write to the aniState pointer.
811 *
812 * XXX TODO: Make this cleaner!
813 */
814static int32_t
816{
817 struct ath_hal_5212 *ahp = AH5212(ah);
818 struct ar5212AniState *aniState = NULL;
819 int32_t listenTime = 0;
820 int good;
822
823 /*
824 * We shouldn't see ah_curchan be NULL, but just in case..
825 */
826 if (AH_PRIVATE(ah)->ah_curchan == AH_NULL) {
827 ath_hal_printf(ah, "%s: ah_curchan = NULL?\n", __func__);
828 return (0);
829 }
830
831 /*
832 * Fetch the current statistics, squirrel away the current
833 * sample.
834 */
835 OS_MEMZERO(&hs, sizeof(hs));
836 good = ar5416GetMibCycleCounts(ah, &hs);
838
839 if (ANI_ENA(ah))
840 aniState = ahp->ah_curani;
841
842 if (good == AH_FALSE) {
843 /*
844 * Cycle counter wrap (or initial call); it's not possible
845 * to accurately calculate a value because the registers
846 * right shift rather than wrap--so punt and return 0.
847 */
848 listenTime = 0;
849 ahp->ah_stats.ast_ani_lzero++;
850 } else if (ANI_ENA(ah)) {
851 /*
852 * Only calculate and update the cycle count if we have
853 * an ANI state.
854 */
855 int32_t ccdelta =
856 AH5416(ah)->ah_cycleCount - aniState->cycleCount;
857 int32_t rfdelta =
858 AH5416(ah)->ah_rxBusy - aniState->rxFrameCount;
859 int32_t tfdelta =
860 AH5416(ah)->ah_txBusy - aniState->txFrameCount;
861 listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE;
862 }
863
864 /*
865 * Again, only update ANI state if we have it.
866 */
867 if (ANI_ENA(ah)) {
868 aniState->cycleCount = AH5416(ah)->ah_cycleCount;
869 aniState->rxFrameCount = AH5416(ah)->ah_rxBusy;
870 aniState->txFrameCount = AH5416(ah)->ah_txBusy;
871 }
872
873 return listenTime;
874}
875
876/*
877 * Update ani stats in preparation for listen time processing.
878 */
879static void
880updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
881{
882 struct ath_hal_5212 *ahp = AH5212(ah);
883 const struct ar5212AniParams *params = aniState->params;
884 uint32_t phyCnt1, phyCnt2;
885 int32_t ofdmPhyErrCnt, cckPhyErrCnt;
886
887 /* Clear the mib counters and save them in the stats */
888 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
889
890 /* NB: these are not reset-on-read */
891 phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
892 phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
893
894 /* NB: these are spec'd to never roll-over */
895 ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
896 if (ofdmPhyErrCnt < 0) {
897 HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n",
898 ofdmPhyErrCnt, phyCnt1);
899 ofdmPhyErrCnt = AR_PHY_COUNTMAX;
900 }
902 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
903 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
904
905 cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
906 if (cckPhyErrCnt < 0) {
907 HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n",
908 cckPhyErrCnt, phyCnt2);
909 cckPhyErrCnt = AR_PHY_COUNTMAX;
910 }
912 cckPhyErrCnt - aniState->cckPhyErrCount;
913 aniState->cckPhyErrCount = cckPhyErrCnt;
914}
915
916void
917ar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats,
918 const struct ieee80211_channel *chan)
919{
920 struct ath_hal_5212 *ahp = AH5212(ah);
922}
923
924/*
925 * Do periodic processing. This routine is called from the
926 * driver's rx interrupt handler after processing frames.
927 */
928void
929ar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
930{
931 struct ath_hal_5212 *ahp = AH5212(ah);
932 struct ar5212AniState *aniState = ahp->ah_curani;
933 const struct ar5212AniParams *params;
934 int32_t listenTime;
935
936 /* Always update from the MIB, for statistics gathering */
937 listenTime = ar5416AniGetListenTime(ah);
938
939 /* XXX can aniState be null? */
940 if (aniState == AH_NULL)
941 return;
942
943 if (!ANI_ENA(ah))
944 return;
945
946 if (listenTime < 0) {
947 ahp->ah_stats.ast_ani_lneg++;
948 /* restart ANI period if listenTime is invalid */
949 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid listenTime\n",
950 __func__);
951 ar5416AniRestart(ah, aniState);
952
953 /* Don't do any further processing */
954 return;
955 }
956 /* XXX beware of overflow? */
957 aniState->listenTime += listenTime;
958
959 OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime);
960
961 params = aniState->params;
962 if (aniState->listenTime > 5*params->period) {
963 /*
964 * Check to see if need to lower immunity if
965 * 5 aniPeriods have passed
966 */
967 updateMIBStats(ah, aniState);
968 if (aniState->ofdmPhyErrCount <= aniState->listenTime *
969 params->ofdmTrigLow/1000 &&
970 aniState->cckPhyErrCount <= aniState->listenTime *
971 params->cckTrigLow/1000)
973 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: lower immunity\n",
974 __func__);
975 ar5416AniRestart(ah, aniState);
976 } else if (aniState->listenTime > params->period) {
977 updateMIBStats(ah, aniState);
978 /* check to see if need to raise immunity */
979 if (aniState->ofdmPhyErrCount > aniState->listenTime *
980 params->ofdmTrigHigh / 1000) {
982 "%s: OFDM err %u listenTime %u\n", __func__,
983 aniState->ofdmPhyErrCount, aniState->listenTime);
985 ar5416AniRestart(ah, aniState);
986 } else if (aniState->cckPhyErrCount > aniState->listenTime *
987 params->cckTrigHigh / 1000) {
989 "%s: CCK err %u listenTime %u\n", __func__,
990 aniState->cckPhyErrCount, aniState->listenTime);
992 ar5416AniRestart(ah, aniState);
993 }
994 }
995}
void ath_hal_survey_add_sample(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hs)
Definition: ah.c:1577
@ HAL_RX_FILTER_PHYERR
Definition: ah.h:422
HAL_OPMODE
Definition: ah.h:764
@ HAL_M_STA
Definition: ah.h:765
@ HAL_M_HOSTAP
Definition: ah.h:767
HAL_ANI_CMD
Definition: ah.h:970
@ HAL_ANI_FIRSTEP_LEVEL
Definition: ah.h:975
@ HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION
Definition: ah.h:973
@ HAL_ANI_PRESENT
Definition: ah.h:971
@ HAL_ANI_MODE
Definition: ah.h:977
@ HAL_ANI_NOISE_IMMUNITY_LEVEL
Definition: ah.h:972
@ HAL_ANI_SPUR_IMMUNITY_LEVEL
Definition: ah.h:976
@ HAL_ANI_CCK_WEAK_SIGNAL_THR
Definition: ah.h:974
@ HAL_ANI_PHYERR_RESET
Definition: ah.h:978
HAL_BOOL
Definition: ah.h:93
@ AH_FALSE
Definition: ah.h:94
@ AH_TRUE
Definition: ah.h:95
@ HAL_DEBUG_ANY
Definition: ah_debug.h:62
@ HAL_DEBUG_ANI
Definition: ah_debug.h:34
@ AH_MARK_ANI_RESET
Definition: ah_decode.h:54
@ AH_MARK_ANI_POLL
Definition: ah_decode.h:55
@ AH_MARK_ANI_CONTROL
Definition: ah_decode.h:56
#define OS_REG_SET_BIT(_a, _r, _f)
Definition: ah_internal.h:594
#define CHANNEL_ANI_INIT
Definition: ah_internal.h:193
static OS_INLINE HAL_CHANNEL_INTERNAL * ath_hal_checkchannel(struct ath_hal *ah, const struct ieee80211_channel *c)
Definition: ah_internal.h:711
#define OS_REG_CLR_BIT(_a, _r, _f)
Definition: ah_internal.h:596
#define AH_PRIVATE(_ah)
Definition: ah_internal.h:442
#define OS_REG_RMW_FIELD(_a, _r, _f, _v)
Definition: ah_internal.h:591
#define AH_NULL
Definition: ah_internal.h:28
#define HALASSERT(_x)
Definition: ah_internal.h:683
#define HALDEBUG(_ah, __m,...)
Definition: ah_internal.h:658
#define CHANNEL_ANI_SETUP
Definition: ah_internal.h:194
void ath_hal_printf(struct ath_hal *, const char *,...)
Definition: ah_osdep.c:80
#define OS_MEMZERO(_a, _n)
Definition: ah_osdep.h:72
#define OS_REG_WRITE(_ah, _reg, _val)
Definition: ah_osdep.h:139
#define OS_MARK(_ah, _id, _v)
Definition: ah_osdep.h:148
#define OS_MEMCPY(_d, _s, _n)
Definition: ah_osdep.h:73
#define OS_REG_READ(_ah, _reg)
Definition: ah_osdep.h:140
#define AR_MIBC
Definition: ar5210reg.h:48
void ar5212EnableMibCounters(struct ath_hal *)
Definition: ar5212_misc.c:366
void ar5212DisableMibCounters(struct ath_hal *)
Definition: ar5212_misc.c:374
#define HAL_RSSI_ANI_ENA
Definition: ar5212.h:203
void ar5212UpdateMibCounters(struct ath_hal *ah, HAL_MIB_STATS *stats)
Definition: ar5212_misc.c:383
#define HAL_ANI_ENA
Definition: ar5212.h:202
#define AH5212(_ah)
Definition: ar5212.h:354
#define AR_PHY_TIMING5
Definition: ar5212phy.h:176
#define AR_PHY_SFCORR_M2COUNT_THR
Definition: ar5212phy.h:130
#define AR_PHY_TIMING5_CYCPWR_THR1
Definition: ar5212phy.h:177
#define AR_PHY_AGC_CTL1
Definition: ar5212phy.h:107
#define AR_PHY_CCK_DETECT
Definition: ar5212phy.h:315
#define AR_PHY_SFCORR_LOW_M2_THRESH_LOW
Definition: ar5212phy.h:126
#define AR_PHY_FIND_SIG_FIRPWR
Definition: ar5212phy.h:104
#define AR_PHY_SFCORR
Definition: ar5212phy.h:129
#define AR_PHY_SFCORR_LOW_M1_THRESH_LOW
Definition: ar5212phy.h:124
#define AR_PHY_AGC_CTL1_COARSE_LOW
Definition: ar5212phy.h:108
#define AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW
Definition: ar5212phy.h:122
#define AR_PHY_SFCORR_LOW
Definition: ar5212phy.h:120
#define AR_PHY_FIND_SIG
Definition: ar5212phy.h:101
#define AR_PHY_AGC_CTL1_COARSE_HIGH
Definition: ar5212phy.h:110
#define AR_PHY_DESIRED_SZ
Definition: ar5212phy.h:93
#define AR_PHY_SFCORR_M1_THRESH
Definition: ar5212phy.h:132
#define AR_PHY_SFCORR_M2_THRESH
Definition: ar5212phy.h:134
#define AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW
Definition: ar5212phy.h:121
#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK
Definition: ar5212phy.h:316
#define AR_PHY_FIND_SIG_FIRSTEP
Definition: ar5212phy.h:102
#define AR_PHY_DESIRED_SZ_TOT_DES
Definition: ar5212phy.h:98
#define AR_PHY_COUNTMAX
Definition: ar5212reg.h:330
#define AR_PHY_ERR_CCK_TIMING
Definition: ar5212reg.h:950
#define AR_MIBCNT_INTRMASK
Definition: ar5212reg.h:331
#define AR_FILTCCK
Definition: ar5212reg.h:325
#define AR_PHY_ERR_OFDM_TIMING
Definition: ar5212reg.h:949
#define AR_PHYCNT1
Definition: ar5212reg.h:326
#define AR_PHYCNT2
Definition: ar5212reg.h:328
#define AR_FILTOFDM
Definition: ar5212reg.h:324
#define AH5416(_ah)
Definition: ar5416.h:162
HAL_BOOL ar5416GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample)
Definition: ar5416_misc.c:218
void ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, HAL_OPMODE opmode, int restore)
Definition: ar5416_ani.c:544
void ar5416AniDetach(struct ath_hal *ah)
Definition: ar5416_ani.c:165
static void updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
Definition: ar5416_ani.c:880
#define BEACON_RSSI(ahp)
Definition: ar5416_ani.c:42
#define ANI_ENA(ah)
Definition: ar5416_ani.c:65
void ar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
Definition: ar5416_ani.c:929
void ar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats)
Definition: ar5416_ani.c:653
static void ar5416AniOfdmErrTrigger(struct ath_hal *ah)
Definition: ar5416_ani.c:368
static void ar5416AniCckErrTrigger(struct ath_hal *ah)
Definition: ar5416_ani.c:465
HAL_BOOL ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
Definition: ar5416_ani.c:175
static int32_t ar5416AniGetListenTime(struct ath_hal *ah)
Definition: ar5416_ani.c:815
static void enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
Definition: ar5416_ani.c:73
void ar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats, const struct ieee80211_channel *chan)
Definition: ar5416_ani.c:917
#define CLOCK_RATE
Definition: ar5416_ani.c:799
static void ar5416AniLowerImmunity(struct ath_hal *ah)
Definition: ar5416_ani.c:724
static void ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
Definition: ar5416_ani.c:512
void ar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24, const struct ar5212AniParams *params5, HAL_BOOL enable)
Definition: ar5416_ani.c:133
#define ANI_ENA_RSSI(ah)
Definition: ar5416_ani.c:67
static void disableAniMIBCounters(struct ath_hal *ah)
Definition: ar5416_ani.c:94
static void setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
Definition: ar5416_ani.c:108
#define AR_PHY_SFCORR_EXT_M1_THRESH
Definition: ar5416phy.h:341
#define AR_PHY_SFCORR_EXT_M2_THRESH_LOW
Definition: ar5416phy.h:347
#define AR_PHY_SFCORR_EXT
Definition: ar5416phy.h:340
#define AR_PHY_SFCORR_EXT_M2_THRESH
Definition: ar5416phy.h:343
#define AR_PHY_SFCORR_EXT_M1_THRESH_LOW
Definition: ar5416phy.h:345
#define AR_PHY_ERR_MASK_1
Definition: ar5416reg.h:144
#define AR_PHY_ERR_2
Definition: ar5416reg.h:145
#define AR_SLP_MIB_CTRL
Definition: ar5416reg.h:180
#define AR_SLP_MIB_PENDING
Definition: ar5416reg.h:496
#define AR_PHY_ERR_1
Definition: ar5416reg.h:143
#define AR_PHY_ERR_MASK_2
Definition: ar5416reg.h:146
#define AR_SLP_MIB_CLEAR
Definition: ar5416reg.h:495
uint32_t ast_ani_ccklow
Definition: ah.h:894
uint32_t ast_ani_stepup
Definition: ah.h:895
uint32_t ast_ani_ofdmoff
Definition: ah.h:892
uint32_t ast_ani_spurdown
Definition: ah.h:890
uint32_t ast_ani_lzero
Definition: ah.h:900
uint32_t ast_ani_nidown
Definition: ah.h:888
uint32_t ast_ani_lneg
Definition: ah.h:901
uint32_t ast_ani_ofdmerrs
Definition: ah.h:897
uint32_t ast_ani_niup
Definition: ah.h:887
HAL_NODE_STATS ast_nodestats
Definition: ah.h:903
uint32_t ast_ani_cckerrs
Definition: ah.h:898
uint32_t ast_ani_ofdmon
Definition: ah.h:891
uint32_t ast_ani_stepdown
Definition: ah.h:896
uint32_t ast_ani_cckhigh
Definition: ah.h:893
uint32_t ast_ani_spurup
Definition: ah.h:889
uint32_t ns_avgbrssi
Definition: ah.h:873
int coarseLow[5]
Definition: ar5212.h:157
uint32_t rssiThrHigh
Definition: ar5212.h:171
uint32_t ofdmTrigHigh
Definition: ar5212.h:166
int coarseHigh[5]
Definition: ar5212.h:156
int firstep[3]
Definition: ar5212.h:164
int maxNoiseImmunityLevel
Definition: ar5212.h:154
int maxFirstepLevel
Definition: ar5212.h:163
uint32_t cckTrigLow
Definition: ar5212.h:169
int maxSpurImmunityLevel
Definition: ar5212.h:160
int32_t rssiThrLow
Definition: ar5212.h:170
uint32_t ofdmPhyErrBase
Definition: ar5212.h:176
int cycPwrThr1[8]
Definition: ar5212.h:161
uint32_t ofdmTrigLow
Definition: ar5212.h:167
uint32_t cckPhyErrBase
Definition: ar5212.h:177
int totalSizeDesired[5]
Definition: ar5212.h:155
uint32_t cckTrigHigh
Definition: ar5212.h:168
int firpwr[5]
Definition: ar5212.h:158
uint8_t ofdmWeakSigDetectOff
Definition: ar5212.h:187
uint8_t noiseImmunityLevel
Definition: ar5212.h:184
uint8_t spurImmunityLevel
Definition: ar5212.h:185
const struct ar5212AniParams * params
Definition: ar5212.h:199
uint8_t firstepLevel
Definition: ar5212.h:186
uint32_t rxFrameCount
Definition: ar5212.h:193
uint32_t cycleCount
Definition: ar5212.h:194
uint32_t txFrameCount
Definition: ar5212.h:192
uint32_t ofdmPhyErrCount
Definition: ar5212.h:196
uint32_t cckPhyErrCount
Definition: ar5212.h:197
uint8_t cckWeakSigThreshold
Definition: ar5212.h:188
uint32_t listenTime
Definition: ar5212.h:189
HAL_ANI_STATS ah_stats
Definition: ar5212.h:265
uint32_t ah_procPhyErr
Definition: ar5212.h:320
struct ar5212AniParams ah_aniParams24
Definition: ar5212.h:322
struct ar5212AniState * ah_curani
Definition: ar5212.h:324
struct ar5212AniParams ah_aniParams5
Definition: ar5212.h:323
struct ar5212AniState ah_ani[AH_MAXCHAN]
Definition: ar5212.h:325
Definition: ah.h:1219
void __ahdecl(* ah_setRxFilter)(struct ath_hal *, uint32_t)
Definition: ah.h:1336
uint32_t __ahdecl(* ah_getRxFilter)(struct ath_hal *)
Definition: ah.h:1335