FreeBSD kernel ATH device code
ah_decode.h
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/*-
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* SPDX-License-Identifier: ISC
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*
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* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _ATH_AH_DECODE_H_
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#define _ATH_AH_DECODE_H_
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/*
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* Register tracing support.
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*
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* Setting hw.ath.hal.alq=1 enables tracing of all register reads and
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* writes to the file /tmp/ath_hal.log. The file format is a simple
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* fixed-size array of records. When done logging set hw.ath.hal.alq=0
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* and then decode the file with the arcode program (that is part of the
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* HAL). If you start+stop tracing the data will be appended to an
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* existing file.
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*/
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struct
athregrec
{
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uint32_t
threadid
;
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uint32_t
op
: 8,
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reg
: 24;
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uint32_t
val
;
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};
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enum
{
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OP_READ
= 0,
/* register read */
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OP_WRITE
= 1,
/* register write */
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OP_DEVICE
= 2,
/* device identification */
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OP_MARK
= 3,
/* application marker */
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};
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enum
{
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AH_MARK_RESET
,
/* ar*Reset entry, bChannelChange */
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AH_MARK_RESET_LINE
,
/* ar*_reset.c, line %d */
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AH_MARK_RESET_DONE
,
/* ar*Reset exit, error code */
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AH_MARK_CHIPRESET
,
/* ar*ChipReset, channel num */
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AH_MARK_PERCAL
,
/* ar*PerCalibration, channel num */
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AH_MARK_SETCHANNEL
,
/* ar*SetChannel, channel num */
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AH_MARK_ANI_RESET
,
/* ar*AniReset, opmode */
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AH_MARK_ANI_POLL
,
/* ar*AniReset, listen time */
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AH_MARK_ANI_CONTROL
,
/* ar*AniReset, cmd */
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AH_MARK_RX_CTL
,
/* RX DMA control */
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AH_MARK_CHIP_POWER
,
/* chip power control, mode */
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AH_MARK_CHIP_POWER_DONE
,
/* chip power control done, status */
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};
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enum
{
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AH_MARK_RX_CTL_PCU_START
,
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AH_MARK_RX_CTL_PCU_STOP
,
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AH_MARK_RX_CTL_DMA_START
,
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AH_MARK_RX_CTL_DMA_STOP
,
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AH_MARK_RX_CTL_DMA_STOP_ERR
,
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AH_MARK_RX_CTL_DMA_STOP_OK
,
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};
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#endif
/* _ATH_AH_DECODE_H_ */
AH_MARK_RESET_LINE
@ AH_MARK_RESET_LINE
Definition:
ah_decode.h:49
AH_MARK_CHIP_POWER
@ AH_MARK_CHIP_POWER
Definition:
ah_decode.h:58
AH_MARK_SETCHANNEL
@ AH_MARK_SETCHANNEL
Definition:
ah_decode.h:53
AH_MARK_ANI_RESET
@ AH_MARK_ANI_RESET
Definition:
ah_decode.h:54
AH_MARK_RX_CTL
@ AH_MARK_RX_CTL
Definition:
ah_decode.h:57
AH_MARK_CHIP_POWER_DONE
@ AH_MARK_CHIP_POWER_DONE
Definition:
ah_decode.h:59
AH_MARK_ANI_POLL
@ AH_MARK_ANI_POLL
Definition:
ah_decode.h:55
AH_MARK_PERCAL
@ AH_MARK_PERCAL
Definition:
ah_decode.h:52
AH_MARK_RESET
@ AH_MARK_RESET
Definition:
ah_decode.h:48
AH_MARK_CHIPRESET
@ AH_MARK_CHIPRESET
Definition:
ah_decode.h:51
AH_MARK_ANI_CONTROL
@ AH_MARK_ANI_CONTROL
Definition:
ah_decode.h:56
AH_MARK_RESET_DONE
@ AH_MARK_RESET_DONE
Definition:
ah_decode.h:50
OP_WRITE
@ OP_WRITE
Definition:
ah_decode.h:42
OP_MARK
@ OP_MARK
Definition:
ah_decode.h:44
OP_DEVICE
@ OP_DEVICE
Definition:
ah_decode.h:43
OP_READ
@ OP_READ
Definition:
ah_decode.h:41
AH_MARK_RX_CTL_PCU_STOP
@ AH_MARK_RX_CTL_PCU_STOP
Definition:
ah_decode.h:64
AH_MARK_RX_CTL_DMA_STOP
@ AH_MARK_RX_CTL_DMA_STOP
Definition:
ah_decode.h:66
AH_MARK_RX_CTL_DMA_START
@ AH_MARK_RX_CTL_DMA_START
Definition:
ah_decode.h:65
AH_MARK_RX_CTL_DMA_STOP_ERR
@ AH_MARK_RX_CTL_DMA_STOP_ERR
Definition:
ah_decode.h:67
AH_MARK_RX_CTL_PCU_START
@ AH_MARK_RX_CTL_PCU_START
Definition:
ah_decode.h:63
AH_MARK_RX_CTL_DMA_STOP_OK
@ AH_MARK_RX_CTL_DMA_STOP_OK
Definition:
ah_decode.h:68
athregrec
Definition:
ah_decode.h:33
athregrec::val
uint32_t val
Definition:
ah_decode.h:37
athregrec::op
uint32_t op
Definition:
ah_decode.h:35
athregrec::threadid
uint32_t threadid
Definition:
ah_decode.h:34
athregrec::reg
uint32_t reg
Definition:
ah_decode.h:36
dev
ath
ath_hal
ah_decode.h
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