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Data Structures
struct	ath_tx_status

struct	ath_rx_status

struct	ath_desc

struct	ath_desc_txedma

struct	ath_desc_status

Macros
#define	HAL_TXERR_XRETRY 0x01 /* excessive retries */

#define	HAL_TXERR_FILT 0x02 /* blocked by tx filtering */

#define	HAL_TXERR_FIFO 0x04 /* fifo underrun */

#define	HAL_TXERR_XTXOP 0x08 /* txop exceeded */

#define	HAL_TXERR_TIMER_EXPIRED 0x10 /* Tx timer expired */

#define	HAL_TX_BA 0x01 /* Block Ack seen */

#define	HAL_TX_AGGR 0x02 /* Aggregate */

#define	HAL_TX_DESC_CFG_ERR 0x10 /* Error in 20/40 desc config */

#define	HAL_TX_DATA_UNDERRUN 0x20 /* Tx buffer underrun */

#define	HAL_TX_DELIM_UNDERRUN 0x40 /* Tx delimiter underrun */

#define	HAL_TX_FAST_TS 0x80 /* Tx locationing timestamp */

#define	HAL_RXERR_CRC 0x01 /* CRC error on frame */

#define	HAL_RXERR_PHY 0x02 /* PHY error, rs_phyerr is valid */

#define	HAL_RXERR_FIFO 0x04 /* fifo overrun */

#define	HAL_RXERR_DECRYPT 0x08 /* non-Michael decrypt error */

#define	HAL_RXERR_MIC 0x10 /* Michael MIC decrypt error */

#define	HAL_RXERR_INCOMP 0x20 /* Rx Desc processing is incomplete */

#define	HAL_RXERR_KEYMISS 0x40 /* Key not found in keycache */

#define	HAL_RX_MORE 0x0001 /* more descriptors follow */

#define	HAL_RX_MORE_AGGR 0x0002 /* more frames in aggr */

#define	HAL_RX_GI 0x0004 /* full gi */

#define	HAL_RX_2040 0x0008 /* 40 Mhz */

#define	HAL_RX_DELIM_CRC_PRE 0x0010 /* crc error in delimiter pre */

#define	HAL_RX_DELIM_CRC_POST 0x0020 /* crc error in delim after */

#define	HAL_RX_DECRYPT_BUSY 0x0040 /* decrypt was too slow */

#define	HAL_RX_HI_RX_CHAIN 0x0080 /* SM power save: hi Rx chain control */

#define	HAL_RX_IS_APSD 0x0100 /* Is ASPD trigger frame */

#define	HAL_RX_STBC 0x0200 /* Is an STBC frame */

#define	HAL_RX_LOC_INFO 0x0400 /* RX locationing information */

#define	HAL_RX_HW_UPLOAD_DATA 0x1000 /* This is a hardware data frame */

#define	HAL_RX_HW_SOUNDING 0x2000 /* Rx sounding frame (TxBF, positioning) */

#define	HAL_RX_UPLOAD_VALID 0x4000 /* This hardware data frame is valid */

#define	HAL_RX_LNA_LNACFG 0x80 /* 1 = main LNA config used, 0 = ALT */

#define	HAL_RX_LNA_EXTCFG 0x40 /* 0 = external diversity ant1, 1 = ant2 */

#define	HAL_RX_LNA_CFG_USED 0x30 /* 2 bits; LNA config used on RX */

#define	HAL_RX_LNA_CFG_USED_S 4

#define	HAL_RX_LNA_CFG_MAIN 0x0c /* 2 bits; "Main" LNA config */

#define	HAL_RX_LNA_CFG_ALT 0x02 /* 2 bits; "Alt" LNA config */

#define	HAL_RX_LNA_FASTDIV 0x40 /* 1 = fast diversity measurement done */

#define	HAL_RX_LNA_SWITCH_0 0x30 /* 2 bits; sw_0[1:0] */

#define	HAL_RX_LNA_SWITCH_COM 0x0f /* 4 bits, sw_com[3:0] */

#define	HAL_RXKEYIX_INVALID ((uint8_t) -1)

#define	HAL_TXKEYIX_INVALID ((u_int) -1)

#define	HAL_DESC_HW_SIZE 20

#define	ds_txstat ds_us.tx

#define	ds_rxstat ds_us.rx

#define	HAL_TXDESC_CLRDMASK 0x0001 /* clear destination filter mask */

#define	HAL_TXDESC_NOACK 0x0002 /* don't wait for ACK */

#define	HAL_TXDESC_RTSENA 0x0004 /* enable RTS */

#define	HAL_TXDESC_CTSENA 0x0008 /* enable CTS */

#define	HAL_TXDESC_INTREQ 0x0010 /* enable per-descriptor interrupt */

#define	HAL_TXDESC_VEOL 0x0020 /* mark virtual EOL */

#define	HAL_TXDESC_DURENA 0x0040 /* enable h/w write of duration field */

#define	HAL_TXDESC_EXT_ONLY 0x0080 /* send on ext channel only (11n) */

#define	HAL_TXDESC_EXT_AND_CTL 0x0100 /* send on ext + ctl channels (11n) */

#define	HAL_TXDESC_VMF 0x0200 /* virtual more frag */

#define	HAL_TXDESC_LOWRXCHAIN 0x0400 /* switch to low RX chain */

#define	HAL_TXDESC_LDPC 0x1000 /* Set LDPC TX for all rates */

#define	HAL_TXDESC_HWTS 0x2000 /* Request Azimuth Timestamp in TX payload */

#define	HAL_TXDESC_POS 0x4000 /* Request ToD/ToA locationing */

#define	HAL_RXDESC_INTREQ 0x0020 /* enable per-descriptor interrupt */

Enumerations
enum	{ HAL_PHYERR_UNDERRUN = 0 , HAL_PHYERR_TIMING = 1 , HAL_PHYERR_PARITY = 2 , HAL_PHYERR_RATE = 3 , HAL_PHYERR_LENGTH = 4 , HAL_PHYERR_RADAR = 5 , HAL_PHYERR_SERVICE = 6 , HAL_PHYERR_TOR = 7 , HAL_PHYERR_OFDM_TIMING = 17 , HAL_PHYERR_OFDM_SIGNAL_PARITY = 18 , HAL_PHYERR_OFDM_RATE_ILLEGAL = 19 , HAL_PHYERR_OFDM_LENGTH_ILLEGAL = 20 , HAL_PHYERR_OFDM_POWER_DROP = 21 , HAL_PHYERR_OFDM_SERVICE = 22 , HAL_PHYERR_OFDM_RESTART = 23 , HAL_PHYERR_FALSE_RADAR_EXT = 24 , HAL_PHYERR_CCK_TIMING = 25 , HAL_PHYERR_CCK_HEADER_CRC = 26 , HAL_PHYERR_CCK_RATE_ILLEGAL = 27 , HAL_PHYERR_CCK_SERVICE = 30 , HAL_PHYERR_CCK_RESTART = 31 , HAL_PHYERR_CCK_LENGTH_ILLEGAL = 32 , HAL_PHYERR_CCK_POWER_DROP = 33 , HAL_PHYERR_HT_CRC_ERROR = 34 , HAL_PHYERR_HT_LENGTH_ILLEGAL = 35 , HAL_PHYERR_HT_RATE_ILLEGAL = 36 , HAL_PHYERR_SPECTRAL = 38 }

Macro Definition Documentation

◆ ds_rxstat

#define ds_rxstat ds_us.rx

Definition at line 256 of file ah_desc.h.

◆ ds_txstat

#define ds_txstat ds_us.tx

Definition at line 255 of file ah_desc.h.

◆ HAL_DESC_HW_SIZE

#define HAL_DESC_HW_SIZE 20

Definition at line 227 of file ah_desc.h.

◆ HAL_RX_2040

#define HAL_RX_2040 0x0008 /* 40 Mhz */

Definition at line 140 of file ah_desc.h.

◆ HAL_RX_DECRYPT_BUSY

#define HAL_RX_DECRYPT_BUSY 0x0040 /* decrypt was too slow */

Definition at line 143 of file ah_desc.h.

◆ HAL_RX_DELIM_CRC_POST

#define HAL_RX_DELIM_CRC_POST 0x0020 /* crc error in delim after */

Definition at line 142 of file ah_desc.h.

◆ HAL_RX_DELIM_CRC_PRE

#define HAL_RX_DELIM_CRC_PRE 0x0010 /* crc error in delimiter pre */

Definition at line 141 of file ah_desc.h.

◆ HAL_RX_GI

#define HAL_RX_GI 0x0004 /* full gi */

Definition at line 139 of file ah_desc.h.

◆ HAL_RX_HI_RX_CHAIN

#define HAL_RX_HI_RX_CHAIN 0x0080 /* SM power save: hi Rx chain control */

Definition at line 144 of file ah_desc.h.

◆ HAL_RX_HW_SOUNDING

#define HAL_RX_HW_SOUNDING 0x2000 /* Rx sounding frame (TxBF, positioning) */

Definition at line 150 of file ah_desc.h.

◆ HAL_RX_HW_UPLOAD_DATA

#define HAL_RX_HW_UPLOAD_DATA 0x1000 /* This is a hardware data frame */

Definition at line 149 of file ah_desc.h.

◆ HAL_RX_IS_APSD

#define HAL_RX_IS_APSD 0x0100 /* Is ASPD trigger frame */

Definition at line 145 of file ah_desc.h.

◆ HAL_RX_LNA_CFG_ALT

#define HAL_RX_LNA_CFG_ALT 0x02 /* 2 bits; "Alt" LNA config */

Definition at line 168 of file ah_desc.h.

◆ HAL_RX_LNA_CFG_MAIN

#define HAL_RX_LNA_CFG_MAIN 0x0c /* 2 bits; "Main" LNA config */

Definition at line 167 of file ah_desc.h.

◆ HAL_RX_LNA_CFG_USED

#define HAL_RX_LNA_CFG_USED 0x30 /* 2 bits; LNA config used on RX */

Definition at line 165 of file ah_desc.h.

◆ HAL_RX_LNA_CFG_USED_S

#define HAL_RX_LNA_CFG_USED_S 4

Definition at line 166 of file ah_desc.h.

◆ HAL_RX_LNA_EXTCFG

#define HAL_RX_LNA_EXTCFG 0x40 /* 0 = external diversity ant1, 1 = ant2 */

Definition at line 164 of file ah_desc.h.

◆ HAL_RX_LNA_FASTDIV

#define HAL_RX_LNA_FASTDIV 0x40 /* 1 = fast diversity measurement done */

Definition at line 175 of file ah_desc.h.

◆ HAL_RX_LNA_LNACFG

#define HAL_RX_LNA_LNACFG 0x80 /* 1 = main LNA config used, 0 = ALT */

Definition at line 163 of file ah_desc.h.

◆ HAL_RX_LNA_SWITCH_0

#define HAL_RX_LNA_SWITCH_0 0x30 /* 2 bits; sw_0[1:0] */

Definition at line 176 of file ah_desc.h.

◆ HAL_RX_LNA_SWITCH_COM

#define HAL_RX_LNA_SWITCH_COM 0x0f /* 4 bits, sw_com[3:0] */

Definition at line 177 of file ah_desc.h.

◆ HAL_RX_LOC_INFO

#define HAL_RX_LOC_INFO 0x0400 /* RX locationing information */

Definition at line 147 of file ah_desc.h.

◆ HAL_RX_MORE

#define HAL_RX_MORE 0x0001 /* more descriptors follow */

Definition at line 137 of file ah_desc.h.

◆ HAL_RX_MORE_AGGR

#define HAL_RX_MORE_AGGR 0x0002 /* more frames in aggr */

Definition at line 138 of file ah_desc.h.

◆ HAL_RX_STBC

#define HAL_RX_STBC 0x0200 /* Is an STBC frame */

Definition at line 146 of file ah_desc.h.

◆ HAL_RX_UPLOAD_VALID

#define HAL_RX_UPLOAD_VALID 0x4000 /* This hardware data frame is valid */

Definition at line 151 of file ah_desc.h.

◆ HAL_RXDESC_INTREQ

#define HAL_RXDESC_INTREQ 0x0020 /* enable per-descriptor interrupt */

Definition at line 277 of file ah_desc.h.

◆ HAL_RXERR_CRC

#define HAL_RXERR_CRC 0x01 /* CRC error on frame */

Definition at line 128 of file ah_desc.h.

◆ HAL_RXERR_DECRYPT

#define HAL_RXERR_DECRYPT 0x08 /* non-Michael decrypt error */

Definition at line 131 of file ah_desc.h.

◆ HAL_RXERR_FIFO

#define HAL_RXERR_FIFO 0x04 /* fifo overrun */

Definition at line 130 of file ah_desc.h.

◆ HAL_RXERR_INCOMP

#define HAL_RXERR_INCOMP 0x20 /* Rx Desc processing is incomplete */

Definition at line 133 of file ah_desc.h.

◆ HAL_RXERR_KEYMISS

#define HAL_RXERR_KEYMISS 0x40 /* Key not found in keycache */

Definition at line 134 of file ah_desc.h.

◆ HAL_RXERR_MIC

#define HAL_RXERR_MIC 0x10 /* Michael MIC decrypt error */

Definition at line 132 of file ah_desc.h.

◆ HAL_RXERR_PHY

#define HAL_RXERR_PHY 0x02 /* PHY error, rs_phyerr is valid */

Definition at line 129 of file ah_desc.h.

◆ HAL_RXKEYIX_INVALID

#define HAL_RXKEYIX_INVALID ((uint8_t) -1)

Definition at line 213 of file ah_desc.h.

◆ HAL_TX_AGGR

#define HAL_TX_AGGR 0x02 /* Aggregate */

Definition at line 71 of file ah_desc.h.

◆ HAL_TX_BA

#define HAL_TX_BA 0x01 /* Block Ack seen */

Definition at line 70 of file ah_desc.h.

◆ HAL_TX_DATA_UNDERRUN

#define HAL_TX_DATA_UNDERRUN 0x20 /* Tx buffer underrun */

Definition at line 73 of file ah_desc.h.

◆ HAL_TX_DELIM_UNDERRUN

#define HAL_TX_DELIM_UNDERRUN 0x40 /* Tx delimiter underrun */

Definition at line 74 of file ah_desc.h.

◆ HAL_TX_DESC_CFG_ERR

#define HAL_TX_DESC_CFG_ERR 0x10 /* Error in 20/40 desc config */

Definition at line 72 of file ah_desc.h.

◆ HAL_TX_FAST_TS

#define HAL_TX_FAST_TS 0x80 /* Tx locationing timestamp */

Definition at line 75 of file ah_desc.h.

◆ HAL_TXDESC_CLRDMASK

#define HAL_TXDESC_CLRDMASK 0x0001 /* clear destination filter mask */

Definition at line 260 of file ah_desc.h.

◆ HAL_TXDESC_CTSENA

#define HAL_TXDESC_CTSENA 0x0008 /* enable CTS */

Definition at line 263 of file ah_desc.h.

◆ HAL_TXDESC_DURENA

#define HAL_TXDESC_DURENA 0x0040 /* enable h/w write of duration field */

Definition at line 267 of file ah_desc.h.

◆ HAL_TXDESC_EXT_AND_CTL

#define HAL_TXDESC_EXT_AND_CTL 0x0100 /* send on ext + ctl channels (11n) */

Definition at line 269 of file ah_desc.h.

◆ HAL_TXDESC_EXT_ONLY

#define HAL_TXDESC_EXT_ONLY 0x0080 /* send on ext channel only (11n) */

Definition at line 268 of file ah_desc.h.

◆ HAL_TXDESC_HWTS

#define HAL_TXDESC_HWTS 0x2000 /* Request Azimuth Timestamp in TX payload */

Definition at line 273 of file ah_desc.h.

◆ HAL_TXDESC_INTREQ

#define HAL_TXDESC_INTREQ 0x0010 /* enable per-descriptor interrupt */

Definition at line 264 of file ah_desc.h.

◆ HAL_TXDESC_LDPC

#define HAL_TXDESC_LDPC 0x1000 /* Set LDPC TX for all rates */

Definition at line 272 of file ah_desc.h.

◆ HAL_TXDESC_LOWRXCHAIN

#define HAL_TXDESC_LOWRXCHAIN 0x0400 /* switch to low RX chain */

Definition at line 271 of file ah_desc.h.

◆ HAL_TXDESC_NOACK

#define HAL_TXDESC_NOACK 0x0002 /* don't wait for ACK */

Definition at line 261 of file ah_desc.h.

◆ HAL_TXDESC_POS

#define HAL_TXDESC_POS 0x4000 /* Request ToD/ToA locationing */

Definition at line 274 of file ah_desc.h.

◆ HAL_TXDESC_RTSENA

#define HAL_TXDESC_RTSENA 0x0004 /* enable RTS */

Definition at line 262 of file ah_desc.h.

◆ HAL_TXDESC_VEOL

#define HAL_TXDESC_VEOL 0x0020 /* mark virtual EOL */

Definition at line 265 of file ah_desc.h.

◆ HAL_TXDESC_VMF

#define HAL_TXDESC_VMF 0x0200 /* virtual more frag */

Definition at line 270 of file ah_desc.h.

◆ HAL_TXERR_FIFO

#define HAL_TXERR_FIFO 0x04 /* fifo underrun */

Definition at line 65 of file ah_desc.h.

◆ HAL_TXERR_FILT

#define HAL_TXERR_FILT 0x02 /* blocked by tx filtering */

Definition at line 64 of file ah_desc.h.

◆ HAL_TXERR_TIMER_EXPIRED

#define HAL_TXERR_TIMER_EXPIRED 0x10 /* Tx timer expired */

Definition at line 67 of file ah_desc.h.

◆ HAL_TXERR_XRETRY

#define HAL_TXERR_XRETRY 0x01 /* excessive retries */

Definition at line 63 of file ah_desc.h.

◆ HAL_TXERR_XTXOP

#define HAL_TXERR_XTXOP 0x08 /* txop exceeded */

Definition at line 66 of file ah_desc.h.

◆ HAL_TXKEYIX_INVALID

#define HAL_TXKEYIX_INVALID ((u_int) -1)

Definition at line 215 of file ah_desc.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
HAL_PHYERR_UNDERRUN
HAL_PHYERR_TIMING
HAL_PHYERR_PARITY
HAL_PHYERR_RATE
HAL_PHYERR_LENGTH
HAL_PHYERR_RADAR
HAL_PHYERR_SERVICE
HAL_PHYERR_TOR
HAL_PHYERR_OFDM_TIMING
HAL_PHYERR_OFDM_SIGNAL_PARITY
HAL_PHYERR_OFDM_RATE_ILLEGAL
HAL_PHYERR_OFDM_LENGTH_ILLEGAL
HAL_PHYERR_OFDM_POWER_DROP
HAL_PHYERR_OFDM_SERVICE
HAL_PHYERR_OFDM_RESTART
HAL_PHYERR_FALSE_RADAR_EXT
HAL_PHYERR_CCK_TIMING
HAL_PHYERR_CCK_HEADER_CRC
HAL_PHYERR_CCK_RATE_ILLEGAL
HAL_PHYERR_CCK_SERVICE
HAL_PHYERR_CCK_RESTART
HAL_PHYERR_CCK_LENGTH_ILLEGAL
HAL_PHYERR_CCK_POWER_DROP
HAL_PHYERR_HT_CRC_ERROR
HAL_PHYERR_HT_LENGTH_ILLEGAL
HAL_PHYERR_HT_RATE_ILLEGAL
HAL_PHYERR_SPECTRAL

Definition at line 179 of file ah_desc.h.

Data Structures

Macros

Enumerations