34#define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v))
49 for (i = 0; i < 6; i++) {
53 if (sum == 0 || sum == 0xffff*3) {
135 const void *args, uint32_t argsize,
void **result, uint32_t *resultsize)
224 return (uint16_t)((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
261 "%s Numctls = %u\n",__func__,i);
276#define owl_get_eep_ver(_ee) \
277 (((_ee)->ee_base.baseEepHeader.version >> 12) & 0xF)
278#define owl_get_eep_rev(_ee) \
279 (((_ee)->ee_base.baseEepHeader.version) & 0xFFF)
284#define NW(a) (sizeof(a) / sizeof(uint16_t))
286 uint16_t *eep_data, magic;
300 "%s Error reading Eeprom MAGIC\n", __func__);
317 eep_data = (uint16_t *)&ee->
ee_base;
322 "%s eeprom read error at offset 0x%x\n",
334 eep_data[w] = __bswap16(eep_data[w]);
344 "Byte swap EEPROM contents.\n");
359 for (w = 0; w < len; w++) {
365 "Bad EEPROM checksum 0x%x (Len=%u)\n", sum, len);
374 eep_data[0] = eep_data[2];
378 "%s Eeprom Version %u.%u\n", __func__,
#define AR5416_EEPMISC_BIG_ENDIAN
#define AR5416_OPFLAGS_11A
#define AR5416_EEP_RXGAIN_ORIG
#define AR5416_EEPROM_MAGIC
#define AR5416_OPFLAGS_11G
#define AR5416_EEPROM_MAGIC_OFFSET
#define owl_eep_start_loc
#define CAL_CTL_EDGES_POWER
#define AR5416_EEPROM_MODAL_SPURS
#define CAL_CTL_EDGES_FLAG
#define AR5416_BCHAN_UNUSED
#define owl_get_eep_rev(_ee)
static uint16_t v4kEepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
static void eepromSwap(struct ar5416eeprom_4k *ee)
static HAL_STATUS v4kEepromSet(struct ath_hal *ah, int param, int v)
static HAL_BOOL v4kEepromDiag(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
HAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah)
#define owl_get_eep_ver(_ee)
static uint16_t fbin2freq(uint8_t fbin, HAL_BOOL is2GHz)
static void v4kEepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_v4k *ee)
static HAL_STATUS v4kEepromGet(struct ath_hal *ah, int param, void *val)
static void v4kEepromDetach(struct ath_hal *ah)
#define AR5416_4K_MAX_CHAINS
#define AR5416_4K_NUM_CTLS
void * ath_hal_malloc(size_t)
static __inline__ int isBigEndian(void)
#define HALDEBUG(_ah, __m,...)
#define ath_hal_eepromRead(_ah, _off, _data)
void ath_hal_free(void *p)
const char * ath_hal_ether_sprintf(const u_int8_t *mac)
CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES]
struct ar5416eeprom_4k ee_base
RD_EDGES_POWER ee_rdEdgesPower[NUM_EDGES *AR5416_4K_NUM_CTLS]
uint16_t twice_rdEdgePower
uint8_t ctlIndex[AR5416_4K_NUM_CTLS]
BASE_EEP4K_HEADER baseEepHeader
MODAL_EEP4K_HEADER modalHeader
CAL_CTL_DATA_4K ctlData[AR5416_4K_NUM_CTLS]