FreeBSD kernel ATH device code
ar9285_btcoex.c
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1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2005 Atheros Communications, Inc.
6 * Copyright (c) 2008-2010, Atheros Communications Inc.
7 *
8 * Permission to use, copy, modify, and/or distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 *
20 * $FreeBSD$
21 */
22
23#include "opt_ah.h"
24
25#include "ah.h"
26#include "ah_internal.h"
27#include "ah_devid.h"
28#ifdef AH_DEBUG
29#include "ah_desc.h" /* NB: for HAL_PHYERR* */
30#endif
31
32#include "ar5416/ar5416.h"
33#include "ar5416/ar5416reg.h"
34#include "ar5416/ar5416phy.h"
35#include "ar5416/ar5416desc.h" /* AR5416_CONTTXMODE */
36
37#include "ar9002/ar9285phy.h"
38#include "ar9002/ar9285.h"
39
40/*
41 * This is specific to Kite.
42 *
43 * Kiwi and others don't have antenna diversity like this.
44 */
45void
47{
48 struct ath_hal_5416 *ahp = AH5416(ah);
49 u_int32_t regVal;
50 u_int8_t ant_div_control1, ant_div_control2;
51
53 "%s: btCoexFlag: ALLOW=%d, ENABLE=%d\n",
54 __func__,
57
59 (AH5212(ah)->ah_diversity != HAL_ANT_VARIABLE)) {
61 (AH5212(ah)->ah_antControl == HAL_ANT_VARIABLE)) {
62 /* Enable antenna diversity */
63 ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_ENABLE;
64 ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_ENABLE;
65
66 /* Don't disable BT ant to allow BB to control SWCOM */
69
70 /* Program the correct SWCOM table */
73 OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
74 } else if (AH5212(ah)->ah_antControl == HAL_ANT_FIXED_B) {
75 /* Disable antenna diversity. Use antenna B(LNA2) only. */
76 ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_B;
77 ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_B;
78
79 /* Disable BT ant to allow concurrent BT and WLAN receive */
82
83 /*
84 * Program SWCOM table to make sure RF switch always parks
85 * at WLAN side
86 */
89 OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0x60000000, 0xf0000000);
90 } else {
91 /* Disable antenna diversity. Use antenna A(LNA1) only */
92 ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_A;
93 ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_A;
94
95 /* Disable BT ant to allow concurrent BT and WLAN receive */
98
99 /*
100 * Program SWCOM table to make sure RF switch always
101 * parks at BT side
102 */
104 OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
105 }
106
108 regVal &= (~(AR_PHY_9285_ANT_DIV_CTL_ALL));
109 /*
110 * Clear ant_fast_div_bias [14:9] since for Janus the main LNA is
111 * always LNA1.
112 */
113 regVal &= (~(AR_PHY_9285_FAST_DIV_BIAS));
114
115 regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
116 regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
117 regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
118 regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
119 regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
121
122 regVal = OS_REG_READ(ah, AR_PHY_CCK_DETECT);
123 regVal &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
124 regVal |= SM((ant_div_control1 >> 3),
126 OS_REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal);
127 }
128}
129
130void
131ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)
132{
133 struct ath_hal_5416 *ahp = AH5416(ah);
134
135 switch (type) {
137 if (AR_SREV_KITE(ah)) {
139 if (value)
140 ahp->ah_btCoexFlag |=
142 else
143 ahp->ah_btCoexFlag &=
144 ~HAL_BT_COEX_FLAG_ANT_DIV_ENABLE;
146 }
147 break;
148 default:
149 ar5416BTCoexSetParameter(ah, type, value);
150 break;
151 }
152}
@ HAL_ANT_FIXED_B
Definition: ah.h:761
@ HAL_ANT_VARIABLE
Definition: ah.h:759
#define HAL_BT_COEX_FLAG_ANT_DIV_ALLOW
Definition: ah_btcoex.h:164
#define HAL_BT_COEX_ANT_DIV_SWITCH_COM
Definition: ah_btcoex.h:90
#define HAL_BT_COEX_ANTDIV_CONTROL1_ENABLE
Definition: ah_btcoex.h:80
#define HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_A
Definition: ah_btcoex.h:84
#define HAL_BT_COEX_FLAG_ANT_DIV_ENABLE
Definition: ah_btcoex.h:165
#define HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_B
Definition: ah_btcoex.h:86
@ HAL_BT_COEX_ANTENNA_DIVERSITY
Definition: ah_btcoex.h:64
#define HAL_BT_COEX_ANTDIV_CONTROL2_ENABLE
Definition: ah_btcoex.h:82
#define HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_B
Definition: ah_btcoex.h:85
#define HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_A
Definition: ah_btcoex.h:83
@ HAL_DEBUG_BT_COEX
Definition: ah_debug.h:58
#define SM(_v, _f)
Definition: ah_internal.h:587
#define OS_REG_RMW(_a, _r, _set, _clr)
Definition: ah_internal.h:589
#define HALDEBUG(_ah, __m,...)
Definition: ah_internal.h:658
#define OS_REG_WRITE(_ah, _reg, _val)
Definition: ah_osdep.h:139
#define OS_REG_READ(_ah, _reg)
Definition: ah_osdep.h:140
#define AH5212(_ah)
Definition: ar5212.h:354
#define AR_PHY_CCK_DETECT
Definition: ar5212phy.h:315
#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV
Definition: ar5212phy.h:318
#define AH5416(_ah)
Definition: ar5416.h:162
void ar5416BTCoexSetParameter(struct ath_hal *ah, uint32_t type, uint32_t value)
#define AR_PHY_MULTICHAIN_GAIN_CTL
Definition: ar5416phy.h:268
#define AR_PHY_SWITCH_CHAIN_0
Definition: ar5416phy.h:285
#define AR_PHY_SWITCH_COM
Definition: ar5416phy.h:286
#define AR_BT_COEX_MODE2
Definition: ar5416phy.h:52
#define AR_BT_DISABLE_BT_ANT
Definition: ar5416phy.h:59
#define AR_SREV_KITE(_ah)
Definition: ar5416reg.h:754
void ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)
void ar9285BTCoexAntennaDiversity(struct ath_hal *ah)
Definition: ar9285_btcoex.c:46
#define AR_PHY_9285_ANT_DIV_ALT_GAINTB
Definition: ar9285phy.h:115
#define AR_PHY_9285_ANT_DIV_CTL_ALL
Definition: ar9285phy.h:108
#define AR_PHY_9285_ANT_DIV_MAIN_GAINTB
Definition: ar9285phy.h:117
#define AR_PHY_9285_ANT_DIV_MAIN_LNACONF
Definition: ar9285phy.h:113
#define AR_PHY_9285_FAST_DIV_BIAS
Definition: ar9285phy.h:106
#define AR_PHY_9285_ANT_DIV_CTL
Definition: ar9285phy.h:109
#define AR_PHY_9285_ANT_DIV_ALT_LNACONF
Definition: ar9285phy.h:111
uint32_t ah_btCoexMode2
Definition: ar5416.h:159
uint32_t ah_btCoexFlag
Definition: ar5416.h:160
Definition: ah.h:1219