33#include "ar5416/ar5416.ini"
39 const struct ieee80211_channel *chan);
41 const struct ieee80211_channel *chan);
48 .totalSizeDesired = { -55, -55, -55, -55, -62 },
49 .coarseHigh = { -14, -14, -14, -14, -12 },
50 .coarseLow = { -64, -64, -64, -64, -70 },
51 .firpwr = { -78, -78, -78, -78, -80 },
52 .maxSpurImmunityLevel = 7,
53 .cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 },
55 .firstep = { 0, 4, 8 },
219#ifdef AH_SUPPORT_WRITE_EEPROM
246 AH5416(ah)->ah_ani_function = 0xffffffff;
263#define AR_FTRIG_512B 0x00000080
270 AH5212(ah)->ah_maxTxTrigLev = ((2048 / 64) - 1);
273 AH5212(ah)->ah_maxTxTrigLev = ((4096 / 64) - 1);
278 AH5212(ah)->ah_maxTxTrigLev -= 4;
289 for (i = 0; i < 8; i++)
292 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
312 __func__, sc, (
void*) st, (
void*) sh);
321 "%s: cannot allocate memory for state block\n", __func__);
361 ath_hal_printf(ah,
"[ath] Enabling CLKDRV workaround for AR5416 < v2.2\n");
368 AH5416(ah)->ah_ini_addac.data = (uint32_t *) &
AH5416(ah)[1];
424 "%s: 5G Radio Chip Rev 0x%02X is not supported by "
425 "this driver\n", __func__,
443 "%s: error getting mac address from EEPROM\n", __func__);
502 "%s: failed to wake up chip\n",
587 u_int modesIndex, freqIndex;
592 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
594 if (IEEE80211_IS_CHAN_HT40(chan))
596 else if (IEEE80211_IS_CHAN_108G(chan))
602 if (IEEE80211_IS_CHAN_HT40(chan) ||
603 IEEE80211_IS_CHAN_TURBO(chan))
626 modesIndex, regWrites);
631 AH5212(ah)->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
647 static const int inc[4] = { 0, 100, 0, 0 };
652 int spur_delta_phase;
654 int upper, lower, cur_vit_mask;
663 HAL_BOOL is2GHz = IEEE80211_IS_CHAN_2GHZ(chan);
677 cur_bb_spur = cur_bb_spur - (freq * 10);
678 if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
679 bb_spur = cur_bb_spur;
710 spur_delta_phase = ((bb_spur * 524288) / 100) &
716 denominator = IEEE80211_IS_CHAN_2GHZ(chan) ? 440 : 400;
717 spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
737 for (i = 0; i < 4; i++) {
741 for (bp = 0; bp < 30; bp++) {
742 if ((cur_bin > lower) && (cur_bin < upper)) {
743 pilot_mask = pilot_mask | 0x1 << bp;
744 chan_mask = chan_mask | 0x1 << bp;
776 for (i = 0; i < 123; i++) {
777 if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
778 if ((
abs(cur_vit_mask - bin)) < 75) {
783 if (cur_vit_mask < 0) {
784 mask_m[
abs(cur_vit_mask / 100)] = mask_amt;
786 mask_p[cur_vit_mask / 100] = mask_amt;
792 tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
793 | (mask_m[48] << 26) | (mask_m[49] << 24)
794 | (mask_m[50] << 22) | (mask_m[51] << 20)
795 | (mask_m[52] << 18) | (mask_m[53] << 16)
796 | (mask_m[54] << 14) | (mask_m[55] << 12)
797 | (mask_m[56] << 10) | (mask_m[57] << 8)
798 | (mask_m[58] << 6) | (mask_m[59] << 4)
799 | (mask_m[60] << 2) | (mask_m[61] << 0);
803 tmp_mask = (mask_m[31] << 28)
804 | (mask_m[32] << 26) | (mask_m[33] << 24)
805 | (mask_m[34] << 22) | (mask_m[35] << 20)
806 | (mask_m[36] << 18) | (mask_m[37] << 16)
807 | (mask_m[48] << 14) | (mask_m[39] << 12)
808 | (mask_m[40] << 10) | (mask_m[41] << 8)
809 | (mask_m[42] << 6) | (mask_m[43] << 4)
810 | (mask_m[44] << 2) | (mask_m[45] << 0);
814 tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
815 | (mask_m[18] << 26) | (mask_m[18] << 24)
816 | (mask_m[20] << 22) | (mask_m[20] << 20)
817 | (mask_m[22] << 18) | (mask_m[22] << 16)
818 | (mask_m[24] << 14) | (mask_m[24] << 12)
819 | (mask_m[25] << 10) | (mask_m[26] << 8)
820 | (mask_m[27] << 6) | (mask_m[28] << 4)
821 | (mask_m[29] << 2) | (mask_m[30] << 0);
825 tmp_mask = (mask_m[ 0] << 30) | (mask_m[ 1] << 28)
826 | (mask_m[ 2] << 26) | (mask_m[ 3] << 24)
827 | (mask_m[ 4] << 22) | (mask_m[ 5] << 20)
828 | (mask_m[ 6] << 18) | (mask_m[ 7] << 16)
829 | (mask_m[ 8] << 14) | (mask_m[ 9] << 12)
830 | (mask_m[10] << 10) | (mask_m[11] << 8)
831 | (mask_m[12] << 6) | (mask_m[13] << 4)
832 | (mask_m[14] << 2) | (mask_m[15] << 0);
836 tmp_mask = (mask_p[15] << 28)
837 | (mask_p[14] << 26) | (mask_p[13] << 24)
838 | (mask_p[12] << 22) | (mask_p[11] << 20)
839 | (mask_p[10] << 18) | (mask_p[ 9] << 16)
840 | (mask_p[ 8] << 14) | (mask_p[ 7] << 12)
841 | (mask_p[ 6] << 10) | (mask_p[ 5] << 8)
842 | (mask_p[ 4] << 6) | (mask_p[ 3] << 4)
843 | (mask_p[ 2] << 2) | (mask_p[ 1] << 0);
847 tmp_mask = (mask_p[30] << 28)
848 | (mask_p[29] << 26) | (mask_p[28] << 24)
849 | (mask_p[27] << 22) | (mask_p[26] << 20)
850 | (mask_p[25] << 18) | (mask_p[24] << 16)
851 | (mask_p[23] << 14) | (mask_p[22] << 12)
852 | (mask_p[21] << 10) | (mask_p[20] << 8)
853 | (mask_p[19] << 6) | (mask_p[18] << 4)
854 | (mask_p[17] << 2) | (mask_p[16] << 0);
858 tmp_mask = (mask_p[45] << 28)
859 | (mask_p[44] << 26) | (mask_p[43] << 24)
860 | (mask_p[42] << 22) | (mask_p[41] << 20)
861 | (mask_p[40] << 18) | (mask_p[39] << 16)
862 | (mask_p[38] << 14) | (mask_p[37] << 12)
863 | (mask_p[36] << 10) | (mask_p[35] << 8)
864 | (mask_p[34] << 6) | (mask_p[33] << 4)
865 | (mask_p[32] << 2) | (mask_p[31] << 0);
869 tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
870 | (mask_p[59] << 26) | (mask_p[58] << 24)
871 | (mask_p[57] << 22) | (mask_p[56] << 20)
872 | (mask_p[55] << 18) | (mask_p[54] << 16)
873 | (mask_p[53] << 14) | (mask_p[52] << 12)
874 | (mask_p[51] << 10) | (mask_p[50] << 8)
875 | (mask_p[49] << 6) | (mask_p[48] << 4)
876 | (mask_p[47] << 2) | (mask_p[46] << 0);
1069 return "Atheros 5416";
1071 return "Atheros 5418";
uint32_t ath_hal_reverseBits(uint32_t val, uint32_t n)
int ath_hal_ini_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia, int col, int regWr)
@ HAL_MODE_11NG_HT40MINUS
@ HAL_MODE_11NA_HT40MINUS
#define HAL_NUM_TX_QUEUES
@ HAL_ANI_NOISE_IMMUNITY_LEVEL
#define AR5416_DEVID_PCIE
#define ATHEROS_VENDOR_ID
HAL_STATUS ath_hal_v14EepromAttach(struct ath_hal *ah)
#define owl_get_ntxchains(_txchainmask)
#define AR5416_EEPROM_MODAL_SPURS
#define OS_REG_SET_BIT(_a, _r, _f)
#define HAL_INI_INIT(_ia, _data, _cols)
#define ath_hal_configPCIE(_ah, _reset, _poweroff)
#define ath_hal_eepromGet(_ah, _param, _val)
#define OS_REG_CLR_BIT(_a, _r, _f)
#define ath_hal_getSpurChan(_ah, _ix, _is2G)
void * ath_hal_malloc(size_t)
static OS_INLINE uint16_t ath_hal_gethwchannel(struct ath_hal *ah, const struct ieee80211_channel *c)
#define HAL_INI_VAL(_ia, _r, _c)
#define HALDEBUG(_ah, __m,...)
#define ath_hal_disablePCIE(_ah)
#define ath_hal_eepromGetFlag(_ah, _param)
#define ath_hal_eepromDetach(_ah)
void ath_hal_free(void *p)
void ath_hal_printf(struct ath_hal *, const char *,...)
#define OS_REG_WRITE_BUFFER_DISABLE(_ah)
bus_space_tag_t HAL_BUS_TAG
#define OS_MEMZERO(_a, _n)
#define OS_REG_WRITE(_ah, _reg, _val)
#define OS_REG_WRITE_BUFFER_ENABLE(_ah)
bus_space_handle_t HAL_BUS_HANDLE
#define OS_MEMCPY(_d, _s, _n)
#define OS_REG_WRITE_BUFFER_FLUSH(_ah)
#define OS_REG_READ(_ah, _reg)
HAL_BOOL ar2133RfAttach(struct ath_hal *ah, HAL_STATUS *status)
HAL_BOOL ar5212ChipTest(struct ath_hal *ah)
#define ar5212RfDetach(ah)
void ar5212InitState(struct ath_hal_5212 *, uint16_t devid, HAL_SOFTC, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
#define AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK
#define AR_PHY_BIN_MASK2_2
#define AR_PHY_TIMING11_SPUR_FREQ_SD
#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER
#define AR_PHY_BIN_MASK2_3
#define AR_PHY_BIN_MASK_1
#define AR_PHY_BIN_MASK2_4
#define AR_PHY_TIMING11_USE_SPUR_IN_AGC
#define AR_PHY_BIN_MASK2_1
#define AR_PHY_BIN_MASK_3
#define AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK
#define AR_PHY_BIN_MASK_2
#define AR_PHY_TIMING11_SPUR_DELTA_PHASE
#define AR_RADIO_SREV_MAJOR
void ar5416Set11nBurstDuration(struct ath_hal *ah, struct ath_desc *ds, u_int burstDuration)
HAL_BOOL ar5416AniControl(struct ath_hal *, HAL_ANI_CMD cmd, int param)
void ar5416SetBeaconTimers(struct ath_hal *, const HAL_BEACON_TIMERS *)
void ar5416AniPoll(struct ath_hal *, const struct ieee80211_channel *)
void ar5416Set11nVirtualMoreFrag(struct ath_hal *ah, struct ath_desc *ds, u_int vmf)
HAL_BOOL ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int keyIx, HAL_CIPHER cipher, uint8_t delims, HAL_BOOL firstSeg, HAL_BOOL lastSeg, HAL_BOOL lastAggr)
void ar5416RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, const struct ieee80211_channel *)
void ar5416ResetTsf(struct ath_hal *ah)
void ar5416SetBTCoexInfo(struct ath_hal *ah, HAL_BT_COEX_INFO *btinfo)
#define AR5416_DEFAULT_TXCHAINMASK
HAL_BOOL ar5416SetupTxDesc(struct ath_hal *ah, struct ath_desc *ds, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, u_int txRate0, u_int txTries0, u_int keyIx, u_int antMode, u_int flags, u_int rtsctsRate, u_int rtsctsDuration, u_int compicvLen, u_int compivLen, u_int comp)
HAL_BOOL ar5416GetPendingInterrupts(struct ath_hal *, HAL_INT *masked)
HAL_BOOL ar5416EepromRead(struct ath_hal *, u_int off, uint16_t *data)
u_int ar5416GetWirelessModes(struct ath_hal *ah)
HAL_BOOL ar5416SetBoardValues(struct ath_hal *, const struct ieee80211_channel *)
#define AR5416_SPUR_RSSI_THRESH
void ar5416ResetStaBeaconTimers(struct ath_hal *ah)
void ar5416ConfigureSpectralScan(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
HAL_BOOL ar5416GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *ds0, int *rates, int *tries)
HAL_HT_RXCLEAR ar5416Get11nRxClear(struct ath_hal *ah)
void ar5416GetSpectralParams(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
HAL_BOOL ar5416SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry, const HAL_KEYVAL *k, const uint8_t *mac, int xorKey)
void ar5416StopSpectralScan(struct ath_hal *ah)
uint64_t ar5416GetTsf64(struct ath_hal *ah)
HAL_STATUS ar5416GetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t *result)
void ar5416BTCoexConfig(struct ath_hal *ah, HAL_BT_COEX_CONFIG *btconf)
void ar5416BTCoexSetQcuThresh(struct ath_hal *ah, int qnum)
void ar5416GpioSetIntr(struct ath_hal *ah, u_int, uint32_t ilevel)
void ar5416SetTsf64(struct ath_hal *ah, uint64_t tsf64)
void ar5416SetRxFilter(struct ath_hal *ah, uint32_t bits)
void ar5416BeaconInit(struct ath_hal *ah, uint32_t next_beacon, uint32_t beacon_period)
void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
HAL_RFGAIN ar5416GetRfgain(struct ath_hal *ah)
uint32_t ar5416GpioGet(struct ath_hal *ah, uint32_t gpio)
HAL_INT ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints)
HAL_BOOL ar5416SetupRxDesc(struct ath_hal *, struct ath_desc *, uint32_t size, u_int flags)
HAL_BOOL ar5416GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample)
HAL_BOOL ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, struct ieee80211_channel *chan, HAL_BOOL bChannelChange, HAL_RESET_TYPE, HAL_STATUS *status)
HAL_BOOL ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *, HAL_RESET_TYPE)
HAL_BOOL ar5416StopDmaReceive(struct ath_hal *ah)
HAL_BOOL ar5416ResetTxQueue(struct ath_hal *ah, u_int q)
HAL_BOOL ar5416ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry)
HAL_BOOL ar5416SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
const HAL_RATE_TABLE * ar5416GetRateTable(struct ath_hal *, u_int mode)
void ar5416StartPcuReceive(struct ath_hal *ah, HAL_BOOL)
void ar5416Set11nMac2040(struct ath_hal *ah, HAL_HT_MACMODE mode)
void ar5416SetLedState(struct ath_hal *ah, HAL_LED_STATE state)
HAL_BOOL ar5416SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING)
void ar5416Set11nRateScenario(struct ath_hal *ah, struct ath_desc *ds, u_int durUpdateEn, u_int rtsctsRate, HAL_11N_RATE_SERIES series[], u_int nseries, u_int flags)
HAL_BOOL ar5416GpioCfgOutput(struct ath_hal *, uint32_t gpio, HAL_GPIO_MUX_TYPE)
HAL_BOOL ar5416GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val)
HAL_BOOL ar5416EepromWrite(struct ath_hal *, u_int off, uint16_t data)
HAL_BOOL ar5416GpioCfgInput(struct ath_hal *, uint32_t gpio)
HAL_BOOL ar5416SetTransmitPower(struct ath_hal *, const struct ieee80211_channel *, uint16_t *)
void ar5416SetChainMasks(struct ath_hal *ah, uint32_t, uint32_t)
void ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
void ar5416Clr11nAggr(struct ath_hal *ah, struct ath_desc *ds)
HAL_BOOL ar5416GetDfsDefaultThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
HAL_BOOL ar5416SetupXTxDesc(struct ath_hal *, struct ath_desc *, u_int txRate1, u_int txRetries1, u_int txRate2, u_int txRetries2, u_int txRate3, u_int txRetries3)
void ar5416BTCoexSetParameter(struct ath_hal *ah, uint32_t type, uint32_t value)
void ar5416GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
HAL_BOOL ar5416IsSpectralActive(struct ath_hal *ah)
#define AR5416_KEYTABLE_SIZE
void ar5416SetCoverageClass(struct ath_hal *, uint8_t, int)
void ar5416StopPcuReceive(struct ath_hal *ah)
void ar5416AniDetach(struct ath_hal *)
HAL_BOOL ar5416GetDiagState(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
uint64_t ar5416GetNextTBTT(struct ath_hal *)
void ar5416BTCoexSetupBmissThresh(struct ath_hal *ah, uint32_t thresh)
HAL_BOOL ar5416FillTxDesc(struct ath_hal *ah, struct ath_desc *ds, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg, const struct ath_desc *ds0)
HAL_BOOL ar5416IsFastClockEnabled(struct ath_hal *ah)
uint32_t ar5416Get11nExtBusy(struct ath_hal *ah)
void ar5416BTCoexSetWeights(struct ath_hal *ah, uint32_t stompType)
void ar5416Set11nAggrMiddle(struct ath_hal *ah, struct ath_desc *ds, u_int numDelims)
void ar5416EepromSetAddac(struct ath_hal *ah, const struct ieee80211_channel *chan)
void ar5416Set11nAggrFirst(struct ath_hal *ah, struct ath_desc *ds, u_int aggrLen, u_int numDelims)
int ar5416BTCoexEnable(struct ath_hal *ah)
void ar5416BTCoexAntennaDiversity(struct ath_hal *ah)
HAL_BOOL ar5416IsSpectralEnabled(struct ath_hal *ah)
HAL_STATUS ar5416SetQuiet(struct ath_hal *ah, uint32_t period, uint32_t duration, uint32_t nextStart, HAL_QUIET_FLAG flag)
HAL_BOOL ar5416StopTxDma(struct ath_hal *ah, u_int q)
HAL_BOOL ar5416PhyDisable(struct ath_hal *ah)
HAL_BOOL ar5416Disable(struct ath_hal *ah)
HAL_BOOL ar5416SetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t val, HAL_STATUS *status)
void ar5416Set11nAggrLast(struct ath_hal *ah, struct ath_desc *ds)
HAL_BOOL ar5416SetTxPowerLimit(struct ath_hal *ah, uint32_t limit)
HAL_STATUS ar5416ProcRxDesc(struct ath_hal *ah, struct ath_desc *, uint32_t, struct ath_desc *, uint64_t, struct ath_rx_status *)
void ar5416BTCoexDisable(struct ath_hal *ah)
HAL_BOOL ar5416SetupLastTxDesc(struct ath_hal *ah, struct ath_desc *ds, const struct ath_desc *ds0)
void ar5416StartSpectralScan(struct ath_hal *ah)
void ar5416AniAttach(struct ath_hal *, const struct ar5212AniParams *, const struct ar5212AniParams *, HAL_BOOL ena)
HAL_STATUS ar5416ProcTxDesc(struct ath_hal *ah, struct ath_desc *, struct ath_tx_status *)
void ar5416ProcessMibIntr(struct ath_hal *, const HAL_NODE_STATS *)
#define AR5416_DEFAULT_RXCHAINMASK
HAL_BOOL ar5416SetupFirstTxDesc(struct ath_hal *ah, struct ath_desc *ds, u_int aggrLen, u_int flags, u_int txPower, u_int txRate0, u_int txTries0, u_int antMode, u_int rtsctsRate, u_int rtsctsDuration)
int ar5416SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, const HAL_TXQ_INFO *qInfo)
HAL_BOOL ar5416SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData, const struct ieee80211_channel *chan, int16_t *pTxPowerIndexOffset)
HAL_BOOL ar5416SetResetReg(struct ath_hal *, uint32_t type)
HAL_BOOL ar5416GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
HAL_BOOL ar5416IsInterruptPending(struct ath_hal *ah)
HAL_BOOL ar5416ProcessRadarEvent(struct ath_hal *ah, struct ath_rx_status *rxs, uint64_t fulltsf, const char *buf, HAL_DFS_EVENT *event)
uint32_t ar5416GetRxFilter(struct ath_hal *ah)
void ar5416Set11nRxClear(struct ath_hal *ah, HAL_HT_RXCLEAR rxclear)
void ar5416SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *)
HAL_BOOL ar5416SetDecompMask(struct ath_hal *, uint16_t, int)
static void ar5416WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
void ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
static void ar5416olcTempCompensation(struct ath_hal *ah)
static void ar5416olcInit(struct ath_hal *ah)
static void ar5416DisablePCIE(struct ath_hal *ah)
void ar5416Detach(struct ath_hal *ah)
AH_CHIP(AR5416, ar5416Probe, ar5416Attach)
void ar5416AttachPCIE(struct ath_hal *ah)
static void ar5416SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan)
static void ar5416AniSetup(struct ath_hal *ah)
static const char * ar5416Probe(uint16_t vendorid, uint16_t devid)
HAL_BOOL ar5416FillCapabilityInfo(struct ath_hal *ah)
uint32_t ar5416GetRadioRev(struct ath_hal *ah)
static struct ath_hal * ar5416Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
HAL_BOOL ar5416PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int rxchainmask, HAL_BOOL longcal, HAL_BOOL *isCalDone)
HAL_BOOL ar5416ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan)
void ar5416InitNfHistBuff(struct ar5212NfCalHist *h)
HAL_BOOL ar5416InitCalHardware(struct ath_hal *ah, const struct ieee80211_channel *chan)
HAL_BOOL ar5416PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan, HAL_BOOL *isIQdone)
#define AR_PHY_MASK2_M_16_30
#define AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ
#define AR_PHY_SEL_EXTERNAL_RADIO
#define AR_PHY_SEL_INTERNAL_ADDAC
#define AR_PHY_MASK2_P_30_16
#define AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ
#define AR_PHY_SPUR_REG_MASK_RATE_CNTL
#define AR_PHY_MASK2_M_00_15
#define AR_PHY_MASK2_M_31_45
#define AR_PHY_ADC_SERIAL_CTL
#define AR_PHY_PILOT_MASK_31_60
#define AR_PHY_SPUR_REG_MASK_RATE_SELECT
#define AR_PHY_MASK2_P_15_01
#define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH
#define AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI
#define AR_PHY_CHANNEL_MASK_31_60
#define AR_PHY_PILOT_MASK_01_30
#define AR_PHY_MASK2_P_45_31
#define AR_PHY_CCA_NOM_VAL_5416_5GHZ
#define AR_PHY_CHANNEL_MASK_01_30
#define AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ
#define AR_PHY_VIT_MASK2_M_46_61
#define AR_PHY_SPUR_REG_ENABLE_MASK_PPM
#define AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ
#define AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI
#define AR_PHY_CCA_NOM_VAL_5416_2GHZ
#define AR_PHY_TIMING_CTRL4_CHAIN(_i)
#define AR_PHY_MASK2_P_61_45
#define AR_RAD5122_SREV_MAJOR
#define AR_SREV_OWL_20_OR_LATER(_ah)
#define AR_RAD5133_SREV_MAJOR
#define AR_SREV_KITE(_ah)
#define AR_SREV_SOWL(_ah)
#define AR_PCIE_PM_CTRL_ENA
#define AR_RAD2122_SREV_MAJOR
#define AR_RAD2133_SREV_MAJOR
#define AR_SREV_9271(_ah)
uint32_t halChanSpreadSupport
uint32_t halRfSilentSupport
uint32_t halMbssidAggrSupport
uint32_t halWowMatchPatternExact
uint32_t hal4AddrAggrSupport
uint32_t halBssidMatchSupport
uint32_t halAutoSleepSupport
uint32_t halTurboPrimeSupport
uint32_t halHwPhyCounterSupport
uint32_t halMicCkipSupport
uint32_t halFastFramesSupport
uint32_t halForcePpmSupport
uint32_t halMicAesCcmSupport
uint32_t halBssIdMaskSupport
uint32_t halCipherAesCcmSupport
uint32_t halBtCoexSupport
uint32_t halTurboGSupport
uint32_t halCipherTkipSupport
uint32_t halSerialiseRegWar
uint32_t halCipherCkipSupport
uint32_t halCompressSupport
uint32_t halFastCCSupport
uint32_t halMcastKeySrchSupport
uint32_t halTsfAddSupport
uint32_t halWirelessModes
uint32_t halEnhancedPmSupport
uint32_t halSpectralScanSupport
uint32_t halTkipMicTxRxKeySupport
uint32_t halMicTkipSupport
uint32_t halHasRxSelfLinkedTail
uint32_t halChapTuningSupport
uint32_t halChanQuarterRate
uint32_t hal4kbSplitTransSupport
uint32_t halEnhancedDfsSupport
uint32_t halSleepAfterBeaconBroken
int maxNoiseImmunityLevel
HAL_INI_ARRAY ah_ini_common
uint8_t ah_macaddr[IEEE80211_ADDR_LEN]
struct ath_hal_private ah_priv
HAL_INI_ARRAY ah_ini_modes
struct ath_hal_5212 ah_5212
u_int(* ah_getWirelessModes)(struct ath_hal *)
HAL_BOOL ah_rfkillEnabled
HAL_BOOL(* ah_eepromWrite)(struct ath_hal *, u_int off, uint16_t data)
HAL_BOOL(* ah_getChipPowerLimits)(struct ath_hal *, struct ieee80211_channel *)
HAL_BOOL(* ah_eepromRead)(struct ath_hal *, u_int off, uint16_t *data)
HAL_BOOL __ahdecl(* ah_gpioCfgInput)(struct ath_hal *, uint32_t gpio)
void __ahdecl(* ah_setRxFilter)(struct ath_hal *, uint32_t)
HAL_BOOL __ahdecl(* ah_stopDmaReceive)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_gpioSet)(struct ath_hal *, uint32_t gpio, uint32_t val)
void __ahdecl(* ah_set11nRateScenario)(struct ath_hal *, struct ath_desc *, u_int, u_int, HAL_11N_RATE_SERIES[], u_int, u_int)
HAL_BOOL __ahdecl(* ah_fillTxDesc)(struct ath_hal *, struct ath_desc *, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg, const struct ath_desc *)
HAL_BOOL __ahdecl(* ah_isFastClockEnabled)(struct ath_hal *ah)
HAL_BOOL __ahdecl(* ah_resetCalValid)(struct ath_hal *, const struct ieee80211_channel *)
void __ahdecl(* ah_resetTsf)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_phyDisable)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_setupXTxDesc)(struct ath_hal *, struct ath_desc *, u_int txRate1, u_int txTries1, u_int txRate2, u_int txTries2, u_int txRate3, u_int txTries3)
void __ahdecl(* ah_btCoexSetConfig)(struct ath_hal *, HAL_BT_COEX_CONFIG *)
void __ahdecl(* ah_set11nRxClear)(struct ath_hal *, HAL_HT_RXCLEAR)
HAL_BOOL __ahdecl(* ah_chainTxDesc)(struct ath_hal *, struct ath_desc *, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int, u_int, HAL_PKT_TYPE, u_int, HAL_CIPHER, uint8_t, HAL_BOOL, HAL_BOOL, HAL_BOOL)
void __ahdecl(* ah_btCoexSetParameter)(struct ath_hal *, uint32_t, uint32_t)
void __ahdecl(* ah_set11nAggrMiddle)(struct ath_hal *, struct ath_desc *, u_int)
HAL_BOOL __ahdecl(* ah_getTxCompletionRates)(struct ath_hal *, const struct ath_desc *ds, int *rates, int *tries)
void __ahdecl(* ah_set11nMac2040)(struct ath_hal *, HAL_HT_MACMODE)
HAL_BOOL __ahdecl(* ah_resetTxQueue)(struct ath_hal *ah, u_int q)
HAL_BOOL __ahdecl(* ah_setKeyCacheEntry)(struct ath_hal *, uint16_t, const HAL_KEYVAL *, const uint8_t *, int)
HAL_STATUS __ahdecl(* ah_procTxDesc)(struct ath_hal *, struct ath_desc *, struct ath_tx_status *)
HAL_INT __ahdecl(* ah_setInterrupts)(struct ath_hal *, HAL_INT)
void __ahdecl(* ah_spectralStart)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_isInterruptPending)(struct ath_hal *)
void __ahdecl(* ah_startPcuReceive)(struct ath_hal *, HAL_BOOL)
HAL_BOOL __ahdecl(* ah_setupFirstTxDesc)(struct ath_hal *, struct ath_desc *, u_int, u_int, u_int, u_int, u_int, u_int, u_int, u_int)
HAL_STATUS __ahdecl(* ah_getCapability)(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t capability, uint32_t *result)
void __ahdecl(* ah_beaconInit)(struct ath_hal *, uint32_t nexttbtt, uint32_t intval)
HAL_BOOL __ahdecl(* ah_setCapability)(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t capability, uint32_t setting, HAL_STATUS *)
HAL_BOOL __ahdecl(* ah_setTxPower)(struct ath_hal *, const struct ieee80211_channel *, uint16_t *)
void __ahdecl(* ah_spectralStop)(struct ath_hal *)
void __ahdecl(* ah_rxMonitor)(struct ath_hal *, const HAL_NODE_STATS *, const struct ieee80211_channel *)
HAL_BOOL __ahdecl(* ah_setAntennaSwitch)(struct ath_hal *, HAL_ANT_SETTING)
int __ahdecl(* ah_btCoexEnable)(struct ath_hal *)
uint64_t __ahdecl(* ah_getNextTBTT)(struct ath_hal *)
void __ahdecl(* ah_clr11nAggr)(struct ath_hal *, struct ath_desc *)
void __ahdecl(* ah_setTsf64)(struct ath_hal *, uint64_t)
HAL_BOOL __ahdecl(* ah_spectralIsEnabled)(struct ath_hal *)
HAL_RFGAIN __ahdecl(* ah_getRfGain)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_setupLastTxDesc)(struct ath_hal *, struct ath_desc *, const struct ath_desc *)
HAL_BOOL __ahdecl(* ah_resetKeyCacheEntry)(struct ath_hal *, uint16_t)
int __ahdecl(* ah_setupTxQueue)(struct ath_hal *, HAL_TX_QUEUE, const HAL_TXQ_INFO *qInfo)
HAL_BOOL __ahdecl(* ah_spectralIsActive)(struct ath_hal *)
HAL_STATUS __ahdecl(* ah_setQuiet)(struct ath_hal *ah, uint32_t period, uint32_t duration, uint32_t nextStart, HAL_QUIET_FLAG flag)
void __ahdecl(* ah_btCoexSetWeights)(struct ath_hal *, uint32_t)
HAL_BOOL __ahdecl(* ah_getDiagState)(struct ath_hal *, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
uint32_t __ahdecl(* ah_get11nExtBusy)(struct ath_hal *)
void __ahdecl(* ah_setCoverageClass)(struct ath_hal *, uint8_t, int)
void __ahdecl(* ah_spectralGetConfig)(struct ath_hal *ah, HAL_SPECTRAL_PARAM *sp)
HAL_BOOL __ahdecl(* ah_procRadarEvent)(struct ath_hal *ah, struct ath_rx_status *rxs, uint64_t fulltsf, const char *buf, HAL_DFS_EVENT *event)
uint32_t __ahdecl(* ah_gpioGet)(struct ath_hal *, uint32_t gpio)
HAL_BOOL __ahdecl(* ah_perCalibration)(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *)
void __ahdecl(* ah_btCoexSetQcuThresh)(struct ath_hal *, int)
HAL_HT_RXCLEAR __ahdecl(* ah_get11nRxClear)(struct ath_hal *ah)
void __ahdecl(* ah_aniPoll)(struct ath_hal *, const struct ieee80211_channel *)
void __ahdecl(* ah_btCoexSetInfo)(struct ath_hal *, HAL_BT_COEX_INFO *)
HAL_BOOL __ahdecl(* ah_disable)(struct ath_hal *)
void __ahdecl(* ah_setBeaconTimers)(struct ath_hal *, const HAL_BEACON_TIMERS *)
void __ahdecl(* ah_set11nVirtMoreFrag)(struct ath_hal *, struct ath_desc *, u_int)
HAL_BOOL __ahdecl(* ah_setTxPowerLimit)(struct ath_hal *, uint32_t)
void __ahdecl(* ah_set11nBurstDuration)(struct ath_hal *, struct ath_desc *, u_int)
void __ahdecl(* ah_detach)(struct ath_hal *)
void __ahdecl(* ah_setStationBeaconTimers)(struct ath_hal *, const HAL_BEACON_STATE *)
void __ahdecl(* ah_disablePCIE)(struct ath_hal *)
HAL_BOOL __ahdecl(* ah_gpioCfgOutput)(struct ath_hal *, uint32_t gpio, HAL_GPIO_MUX_TYPE)
void __ahdecl(* ah_resetStationBeaconTimers)(struct ath_hal *)
void __ahdecl(* ah_getDfsThresh)(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
HAL_BOOL __ahdecl(* ah_getPendingInterrupts)(struct ath_hal *, HAL_INT *)
HAL_BOOL __ahdecl(* ah_setDecompMask)(struct ath_hal *, uint16_t, int)
void __ahdecl(* ah_setChainMasks)(struct ath_hal *, uint32_t, uint32_t)
HAL_BOOL __ahdecl(* ah_stopTxDma)(struct ath_hal *, u_int)
uint32_t __ahdecl(* ah_getRxFilter)(struct ath_hal *)
HAL_STATUS __ahdecl(* ah_procRxDesc)(struct ath_hal *, struct ath_desc *, uint32_t phyAddr, struct ath_desc *next, uint64_t tsf, struct ath_rx_status *)
HAL_BOOL __ahdecl(* ah_perCalibrationN)(struct ath_hal *, struct ieee80211_channel *, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone)
HAL_BOOL __ahdecl(* ah_setupRxDesc)(struct ath_hal *, struct ath_desc *, uint32_t size, u_int flags)
void __ahdecl(* ah_enableDfs)(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
uint64_t __ahdecl(* ah_getTsf64)(struct ath_hal *)
const HAL_RATE_TABLE *__ahdecl(* ah_getRateTable)(struct ath_hal *, u_int mode)
void __ahdecl(* ah_spectralConfigure)(struct ath_hal *ah, HAL_SPECTRAL_PARAM *sp)
HAL_BOOL __ahdecl(* ah_setupTxDesc)(struct ath_hal *, struct ath_desc *, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, u_int txRate0, u_int txTries0, u_int keyIx, u_int antMode, u_int flags, u_int rtsctsRate, u_int rtsctsDuration, u_int compicvLen, u_int compivLen, u_int comp)
void __ahdecl(* ah_btCoexDisable)(struct ath_hal *)
void __ahdecl(* ah_gpioSetIntr)(struct ath_hal *, u_int, uint32_t)
void __ahdecl(* ah_configPCIE)(struct ath_hal *, HAL_BOOL restore, HAL_BOOL power_off)
void __ahdecl(* ah_setLedState)(struct ath_hal *, HAL_LED_STATE)
void __ahdecl(* ah_stopPcuReceive)(struct ath_hal *)
void __ahdecl(* ah_set11nAggrLast)(struct ath_hal *, struct ath_desc *)
HAL_BOOL __ahdecl(* ah_getDfsDefaultThresh)(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
void __ahdecl(* ah_procMibEvent)(struct ath_hal *, const HAL_NODE_STATS *)
HAL_BOOL __ahdecl(* ah_setPowerMode)(struct ath_hal *, HAL_POWER_MODE mode, int setChip)
HAL_BOOL __ahdecl(* ah_setBoardValues)(struct ath_hal *, const struct ieee80211_channel *)
void __ahdecl(* ah_set11nAggrFirst)(struct ath_hal *, struct ath_desc *, u_int, u_int)
HAL_BOOL __ahdecl(* ah_reset)(struct ath_hal *, HAL_OPMODE, struct ieee80211_channel *, HAL_BOOL bChannelChange, HAL_RESET_TYPE resetType, HAL_STATUS *status)
HAL_BOOL __ahdecl(* ah_getMibCycleCounts)(struct ath_hal *, HAL_SURVEY_SAMPLE *)
void __ahdecl(* ah_btCoexSetBmissThresh)(struct ath_hal *, uint32_t)