#include <sys/cdefs.h>
#include "bxe.h"
#include "bxe_elink.h"
#include "ecore_mfw_req.h"
#include "ecore_fw_defs.h"
#include "ecore_hsi.h"
#include "ecore_reg.h"

Include dependency graph for bxe_elink.c:

Macros
#define	MDIO_REG_BANK_CL73_IEEEB0 0x0

#define	MDIO_CL73_IEEEB0_CL73_AN_CONTROL 0x0

#define	MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN 0x0200

#define	MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN 0x1000

#define	MDIO_CL73_IEEEB0_CL73_AN_CONTROL_MAIN_RST 0x8000

#define	MDIO_REG_BANK_CL73_IEEEB1 0x10

#define	MDIO_CL73_IEEEB1_AN_ADV1 0x00

#define	MDIO_CL73_IEEEB1_AN_ADV1_PAUSE 0x0400

#define	MDIO_CL73_IEEEB1_AN_ADV1_ASYMMETRIC 0x0800

#define	MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH 0x0C00

#define	MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK 0x0C00

#define	MDIO_CL73_IEEEB1_AN_ADV2 0x01

#define	MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M 0x0000

#define	MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX 0x0020

#define	MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 0x0040

#define	MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR 0x0080

#define	MDIO_CL73_IEEEB1_AN_LP_ADV1 0x03

#define	MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE 0x0400

#define	MDIO_CL73_IEEEB1_AN_LP_ADV1_ASYMMETRIC 0x0800

#define	MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_BOTH 0x0C00

#define	MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK 0x0C00

#define	MDIO_CL73_IEEEB1_AN_LP_ADV2 0x04

#define	MDIO_REG_BANK_RX0 0x80b0

#define	MDIO_RX0_RX_STATUS 0x10

#define	MDIO_RX0_RX_STATUS_SIGDET 0x8000

#define	MDIO_RX0_RX_STATUS_RX_SEQ_DONE 0x1000

#define	MDIO_RX0_RX_EQ_BOOST 0x1c

#define	MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

#define	MDIO_RX0_RX_EQ_BOOST_OFFSET_CTRL 0x10

#define	MDIO_REG_BANK_RX1 0x80c0

#define	MDIO_RX1_RX_EQ_BOOST 0x1c

#define	MDIO_RX1_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

#define	MDIO_RX1_RX_EQ_BOOST_OFFSET_CTRL 0x10

#define	MDIO_REG_BANK_RX2 0x80d0

#define	MDIO_RX2_RX_EQ_BOOST 0x1c

#define	MDIO_RX2_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

#define	MDIO_RX2_RX_EQ_BOOST_OFFSET_CTRL 0x10

#define	MDIO_REG_BANK_RX3 0x80e0

#define	MDIO_RX3_RX_EQ_BOOST 0x1c

#define	MDIO_RX3_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

#define	MDIO_RX3_RX_EQ_BOOST_OFFSET_CTRL 0x10

#define	MDIO_REG_BANK_RX_ALL 0x80f0

#define	MDIO_RX_ALL_RX_EQ_BOOST 0x1c

#define	MDIO_RX_ALL_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

#define	MDIO_RX_ALL_RX_EQ_BOOST_OFFSET_CTRL 0x10

#define	MDIO_REG_BANK_TX0 0x8060

#define	MDIO_TX0_TX_DRIVER 0x17

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

#define	MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

#define	MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

#define	MDIO_TX0_TX_DRIVER_ICBUF1T 1

#define	MDIO_REG_BANK_TX1 0x8070

#define	MDIO_TX1_TX_DRIVER 0x17

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

#define	MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

#define	MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

#define	MDIO_TX0_TX_DRIVER_ICBUF1T 1

#define	MDIO_REG_BANK_TX2 0x8080

#define	MDIO_TX2_TX_DRIVER 0x17

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

#define	MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

#define	MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

#define	MDIO_TX0_TX_DRIVER_ICBUF1T 1

#define	MDIO_REG_BANK_TX3 0x8090

#define	MDIO_TX3_TX_DRIVER 0x17

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

#define	MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

#define	MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

#define	MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

#define	MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

#define	MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

#define	MDIO_TX0_TX_DRIVER_ICBUF1T 1

#define	MDIO_REG_BANK_XGXS_BLOCK0 0x8000

#define	MDIO_BLOCK0_XGXS_CONTROL 0x10

#define	MDIO_REG_BANK_XGXS_BLOCK1 0x8010

#define	MDIO_BLOCK1_LANE_CTRL0 0x15

#define	MDIO_BLOCK1_LANE_CTRL1 0x16

#define	MDIO_BLOCK1_LANE_CTRL2 0x17

#define	MDIO_BLOCK1_LANE_PRBS 0x19

#define	MDIO_REG_BANK_XGXS_BLOCK2 0x8100

#define	MDIO_XGXS_BLOCK2_RX_LN_SWAP 0x10

#define	MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE 0x8000

#define	MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE 0x4000

#define	MDIO_XGXS_BLOCK2_TX_LN_SWAP 0x11

#define	MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE 0x8000

#define	MDIO_XGXS_BLOCK2_UNICORE_MODE_10G 0x14

#define	MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS 0x0001

#define	MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS 0x0010

#define	MDIO_XGXS_BLOCK2_TEST_MODE_LANE 0x15

#define	MDIO_REG_BANK_GP_STATUS 0x8120

#define	MDIO_GP_STATUS_TOP_AN_STATUS1 0x1B

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE 0x0001

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_CL37_AUTONEG_COMPLETE 0x0002

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS 0x0004

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS 0x0008

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE 0x0010

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_LP_NP_BAM_ABLE 0x0020

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE 0x0040

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_RXSIDE 0x0080

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_MASK 0x3f00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10M 0x0000

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_100M 0x0100

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G 0x0200

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_2_5G 0x0300

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_5G 0x0400

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_6G 0x0500

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG 0x0600

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4 0x0700

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12G_HIG 0x0800

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12_5G 0x0900

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_13G 0x0A00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_15G 0x0B00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_16G 0x0C00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX 0x0D00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4 0x0E00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR 0x0F00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI 0x1B00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS 0x1E00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI 0x1F00

#define	MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_KR2 0x3900

#define	MDIO_REG_BANK_10G_PARALLEL_DETECT 0x8130

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS 0x10

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK 0x8000

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL 0x11

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN 0x1

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK 0x13

#define	MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT (0xb71<<1)

#define	MDIO_REG_BANK_SERDES_DIGITAL 0x8300

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1 0x10

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE 0x0001

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_TBI_IF 0x0002

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN 0x0004

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT 0x0008

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET 0x0010

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE 0x0020

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL2 0x11

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN 0x0001

#define	MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_AN_FST_TMR 0x0040

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1 0x14

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SGMII 0x0001

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_LINK 0x0002

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_DUPLEX 0x0004

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_MASK 0x0018

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_SHIFT 3

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_2_5G 0x0018

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_1G 0x0010

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_100M 0x0008

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_10M 0x0000

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS2 0x15

#define	MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED 0x0002

#define	MDIO_SERDES_DIGITAL_MISC1 0x18

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_MASK 0xE000

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_25M 0x0000

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_100M 0x2000

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_125M 0x4000

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M 0x6000

#define	MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_187_5M 0x8000

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL 0x0010

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK 0x000f

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_2_5G 0x0000

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_5G 0x0001

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_6G 0x0002

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_HIG 0x0003

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4 0x0004

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12G 0x0005

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12_5G 0x0006

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G 0x0007

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_15G 0x0008

#define	MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_16G 0x0009

#define	MDIO_REG_BANK_OVER_1G 0x8320

#define	MDIO_OVER_1G_DIGCTL_3_4 0x14

#define	MDIO_OVER_1G_DIGCTL_3_4_MP_ID_MASK 0xffe0

#define	MDIO_OVER_1G_DIGCTL_3_4_MP_ID_SHIFT 5

#define	MDIO_OVER_1G_UP1 0x19

#define	MDIO_OVER_1G_UP1_2_5G 0x0001

#define	MDIO_OVER_1G_UP1_5G 0x0002

#define	MDIO_OVER_1G_UP1_6G 0x0004

#define	MDIO_OVER_1G_UP1_10G 0x0010

#define	MDIO_OVER_1G_UP1_10GH 0x0008

#define	MDIO_OVER_1G_UP1_12G 0x0020

#define	MDIO_OVER_1G_UP1_12_5G 0x0040

#define	MDIO_OVER_1G_UP1_13G 0x0080

#define	MDIO_OVER_1G_UP1_15G 0x0100

#define	MDIO_OVER_1G_UP1_16G 0x0200

#define	MDIO_OVER_1G_UP2 0x1A

#define	MDIO_OVER_1G_UP2_IPREDRIVER_MASK 0x0007

#define	MDIO_OVER_1G_UP2_IDRIVER_MASK 0x0038

#define	MDIO_OVER_1G_UP2_PREEMPHASIS_MASK 0x03C0

#define	MDIO_OVER_1G_UP3 0x1B

#define	MDIO_OVER_1G_UP3_HIGIG2 0x0001

#define	MDIO_OVER_1G_LP_UP1 0x1C

#define	MDIO_OVER_1G_LP_UP2 0x1D

#define	MDIO_OVER_1G_LP_UP2_MR_ADV_OVER_1G_MASK 0x03ff

#define	MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK 0x0780

#define	MDIO_OVER_1G_LP_UP2_PREEMPHASIS_SHIFT 7

#define	MDIO_OVER_1G_LP_UP3 0x1E

#define	MDIO_REG_BANK_REMOTE_PHY 0x8330

#define	MDIO_REMOTE_PHY_MISC_RX_STATUS 0x10

#define	MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG 0x0010

#define	MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG 0x0600

#define	MDIO_REG_BANK_BAM_NEXT_PAGE 0x8350

#define	MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL 0x10

#define	MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE 0x0001

#define	MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN 0x0002

#define	MDIO_REG_BANK_CL73_USERB0 0x8370

#define	MDIO_CL73_USERB0_CL73_UCTRL 0x10

#define	MDIO_CL73_USERB0_CL73_UCTRL_USTAT1_MUXSEL 0x0002

#define	MDIO_CL73_USERB0_CL73_USTAT1 0x11

#define	MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK 0x0100

#define	MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37 0x0400

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL1 0x12

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN 0x8000

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN 0x4000

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN 0x2000

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL3 0x14

#define	MDIO_CL73_USERB0_CL73_BAM_CTRL3_USE_CL73_HCD_MR 0x0001

#define	MDIO_REG_BANK_AER_BLOCK 0xFFD0

#define	MDIO_AER_BLOCK_AER_REG 0x1E

#define	MDIO_REG_BANK_COMBO_IEEE0 0xFFE0

#define	MDIO_COMBO_IEEE0_MII_CONTROL 0x10

#define	MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK 0x2040

#define	MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_10 0x0000

#define	MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_100 0x2000

#define	MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_1000 0x0040

#define	MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX 0x0100

#define	MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN 0x0200

#define	MDIO_COMBO_IEEO_MII_CONTROL_AN_EN 0x1000

#define	MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK 0x4000

#define	MDIO_COMBO_IEEO_MII_CONTROL_RESET 0x8000

#define	MDIO_COMBO_IEEE0_MII_STATUS 0x11

#define	MDIO_COMBO_IEEE0_MII_STATUS_LINK_PASS 0x0004

#define	MDIO_COMBO_IEEE0_MII_STATUS_AUTONEG_COMPLETE 0x0020

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV 0x14

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX 0x0020

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_HALF_DUPLEX 0x0040

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK 0x0180

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE 0x0000

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC 0x0080

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC 0x0100

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH 0x0180

#define	MDIO_COMBO_IEEE0_AUTO_NEG_ADV_NEXT_PAGE 0x8000

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1 0x15

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_NEXT_PAGE 0x8000

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_ACK 0x4000

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_MASK 0x0180

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_NONE 0x0000

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_BOTH 0x0180

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_HALF_DUP_CAP 0x0040

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_FULL_DUP_CAP 0x0020

#define	MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_SGMII_MODE 0x0001

#define	MDIO_PMA_DEVAD 0x1

#define	MDIO_PMA_REG_CTRL 0x0

#define	MDIO_PMA_REG_STATUS 0x1

#define	MDIO_PMA_REG_10G_CTRL2 0x7

#define	MDIO_PMA_REG_TX_DISABLE 0x0009

#define	MDIO_PMA_REG_RX_SD 0xa

#define	MDIO_PMA_REG_BCM_CTRL 0x0096

#define	MDIO_PMA_REG_FEC_CTRL 0x00ab

#define	MDIO_PMA_LASI_RXCTRL 0x9000

#define	MDIO_PMA_LASI_TXCTRL 0x9001

#define	MDIO_PMA_LASI_CTRL 0x9002

#define	MDIO_PMA_LASI_RXSTAT 0x9003

#define	MDIO_PMA_LASI_TXSTAT 0x9004

#define	MDIO_PMA_LASI_STAT 0x9005

#define	MDIO_PMA_REG_PHY_IDENTIFIER 0xc800

#define	MDIO_PMA_REG_DIGITAL_CTRL 0xc808

#define	MDIO_PMA_REG_DIGITAL_STATUS 0xc809

#define	MDIO_PMA_REG_TX_POWER_DOWN 0xca02

#define	MDIO_PMA_REG_CMU_PLL_BYPASS 0xca09

#define	MDIO_PMA_REG_MISC_CTRL 0xca0a

#define	MDIO_PMA_REG_GEN_CTRL 0xca10

#define	MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP 0x0188

#define	MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET 0x018a

#define	MDIO_PMA_REG_M8051_MSGIN_REG 0xca12

#define	MDIO_PMA_REG_M8051_MSGOUT_REG 0xca13

#define	MDIO_PMA_REG_ROM_VER1 0xca19

#define	MDIO_PMA_REG_ROM_VER2 0xca1a

#define	MDIO_PMA_REG_EDC_FFE_MAIN 0xca1b

#define	MDIO_PMA_REG_PLL_BANDWIDTH 0xca1d

#define	MDIO_PMA_REG_PLL_CTRL 0xca1e

#define	MDIO_PMA_REG_MISC_CTRL0 0xca23

#define	MDIO_PMA_REG_LRM_MODE 0xca3f

#define	MDIO_PMA_REG_CDR_BANDWIDTH 0xca46

#define	MDIO_PMA_REG_MISC_CTRL1 0xca85

#define	MDIO_PMA_REG_SFP_TWO_WIRE_CTRL 0x8000

#define	MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK 0x000c

#define	MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE 0x0000

#define	MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE 0x0004

#define	MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IN_PROGRESS 0x0008

#define	MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_FAILED 0x000c

#define	MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT 0x8002

#define	MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR 0x8003

#define	MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF 0xc820

#define	MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK 0xff

#define	MDIO_PMA_REG_8726_TX_CTRL1 0xca01

#define	MDIO_PMA_REG_8726_TX_CTRL2 0xca05

#define	MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR 0x8005

#define	MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF 0x8007

#define	MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK 0xff

#define	MDIO_PMA_REG_8727_MISC_CTRL 0x8309

#define	MDIO_PMA_REG_8727_TX_CTRL1 0xca02

#define	MDIO_PMA_REG_8727_TX_CTRL2 0xca05

#define	MDIO_PMA_REG_8727_PCS_OPT_CTRL 0xc808

#define	MDIO_PMA_REG_8727_GPIO_CTRL 0xc80e

#define	MDIO_PMA_REG_8727_PCS_GP 0xc842

#define	MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4

#define	MDIO_AN_REG_8727_MISC_CTRL 0x8309

#define	MDIO_PMA_REG_8073_CHIP_REV 0xc801

#define	MDIO_PMA_REG_8073_SPEED_LINK_STATUS 0xc820

#define	MDIO_PMA_REG_8073_XAUI_WA 0xc841

#define	MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL 0xcd08

#define	MDIO_PMA_REG_7101_RESET 0xc000

#define	MDIO_PMA_REG_7107_LED_CNTL 0xc007

#define	MDIO_PMA_REG_7107_LINK_LED_CNTL 0xc009

#define	MDIO_PMA_REG_7101_VER1 0xc026

#define	MDIO_PMA_REG_7101_VER2 0xc027

#define	MDIO_PMA_REG_8481_PMD_SIGNAL 0xa811

#define	MDIO_PMA_REG_8481_LED1_MASK 0xa82c

#define	MDIO_PMA_REG_8481_LED2_MASK 0xa82f

#define	MDIO_PMA_REG_8481_LED3_MASK 0xa832

#define	MDIO_PMA_REG_8481_LED3_BLINK 0xa834

#define	MDIO_PMA_REG_8481_LED5_MASK 0xa838

#define	MDIO_PMA_REG_8481_SIGNAL_MASK 0xa835

#define	MDIO_PMA_REG_8481_LINK_SIGNAL 0xa83b

#define	MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK 0x800

#define	MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT 11

#define	MDIO_WIS_DEVAD 0x2

#define	MDIO_WIS_REG_LASI_CNTL 0x9002

#define	MDIO_WIS_REG_LASI_STATUS 0x9005

#define	MDIO_PCS_DEVAD 0x3

#define	MDIO_PCS_REG_STATUS 0x0020

#define	MDIO_PCS_REG_LASI_STATUS 0x9005

#define	MDIO_PCS_REG_7101_DSP_ACCESS 0xD000

#define	MDIO_PCS_REG_7101_SPI_MUX 0xD008

#define	MDIO_PCS_REG_7101_SPI_CTRL_ADDR 0xE12A

#define	MDIO_PCS_REG_7101_SPI_RESET_BIT (5)

#define	MDIO_PCS_REG_7101_SPI_FIFO_ADDR 0xE02A

#define	MDIO_PCS_REG_7101_SPI_FIFO_ADDR_WRITE_ENABLE_CMD (6)

#define	MDIO_PCS_REG_7101_SPI_FIFO_ADDR_BULK_ERASE_CMD (0xC7)

#define	MDIO_PCS_REG_7101_SPI_FIFO_ADDR_PAGE_PROGRAM_CMD (2)

#define	MDIO_PCS_REG_7101_SPI_BYTES_TO_TRANSFER_ADDR 0xE028

#define	MDIO_XS_DEVAD 0x4

#define	MDIO_XS_REG_STATUS 0x0001

#define	MDIO_XS_PLL_SEQUENCER 0x8000

#define	MDIO_XS_SFX7101_XGXS_TEST1 0xc00a

#define	MDIO_XS_8706_REG_BANK_RX0 0x80bc

#define	MDIO_XS_8706_REG_BANK_RX1 0x80cc

#define	MDIO_XS_8706_REG_BANK_RX2 0x80dc

#define	MDIO_XS_8706_REG_BANK_RX3 0x80ec

#define	MDIO_XS_8706_REG_BANK_RXA 0x80fc

#define	MDIO_XS_REG_8073_RX_CTRL_PCIE 0x80FA

#define	MDIO_AN_DEVAD 0x7

#define	MDIO_AN_REG_CTRL 0x0000

#define	MDIO_AN_REG_STATUS 0x0001

#define	MDIO_AN_REG_STATUS_AN_COMPLETE 0x0020

#define	MDIO_AN_REG_ADV_PAUSE 0x0010

#define	MDIO_AN_REG_ADV_PAUSE_PAUSE 0x0400

#define	MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC 0x0800

#define	MDIO_AN_REG_ADV_PAUSE_BOTH 0x0C00

#define	MDIO_AN_REG_ADV_PAUSE_MASK 0x0C00

#define	MDIO_AN_REG_ADV 0x0011

#define	MDIO_AN_REG_ADV2 0x0012

#define	MDIO_AN_REG_LP_AUTO_NEG 0x0013

#define	MDIO_AN_REG_LP_AUTO_NEG2 0x0014

#define	MDIO_AN_REG_MASTER_STATUS 0x0021

#define	MDIO_AN_REG_EEE_ADV 0x003c

#define	MDIO_AN_REG_LP_EEE_ADV 0x003d

#define	MDIO_AN_REG_LINK_STATUS 0x8304

#define	MDIO_AN_REG_CL37_CL73 0x8370

#define	MDIO_AN_REG_CL37_AN 0xffe0

#define	MDIO_AN_REG_CL37_FC_LD 0xffe4

#define	MDIO_AN_REG_CL37_FC_LP 0xffe5

#define	MDIO_AN_REG_1000T_STATUS 0xffea

#define	MDIO_AN_REG_8073_2_5G 0x8329

#define	MDIO_AN_REG_8073_BAM 0x8350

#define	MDIO_AN_REG_8481_10GBASE_T_AN_CTRL 0x0020

#define	MDIO_AN_REG_8481_LEGACY_MII_CTRL 0xffe0

#define	MDIO_AN_REG_8481_MII_CTRL_FORCE_1G 0x40

#define	MDIO_AN_REG_8481_LEGACY_MII_STATUS 0xffe1

#define	MDIO_AN_REG_848xx_ID_MSB 0xffe2

#define	BCM84858_PHY_ID 0x600d

#define	MDIO_AN_REG_848xx_ID_LSB 0xffe3

#define	MDIO_AN_REG_8481_LEGACY_AN_ADV 0xffe4

#define	MDIO_AN_REG_8481_LEGACY_AN_EXPANSION 0xffe6

#define	MDIO_AN_REG_8481_1000T_CTRL 0xffe9

#define	MDIO_AN_REG_8481_1G_100T_EXT_CTRL 0xfff0

#define	MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF 0x0008

#define	MDIO_AN_REG_8481_EXPANSION_REG_RD_RW 0xfff5

#define	MDIO_AN_REG_8481_EXPANSION_REG_ACCESS 0xfff7

#define	MDIO_AN_REG_8481_AUX_CTRL 0xfff8

#define	MDIO_AN_REG_8481_LEGACY_SHADOW 0xfffc

#define	MDIO_CTL_DEVAD 0x1e

#define	MDIO_CTL_REG_84823_MEDIA 0x401a

#define	MDIO_CTL_REG_84823_MEDIA_MAC_MASK 0x0018

#define	MDIO_CTL_REG_84823_CTRL_MAC_XFI 0x0008

#define	MDIO_CTL_REG_84823_MEDIA_MAC_XAUI_M 0x0010

#define	MDIO_CTL_REG_84823_MEDIA_LINE_MASK 0x0060

#define	MDIO_CTL_REG_84823_MEDIA_LINE_XAUI_L 0x0020

#define	MDIO_CTL_REG_84823_MEDIA_LINE_XFI 0x0040

#define	MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN 0x0080

#define	MDIO_CTL_REG_84823_MEDIA_PRIORITY_MASK 0x0100

#define	MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000

#define	MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100

#define	MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000

#define	MDIO_CTL_REG_84823_USER_CTRL_REG 0x4005

#define	MDIO_CTL_REG_84823_USER_CTRL_CMS 0x0080

#define	MDIO_PMA_REG_84823_CTL_SLOW_CLK_CNT_HIGH 0xa82b

#define	MDIO_PMA_REG_84823_BLINK_RATE_VAL_15P9HZ 0x2f

#define	MDIO_PMA_REG_84823_CTL_LED_CTL_1 0xa8e3

#define	MDIO_PMA_REG_84833_CTL_LED_CTL_1 0xa8ec

#define	MDIO_PMA_REG_84823_LED3_STRETCH_EN 0x0080

#define	MDIO_84833_TOP_CFG_FW_REV 0x400f

#define	MDIO_84833_TOP_CFG_FW_EEE 0x10b1

#define	MDIO_84833_TOP_CFG_FW_NO_EEE 0x1f81

#define	MDIO_84833_TOP_CFG_XGPHY_STRAP1 0x401a

#define	MDIO_84833_SUPER_ISOLATE 0x8000

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG0 0x4005

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG1 0x4006

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG2 0x4007

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG3 0x4008

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG4 0x4009

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG26 0x4037

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG27 0x4038

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG28 0x4039

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG29 0x403a

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG30 0x403b

#define	MDIO_848xx_TOP_CFG_SCRATCH_REG31 0x403c

#define	MDIO_848xx_CMD_HDLR_COMMAND (MDIO_848xx_TOP_CFG_SCRATCH_REG0)

#define	MDIO_848xx_CMD_HDLR_STATUS (MDIO_848xx_TOP_CFG_SCRATCH_REG26)

#define	MDIO_848xx_CMD_HDLR_DATA1 (MDIO_848xx_TOP_CFG_SCRATCH_REG27)

#define	MDIO_848xx_CMD_HDLR_DATA2 (MDIO_848xx_TOP_CFG_SCRATCH_REG28)

#define	MDIO_848xx_CMD_HDLR_DATA3 (MDIO_848xx_TOP_CFG_SCRATCH_REG29)

#define	MDIO_848xx_CMD_HDLR_DATA4 (MDIO_848xx_TOP_CFG_SCRATCH_REG30)

#define	MDIO_848xx_CMD_HDLR_DATA5 (MDIO_848xx_TOP_CFG_SCRATCH_REG31)

#define	PHY848xx_CMD_SET_PAIR_SWAP 0x8001

#define	PHY848xx_CMD_GET_EEE_MODE 0x8008

#define	PHY848xx_CMD_SET_EEE_MODE 0x8009

#define	PHY848xx_CMD_GET_CURRENT_TEMP 0x8031

#define	PHY84833_STATUS_CMD_RECEIVED 0x0001

#define	PHY84833_STATUS_CMD_IN_PROGRESS 0x0002

#define	PHY84833_STATUS_CMD_COMPLETE_PASS 0x0004

#define	PHY84833_STATUS_CMD_COMPLETE_ERROR 0x0008

#define	PHY84833_STATUS_CMD_OPEN_FOR_CMDS 0x0010

#define	PHY84833_STATUS_CMD_SYSTEM_BOOT 0x0020

#define	PHY84833_STATUS_CMD_NOT_OPEN_FOR_CMDS 0x0040

#define	PHY84833_STATUS_CMD_CLEAR_COMPLETE 0x0080

#define	PHY84833_STATUS_CMD_OPEN_OVERRIDE 0xa5a5

#define	PHY84833_MB_PROCESS1 1

#define	PHY84833_MB_PROCESS2 2

#define	PHY84833_MB_PROCESS3 3

#define	PHY84858_STATUS_CMD_RECEIVED 0x0001

#define	PHY84858_STATUS_CMD_IN_PROGRESS 0x0002

#define	PHY84858_STATUS_CMD_COMPLETE_PASS 0x0004

#define	PHY84858_STATUS_CMD_COMPLETE_ERROR 0x0008

#define	PHY84858_STATUS_CMD_SYSTEM_BUSY 0xbbbb

#define	MDIO_WC_DEVAD 0x3

#define	MDIO_WC_REG_IEEE0BLK_MIICNTL 0x0

#define	MDIO_WC_REG_IEEE0BLK_AUTONEGNP 0x7

#define	MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT0 0x10

#define	MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1 0x11

#define	MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2 0x12

#define	MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY 0x4000

#define	MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ 0x8000

#define	MDIO_WC_REG_PCS_STATUS2 0x0021

#define	MDIO_WC_REG_PMD_KR_CONTROL 0x0096

#define	MDIO_WC_REG_XGXSBLK0_XGXSCONTROL 0x8000

#define	MDIO_WC_REG_XGXSBLK0_MISCCONTROL1 0x800e

#define	MDIO_WC_REG_XGXSBLK1_DESKEW 0x8010

#define	MDIO_WC_REG_XGXSBLK1_LANECTRL0 0x8015

#define	MDIO_WC_REG_XGXSBLK1_LANECTRL1 0x8016

#define	MDIO_WC_REG_XGXSBLK1_LANECTRL2 0x8017

#define	MDIO_WC_REG_XGXSBLK1_LANECTRL3 0x8018

#define	MDIO_WC_REG_XGXSBLK1_LANETEST0 0x801a

#define	MDIO_WC_REG_TX0_ANA_CTRL0 0x8061

#define	MDIO_WC_REG_TX1_ANA_CTRL0 0x8071

#define	MDIO_WC_REG_TX2_ANA_CTRL0 0x8081

#define	MDIO_WC_REG_TX3_ANA_CTRL0 0x8091

#define	MDIO_WC_REG_TX0_TX_DRIVER 0x8067

#define	MDIO_WC_REG_TX0_TX_DRIVER_IFIR_OFFSET 0x01

#define	MDIO_WC_REG_TX0_TX_DRIVER_IFIR_MASK 0x000e

#define	MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET 0x04

#define	MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_MASK 0x00f0

#define	MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET 0x08

#define	MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

#define	MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET 0x0c

#define	MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_MASK 0x7000

#define	MDIO_WC_REG_TX1_TX_DRIVER 0x8077

#define	MDIO_WC_REG_TX2_TX_DRIVER 0x8087

#define	MDIO_WC_REG_TX3_TX_DRIVER 0x8097

#define	MDIO_WC_REG_RX0_ANARXCONTROL1G 0x80b9

#define	MDIO_WC_REG_RX2_ANARXCONTROL1G 0x80d9

#define	MDIO_WC_REG_RX0_PCI_CTRL 0x80ba

#define	MDIO_WC_REG_RX1_PCI_CTRL 0x80ca

#define	MDIO_WC_REG_RX2_PCI_CTRL 0x80da

#define	MDIO_WC_REG_RX3_PCI_CTRL 0x80ea

#define	MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI 0x80fa

#define	MDIO_WC_REG_XGXSBLK2_UNICORE_MODE_10G 0x8104

#define	MDIO_WC_REG_XGXSBLK2_LANE_RESET 0x810a

#define	MDIO_WC_REG_XGXS_STATUS3 0x8129

#define	MDIO_WC_REG_PAR_DET_10G_STATUS 0x8130

#define	MDIO_WC_REG_PAR_DET_10G_CTRL 0x8131

#define	MDIO_WC_REG_XGXS_STATUS4 0x813c

#define	MDIO_WC_REG_XGXS_X2_CONTROL2 0x8141

#define	MDIO_WC_REG_XGXS_X2_CONTROL3 0x8142

#define	MDIO_WC_REG_XGXS_RX_LN_SWAP1 0x816B

#define	MDIO_WC_REG_XGXS_TX_LN_SWAP1 0x8169

#define	MDIO_WC_REG_GP2_STATUS_GP_2_0 0x81d0

#define	MDIO_WC_REG_GP2_STATUS_GP_2_1 0x81d1

#define	MDIO_WC_REG_GP2_STATUS_GP_2_2 0x81d2

#define	MDIO_WC_REG_GP2_STATUS_GP_2_3 0x81d3

#define	MDIO_WC_REG_GP2_STATUS_GP_2_4 0x81d4

#define	MDIO_WC_REG_GP2_STATUS_GP_2_4_CL73_AN_CMPL 0x1000

#define	MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CMPL 0x0100

#define	MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_LP_AN_CAP 0x0010

#define	MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CAP 0x1

#define	MDIO_WC_REG_UC_INFO_B0_DEAD_TRAP 0x81EE

#define	MDIO_WC_REG_UC_INFO_B1_VERSION 0x81F0

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE 0x81F2

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE0_OFFSET 0x0

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT 0x0

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_OPT_LR 0x1

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC 0x2

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_XLAUI 0x3

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_LONG_CH_6G 0x4

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE1_OFFSET 0x4

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE2_OFFSET 0x8

#define	MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE3_OFFSET 0xc

#define	MDIO_WC_REG_UC_INFO_B1_CRC 0x81FE

#define	MDIO_WC_REG_DSC1B0_UC_CTRL 0x820e

#define	MDIO_WC_REG_DSC1B0_UC_CTRL_RDY4CMD (1<<7)

#define	MDIO_WC_REG_DSC_SMC 0x8213

#define	MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0 0x821e

#define	MDIO_WC_REG_TX_FIR_TAP 0x82e2

#define	MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET 0x00

#define	MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_MASK 0x000f

#define	MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET 0x04

#define	MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_MASK 0x03f0

#define	MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET 0x0a

#define	MDIO_WC_REG_TX_FIR_TAP_POST_TAP_MASK 0x7c00

#define	MDIO_WC_REG_TX_FIR_TAP_ENABLE 0x8000

#define	MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP 0x82e2

#define	MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL 0x82e3

#define	MDIO_WC_REG_CL72_USERB0_CL72_OS_DEF_CTRL 0x82e6

#define	MDIO_WC_REG_CL72_USERB0_CL72_BR_DEF_CTRL 0x82e7

#define	MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL 0x82e8

#define	MDIO_WC_REG_CL72_USERB0_CL72_MISC4_CONTROL 0x82ec

#define	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 0x8300

#define	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2 0x8301

#define	MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3 0x8302

#define	MDIO_WC_REG_SERDESDIGITAL_STATUS1000X1 0x8304

#define	MDIO_WC_REG_SERDESDIGITAL_MISC1 0x8308

#define	MDIO_WC_REG_SERDESDIGITAL_MISC2 0x8309

#define	MDIO_WC_REG_DIGITAL3_UP1 0x8329

#define	MDIO_WC_REG_DIGITAL3_LP_UP1 0x832c

#define	MDIO_WC_REG_DIGITAL4_MISC3 0x833c

#define	MDIO_WC_REG_DIGITAL4_MISC5 0x833e

#define	MDIO_WC_REG_DIGITAL5_MISC6 0x8345

#define	MDIO_WC_REG_DIGITAL5_MISC7 0x8349

#define	MDIO_WC_REG_DIGITAL5_LINK_STATUS 0x834d

#define	MDIO_WC_REG_DIGITAL5_ACTUAL_SPEED 0x834e

#define	MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL 0x8350

#define	MDIO_WC_REG_CL49_USERB0_CTRL 0x8368

#define	MDIO_WC_REG_CL73_USERB0_CTRL 0x8370

#define	MDIO_WC_REG_CL73_USERB0_USTAT 0x8371

#define	MDIO_WC_REG_CL73_BAM_CTRL1 0x8372

#define	MDIO_WC_REG_CL73_BAM_CTRL2 0x8373

#define	MDIO_WC_REG_CL73_BAM_CTRL3 0x8374

#define	MDIO_WC_REG_CL73_BAM_CODE_FIELD 0x837b

#define	MDIO_WC_REG_EEE_COMBO_CONTROL0 0x8390

#define	MDIO_WC_REG_TX66_CONTROL 0x83b0

#define	MDIO_WC_REG_RX66_CONTROL 0x83c0

#define	MDIO_WC_REG_RX66_SCW0 0x83c2

#define	MDIO_WC_REG_RX66_SCW1 0x83c3

#define	MDIO_WC_REG_RX66_SCW2 0x83c4

#define	MDIO_WC_REG_RX66_SCW3 0x83c5

#define	MDIO_WC_REG_RX66_SCW0_MASK 0x83c6

#define	MDIO_WC_REG_RX66_SCW1_MASK 0x83c7

#define	MDIO_WC_REG_RX66_SCW2_MASK 0x83c8

#define	MDIO_WC_REG_RX66_SCW3_MASK 0x83c9

#define	MDIO_WC_REG_FX100_CTRL1 0x8400

#define	MDIO_WC_REG_FX100_CTRL3 0x8402

#define	MDIO_WC_REG_CL82_USERB1_TX_CTRL5 0x8436

#define	MDIO_WC_REG_CL82_USERB1_TX_CTRL6 0x8437

#define	MDIO_WC_REG_CL82_USERB1_TX_CTRL7 0x8438

#define	MDIO_WC_REG_CL82_USERB1_TX_CTRL9 0x8439

#define	MDIO_WC_REG_CL82_USERB1_RX_CTRL10 0x843a

#define	MDIO_WC_REG_CL82_USERB1_RX_CTRL11 0x843b

#define	MDIO_WC_REG_ETA_CL73_OUI1 0x8453

#define	MDIO_WC_REG_ETA_CL73_OUI2 0x8454

#define	MDIO_WC_REG_ETA_CL73_OUI3 0x8455

#define	MDIO_WC_REG_ETA_CL73_LD_BAM_CODE 0x8456

#define	MDIO_WC_REG_ETA_CL73_LD_UD_CODE 0x8457

#define	MDIO_WC_REG_MICROBLK_CMD 0xffc2

#define	MDIO_WC_REG_MICROBLK_DL_STATUS 0xffc5

#define	MDIO_WC_REG_MICROBLK_CMD3 0xffcc

#define	MDIO_WC_REG_AERBLK_AER 0xffde

#define	MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0

#define	MDIO_WC_REG_COMBO_IEEE0_MIIISTAT 0xffe1

#define	MDIO_WC0_XGXS_BLK2_LANE_RESET 0x810A

#define	MDIO_WC0_XGXS_BLK2_LANE_RESET_RX_BITSHIFT 0

#define	MDIO_WC0_XGXS_BLK2_LANE_RESET_TX_BITSHIFT 4

#define	MDIO_WC0_XGXS_BLK6_XGXS_X2_CONTROL2 0x8141

#define	DIGITAL5_ACTUAL_SPEED_TX_MASK 0x003f

#define	MDIO_REG_GPHY_MII_STATUS 0x1

#define	MDIO_REG_GPHY_PHYID_LSB 0x3

#define	MDIO_REG_GPHY_CL45_ADDR_REG 0xd

#define	MDIO_REG_GPHY_CL45_REG_WRITE 0x4000

#define	MDIO_REG_GPHY_CL45_REG_READ 0xc000

#define	MDIO_REG_GPHY_CL45_DATA_REG 0xe

#define	MDIO_REG_GPHY_EEE_RESOLVED 0x803e

#define	MDIO_REG_GPHY_EXP_ACCESS_GATE 0x15

#define	MDIO_REG_GPHY_EXP_ACCESS 0x17

#define	MDIO_REG_GPHY_EXP_ACCESS_TOP 0xd00

#define	MDIO_REG_GPHY_EXP_TOP_2K_BUF 0x40

#define	MDIO_REG_GPHY_AUX_STATUS 0x19

#define	MDIO_REG_INTR_STATUS 0x1a

#define	MDIO_REG_INTR_MASK 0x1b

#define	MDIO_REG_INTR_MASK_LINK_STATUS (0x1 << 1)

#define	MDIO_REG_GPHY_SHADOW 0x1c

#define	MDIO_REG_GPHY_SHADOW_LED_SEL1 (0x0d << 10)

#define	MDIO_REG_GPHY_SHADOW_LED_SEL2 (0x0e << 10)

#define	MDIO_REG_GPHY_SHADOW_WR_ENA (0x1 << 15)

#define	MDIO_REG_GPHY_SHADOW_AUTO_DET_MED (0x1e << 10)

#define	MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD (0x1 << 8)

#define	ELINK_ETH_HLEN 14

#define	ELINK_ETH_OVREHEAD (ELINK_ETH_HLEN + 8 + 8)

#define	ELINK_ETH_MIN_PACKET_SIZE 60

#define	ELINK_ETH_MAX_PACKET_SIZE 1500

#define	ELINK_ETH_MAX_JUMBO_PACKET_SIZE 9600

#define	ELINK_MDIO_ACCESS_TIMEOUT 1000

#define	WC_LANE_MAX 4

#define	I2C_SWITCH_WIDTH 2

#define	I2C_BSC0 0

#define	I2C_BSC1 1

#define	I2C_WA_RETRY_CNT 3

#define	I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)

#define	MCPR_IMC_COMMAND_READ_OP 1

#define	MCPR_IMC_COMMAND_WRITE_OP 2

#define	LED_BLINK_RATE_VAL_E3 354

#define	LED_BLINK_RATE_VAL_E1X_E2 480

#define	ELINK_NIG_LATCH_BC_ENABLE_MI_INT 0

#define	ELINK_NIG_STATUS_EMAC0_MI_INT NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT

#define	ELINK_NIG_STATUS_XGXS0_LINK10G NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G

#define	ELINK_NIG_STATUS_XGXS0_LINK_STATUS NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS

#define	ELINK_NIG_STATUS_XGXS0_LINK_STATUS_SIZE NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE

#define	ELINK_NIG_STATUS_SERDES0_LINK_STATUS NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS

#define	ELINK_NIG_MASK_MI_INT NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT

#define	ELINK_NIG_MASK_XGXS0_LINK10G NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G

#define	ELINK_NIG_MASK_XGXS0_LINK_STATUS NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK_STATUS

#define	ELINK_NIG_MASK_SERDES0_LINK_STATUS NIG_MASK_INTERRUPT_PORT0_REG_MASK_SERDES0_LINK_STATUS

#define	ELINK_MDIO_AN_CL73_OR_37_COMPLETE

#define	ELINK_XGXS_RESET_BITS

#define	ELINK_SERDES_RESET_BITS

#define	ELINK_AUTONEG_CL37 SHARED_HW_CFG_AN_ENABLE_CL37

#define	ELINK_AUTONEG_CL73 SHARED_HW_CFG_AN_ENABLE_CL73

#define	ELINK_AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM

#define	ELINK_AUTONEG_PARALLEL SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION

#define	ELINK_AUTONEG_SGMII_FIBER_AUTODET SHARED_HW_CFG_AN_EN_SGMII_FIBER_AUTO_DETECT

#define	ELINK_AUTONEG_REMOTE_PHY SHARED_HW_CFG_AN_ENABLE_REMOTE_PHY

#define	ELINK_GP_STATUS_PAUSE_RSOLUTION_TXSIDE MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE

#define	ELINK_GP_STATUS_PAUSE_RSOLUTION_RXSIDE MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_RXSIDE

#define	ELINK_GP_STATUS_SPEED_MASK MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_MASK

#define	ELINK_GP_STATUS_10M MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10M

#define	ELINK_GP_STATUS_100M MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_100M

#define	ELINK_GP_STATUS_1G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G

#define	ELINK_GP_STATUS_2_5G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_2_5G

#define	ELINK_GP_STATUS_5G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_5G

#define	ELINK_GP_STATUS_6G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_6G

#define	ELINK_GP_STATUS_10G_HIG MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG

#define	ELINK_GP_STATUS_10G_CX4 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4

#define	ELINK_GP_STATUS_1G_KX MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX

#define	ELINK_GP_STATUS_10G_KX4 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4

#define	ELINK_GP_STATUS_10G_KR MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR

#define	ELINK_GP_STATUS_10G_XFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI

#define	ELINK_GP_STATUS_20G_DXGXS MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS

#define	ELINK_GP_STATUS_10G_SFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI

#define	ELINK_GP_STATUS_20G_KR2 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_KR2

#define	ELINK_LINK_10THD LINK_STATUS_SPEED_AND_DUPLEX_10THD

#define	ELINK_LINK_10TFD LINK_STATUS_SPEED_AND_DUPLEX_10TFD

#define	ELINK_LINK_100TXHD LINK_STATUS_SPEED_AND_DUPLEX_100TXHD

#define	ELINK_LINK_100T4 LINK_STATUS_SPEED_AND_DUPLEX_100T4

#define	ELINK_LINK_100TXFD LINK_STATUS_SPEED_AND_DUPLEX_100TXFD

#define	ELINK_LINK_1000THD LINK_STATUS_SPEED_AND_DUPLEX_1000THD

#define	ELINK_LINK_1000TFD LINK_STATUS_SPEED_AND_DUPLEX_1000TFD

#define	ELINK_LINK_1000XFD LINK_STATUS_SPEED_AND_DUPLEX_1000XFD

#define	ELINK_LINK_2500THD LINK_STATUS_SPEED_AND_DUPLEX_2500THD

#define	ELINK_LINK_2500TFD LINK_STATUS_SPEED_AND_DUPLEX_2500TFD

#define	ELINK_LINK_2500XFD LINK_STATUS_SPEED_AND_DUPLEX_2500XFD

#define	ELINK_LINK_10GTFD LINK_STATUS_SPEED_AND_DUPLEX_10GTFD

#define	ELINK_LINK_10GXFD LINK_STATUS_SPEED_AND_DUPLEX_10GXFD

#define	ELINK_LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD

#define	ELINK_LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD

#define	ELINK_LINK_UPDATE_MASK

#define	ELINK_SFP_EEPROM_CON_TYPE_ADDR 0x2

#define	ELINK_SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0

#define	ELINK_SFP_EEPROM_CON_TYPE_VAL_LC 0x7

#define	ELINK_SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21

#define	ELINK_SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22

#define	ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR 0x3

#define	ELINK_SFP_EEPROM_10G_COMP_CODE_SR_MASK (1<<4)

#define	ELINK_SFP_EEPROM_10G_COMP_CODE_LR_MASK (1<<5)

#define	ELINK_SFP_EEPROM_10G_COMP_CODE_LRM_MASK (1<<6)

#define	ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR 0x6

#define	ELINK_SFP_EEPROM_1G_COMP_CODE_SX (1<<0)

#define	ELINK_SFP_EEPROM_1G_COMP_CODE_LX (1<<1)

#define	ELINK_SFP_EEPROM_1G_COMP_CODE_CX (1<<2)

#define	ELINK_SFP_EEPROM_1G_COMP_CODE_BASE_T (1<<3)

#define	ELINK_SFP_EEPROM_FC_TX_TECH_ADDR 0x8

#define	ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4

#define	ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE 0x8

#define	ELINK_SFP_EEPROM_OPTIONS_ADDR 0x40

#define	ELINK_SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK 0x1

#define	ELINK_SFP_EEPROM_OPTIONS_SIZE 2

#define	ELINK_EDC_MODE_LINEAR 0x0022

#define	ELINK_EDC_MODE_LIMITING 0x0044

#define	ELINK_EDC_MODE_PASSIVE_DAC 0x0055

#define	ELINK_EDC_MODE_ACTIVE_DAC 0x0066

#define	DCBX_INVALID_COS (0xFF)

#define	ELINK_ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000)

#define	ELINK_ETS_BW_LIMIT_CREDIT_WEIGHT (0x5000)

#define	ELINK_ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS (1360)

#define	ELINK_ETS_E3B0_NIG_MIN_W_VAL_20GBPS (2720)

#define	ELINK_ETS_E3B0_PBF_MIN_W_VAL (10000)

#define	ELINK_MAX_PACKET_SIZE (9700)

#define	MAX_KR_LINK_RETRY 4

#define	DEFAULT_TX_DRV_BRDCT 2

#define	DEFAULT_TX_DRV_IFIR 0

#define	DEFAULT_TX_DRV_POST2 3

#define	DEFAULT_TX_DRV_IPRE_DRIVER 6

#define	CL22_WR_OVER_CL45(_sc, _phy, _bank, _addr, _val)

#define	CL22_RD_OVER_CL45(_sc, _phy, _bank, _addr, _val)

#define	WC_TX_DRIVER(post2, idriver, ipre, ifir)

#define	WC_TX_FIR(post, main, pre)

#define	PHY848xx_CMDHDLR_WAIT 300

#define	PHY848xx_CMDHDLR_MAX_ARGS 5

#define	PHY84833_CONSTANT_LATENCY 1193

Typedefs
typedef elink_status_t(*	read_sfp_module_eeprom_func_p) (struct elink_phy phy, struct elink_params params, uint8_t dev_addr, uint16_t addr, uint8_t byte_cnt, uint8_t *o_buf, uint8_t)

Functions
	__FBSDID ("$FreeBSD$")

static elink_status_t	elink_check_half_open_conn (struct elink_params params, struct elink_vars vars, uint8_t notify)

static elink_status_t	elink_sfp_module_detection (struct elink_phy phy, struct elink_params params)

static uint32_t	elink_bits_en (struct bxe_softc *sc, uint32_t reg, uint32_t bits)

static uint32_t	elink_bits_dis (struct bxe_softc *sc, uint32_t reg, uint32_t bits)

static int	elink_check_lfa (struct elink_params *params)

static void	elink_get_epio (struct bxe_softc sc, uint32_t epio_pin, uint32_t en)

static void	elink_set_epio (struct bxe_softc *sc, uint32_t epio_pin, uint32_t en)

static void	elink_set_cfg_pin (struct bxe_softc *sc, uint32_t pin_cfg, uint32_t val)

static uint32_t	elink_get_cfg_pin (struct bxe_softc sc, uint32_t pin_cfg, uint32_t val)

static void	elink_ets_e2e3a0_disabled (struct elink_params *params)

static uint32_t	elink_ets_get_min_w_val_nig (const struct elink_vars *vars)

static uint32_t	elink_ets_get_credit_upper_bound (const uint32_t min_w_val)

static void	elink_ets_e3b0_set_credit_upper_bound_nig (const struct elink_params *params, const uint32_t min_w_val)

static void	elink_ets_e3b0_nig_disabled (const struct elink_params params, const struct elink_vars vars)

static void	elink_ets_e3b0_set_credit_upper_bound_pbf (const struct elink_params *params, const uint32_t min_w_val)

static void	elink_ets_e3b0_pbf_disabled (const struct elink_params *params)

static elink_status_t	elink_ets_e3b0_disabled (const struct elink_params params, const struct elink_vars vars)

elink_status_t	elink_ets_disabled (struct elink_params params, struct elink_vars vars)

static elink_status_t	elink_ets_e3b0_cli_map (const struct elink_params params, const struct elink_ets_params ets_params, const uint8_t cos_sp_bitmap, const uint8_t cos_bw_bitmap)

static elink_status_t	elink_ets_e3b0_set_cos_bw (struct bxe_softc *sc, const uint8_t cos_entry, const uint32_t min_w_val_nig, const uint32_t min_w_val_pbf, const uint16_t total_bw, const uint8_t bw, const uint8_t port)

static elink_status_t	elink_ets_e3b0_get_total_bw (const struct elink_params params, struct elink_ets_params ets_params, uint16_t *total_bw)

static void	elink_ets_e3b0_sp_pri_to_cos_init (uint8_t *sp_pri_to_cos)

static elink_status_t	elink_ets_e3b0_sp_pri_to_cos_set (const struct elink_params params, uint8_t sp_pri_to_cos, const uint8_t pri, const uint8_t cos_entry)

static uint64_t	elink_e3b0_sp_get_pri_cli_reg (const uint8_t cos, const uint8_t cos_offset, const uint8_t pri_set, const uint8_t pri_offset, const uint8_t entry_size)

static uint64_t	elink_e3b0_sp_get_pri_cli_reg_nig (const uint8_t cos, const uint8_t pri_set)

static uint64_t	elink_e3b0_sp_get_pri_cli_reg_pbf (const uint8_t cos, const uint8_t pri_set)

static elink_status_t	elink_ets_e3b0_sp_set_pri_cli_reg (const struct elink_params params, uint8_t sp_pri_to_cos)

elink_status_t	elink_ets_e3b0_config (const struct elink_params params, const struct elink_vars vars, struct elink_ets_params *ets_params)

static void	elink_ets_bw_limit_common (const struct elink_params *params)

void	elink_ets_bw_limit (const struct elink_params *params, const uint32_t cos0_bw, const uint32_t cos1_bw)

elink_status_t	elink_ets_strict (const struct elink_params *params, const uint8_t strict_cos)

static void	elink_update_pfc_xmac (struct elink_params params, struct elink_vars vars, uint8_t is_lb)

static void	elink_emac_get_pfc_stat (struct elink_params *params, uint32_t pfc_frames_sent[2], uint32_t pfc_frames_received[2])

void	elink_pfc_statistic (struct elink_params params, struct elink_vars vars, uint32_t pfc_frames_sent[2], uint32_t pfc_frames_received[2])

static void	elink_set_mdio_clk (struct bxe_softc *sc, uint32_t chip_id, uint32_t emac_base)

static uint8_t	elink_is_4_port_mode (struct bxe_softc *sc)

static void	elink_set_mdio_emac_per_phy (struct bxe_softc sc, struct elink_params params)

static void	elink_emac_init (struct elink_params params, struct elink_vars vars)

static void	elink_set_xumac_nig (struct elink_params *params, uint16_t tx_pause_en, uint8_t enable)

static void	elink_set_umac_rxtx (struct elink_params *params, uint8_t en)

static void	elink_umac_enable (struct elink_params params, struct elink_vars vars, uint8_t lb)

static void	elink_xmac_init (struct elink_params *params, uint32_t max_speed)

static void	elink_set_xmac_rxtx (struct elink_params *params, uint8_t en)

static elink_status_t	elink_xmac_enable (struct elink_params params, struct elink_vars vars, uint8_t lb)

static elink_status_t	elink_emac_enable (struct elink_params params, struct elink_vars vars, uint8_t lb)

static void	elink_update_pfc_bmac1 (struct elink_params params, struct elink_vars vars)

static void	elink_update_pfc_bmac2 (struct elink_params params, struct elink_vars vars, uint8_t is_lb)

static elink_status_t	elink_pfc_nig_rx_priority_mask (struct bxe_softc *sc, uint8_t cos_entry, uint32_t priority_mask, uint8_t port)

static void	elink_update_mng (struct elink_params *params, uint32_t link_status)

static void	elink_update_pfc_nig (struct elink_params params, struct elink_vars vars, struct elink_nig_brb_pfc_port_params *nig_params)

elink_status_t	elink_update_pfc (struct elink_params params, struct elink_vars vars, struct elink_nig_brb_pfc_port_params *pfc_params)

static elink_status_t	elink_bmac1_enable (struct elink_params params, struct elink_vars vars, uint8_t is_lb)

static elink_status_t	elink_bmac2_enable (struct elink_params params, struct elink_vars vars, uint8_t is_lb)

static elink_status_t	elink_bmac_enable (struct elink_params params, struct elink_vars vars, uint8_t is_lb, uint8_t reset_bmac)

static void	elink_set_bmac_rx (struct bxe_softc *sc, uint32_t chip_id, uint8_t port, uint8_t en)

static elink_status_t	elink_pbf_update (struct elink_params *params, uint32_t flow_ctrl, uint32_t line_speed)

static uint32_t	elink_get_emac_base (struct bxe_softc *sc, uint32_t mdc_mdio_access, uint8_t port)

static elink_status_t	elink_cl22_write (struct bxe_softc sc, struct elink_phy phy, uint16_t reg, uint16_t val)

static elink_status_t	elink_cl22_read (struct bxe_softc sc, struct elink_phy phy, uint16_t reg, uint16_t *ret_val)

static elink_status_t	elink_cl45_read (struct bxe_softc sc, struct elink_phy phy, uint8_t devad, uint16_t reg, uint16_t *ret_val)

static elink_status_t	elink_cl45_write (struct bxe_softc sc, struct elink_phy phy, uint8_t devad, uint16_t reg, uint16_t val)

static uint8_t	elink_eee_has_cap (struct elink_params *params)

static elink_status_t	elink_eee_nvram_to_time (uint32_t nvram_mode, uint32_t *idle_timer)

static elink_status_t	elink_eee_time_to_nvram (uint32_t idle_timer, uint32_t *nvram_mode)

static uint32_t	elink_eee_calc_timer (struct elink_params *params)

static elink_status_t	elink_eee_set_timers (struct elink_params params, struct elink_vars vars)

static elink_status_t	elink_eee_initial_config (struct elink_params params, struct elink_vars vars, uint8_t mode)

static elink_status_t	elink_eee_disable (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_eee_advertise (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint8_t modes)

static void	elink_update_mng_eee (struct elink_params *params, uint32_t eee_status)

static void	elink_eee_an_resolve (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_bsc_module_sel (struct elink_params *params)

static elink_status_t	elink_bsc_read (struct bxe_softc sc, uint8_t sl_devid, uint16_t sl_addr, uint8_t lc_addr, uint8_t xfer_cnt, uint32_t data_array)

static void	elink_cl45_read_or_write (struct bxe_softc sc, struct elink_phy phy, uint8_t devad, uint16_t reg, uint16_t or_val)

static void	elink_cl45_read_and_write (struct bxe_softc sc, struct elink_phy phy, uint8_t devad, uint16_t reg, uint16_t and_val)

elink_status_t	elink_phy_read (struct elink_params params, uint8_t phy_addr, uint8_t devad, uint16_t reg, uint16_t ret_val)

elink_status_t	elink_phy_write (struct elink_params *params, uint8_t phy_addr, uint8_t devad, uint16_t reg, uint16_t val)

static uint8_t	elink_get_warpcore_lane (struct elink_phy phy, struct elink_params params)

static void	elink_set_aer_mmd (struct elink_params params, struct elink_phy phy)

static void	elink_set_serdes_access (struct bxe_softc *sc, uint8_t port)

static void	elink_serdes_deassert (struct bxe_softc *sc, uint8_t port)

static void	elink_xgxs_specific_func (struct elink_phy phy, struct elink_params params, uint32_t action)

static void	elink_xgxs_deassert (struct elink_params *params)

static void	elink_calc_ieee_aneg_adv (struct elink_phy phy, struct elink_params params, uint16_t *ieee_fc)

static void	set_phy_vars (struct elink_params params, struct elink_vars vars)

static void	elink_ext_phy_set_pause (struct elink_params params, struct elink_phy phy, struct elink_vars *vars)

static void	elink_pause_resolve (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint32_t pause_result)

static void	elink_ext_phy_update_adv_fc (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_ext_phy_resolve_fc (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_update_link_attr (struct elink_params *params, uint32_t link_attr)

static void	elink_warpcore_enable_AN_KR2 (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_disable_kr2 (struct elink_params params, struct elink_vars vars, struct elink_phy *phy)

static void	elink_warpcore_set_lpi_passthrough (struct elink_phy phy, struct elink_params params)

static void	elink_warpcore_restart_AN_KR (struct elink_phy phy, struct elink_params params)

static void	elink_warpcore_enable_AN_KR (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_warpcore_set_10G_KR (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_warpcore_set_10G_XFI (struct elink_phy phy, struct elink_params params, uint8_t is_xfi)

static void	elink_warpcore_set_20G_force_KR2 (struct elink_phy phy, struct elink_params params)

static void	elink_warpcore_set_20G_DXGXS (struct bxe_softc sc, struct elink_phy phy, uint16_t lane)

static void	elink_warpcore_set_sgmii_speed (struct elink_phy phy, struct elink_params params, uint8_t fiber_mode, uint8_t always_autoneg)

static void	elink_warpcore_reset_lane (struct bxe_softc sc, struct elink_phy phy, uint8_t reset)

static void	elink_warpcore_clear_regs (struct elink_phy phy, struct elink_params params, uint16_t lane)

static elink_status_t	elink_get_mod_abs_int_cfg (struct bxe_softc sc, uint32_t chip_id, uint32_t shmem_base, uint8_t port, uint8_t gpio_num, uint8_t *gpio_port)

static int	elink_is_sfp_module_plugged (struct elink_phy phy, struct elink_params params)

static int	elink_warpcore_get_sigdet (struct elink_phy phy, struct elink_params params)

static void	elink_warpcore_config_runtime (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_warpcore_config_sfi (struct elink_phy phy, struct elink_params params)

static void	elink_sfp_e3_set_transmitter (struct elink_params params, struct elink_phy phy, uint8_t tx_en)

static void	elink_warpcore_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_warpcore_link_reset (struct elink_phy phy, struct elink_params params)

static void	elink_set_warpcore_loopback (struct elink_phy phy, struct elink_params params)

static void	elink_sync_link (struct elink_params params, struct elink_vars vars)

void	elink_link_status_update (struct elink_params params, struct elink_vars vars)

static void	elink_set_master_ln (struct elink_params params, struct elink_phy phy)

static elink_status_t	elink_reset_unicore (struct elink_params params, struct elink_phy phy, uint8_t set_serdes)

static void	elink_set_swap_lanes (struct elink_params params, struct elink_phy phy)

static void	elink_set_parallel_detection (struct elink_phy phy, struct elink_params params)

static void	elink_set_autoneg (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint8_t enable_cl73)

static void	elink_program_serdes (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_set_brcm_cl37_advertisement (struct elink_phy phy, struct elink_params params)

static void	elink_set_ieee_aneg_advertisement (struct elink_phy phy, struct elink_params params, uint16_t ieee_fc)

static void	elink_restart_autoneg (struct elink_phy phy, struct elink_params params, uint8_t enable_cl73)

static void	elink_initialize_sgmii_process (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_direct_parallel_detect_used (struct elink_phy phy, struct elink_params params)

static void	elink_update_adv_fc (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint32_t gp_status)

static void	elink_flow_ctrl_resolve (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint32_t gp_status)

static void	elink_check_fallback_to_cl37 (struct elink_phy phy, struct elink_params params)

static void	elink_xgxs_an_resolve (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint32_t gp_status)

static elink_status_t	elink_get_link_speed_duplex (struct elink_phy phy, struct elink_params params, struct elink_vars *vars, uint16_t is_link_up, uint16_t speed_mask, uint16_t is_duplex)

static elink_status_t	elink_link_settings_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_warpcore_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_set_gmii_tx_driver (struct elink_params *params)

static elink_status_t	elink_emac_program (struct elink_params params, struct elink_vars vars)

static void	elink_set_preemphasis (struct elink_phy phy, struct elink_params params)

static void	elink_xgxs_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_prepare_xgxs (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint16_t	elink_wait_reset_complete (struct bxe_softc sc, struct elink_phy phy, struct elink_params *params)

static void	elink_link_int_enable (struct elink_params *params)

static void	elink_rearm_latch_signal (struct bxe_softc *sc, uint8_t port, uint8_t exp_mi_int)

static void	elink_link_int_ack (struct elink_params params, struct elink_vars vars, uint8_t is_10g_plus)

static elink_status_t	elink_format_ver (uint32_t num, uint8_t str, uint16_t len)

static elink_status_t	elink_null_format_ver (uint32_t spirom_ver, uint8_t str, uint16_t len)

elink_status_t	elink_get_ext_phy_fw_version (struct elink_params params, uint8_t version, uint16_t len)

static void	elink_set_xgxs_loopback (struct elink_phy phy, struct elink_params params)

elink_status_t	elink_set_led (struct elink_params params, struct elink_vars vars, uint8_t mode, uint32_t speed)

elink_status_t	elink_test_link (struct elink_params params, struct elink_vars vars, uint8_t is_serdes)

static elink_status_t	elink_link_initialize (struct elink_params params, struct elink_vars vars)

static void	elink_int_link_reset (struct elink_phy phy, struct elink_params params)

static void	elink_common_ext_link_reset (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_update_link_down (struct elink_params params, struct elink_vars vars)

static elink_status_t	elink_update_link_up (struct elink_params params, struct elink_vars vars, uint8_t link_10g)

static void	elink_chng_link_count (struct elink_params *params, uint8_t clear)

elink_status_t	elink_link_update (struct elink_params params, struct elink_vars vars)

void	elink_ext_phy_hw_reset (struct bxe_softc *sc, uint8_t port)

static void	elink_save_spirom_version (struct bxe_softc *sc, uint8_t port, uint32_t spirom_ver, uint32_t ver_addr)

static void	elink_save_bcm_spirom_ver (struct bxe_softc sc, struct elink_phy phy, uint8_t port)

static void	elink_ext_phy_10G_an_resolve (struct bxe_softc sc, struct elink_phy phy, struct elink_vars *vars)

static void	elink_8073_resolve_fc (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_8073_8727_external_rom_boot (struct bxe_softc sc, struct elink_phy phy, uint8_t port)

static elink_status_t	elink_8073_is_snr_needed (struct bxe_softc sc, struct elink_phy phy)

static elink_status_t	elink_8073_xaui_wa (struct bxe_softc sc, struct elink_phy phy)

static void	elink_807x_force_10G (struct bxe_softc sc, struct elink_phy phy)

static void	elink_8073_set_pause_cl37 (struct elink_params params, struct elink_phy phy, struct elink_vars *vars)

static void	elink_8073_specific_func (struct elink_phy phy, struct elink_params params, uint32_t action)

static elink_status_t	elink_8073_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_8073_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_8073_link_reset (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_8705_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_8705_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_set_disable_pmd_transmit (struct elink_params params, struct elink_phy phy, uint8_t pmd_dis)

static uint8_t	elink_get_gpio_port (struct elink_params *params)

static void	elink_sfp_e1e2_set_transmitter (struct elink_params params, struct elink_phy phy, uint8_t tx_en)

static void	elink_sfp_set_transmitter (struct elink_params params, struct elink_phy phy, uint8_t tx_en)

static elink_status_t	elink_8726_read_sfp_module_eeprom (struct elink_phy phy, struct elink_params params, uint8_t dev_addr, uint16_t addr, uint8_t byte_cnt, uint8_t *o_buf, uint8_t is_init)

static void	elink_warpcore_power_module (struct elink_params *params, uint8_t power)

static elink_status_t	elink_warpcore_read_sfp_module_eeprom (struct elink_phy phy, struct elink_params params, uint8_t dev_addr, uint16_t addr, uint8_t byte_cnt, uint8_t *o_buf, uint8_t is_init)

static elink_status_t	elink_8727_read_sfp_module_eeprom (struct elink_phy phy, struct elink_params params, uint8_t dev_addr, uint16_t addr, uint8_t byte_cnt, uint8_t *o_buf, uint8_t is_init)

elink_status_t	elink_read_sfp_module_eeprom (struct elink_phy phy, struct elink_params params, uint8_t dev_addr, uint16_t addr, uint16_t byte_cnt, uint8_t *o_buf)

static elink_status_t	elink_get_edc_mode (struct elink_phy phy, struct elink_params params, uint16_t *edc_mode)

static elink_status_t	elink_verify_sfp_module (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_wait_for_sfp_module_initialized (struct elink_phy phy, struct elink_params params)

static void	elink_8727_power_module (struct bxe_softc sc, struct elink_phy phy, uint8_t is_power_up)

static elink_status_t	elink_8726_set_limiting_mode (struct bxe_softc sc, struct elink_phy phy, uint16_t edc_mode)

static elink_status_t	elink_8727_set_limiting_mode (struct bxe_softc sc, struct elink_phy phy, uint16_t edc_mode)

static void	elink_8727_specific_func (struct elink_phy phy, struct elink_params params, uint32_t action)

static void	elink_set_e1e2_module_fault_led (struct elink_params *params, uint8_t gpio_mode)

static void	elink_set_e3_module_fault_led (struct elink_params *params, uint8_t gpio_mode)

static void	elink_set_sfp_module_fault_led (struct elink_params *params, uint8_t gpio_mode)

static void	elink_warpcore_hw_reset (struct elink_phy phy, struct elink_params params)

static void	elink_power_sfp_module (struct elink_params params, struct elink_phy phy, uint8_t power)

static void	elink_warpcore_set_limiting_mode (struct elink_params params, struct elink_phy phy, uint16_t edc_mode)

static void	elink_set_limiting_mode (struct elink_params params, struct elink_phy phy, uint16_t edc_mode)

void	elink_handle_module_detect_int (struct elink_params *params)

static void	elink_sfp_mask_fault (struct bxe_softc sc, struct elink_phy phy, uint16_t alarm_status_offset, uint16_t alarm_ctrl_offset)

static uint8_t	elink_8706_8726_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_8706_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_8706_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_8726_config_loopback (struct elink_phy phy, struct elink_params params)

static void	elink_8726_external_rom_boot (struct elink_phy phy, struct elink_params params)

static uint8_t	elink_8726_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_8726_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_8726_link_reset (struct elink_phy phy, struct elink_params params)

static void	elink_8727_set_link_led (struct elink_phy phy, struct elink_params params, uint8_t mode)

static void	elink_8727_hw_reset (struct elink_phy phy, struct elink_params params)

static void	elink_8727_config_speed (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_8727_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_8727_handle_mod_abs (struct elink_phy phy, struct elink_params params)

static uint8_t	elink_8727_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_8727_link_reset (struct elink_phy phy, struct elink_params params)

static int	elink_is_8483x_8485x (struct elink_phy *phy)

static void	elink_save_848xx_spirom_version (struct elink_phy phy, struct bxe_softc sc, uint8_t port)

static void	elink_848xx_set_led (struct bxe_softc sc, struct elink_phy phy)

static void	elink_848xx_specific_func (struct elink_phy phy, struct elink_params params, uint32_t action)

static elink_status_t	elink_848xx_cmn_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_8481_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_84858_cmd_hdlr (struct elink_phy phy, struct elink_params params, uint16_t fw_cmd, uint16_t cmd_args[], int argc)

static elink_status_t	elink_84833_cmd_hdlr (struct elink_phy phy, struct elink_params params, uint16_t fw_cmd, uint16_t cmd_args[], int argc, int process)

static elink_status_t	elink_848xx_cmd_hdlr (struct elink_phy phy, struct elink_params params, uint16_t fw_cmd, uint16_t cmd_args[], int argc, int process)

static elink_status_t	elink_848xx_pair_swap_cfg (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_84833_get_reset_gpios (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t chip_id)

static elink_status_t	elink_84833_hw_reset_phy (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_8483x_disable_eee (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_8483x_enable_eee (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_848x3_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_848xx_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_848xx_format_ver (uint32_t raw_ver, uint8_t str, uint16_t len)

static void	elink_8481_hw_reset (struct elink_phy phy, struct elink_params params)

static void	elink_8481_link_reset (struct elink_phy phy, struct elink_params params)

static void	elink_848x3_link_reset (struct elink_phy phy, struct elink_params params)

static void	elink_848xx_set_link_led (struct elink_phy phy, struct elink_params params, uint8_t mode)

static void	elink_54618se_specific_func (struct elink_phy phy, struct elink_params params, uint32_t action)

static elink_status_t	elink_54618se_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_5461x_set_link_led (struct elink_phy phy, struct elink_params params, uint8_t mode)

static void	elink_54618se_link_reset (struct elink_phy phy, struct elink_params params)

static uint8_t	elink_54618se_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_54618se_config_loopback (struct elink_phy phy, struct elink_params params)

static void	elink_7101_config_loopback (struct elink_phy phy, struct elink_params params)

static elink_status_t	elink_7101_config_init (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static uint8_t	elink_7101_read_status (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static elink_status_t	elink_7101_format_ver (uint32_t spirom_ver, uint8_t str, uint16_t len)

void	elink_sfx7101_sp_sw_reset (struct bxe_softc sc, struct elink_phy phy)

static void	elink_7101_hw_reset (struct elink_phy phy, struct elink_params params)

static void	elink_7101_set_link_led (struct elink_phy phy, struct elink_params params, uint8_t mode)

static void	elink_populate_preemphasis (struct bxe_softc sc, uint32_t shmem_base, struct elink_phy phy, uint8_t port, uint8_t phy_index)

static uint32_t	elink_get_ext_phy_config (struct bxe_softc *sc, uint32_t shmem_base, uint8_t phy_index, uint8_t port)

static elink_status_t	elink_populate_int_phy (struct bxe_softc sc, uint32_t shmem_base, uint8_t port, struct elink_phy phy)

static elink_status_t	elink_populate_ext_phy (struct bxe_softc sc, uint8_t phy_index, uint32_t shmem_base, uint32_t shmem2_base, uint8_t port, struct elink_phy phy)

static elink_status_t	elink_populate_phy (struct bxe_softc sc, uint8_t phy_index, uint32_t shmem_base, uint32_t shmem2_base, uint8_t port, struct elink_phy phy)

static void	elink_phy_def_cfg (struct elink_params params, struct elink_phy phy, uint8_t phy_index)

uint32_t	elink_phy_selection (struct elink_params *params)

elink_status_t	elink_phy_probe (struct elink_params *params)

static void	elink_init_bmac_loopback (struct elink_params params, struct elink_vars vars)

static void	elink_init_emac_loopback (struct elink_params params, struct elink_vars vars)

static void	elink_init_xmac_loopback (struct elink_params params, struct elink_vars vars)

static void	elink_init_umac_loopback (struct elink_params params, struct elink_vars vars)

static void	elink_init_xgxs_loopback (struct elink_params params, struct elink_vars vars)

void	elink_set_rx_filter (struct elink_params *params, uint8_t en)

static elink_status_t	elink_avoid_link_flap (struct elink_params params, struct elink_vars vars)

static void	elink_cannot_avoid_link_flap (struct elink_params params, struct elink_vars vars, int lfa_status)

elink_status_t	elink_phy_init (struct elink_params params, struct elink_vars vars)

elink_status_t	elink_link_reset (struct elink_params params, struct elink_vars vars, uint8_t reset_ext_phy)

elink_status_t	elink_lfa_reset (struct elink_params params, struct elink_vars vars)

static elink_status_t	elink_8073_common_init_phy (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint8_t phy_index, uint32_t chip_id)

static elink_status_t	elink_8726_common_init_phy (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint8_t phy_index, uint32_t chip_id)

static void	elink_get_ext_phy_reset_gpio (struct bxe_softc sc, uint32_t shmem_base, uint8_t io_gpio, uint8_t *io_port)

static elink_status_t	elink_8727_common_init_phy (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint8_t phy_index, uint32_t chip_id)

static elink_status_t	elink_84833_common_init_phy (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint8_t phy_index, uint32_t chip_id)

static elink_status_t	elink_ext_phy_common_init (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint8_t phy_index, uint32_t ext_phy_type, uint32_t chip_id)

elink_status_t	elink_common_init_phy (struct bxe_softc *sc, uint32_t shmem_base_path[], uint32_t shmem2_base_path[], uint32_t chip_id, uint8_t one_port_enabled)

static void	elink_check_over_curr (struct elink_params params, struct elink_vars vars)

static uint8_t	elink_analyze_link_error (struct elink_params params, struct elink_vars vars, uint32_t status, uint32_t phy_flag, uint32_t link_flag, uint8_t notify)

static void	elink_sfp_tx_fault_detection (struct elink_phy phy, struct elink_params params, struct elink_vars *vars)

static void	elink_kr2_recovery (struct elink_params params, struct elink_vars vars, struct elink_phy *phy)

static void	elink_check_kr2_wa (struct elink_params params, struct elink_vars vars, struct elink_phy *phy)

void	elink_period_func (struct elink_params params, struct elink_vars vars)

uint8_t	elink_fan_failure_det_req (struct bxe_softc *sc, uint32_t shmem_base, uint32_t shmem2_base, uint8_t port)

void	elink_hw_reset_phy (struct elink_params *params)

void	elink_init_mod_abs_int (struct bxe_softc sc, struct elink_vars vars, uint32_t chip_id, uint32_t shmem_base, uint32_t shmem2_base, uint8_t port)

Variables
static const struct elink_phy	phy_null

static const struct elink_phy	phy_serdes

static const struct elink_phy	phy_xgxs

static const struct elink_phy	phy_warpcore

static const struct elink_phy	phy_7101

static const struct elink_phy	phy_8073

static const struct elink_phy	phy_8705

static const struct elink_phy	phy_8706

static const struct elink_phy	phy_8726

static const struct elink_phy	phy_8727

static const struct elink_phy	phy_8481

static const struct elink_phy	phy_84823

static const struct elink_phy	phy_84833

static const struct elink_phy	phy_84834

static const struct elink_phy	phy_84858

static const struct elink_phy	phy_54618se

Macro Definition Documentation

◆ BCM84858_PHY_ID

#define BCM84858_PHY_ID 0x600d

Definition at line 487 of file bxe_elink.c.

◆ CL22_RD_OVER_CL45

#define CL22_RD_OVER_CL45	(	_sc,
		_phy,
		_bank,
		_addr,
		_val
	)

Value:

        elink_cl45_read(_sc, _phy, \
                (_phy)->def_md_devad, \
                (_bank + (_addr & 0xf)), \
                _val)

Definition at line 942 of file bxe_elink.c.

◆ CL22_WR_OVER_CL45

#define CL22_WR_OVER_CL45	(	_sc,
		_phy,
		_bank,
		_addr,
		_val
	)

Value:

        elink_cl45_write(_sc, _phy, \
                (_phy)->def_md_devad, \
                (_bank + (_addr & 0xf)), \
                _val)

Definition at line 936 of file bxe_elink.c.

◆ DCBX_INVALID_COS

#define DCBX_INVALID_COS (0xFF)

Definition at line 917 of file bxe_elink.c.

◆ DEFAULT_TX_DRV_BRDCT

#define DEFAULT_TX_DRV_BRDCT 2

Definition at line 927 of file bxe_elink.c.

◆ DEFAULT_TX_DRV_IFIR

#define DEFAULT_TX_DRV_IFIR 0

Definition at line 928 of file bxe_elink.c.

◆ DEFAULT_TX_DRV_IPRE_DRIVER

#define DEFAULT_TX_DRV_IPRE_DRIVER 6

Definition at line 930 of file bxe_elink.c.

◆ DEFAULT_TX_DRV_POST2

#define DEFAULT_TX_DRV_POST2 3

Definition at line 929 of file bxe_elink.c.

◆ DIGITAL5_ACTUAL_SPEED_TX_MASK

#define DIGITAL5_ACTUAL_SPEED_TX_MASK 0x003f

Definition at line 733 of file bxe_elink.c.

◆ ELINK_AUTONEG_BAM

#define ELINK_AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM

Definition at line 827 of file bxe_elink.c.

◆ ELINK_AUTONEG_CL37

#define ELINK_AUTONEG_CL37 SHARED_HW_CFG_AN_ENABLE_CL37

Definition at line 825 of file bxe_elink.c.

◆ ELINK_AUTONEG_CL73

#define ELINK_AUTONEG_CL73 SHARED_HW_CFG_AN_ENABLE_CL73

Definition at line 826 of file bxe_elink.c.

◆ ELINK_AUTONEG_PARALLEL

#define ELINK_AUTONEG_PARALLEL SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION

Definition at line 828 of file bxe_elink.c.

◆ ELINK_AUTONEG_REMOTE_PHY

#define ELINK_AUTONEG_REMOTE_PHY SHARED_HW_CFG_AN_ENABLE_REMOTE_PHY

Definition at line 832 of file bxe_elink.c.

◆ ELINK_AUTONEG_SGMII_FIBER_AUTODET

#define ELINK_AUTONEG_SGMII_FIBER_AUTODET SHARED_HW_CFG_AN_EN_SGMII_FIBER_AUTO_DETECT

Definition at line 830 of file bxe_elink.c.

◆ ELINK_EDC_MODE_ACTIVE_DAC

#define ELINK_EDC_MODE_ACTIVE_DAC 0x0066

Definition at line 914 of file bxe_elink.c.

◆ ELINK_EDC_MODE_LIMITING

#define ELINK_EDC_MODE_LIMITING 0x0044

Definition at line 912 of file bxe_elink.c.

◆ ELINK_EDC_MODE_LINEAR

#define ELINK_EDC_MODE_LINEAR 0x0022

Definition at line 911 of file bxe_elink.c.

◆ ELINK_EDC_MODE_PASSIVE_DAC

#define ELINK_EDC_MODE_PASSIVE_DAC 0x0055

Definition at line 913 of file bxe_elink.c.

◆ ELINK_ETH_HLEN

#define ELINK_ETH_HLEN 14

Definition at line 764 of file bxe_elink.c.

◆ ELINK_ETH_MAX_JUMBO_PACKET_SIZE

#define ELINK_ETH_MAX_JUMBO_PACKET_SIZE 9600

Definition at line 769 of file bxe_elink.c.

◆ ELINK_ETH_MAX_PACKET_SIZE

#define ELINK_ETH_MAX_PACKET_SIZE 1500

Definition at line 768 of file bxe_elink.c.

◆ ELINK_ETH_MIN_PACKET_SIZE

#define ELINK_ETH_MIN_PACKET_SIZE 60

Definition at line 767 of file bxe_elink.c.

◆ ELINK_ETH_OVREHEAD

#define ELINK_ETH_OVREHEAD (ELINK_ETH_HLEN + 8 + 8)

Definition at line 766 of file bxe_elink.c.

◆ ELINK_ETS_BW_LIMIT_CREDIT_UPPER_BOUND

#define ELINK_ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000)

Definition at line 919 of file bxe_elink.c.

◆ ELINK_ETS_BW_LIMIT_CREDIT_WEIGHT

#define ELINK_ETS_BW_LIMIT_CREDIT_WEIGHT (0x5000)

Definition at line 920 of file bxe_elink.c.

◆ ELINK_ETS_E3B0_NIG_MIN_W_VAL_20GBPS

#define ELINK_ETS_E3B0_NIG_MIN_W_VAL_20GBPS (2720)

Definition at line 922 of file bxe_elink.c.

◆ ELINK_ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS

#define ELINK_ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS (1360)

Definition at line 921 of file bxe_elink.c.

◆ ELINK_ETS_E3B0_PBF_MIN_W_VAL

#define ELINK_ETS_E3B0_PBF_MIN_W_VAL (10000)

Definition at line 923 of file bxe_elink.c.

◆ ELINK_GP_STATUS_100M

#define ELINK_GP_STATUS_100M MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_100M

Definition at line 841 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_CX4

#define ELINK_GP_STATUS_10G_CX4 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4

Definition at line 848 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_HIG

#define ELINK_GP_STATUS_10G_HIG MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG

Definition at line 846 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_KR

#define ELINK_GP_STATUS_10G_KR MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR

Definition at line 853 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_KX4

#define ELINK_GP_STATUS_10G_KX4 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4

Definition at line 851 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_SFI

#define ELINK_GP_STATUS_10G_SFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI

Definition at line 856 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10G_XFI

#define ELINK_GP_STATUS_10G_XFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI

Definition at line 854 of file bxe_elink.c.

◆ ELINK_GP_STATUS_10M

#define ELINK_GP_STATUS_10M MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10M

Definition at line 840 of file bxe_elink.c.

◆ ELINK_GP_STATUS_1G

#define ELINK_GP_STATUS_1G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G

Definition at line 842 of file bxe_elink.c.

◆ ELINK_GP_STATUS_1G_KX

#define ELINK_GP_STATUS_1G_KX MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX

Definition at line 850 of file bxe_elink.c.

◆ ELINK_GP_STATUS_20G_DXGXS

#define ELINK_GP_STATUS_20G_DXGXS MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS

Definition at line 855 of file bxe_elink.c.

◆ ELINK_GP_STATUS_20G_KR2

#define ELINK_GP_STATUS_20G_KR2 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_KR2

Definition at line 857 of file bxe_elink.c.

◆ ELINK_GP_STATUS_2_5G

#define ELINK_GP_STATUS_2_5G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_2_5G

Definition at line 843 of file bxe_elink.c.

◆ ELINK_GP_STATUS_5G

#define ELINK_GP_STATUS_5G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_5G

Definition at line 844 of file bxe_elink.c.

◆ ELINK_GP_STATUS_6G

#define ELINK_GP_STATUS_6G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_6G

Definition at line 845 of file bxe_elink.c.

◆ ELINK_GP_STATUS_PAUSE_RSOLUTION_RXSIDE

#define ELINK_GP_STATUS_PAUSE_RSOLUTION_RXSIDE MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_RXSIDE

Definition at line 836 of file bxe_elink.c.

◆ ELINK_GP_STATUS_PAUSE_RSOLUTION_TXSIDE

#define ELINK_GP_STATUS_PAUSE_RSOLUTION_TXSIDE MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE

Definition at line 834 of file bxe_elink.c.

◆ ELINK_GP_STATUS_SPEED_MASK

#define ELINK_GP_STATUS_SPEED_MASK MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_MASK

Definition at line 838 of file bxe_elink.c.

◆ ELINK_LINK_1000TFD

#define ELINK_LINK_1000TFD LINK_STATUS_SPEED_AND_DUPLEX_1000TFD

Definition at line 864 of file bxe_elink.c.

◆ ELINK_LINK_1000THD

#define ELINK_LINK_1000THD LINK_STATUS_SPEED_AND_DUPLEX_1000THD

Definition at line 863 of file bxe_elink.c.

◆ ELINK_LINK_1000XFD

#define ELINK_LINK_1000XFD LINK_STATUS_SPEED_AND_DUPLEX_1000XFD

Definition at line 865 of file bxe_elink.c.

◆ ELINK_LINK_100T4

#define ELINK_LINK_100T4 LINK_STATUS_SPEED_AND_DUPLEX_100T4

Definition at line 861 of file bxe_elink.c.

◆ ELINK_LINK_100TXFD

#define ELINK_LINK_100TXFD LINK_STATUS_SPEED_AND_DUPLEX_100TXFD

Definition at line 862 of file bxe_elink.c.

◆ ELINK_LINK_100TXHD

#define ELINK_LINK_100TXHD LINK_STATUS_SPEED_AND_DUPLEX_100TXHD

Definition at line 860 of file bxe_elink.c.

◆ ELINK_LINK_10GTFD

#define ELINK_LINK_10GTFD LINK_STATUS_SPEED_AND_DUPLEX_10GTFD

Definition at line 869 of file bxe_elink.c.

◆ ELINK_LINK_10GXFD

#define ELINK_LINK_10GXFD LINK_STATUS_SPEED_AND_DUPLEX_10GXFD

Definition at line 870 of file bxe_elink.c.

◆ ELINK_LINK_10TFD

#define ELINK_LINK_10TFD LINK_STATUS_SPEED_AND_DUPLEX_10TFD

Definition at line 859 of file bxe_elink.c.

◆ ELINK_LINK_10THD

#define ELINK_LINK_10THD LINK_STATUS_SPEED_AND_DUPLEX_10THD

Definition at line 858 of file bxe_elink.c.

◆ ELINK_LINK_20GTFD

#define ELINK_LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD

Definition at line 871 of file bxe_elink.c.

◆ ELINK_LINK_20GXFD

#define ELINK_LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD

Definition at line 872 of file bxe_elink.c.

◆ ELINK_LINK_2500TFD

#define ELINK_LINK_2500TFD LINK_STATUS_SPEED_AND_DUPLEX_2500TFD

Definition at line 867 of file bxe_elink.c.

◆ ELINK_LINK_2500THD

#define ELINK_LINK_2500THD LINK_STATUS_SPEED_AND_DUPLEX_2500THD

Definition at line 866 of file bxe_elink.c.

◆ ELINK_LINK_2500XFD

#define ELINK_LINK_2500XFD LINK_STATUS_SPEED_AND_DUPLEX_2500XFD

Definition at line 868 of file bxe_elink.c.

◆ ELINK_LINK_UPDATE_MASK

#define ELINK_LINK_UPDATE_MASK

Value:

                        (LINK_STATUS_SPEED_AND_DUPLEX_MASK | \
                         LINK_STATUS_LINK_UP | \
                         LINK_STATUS_PHYSICAL_LINK_FLAG | \
                         LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | \
                         LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | \
                         LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | \
                         LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | \
                         LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | \
                         LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE)

Definition at line 874 of file bxe_elink.c.

◆ ELINK_MAX_PACKET_SIZE

#define ELINK_MAX_PACKET_SIZE (9700)

Definition at line 925 of file bxe_elink.c.

◆ ELINK_MDIO_ACCESS_TIMEOUT

#define ELINK_MDIO_ACCESS_TIMEOUT 1000

Definition at line 770 of file bxe_elink.c.

◆ ELINK_MDIO_AN_CL73_OR_37_COMPLETE

#define ELINK_MDIO_AN_CL73_OR_37_COMPLETE

Value:

(MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | \

MDIO_GP_STATUS_TOP_AN_STATUS1_CL37_AUTONEG_COMPLETE)

MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE

Definition: bxe_elink.c:162

Definition at line 808 of file bxe_elink.c.

◆ ELINK_NIG_LATCH_BC_ENABLE_MI_INT

#define ELINK_NIG_LATCH_BC_ENABLE_MI_INT 0

Definition at line 787 of file bxe_elink.c.

◆ ELINK_NIG_MASK_MI_INT

#define ELINK_NIG_MASK_MI_INT NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT

Definition at line 799 of file bxe_elink.c.

◆ ELINK_NIG_MASK_SERDES0_LINK_STATUS

#define ELINK_NIG_MASK_SERDES0_LINK_STATUS NIG_MASK_INTERRUPT_PORT0_REG_MASK_SERDES0_LINK_STATUS

Definition at line 805 of file bxe_elink.c.

◆ ELINK_NIG_MASK_XGXS0_LINK10G

#define ELINK_NIG_MASK_XGXS0_LINK10G NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G

Definition at line 801 of file bxe_elink.c.

◆ ELINK_NIG_MASK_XGXS0_LINK_STATUS

#define ELINK_NIG_MASK_XGXS0_LINK_STATUS NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK_STATUS

Definition at line 803 of file bxe_elink.c.

◆ ELINK_NIG_STATUS_EMAC0_MI_INT

#define ELINK_NIG_STATUS_EMAC0_MI_INT NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT

Definition at line 789 of file bxe_elink.c.

◆ ELINK_NIG_STATUS_SERDES0_LINK_STATUS

#define ELINK_NIG_STATUS_SERDES0_LINK_STATUS NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS

Definition at line 797 of file bxe_elink.c.

◆ ELINK_NIG_STATUS_XGXS0_LINK10G

#define ELINK_NIG_STATUS_XGXS0_LINK10G NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G

Definition at line 791 of file bxe_elink.c.

◆ ELINK_NIG_STATUS_XGXS0_LINK_STATUS

#define ELINK_NIG_STATUS_XGXS0_LINK_STATUS NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS

Definition at line 793 of file bxe_elink.c.

◆ ELINK_NIG_STATUS_XGXS0_LINK_STATUS_SIZE

#define ELINK_NIG_STATUS_XGXS0_LINK_STATUS_SIZE NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE

Definition at line 795 of file bxe_elink.c.

◆ ELINK_SERDES_RESET_BITS

#define ELINK_SERDES_RESET_BITS

Value:

        (MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_RSTB_HW | \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_IDDQ |    \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN |  \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN_SD)

Definition at line 819 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR

#define ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR 0x3

Definition at line 892 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_10G_COMP_CODE_LR_MASK

#define ELINK_SFP_EEPROM_10G_COMP_CODE_LR_MASK (1<<5)

Definition at line 894 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_10G_COMP_CODE_LRM_MASK

#define ELINK_SFP_EEPROM_10G_COMP_CODE_LRM_MASK (1<<6)

Definition at line 895 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_10G_COMP_CODE_SR_MASK

#define ELINK_SFP_EEPROM_10G_COMP_CODE_SR_MASK (1<<4)

Definition at line 893 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR

#define ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR 0x6

Definition at line 897 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_1G_COMP_CODE_BASE_T

#define ELINK_SFP_EEPROM_1G_COMP_CODE_BASE_T (1<<3)

Definition at line 901 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_1G_COMP_CODE_CX

#define ELINK_SFP_EEPROM_1G_COMP_CODE_CX (1<<2)

Definition at line 900 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_1G_COMP_CODE_LX

#define ELINK_SFP_EEPROM_1G_COMP_CODE_LX (1<<1)

Definition at line 899 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_1G_COMP_CODE_SX

#define ELINK_SFP_EEPROM_1G_COMP_CODE_SX (1<<0)

Definition at line 898 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_CON_TYPE_ADDR

#define ELINK_SFP_EEPROM_CON_TYPE_ADDR 0x2

Definition at line 885 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_CON_TYPE_VAL_COPPER

#define ELINK_SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21

Definition at line 888 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_CON_TYPE_VAL_LC

#define ELINK_SFP_EEPROM_CON_TYPE_VAL_LC 0x7

Definition at line 887 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_CON_TYPE_VAL_RJ45

#define ELINK_SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22

Definition at line 889 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_CON_TYPE_VAL_UNKNOWN

#define ELINK_SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0

Definition at line 886 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_FC_TX_TECH_ADDR

#define ELINK_SFP_EEPROM_FC_TX_TECH_ADDR 0x8

Definition at line 903 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE

#define ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE 0x8

Definition at line 905 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE

#define ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4

Definition at line 904 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_OPTIONS_ADDR

#define ELINK_SFP_EEPROM_OPTIONS_ADDR 0x40

Definition at line 907 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK

#define ELINK_SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK 0x1

Definition at line 908 of file bxe_elink.c.

◆ ELINK_SFP_EEPROM_OPTIONS_SIZE

#define ELINK_SFP_EEPROM_OPTIONS_SIZE 2

Definition at line 909 of file bxe_elink.c.

◆ ELINK_XGXS_RESET_BITS

#define ELINK_XGXS_RESET_BITS

Value:

        (MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_RSTB_HW |   \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_IDDQ |      \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN |    \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN_SD | \
         MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_TXD_FIFO_RSTB)

Definition at line 812 of file bxe_elink.c.

◆ I2C_BSC0

#define I2C_BSC0 0

Definition at line 773 of file bxe_elink.c.

◆ I2C_BSC1

#define I2C_BSC1 1

Definition at line 774 of file bxe_elink.c.

◆ I2C_SWITCH_WIDTH

#define I2C_SWITCH_WIDTH 2

Definition at line 772 of file bxe_elink.c.

◆ I2C_WA_PWR_ITER

#define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)

Definition at line 776 of file bxe_elink.c.

◆ I2C_WA_RETRY_CNT

#define I2C_WA_RETRY_CNT 3

Definition at line 775 of file bxe_elink.c.

◆ LED_BLINK_RATE_VAL_E1X_E2

#define LED_BLINK_RATE_VAL_E1X_E2 480

Definition at line 782 of file bxe_elink.c.

◆ LED_BLINK_RATE_VAL_E3

#define LED_BLINK_RATE_VAL_E3 354

Definition at line 781 of file bxe_elink.c.

◆ MAX_KR_LINK_RETRY

#define MAX_KR_LINK_RETRY 4

Definition at line 926 of file bxe_elink.c.

◆ MCPR_IMC_COMMAND_READ_OP

#define MCPR_IMC_COMMAND_READ_OP 1

Definition at line 777 of file bxe_elink.c.

◆ MCPR_IMC_COMMAND_WRITE_OP

#define MCPR_IMC_COMMAND_WRITE_OP 2

Definition at line 778 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL 0x11

Definition at line 196 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN 0x1

Definition at line 197 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK 0x13

Definition at line 198 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT (0xb71<<1)

Definition at line 199 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS 0x10

Definition at line 194 of file bxe_elink.c.

◆ MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK

#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK 0x8000

Definition at line 195 of file bxe_elink.c.

◆ MDIO_84833_SUPER_ISOLATE

#define MDIO_84833_SUPER_ISOLATE 0x8000

Definition at line 531 of file bxe_elink.c.

◆ MDIO_84833_TOP_CFG_FW_EEE

#define MDIO_84833_TOP_CFG_FW_EEE 0x10b1

Definition at line 528 of file bxe_elink.c.

◆ MDIO_84833_TOP_CFG_FW_NO_EEE

#define MDIO_84833_TOP_CFG_FW_NO_EEE 0x1f81

Definition at line 529 of file bxe_elink.c.

◆ MDIO_84833_TOP_CFG_FW_REV

#define MDIO_84833_TOP_CFG_FW_REV 0x400f

Definition at line 527 of file bxe_elink.c.

◆ MDIO_84833_TOP_CFG_XGPHY_STRAP1

#define MDIO_84833_TOP_CFG_XGPHY_STRAP1 0x401a

Definition at line 530 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_COMMAND

#define MDIO_848xx_CMD_HDLR_COMMAND (MDIO_848xx_TOP_CFG_SCRATCH_REG0)

Definition at line 544 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_DATA1

#define MDIO_848xx_CMD_HDLR_DATA1 (MDIO_848xx_TOP_CFG_SCRATCH_REG27)

Definition at line 546 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_DATA2

#define MDIO_848xx_CMD_HDLR_DATA2 (MDIO_848xx_TOP_CFG_SCRATCH_REG28)

Definition at line 547 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_DATA3

#define MDIO_848xx_CMD_HDLR_DATA3 (MDIO_848xx_TOP_CFG_SCRATCH_REG29)

Definition at line 548 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_DATA4

#define MDIO_848xx_CMD_HDLR_DATA4 (MDIO_848xx_TOP_CFG_SCRATCH_REG30)

Definition at line 549 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_DATA5

#define MDIO_848xx_CMD_HDLR_DATA5 (MDIO_848xx_TOP_CFG_SCRATCH_REG31)

Definition at line 550 of file bxe_elink.c.

◆ MDIO_848xx_CMD_HDLR_STATUS

#define MDIO_848xx_CMD_HDLR_STATUS (MDIO_848xx_TOP_CFG_SCRATCH_REG26)

Definition at line 545 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG0

#define MDIO_848xx_TOP_CFG_SCRATCH_REG0 0x4005

Definition at line 533 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG1

#define MDIO_848xx_TOP_CFG_SCRATCH_REG1 0x4006

Definition at line 534 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG2

#define MDIO_848xx_TOP_CFG_SCRATCH_REG2 0x4007

Definition at line 535 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG26

#define MDIO_848xx_TOP_CFG_SCRATCH_REG26 0x4037

Definition at line 538 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG27

#define MDIO_848xx_TOP_CFG_SCRATCH_REG27 0x4038

Definition at line 539 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG28

#define MDIO_848xx_TOP_CFG_SCRATCH_REG28 0x4039

Definition at line 540 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG29

#define MDIO_848xx_TOP_CFG_SCRATCH_REG29 0x403a

Definition at line 541 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG3

#define MDIO_848xx_TOP_CFG_SCRATCH_REG3 0x4008

Definition at line 536 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG30

#define MDIO_848xx_TOP_CFG_SCRATCH_REG30 0x403b

Definition at line 542 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG31

#define MDIO_848xx_TOP_CFG_SCRATCH_REG31 0x403c

Definition at line 543 of file bxe_elink.c.

◆ MDIO_848xx_TOP_CFG_SCRATCH_REG4

#define MDIO_848xx_TOP_CFG_SCRATCH_REG4 0x4009

Definition at line 537 of file bxe_elink.c.

◆ MDIO_AER_BLOCK_AER_REG

#define MDIO_AER_BLOCK_AER_REG 0x1E

Definition at line 296 of file bxe_elink.c.

◆ MDIO_AN_DEVAD

#define MDIO_AN_DEVAD 0x7

Definition at line 454 of file bxe_elink.c.

◆ MDIO_AN_REG_1000T_STATUS

#define MDIO_AN_REG_1000T_STATUS 0xffea

Definition at line 477 of file bxe_elink.c.

◆ MDIO_AN_REG_8073_2_5G

#define MDIO_AN_REG_8073_2_5G 0x8329

Definition at line 479 of file bxe_elink.c.

◆ MDIO_AN_REG_8073_BAM

#define MDIO_AN_REG_8073_BAM 0x8350

Definition at line 480 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_1000T_CTRL

#define MDIO_AN_REG_8481_1000T_CTRL 0xffe9

Definition at line 491 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_10GBASE_T_AN_CTRL

#define MDIO_AN_REG_8481_10GBASE_T_AN_CTRL 0x0020

Definition at line 482 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_1G_100T_EXT_CTRL

#define MDIO_AN_REG_8481_1G_100T_EXT_CTRL 0xfff0

Definition at line 492 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_AUX_CTRL

#define MDIO_AN_REG_8481_AUX_CTRL 0xfff8

Definition at line 496 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_EXPANSION_REG_ACCESS

#define MDIO_AN_REG_8481_EXPANSION_REG_ACCESS 0xfff7

Definition at line 495 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_EXPANSION_REG_RD_RW

#define MDIO_AN_REG_8481_EXPANSION_REG_RD_RW 0xfff5

Definition at line 494 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_LEGACY_AN_ADV

#define MDIO_AN_REG_8481_LEGACY_AN_ADV 0xffe4

Definition at line 489 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_LEGACY_AN_EXPANSION

#define MDIO_AN_REG_8481_LEGACY_AN_EXPANSION 0xffe6

Definition at line 490 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_LEGACY_MII_CTRL

#define MDIO_AN_REG_8481_LEGACY_MII_CTRL 0xffe0

Definition at line 483 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_LEGACY_MII_STATUS

#define MDIO_AN_REG_8481_LEGACY_MII_STATUS 0xffe1

Definition at line 485 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_LEGACY_SHADOW

#define MDIO_AN_REG_8481_LEGACY_SHADOW 0xfffc

Definition at line 497 of file bxe_elink.c.

◆ MDIO_AN_REG_8481_MII_CTRL_FORCE_1G

#define MDIO_AN_REG_8481_MII_CTRL_FORCE_1G 0x40

Definition at line 484 of file bxe_elink.c.

◆ MDIO_AN_REG_848xx_ID_LSB

#define MDIO_AN_REG_848xx_ID_LSB 0xffe3

Definition at line 488 of file bxe_elink.c.

◆ MDIO_AN_REG_848xx_ID_MSB

#define MDIO_AN_REG_848xx_ID_MSB 0xffe2

Definition at line 486 of file bxe_elink.c.

◆ MDIO_AN_REG_8727_MISC_CTRL

#define MDIO_AN_REG_8727_MISC_CTRL 0x8309

Definition at line 396 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV

#define MDIO_AN_REG_ADV 0x0011

Definition at line 464 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV2

#define MDIO_AN_REG_ADV2 0x0012

Definition at line 465 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV_PAUSE

#define MDIO_AN_REG_ADV_PAUSE 0x0010

Definition at line 459 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC

#define MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC 0x0800

Definition at line 461 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV_PAUSE_BOTH

#define MDIO_AN_REG_ADV_PAUSE_BOTH 0x0C00

Definition at line 462 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV_PAUSE_MASK

#define MDIO_AN_REG_ADV_PAUSE_MASK 0x0C00

Definition at line 463 of file bxe_elink.c.

◆ MDIO_AN_REG_ADV_PAUSE_PAUSE

#define MDIO_AN_REG_ADV_PAUSE_PAUSE 0x0400

Definition at line 460 of file bxe_elink.c.

◆ MDIO_AN_REG_CL37_AN

#define MDIO_AN_REG_CL37_AN 0xffe0

Definition at line 474 of file bxe_elink.c.

◆ MDIO_AN_REG_CL37_CL73

#define MDIO_AN_REG_CL37_CL73 0x8370

Definition at line 473 of file bxe_elink.c.

◆ MDIO_AN_REG_CL37_FC_LD

#define MDIO_AN_REG_CL37_FC_LD 0xffe4

Definition at line 475 of file bxe_elink.c.

◆ MDIO_AN_REG_CL37_FC_LP

#define MDIO_AN_REG_CL37_FC_LP 0xffe5

Definition at line 476 of file bxe_elink.c.

◆ MDIO_AN_REG_CTRL

#define MDIO_AN_REG_CTRL 0x0000

Definition at line 456 of file bxe_elink.c.

◆ MDIO_AN_REG_EEE_ADV

#define MDIO_AN_REG_EEE_ADV 0x003c

Definition at line 469 of file bxe_elink.c.

◆ MDIO_AN_REG_LINK_STATUS

#define MDIO_AN_REG_LINK_STATUS 0x8304

Definition at line 472 of file bxe_elink.c.

◆ MDIO_AN_REG_LP_AUTO_NEG

#define MDIO_AN_REG_LP_AUTO_NEG 0x0013

Definition at line 466 of file bxe_elink.c.

◆ MDIO_AN_REG_LP_AUTO_NEG2

#define MDIO_AN_REG_LP_AUTO_NEG2 0x0014

Definition at line 467 of file bxe_elink.c.

◆ MDIO_AN_REG_LP_EEE_ADV

#define MDIO_AN_REG_LP_EEE_ADV 0x003d

Definition at line 470 of file bxe_elink.c.

◆ MDIO_AN_REG_MASTER_STATUS

#define MDIO_AN_REG_MASTER_STATUS 0x0021

Definition at line 468 of file bxe_elink.c.

◆ MDIO_AN_REG_STATUS

#define MDIO_AN_REG_STATUS 0x0001

Definition at line 457 of file bxe_elink.c.

◆ MDIO_AN_REG_STATUS_AN_COMPLETE

#define MDIO_AN_REG_STATUS_AN_COMPLETE 0x0020

Definition at line 458 of file bxe_elink.c.

◆ MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL

#define MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL 0x10

Definition at line 278 of file bxe_elink.c.

◆ MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE

#define MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE 0x0001

Definition at line 279 of file bxe_elink.c.

◆ MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN

#define MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN 0x0002

Definition at line 280 of file bxe_elink.c.

◆ MDIO_BLOCK0_XGXS_CONTROL

#define MDIO_BLOCK0_XGXS_CONTROL 0x10

Definition at line 141 of file bxe_elink.c.

◆ MDIO_BLOCK1_LANE_CTRL0

#define MDIO_BLOCK1_LANE_CTRL0 0x15

Definition at line 144 of file bxe_elink.c.

◆ MDIO_BLOCK1_LANE_CTRL1

#define MDIO_BLOCK1_LANE_CTRL1 0x16

Definition at line 145 of file bxe_elink.c.

◆ MDIO_BLOCK1_LANE_CTRL2

#define MDIO_BLOCK1_LANE_CTRL2 0x17

Definition at line 146 of file bxe_elink.c.

◆ MDIO_BLOCK1_LANE_PRBS

#define MDIO_BLOCK1_LANE_PRBS 0x19

Definition at line 147 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB0_CL73_AN_CONTROL

#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL 0x0

Definition at line 41 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN

#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN 0x1000

Definition at line 43 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB0_CL73_AN_CONTROL_MAIN_RST

#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_MAIN_RST 0x8000

Definition at line 44 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN

#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN 0x0200

Definition at line 42 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV1

#define MDIO_CL73_IEEEB1_AN_ADV1 0x00

Definition at line 47 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV1_ASYMMETRIC

#define MDIO_CL73_IEEEB1_AN_ADV1_ASYMMETRIC 0x0800

Definition at line 49 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV1_PAUSE

#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE 0x0400

Definition at line 48 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH

#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH 0x0C00

Definition at line 50 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK

#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK 0x0C00

Definition at line 51 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV2

#define MDIO_CL73_IEEEB1_AN_ADV2 0x01

Definition at line 52 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M

#define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M 0x0000

Definition at line 53 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX

#define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX 0x0020

Definition at line 54 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR

#define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR 0x0080

Definition at line 56 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4

#define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 0x0040

Definition at line 55 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV1

#define MDIO_CL73_IEEEB1_AN_LP_ADV1 0x03

Definition at line 57 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV1_ASYMMETRIC

#define MDIO_CL73_IEEEB1_AN_LP_ADV1_ASYMMETRIC 0x0800

Definition at line 59 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE

#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE 0x0400

Definition at line 58 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_BOTH

#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_BOTH 0x0C00

Definition at line 60 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK

#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK 0x0C00

Definition at line 61 of file bxe_elink.c.

◆ MDIO_CL73_IEEEB1_AN_LP_ADV2

#define MDIO_CL73_IEEEB1_AN_LP_ADV2 0x04

Definition at line 62 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL1

#define MDIO_CL73_USERB0_CL73_BAM_CTRL1 0x12

Definition at line 288 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN

#define MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN 0x8000

Definition at line 289 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN

#define MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN 0x2000

Definition at line 291 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN

#define MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN 0x4000

Definition at line 290 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL3

#define MDIO_CL73_USERB0_CL73_BAM_CTRL3 0x14

Definition at line 292 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_BAM_CTRL3_USE_CL73_HCD_MR

#define MDIO_CL73_USERB0_CL73_BAM_CTRL3_USE_CL73_HCD_MR 0x0001

Definition at line 293 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_UCTRL

#define MDIO_CL73_USERB0_CL73_UCTRL 0x10

Definition at line 283 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_UCTRL_USTAT1_MUXSEL

#define MDIO_CL73_USERB0_CL73_UCTRL_USTAT1_MUXSEL 0x0002

Definition at line 284 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_USTAT1

#define MDIO_CL73_USERB0_CL73_USTAT1 0x11

Definition at line 285 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37

#define MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37 0x0400

Definition at line 287 of file bxe_elink.c.

◆ MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK

#define MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK 0x0100

Definition at line 286 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV 0x14

Definition at line 312 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX 0x0020

Definition at line 313 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_HALF_DUPLEX

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_HALF_DUPLEX 0x0040

Definition at line 314 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_NEXT_PAGE

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_NEXT_PAGE 0x8000

Definition at line 320 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC 0x0100

Definition at line 318 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH 0x0180

Definition at line 319 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK 0x0180

Definition at line 315 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE 0x0000

Definition at line 316 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC

#define MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC 0x0080

Definition at line 317 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1 0x15

Definition at line 321 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_ACK

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_ACK 0x4000

Definition at line 323 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_FULL_DUP_CAP

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_FULL_DUP_CAP 0x0020

Definition at line 328 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_HALF_DUP_CAP

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_HALF_DUP_CAP 0x0040

Definition at line 327 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_NEXT_PAGE

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_NEXT_PAGE 0x8000

Definition at line 322 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_BOTH

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_BOTH 0x0180

Definition at line 326 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_MASK

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_MASK 0x0180

Definition at line 324 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_NONE

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_PAUSE_NONE 0x0000

Definition at line 325 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_SGMII_MODE

#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_SGMII_MODE 0x0001

Definition at line 332 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_MII_CONTROL

#define MDIO_COMBO_IEEE0_MII_CONTROL 0x10

Definition at line 299 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_MII_STATUS

#define MDIO_COMBO_IEEE0_MII_STATUS 0x11

Definition at line 309 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_MII_STATUS_AUTONEG_COMPLETE

#define MDIO_COMBO_IEEE0_MII_STATUS_AUTONEG_COMPLETE 0x0020

Definition at line 311 of file bxe_elink.c.

◆ MDIO_COMBO_IEEE0_MII_STATUS_LINK_PASS

#define MDIO_COMBO_IEEE0_MII_STATUS_LINK_PASS 0x0004

Definition at line 310 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_AN_EN

#define MDIO_COMBO_IEEO_MII_CONTROL_AN_EN 0x1000

Definition at line 306 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX

#define MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX 0x0100

Definition at line 304 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK

#define MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK 0x4000

Definition at line 307 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_10

#define MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_10 0x0000

Definition at line 301 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_100

#define MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_100 0x2000

Definition at line 302 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_1000

#define MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_1000 0x0040

Definition at line 303 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK

#define MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK 0x2040

Definition at line 300 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_RESET

#define MDIO_COMBO_IEEO_MII_CONTROL_RESET 0x8000

Definition at line 308 of file bxe_elink.c.

◆ MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN

#define MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN 0x0200

Definition at line 305 of file bxe_elink.c.

◆ MDIO_CTL_DEVAD

#define MDIO_CTL_DEVAD 0x1e

Definition at line 500 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_CTRL_MAC_XFI

#define MDIO_CTL_REG_84823_CTRL_MAC_XFI 0x0008

Definition at line 504 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA

#define MDIO_CTL_REG_84823_MEDIA 0x401a

Definition at line 501 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN

#define MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN 0x0080

Definition at line 513 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_FIBER_1G

#define MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000

Definition at line 517 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_LINE_MASK

#define MDIO_CTL_REG_84823_MEDIA_LINE_MASK 0x0060

Definition at line 507 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_LINE_XAUI_L

#define MDIO_CTL_REG_84823_MEDIA_LINE_XAUI_L 0x0020

Definition at line 508 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_LINE_XFI

#define MDIO_CTL_REG_84823_MEDIA_LINE_XFI 0x0040

Definition at line 509 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_MAC_MASK

#define MDIO_CTL_REG_84823_MEDIA_MAC_MASK 0x0018

Definition at line 502 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_MAC_XAUI_M

#define MDIO_CTL_REG_84823_MEDIA_MAC_XAUI_M 0x0010

Definition at line 505 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER

#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000

Definition at line 515 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER

#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100

Definition at line 516 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_MEDIA_PRIORITY_MASK

#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_MASK 0x0100

Definition at line 514 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_USER_CTRL_CMS

#define MDIO_CTL_REG_84823_USER_CTRL_CMS 0x0080

Definition at line 519 of file bxe_elink.c.

◆ MDIO_CTL_REG_84823_USER_CTRL_REG

#define MDIO_CTL_REG_84823_USER_CTRL_REG 0x4005

Definition at line 518 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1

#define MDIO_GP_STATUS_TOP_AN_STATUS1 0x1B

Definition at line 161 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_100M

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_100M 0x0100

Definition at line 172 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4 0x0700

Definition at line 178 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG 0x0600

Definition at line 177 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR 0x0F00

Definition at line 186 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4 0x0E00

Definition at line 185 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI 0x1F00

Definition at line 189 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI 0x1B00

Definition at line 187 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10M

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10M 0x0000

Definition at line 171 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12_5G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12_5G 0x0900

Definition at line 180 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12G_HIG

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12G_HIG 0x0800

Definition at line 179 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_13G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_13G 0x0A00

Definition at line 181 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_15G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_15G 0x0B00

Definition at line 182 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_16G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_16G 0x0C00

Definition at line 183 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G 0x0200

Definition at line 173 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX 0x0D00

Definition at line 184 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS 0x1E00

Definition at line 188 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_KR2

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_KR2 0x3900

Definition at line 190 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_2_5G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_2_5G 0x0300

Definition at line 174 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_5G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_5G 0x0400

Definition at line 175 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_6G

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_6G 0x0500

Definition at line 176 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_MASK

#define MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_MASK 0x3f00

Definition at line 170 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_CL37_AUTONEG_COMPLETE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_CL37_AUTONEG_COMPLETE 0x0002

Definition at line 163 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE 0x0001

Definition at line 162 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_LP_NP_BAM_ABLE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_LP_NP_BAM_ABLE 0x0020

Definition at line 167 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE 0x0010

Definition at line 166 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS

#define MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS 0x0008

Definition at line 165 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS

#define MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS 0x0004

Definition at line 164 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_RXSIDE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_RXSIDE 0x0080

Definition at line 169 of file bxe_elink.c.

◆ MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE

#define MDIO_GP_STATUS_TOP_AN_STATUS1_PAUSE_RSOLUTION_TXSIDE 0x0040

Definition at line 168 of file bxe_elink.c.

◆ MDIO_OVER_1G_DIGCTL_3_4

#define MDIO_OVER_1G_DIGCTL_3_4 0x14

Definition at line 245 of file bxe_elink.c.

◆ MDIO_OVER_1G_DIGCTL_3_4_MP_ID_MASK

#define MDIO_OVER_1G_DIGCTL_3_4_MP_ID_MASK 0xffe0

Definition at line 246 of file bxe_elink.c.

◆ MDIO_OVER_1G_DIGCTL_3_4_MP_ID_SHIFT

#define MDIO_OVER_1G_DIGCTL_3_4_MP_ID_SHIFT 5

Definition at line 247 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP1

#define MDIO_OVER_1G_LP_UP1 0x1C

Definition at line 265 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP2

#define MDIO_OVER_1G_LP_UP2 0x1D

Definition at line 266 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP2_MR_ADV_OVER_1G_MASK

#define MDIO_OVER_1G_LP_UP2_MR_ADV_OVER_1G_MASK 0x03ff

Definition at line 267 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK

#define MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK 0x0780

Definition at line 268 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP2_PREEMPHASIS_SHIFT

#define MDIO_OVER_1G_LP_UP2_PREEMPHASIS_SHIFT 7

Definition at line 269 of file bxe_elink.c.

◆ MDIO_OVER_1G_LP_UP3

#define MDIO_OVER_1G_LP_UP3 0x1E

Definition at line 270 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1

#define MDIO_OVER_1G_UP1 0x19

Definition at line 248 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_10G

#define MDIO_OVER_1G_UP1_10G 0x0010

Definition at line 252 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_10GH

#define MDIO_OVER_1G_UP1_10GH 0x0008

Definition at line 253 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_12_5G

#define MDIO_OVER_1G_UP1_12_5G 0x0040

Definition at line 255 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_12G

#define MDIO_OVER_1G_UP1_12G 0x0020

Definition at line 254 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_13G

#define MDIO_OVER_1G_UP1_13G 0x0080

Definition at line 256 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_15G

#define MDIO_OVER_1G_UP1_15G 0x0100

Definition at line 257 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_16G

#define MDIO_OVER_1G_UP1_16G 0x0200

Definition at line 258 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_2_5G

#define MDIO_OVER_1G_UP1_2_5G 0x0001

Definition at line 249 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_5G

#define MDIO_OVER_1G_UP1_5G 0x0002

Definition at line 250 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP1_6G

#define MDIO_OVER_1G_UP1_6G 0x0004

Definition at line 251 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP2

#define MDIO_OVER_1G_UP2 0x1A

Definition at line 259 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP2_IDRIVER_MASK

#define MDIO_OVER_1G_UP2_IDRIVER_MASK 0x0038

Definition at line 261 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP2_IPREDRIVER_MASK

#define MDIO_OVER_1G_UP2_IPREDRIVER_MASK 0x0007

Definition at line 260 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP2_PREEMPHASIS_MASK

#define MDIO_OVER_1G_UP2_PREEMPHASIS_MASK 0x03C0

Definition at line 262 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP3

#define MDIO_OVER_1G_UP3 0x1B

Definition at line 263 of file bxe_elink.c.

◆ MDIO_OVER_1G_UP3_HIGIG2

#define MDIO_OVER_1G_UP3_HIGIG2 0x0001

Definition at line 264 of file bxe_elink.c.

◆ MDIO_PCS_DEVAD

#define MDIO_PCS_DEVAD 0x3

Definition at line 426 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_DSP_ACCESS

#define MDIO_PCS_REG_7101_DSP_ACCESS 0xD000

Definition at line 429 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_BYTES_TO_TRANSFER_ADDR

#define MDIO_PCS_REG_7101_SPI_BYTES_TO_TRANSFER_ADDR 0xE028

Definition at line 437 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_CTRL_ADDR

#define MDIO_PCS_REG_7101_SPI_CTRL_ADDR 0xE12A

Definition at line 431 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_FIFO_ADDR

#define MDIO_PCS_REG_7101_SPI_FIFO_ADDR 0xE02A

Definition at line 433 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_FIFO_ADDR_BULK_ERASE_CMD

#define MDIO_PCS_REG_7101_SPI_FIFO_ADDR_BULK_ERASE_CMD (0xC7)

Definition at line 435 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_FIFO_ADDR_PAGE_PROGRAM_CMD

#define MDIO_PCS_REG_7101_SPI_FIFO_ADDR_PAGE_PROGRAM_CMD (2)

Definition at line 436 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_FIFO_ADDR_WRITE_ENABLE_CMD

#define MDIO_PCS_REG_7101_SPI_FIFO_ADDR_WRITE_ENABLE_CMD (6)

Definition at line 434 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_MUX

#define MDIO_PCS_REG_7101_SPI_MUX 0xD008

Definition at line 430 of file bxe_elink.c.

◆ MDIO_PCS_REG_7101_SPI_RESET_BIT

#define MDIO_PCS_REG_7101_SPI_RESET_BIT (5)

Definition at line 432 of file bxe_elink.c.

◆ MDIO_PCS_REG_LASI_STATUS

#define MDIO_PCS_REG_LASI_STATUS 0x9005

Definition at line 428 of file bxe_elink.c.

◆ MDIO_PCS_REG_STATUS

#define MDIO_PCS_REG_STATUS 0x0020

Definition at line 427 of file bxe_elink.c.

◆ MDIO_PMA_DEVAD

#define MDIO_PMA_DEVAD 0x1

Definition at line 335 of file bxe_elink.c.

◆ MDIO_PMA_LASI_CTRL

#define MDIO_PMA_LASI_CTRL 0x9002

Definition at line 347 of file bxe_elink.c.

◆ MDIO_PMA_LASI_RXCTRL

#define MDIO_PMA_LASI_RXCTRL 0x9000

Definition at line 345 of file bxe_elink.c.

◆ MDIO_PMA_LASI_RXSTAT

#define MDIO_PMA_LASI_RXSTAT 0x9003

Definition at line 348 of file bxe_elink.c.

◆ MDIO_PMA_LASI_STAT

#define MDIO_PMA_LASI_STAT 0x9005

Definition at line 350 of file bxe_elink.c.

◆ MDIO_PMA_LASI_TXCTRL

#define MDIO_PMA_LASI_TXCTRL 0x9001

Definition at line 346 of file bxe_elink.c.

◆ MDIO_PMA_LASI_TXSTAT

#define MDIO_PMA_LASI_TXSTAT 0x9004

Definition at line 349 of file bxe_elink.c.

◆ MDIO_PMA_REG_10G_CTRL2

#define MDIO_PMA_REG_10G_CTRL2 0x7

Definition at line 339 of file bxe_elink.c.

◆ MDIO_PMA_REG_7101_RESET

#define MDIO_PMA_REG_7101_RESET 0xc000

Definition at line 402 of file bxe_elink.c.

◆ MDIO_PMA_REG_7101_VER1

#define MDIO_PMA_REG_7101_VER1 0xc026

Definition at line 405 of file bxe_elink.c.

◆ MDIO_PMA_REG_7101_VER2

#define MDIO_PMA_REG_7101_VER2 0xc027

Definition at line 406 of file bxe_elink.c.

◆ MDIO_PMA_REG_7107_LED_CNTL

#define MDIO_PMA_REG_7107_LED_CNTL 0xc007

Definition at line 403 of file bxe_elink.c.

◆ MDIO_PMA_REG_7107_LINK_LED_CNTL

#define MDIO_PMA_REG_7107_LINK_LED_CNTL 0xc009

Definition at line 404 of file bxe_elink.c.

◆ MDIO_PMA_REG_8073_CHIP_REV

#define MDIO_PMA_REG_8073_CHIP_REV 0xc801

Definition at line 397 of file bxe_elink.c.

◆ MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL

#define MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL 0xcd08

Definition at line 400 of file bxe_elink.c.

◆ MDIO_PMA_REG_8073_SPEED_LINK_STATUS

#define MDIO_PMA_REG_8073_SPEED_LINK_STATUS 0xc820

Definition at line 398 of file bxe_elink.c.

◆ MDIO_PMA_REG_8073_XAUI_WA

#define MDIO_PMA_REG_8073_XAUI_WA 0xc841

Definition at line 399 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LED1_MASK

#define MDIO_PMA_REG_8481_LED1_MASK 0xa82c

Definition at line 409 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LED2_MASK

#define MDIO_PMA_REG_8481_LED2_MASK 0xa82f

Definition at line 410 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LED3_BLINK

#define MDIO_PMA_REG_8481_LED3_BLINK 0xa834

Definition at line 412 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LED3_MASK

#define MDIO_PMA_REG_8481_LED3_MASK 0xa832

Definition at line 411 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LED5_MASK

#define MDIO_PMA_REG_8481_LED5_MASK 0xa838

Definition at line 413 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LINK_SIGNAL

#define MDIO_PMA_REG_8481_LINK_SIGNAL 0xa83b

Definition at line 415 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK

#define MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK 0x800

Definition at line 416 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT

#define MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT 11

Definition at line 417 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_PMD_SIGNAL

#define MDIO_PMA_REG_8481_PMD_SIGNAL 0xa811

Definition at line 408 of file bxe_elink.c.

◆ MDIO_PMA_REG_8481_SIGNAL_MASK

#define MDIO_PMA_REG_8481_SIGNAL_MASK 0xa835

Definition at line 414 of file bxe_elink.c.

◆ MDIO_PMA_REG_84823_BLINK_RATE_VAL_15P9HZ

#define MDIO_PMA_REG_84823_BLINK_RATE_VAL_15P9HZ 0x2f

Definition at line 521 of file bxe_elink.c.

◆ MDIO_PMA_REG_84823_CTL_LED_CTL_1

#define MDIO_PMA_REG_84823_CTL_LED_CTL_1 0xa8e3

Definition at line 522 of file bxe_elink.c.

◆ MDIO_PMA_REG_84823_CTL_SLOW_CLK_CNT_HIGH

#define MDIO_PMA_REG_84823_CTL_SLOW_CLK_CNT_HIGH 0xa82b

Definition at line 520 of file bxe_elink.c.

◆ MDIO_PMA_REG_84823_LED3_STRETCH_EN

#define MDIO_PMA_REG_84823_LED3_STRETCH_EN 0x0080

Definition at line 524 of file bxe_elink.c.

◆ MDIO_PMA_REG_84833_CTL_LED_CTL_1

#define MDIO_PMA_REG_84833_CTL_LED_CTL_1 0xa8ec

Definition at line 523 of file bxe_elink.c.

◆ MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF

#define MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF 0xc820

Definition at line 380 of file bxe_elink.c.

◆ MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK

#define MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK 0xff

Definition at line 381 of file bxe_elink.c.

◆ MDIO_PMA_REG_8726_TX_CTRL1

#define MDIO_PMA_REG_8726_TX_CTRL1 0xca01

Definition at line 382 of file bxe_elink.c.

◆ MDIO_PMA_REG_8726_TX_CTRL2

#define MDIO_PMA_REG_8726_TX_CTRL2 0xca05

Definition at line 383 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_GPIO_CTRL

#define MDIO_PMA_REG_8727_GPIO_CTRL 0xc80e

Definition at line 392 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_MISC_CTRL

#define MDIO_PMA_REG_8727_MISC_CTRL 0x8309

Definition at line 388 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_OPT_CFG_REG

#define MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4

Definition at line 394 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_PCS_GP

#define MDIO_PMA_REG_8727_PCS_GP 0xc842

Definition at line 393 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_PCS_OPT_CTRL

#define MDIO_PMA_REG_8727_PCS_OPT_CTRL 0xc808

Definition at line 391 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF

#define MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF 0x8007

Definition at line 386 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK

#define MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK 0xff

Definition at line 387 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR

#define MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR 0x8005

Definition at line 385 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_TX_CTRL1

#define MDIO_PMA_REG_8727_TX_CTRL1 0xca02

Definition at line 389 of file bxe_elink.c.

◆ MDIO_PMA_REG_8727_TX_CTRL2

#define MDIO_PMA_REG_8727_TX_CTRL2 0xca05

Definition at line 390 of file bxe_elink.c.

◆ MDIO_PMA_REG_BCM_CTRL

#define MDIO_PMA_REG_BCM_CTRL 0x0096

Definition at line 343 of file bxe_elink.c.

◆ MDIO_PMA_REG_CDR_BANDWIDTH

#define MDIO_PMA_REG_CDR_BANDWIDTH 0xca46

Definition at line 369 of file bxe_elink.c.

◆ MDIO_PMA_REG_CMU_PLL_BYPASS

#define MDIO_PMA_REG_CMU_PLL_BYPASS 0xca09

Definition at line 355 of file bxe_elink.c.

◆ MDIO_PMA_REG_CTRL

#define MDIO_PMA_REG_CTRL 0x0

Definition at line 337 of file bxe_elink.c.

◆ MDIO_PMA_REG_DIGITAL_CTRL

#define MDIO_PMA_REG_DIGITAL_CTRL 0xc808

Definition at line 352 of file bxe_elink.c.

◆ MDIO_PMA_REG_DIGITAL_STATUS

#define MDIO_PMA_REG_DIGITAL_STATUS 0xc809

Definition at line 353 of file bxe_elink.c.

◆ MDIO_PMA_REG_EDC_FFE_MAIN

#define MDIO_PMA_REG_EDC_FFE_MAIN 0xca1b

Definition at line 364 of file bxe_elink.c.

◆ MDIO_PMA_REG_FEC_CTRL

#define MDIO_PMA_REG_FEC_CTRL 0x00ab

Definition at line 344 of file bxe_elink.c.

◆ MDIO_PMA_REG_GEN_CTRL

#define MDIO_PMA_REG_GEN_CTRL 0xca10

Definition at line 357 of file bxe_elink.c.

◆ MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET

#define MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET 0x018a

Definition at line 359 of file bxe_elink.c.

◆ MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP

#define MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP 0x0188

Definition at line 358 of file bxe_elink.c.

◆ MDIO_PMA_REG_LRM_MODE

#define MDIO_PMA_REG_LRM_MODE 0xca3f

Definition at line 368 of file bxe_elink.c.

◆ MDIO_PMA_REG_M8051_MSGIN_REG

#define MDIO_PMA_REG_M8051_MSGIN_REG 0xca12

Definition at line 360 of file bxe_elink.c.

◆ MDIO_PMA_REG_M8051_MSGOUT_REG

#define MDIO_PMA_REG_M8051_MSGOUT_REG 0xca13

Definition at line 361 of file bxe_elink.c.

◆ MDIO_PMA_REG_MISC_CTRL

#define MDIO_PMA_REG_MISC_CTRL 0xca0a

Definition at line 356 of file bxe_elink.c.

◆ MDIO_PMA_REG_MISC_CTRL0

#define MDIO_PMA_REG_MISC_CTRL0 0xca23

Definition at line 367 of file bxe_elink.c.

◆ MDIO_PMA_REG_MISC_CTRL1

#define MDIO_PMA_REG_MISC_CTRL1 0xca85

Definition at line 370 of file bxe_elink.c.

◆ MDIO_PMA_REG_PHY_IDENTIFIER

#define MDIO_PMA_REG_PHY_IDENTIFIER 0xc800

Definition at line 351 of file bxe_elink.c.

◆ MDIO_PMA_REG_PLL_BANDWIDTH

#define MDIO_PMA_REG_PLL_BANDWIDTH 0xca1d

Definition at line 365 of file bxe_elink.c.

◆ MDIO_PMA_REG_PLL_CTRL

#define MDIO_PMA_REG_PLL_CTRL 0xca1e

Definition at line 366 of file bxe_elink.c.

◆ MDIO_PMA_REG_ROM_VER1

#define MDIO_PMA_REG_ROM_VER1 0xca19

Definition at line 362 of file bxe_elink.c.

◆ MDIO_PMA_REG_ROM_VER2

#define MDIO_PMA_REG_ROM_VER2 0xca1a

Definition at line 363 of file bxe_elink.c.

◆ MDIO_PMA_REG_RX_SD

#define MDIO_PMA_REG_RX_SD 0xa

Definition at line 341 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT

#define MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT 0x8002

Definition at line 378 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_CTRL

#define MDIO_PMA_REG_SFP_TWO_WIRE_CTRL 0x8000

Definition at line 372 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK

#define MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK 0x000c

Definition at line 373 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR

#define MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR 0x8003

Definition at line 379 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE

#define MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE 0x0004

Definition at line 375 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_FAILED

#define MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_FAILED 0x000c

Definition at line 377 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE

#define MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE 0x0000

Definition at line 374 of file bxe_elink.c.

◆ MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IN_PROGRESS

#define MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IN_PROGRESS 0x0008

Definition at line 376 of file bxe_elink.c.

◆ MDIO_PMA_REG_STATUS

#define MDIO_PMA_REG_STATUS 0x1

Definition at line 338 of file bxe_elink.c.

◆ MDIO_PMA_REG_TX_DISABLE

#define MDIO_PMA_REG_TX_DISABLE 0x0009

Definition at line 340 of file bxe_elink.c.

◆ MDIO_PMA_REG_TX_POWER_DOWN

#define MDIO_PMA_REG_TX_POWER_DOWN 0xca02

Definition at line 354 of file bxe_elink.c.

◆ MDIO_REG_BANK_10G_PARALLEL_DETECT

#define MDIO_REG_BANK_10G_PARALLEL_DETECT 0x8130

Definition at line 193 of file bxe_elink.c.

◆ MDIO_REG_BANK_AER_BLOCK

#define MDIO_REG_BANK_AER_BLOCK 0xFFD0

Definition at line 295 of file bxe_elink.c.

◆ MDIO_REG_BANK_BAM_NEXT_PAGE

#define MDIO_REG_BANK_BAM_NEXT_PAGE 0x8350

Definition at line 277 of file bxe_elink.c.

◆ MDIO_REG_BANK_CL73_IEEEB0

#define MDIO_REG_BANK_CL73_IEEEB0 0x0

Definition at line 40 of file bxe_elink.c.

◆ MDIO_REG_BANK_CL73_IEEEB1

#define MDIO_REG_BANK_CL73_IEEEB1 0x10

Definition at line 46 of file bxe_elink.c.

◆ MDIO_REG_BANK_CL73_USERB0

#define MDIO_REG_BANK_CL73_USERB0 0x8370

Definition at line 282 of file bxe_elink.c.

◆ MDIO_REG_BANK_COMBO_IEEE0

#define MDIO_REG_BANK_COMBO_IEEE0 0xFFE0

Definition at line 298 of file bxe_elink.c.

◆ MDIO_REG_BANK_GP_STATUS

#define MDIO_REG_BANK_GP_STATUS 0x8120

Definition at line 160 of file bxe_elink.c.

◆ MDIO_REG_BANK_OVER_1G

#define MDIO_REG_BANK_OVER_1G 0x8320

Definition at line 244 of file bxe_elink.c.

◆ MDIO_REG_BANK_REMOTE_PHY

#define MDIO_REG_BANK_REMOTE_PHY 0x8330

Definition at line 272 of file bxe_elink.c.

◆ MDIO_REG_BANK_RX0

#define MDIO_REG_BANK_RX0 0x80b0

Definition at line 64 of file bxe_elink.c.

◆ MDIO_REG_BANK_RX1

#define MDIO_REG_BANK_RX1 0x80c0

Definition at line 72 of file bxe_elink.c.

◆ MDIO_REG_BANK_RX2

#define MDIO_REG_BANK_RX2 0x80d0

Definition at line 77 of file bxe_elink.c.

◆ MDIO_REG_BANK_RX3

#define MDIO_REG_BANK_RX3 0x80e0

Definition at line 82 of file bxe_elink.c.

◆ MDIO_REG_BANK_RX_ALL

#define MDIO_REG_BANK_RX_ALL 0x80f0

Definition at line 87 of file bxe_elink.c.

◆ MDIO_REG_BANK_SERDES_DIGITAL

#define MDIO_REG_BANK_SERDES_DIGITAL 0x8300

Definition at line 201 of file bxe_elink.c.

◆ MDIO_REG_BANK_TX0

#define MDIO_REG_BANK_TX0 0x8060

Definition at line 92 of file bxe_elink.c.

◆ MDIO_REG_BANK_TX1

#define MDIO_REG_BANK_TX1 0x8070

Definition at line 104 of file bxe_elink.c.

◆ MDIO_REG_BANK_TX2

#define MDIO_REG_BANK_TX2 0x8080

Definition at line 116 of file bxe_elink.c.

◆ MDIO_REG_BANK_TX3

#define MDIO_REG_BANK_TX3 0x8090

Definition at line 128 of file bxe_elink.c.

◆ MDIO_REG_BANK_XGXS_BLOCK0

#define MDIO_REG_BANK_XGXS_BLOCK0 0x8000

Definition at line 140 of file bxe_elink.c.

◆ MDIO_REG_BANK_XGXS_BLOCK1

#define MDIO_REG_BANK_XGXS_BLOCK1 0x8010

Definition at line 143 of file bxe_elink.c.

◆ MDIO_REG_BANK_XGXS_BLOCK2

#define MDIO_REG_BANK_XGXS_BLOCK2 0x8100

Definition at line 149 of file bxe_elink.c.

◆ MDIO_REG_GPHY_AUX_STATUS

#define MDIO_REG_GPHY_AUX_STATUS 0x19

Definition at line 747 of file bxe_elink.c.

◆ MDIO_REG_GPHY_CL45_ADDR_REG

#define MDIO_REG_GPHY_CL45_ADDR_REG 0xd

Definition at line 738 of file bxe_elink.c.

◆ MDIO_REG_GPHY_CL45_DATA_REG

#define MDIO_REG_GPHY_CL45_DATA_REG 0xe

Definition at line 741 of file bxe_elink.c.

◆ MDIO_REG_GPHY_CL45_REG_READ

#define MDIO_REG_GPHY_CL45_REG_READ 0xc000

Definition at line 740 of file bxe_elink.c.

◆ MDIO_REG_GPHY_CL45_REG_WRITE

#define MDIO_REG_GPHY_CL45_REG_WRITE 0x4000

Definition at line 739 of file bxe_elink.c.

◆ MDIO_REG_GPHY_EEE_RESOLVED

#define MDIO_REG_GPHY_EEE_RESOLVED 0x803e

Definition at line 742 of file bxe_elink.c.

◆ MDIO_REG_GPHY_EXP_ACCESS

#define MDIO_REG_GPHY_EXP_ACCESS 0x17

Definition at line 744 of file bxe_elink.c.

◆ MDIO_REG_GPHY_EXP_ACCESS_GATE

#define MDIO_REG_GPHY_EXP_ACCESS_GATE 0x15

Definition at line 743 of file bxe_elink.c.

◆ MDIO_REG_GPHY_EXP_ACCESS_TOP

#define MDIO_REG_GPHY_EXP_ACCESS_TOP 0xd00

Definition at line 745 of file bxe_elink.c.

◆ MDIO_REG_GPHY_EXP_TOP_2K_BUF

#define MDIO_REG_GPHY_EXP_TOP_2K_BUF 0x40

Definition at line 746 of file bxe_elink.c.

◆ MDIO_REG_GPHY_MII_STATUS

#define MDIO_REG_GPHY_MII_STATUS 0x1

Definition at line 736 of file bxe_elink.c.

◆ MDIO_REG_GPHY_PHYID_LSB

#define MDIO_REG_GPHY_PHYID_LSB 0x3

Definition at line 737 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW

#define MDIO_REG_GPHY_SHADOW 0x1c

Definition at line 751 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW_AUTO_DET_MED

#define MDIO_REG_GPHY_SHADOW_AUTO_DET_MED (0x1e << 10)

Definition at line 755 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD

#define MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD (0x1 << 8)

Definition at line 756 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW_LED_SEL1

#define MDIO_REG_GPHY_SHADOW_LED_SEL1 (0x0d << 10)

Definition at line 752 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW_LED_SEL2

#define MDIO_REG_GPHY_SHADOW_LED_SEL2 (0x0e << 10)

Definition at line 753 of file bxe_elink.c.

◆ MDIO_REG_GPHY_SHADOW_WR_ENA

#define MDIO_REG_GPHY_SHADOW_WR_ENA (0x1 << 15)

Definition at line 754 of file bxe_elink.c.

◆ MDIO_REG_INTR_MASK

#define MDIO_REG_INTR_MASK 0x1b

Definition at line 749 of file bxe_elink.c.

◆ MDIO_REG_INTR_MASK_LINK_STATUS

#define MDIO_REG_INTR_MASK_LINK_STATUS (0x1 << 1)

Definition at line 750 of file bxe_elink.c.

◆ MDIO_REG_INTR_STATUS

#define MDIO_REG_INTR_STATUS 0x1a

Definition at line 748 of file bxe_elink.c.

◆ MDIO_REMOTE_PHY_MISC_RX_STATUS

#define MDIO_REMOTE_PHY_MISC_RX_STATUS 0x10

Definition at line 273 of file bxe_elink.c.

◆ MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG

#define MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG 0x0600

Definition at line 275 of file bxe_elink.c.

◆ MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG

#define MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG 0x0010

Definition at line 274 of file bxe_elink.c.

◆ MDIO_RX0_RX_EQ_BOOST

#define MDIO_RX0_RX_EQ_BOOST 0x1c

Definition at line 68 of file bxe_elink.c.

◆ MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK

#define MDIO_RX0_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

Definition at line 69 of file bxe_elink.c.

◆ MDIO_RX0_RX_EQ_BOOST_OFFSET_CTRL

#define MDIO_RX0_RX_EQ_BOOST_OFFSET_CTRL 0x10

Definition at line 70 of file bxe_elink.c.

◆ MDIO_RX0_RX_STATUS

#define MDIO_RX0_RX_STATUS 0x10

Definition at line 65 of file bxe_elink.c.

◆ MDIO_RX0_RX_STATUS_RX_SEQ_DONE

#define MDIO_RX0_RX_STATUS_RX_SEQ_DONE 0x1000

Definition at line 67 of file bxe_elink.c.

◆ MDIO_RX0_RX_STATUS_SIGDET

#define MDIO_RX0_RX_STATUS_SIGDET 0x8000

Definition at line 66 of file bxe_elink.c.

◆ MDIO_RX1_RX_EQ_BOOST

#define MDIO_RX1_RX_EQ_BOOST 0x1c

Definition at line 73 of file bxe_elink.c.

◆ MDIO_RX1_RX_EQ_BOOST_EQUALIZER_CTRL_MASK

#define MDIO_RX1_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

Definition at line 74 of file bxe_elink.c.

◆ MDIO_RX1_RX_EQ_BOOST_OFFSET_CTRL

#define MDIO_RX1_RX_EQ_BOOST_OFFSET_CTRL 0x10

Definition at line 75 of file bxe_elink.c.

◆ MDIO_RX2_RX_EQ_BOOST

#define MDIO_RX2_RX_EQ_BOOST 0x1c

Definition at line 78 of file bxe_elink.c.

◆ MDIO_RX2_RX_EQ_BOOST_EQUALIZER_CTRL_MASK

#define MDIO_RX2_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

Definition at line 79 of file bxe_elink.c.

◆ MDIO_RX2_RX_EQ_BOOST_OFFSET_CTRL

#define MDIO_RX2_RX_EQ_BOOST_OFFSET_CTRL 0x10

Definition at line 80 of file bxe_elink.c.

◆ MDIO_RX3_RX_EQ_BOOST

#define MDIO_RX3_RX_EQ_BOOST 0x1c

Definition at line 83 of file bxe_elink.c.

◆ MDIO_RX3_RX_EQ_BOOST_EQUALIZER_CTRL_MASK

#define MDIO_RX3_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

Definition at line 84 of file bxe_elink.c.

◆ MDIO_RX3_RX_EQ_BOOST_OFFSET_CTRL

#define MDIO_RX3_RX_EQ_BOOST_OFFSET_CTRL 0x10

Definition at line 85 of file bxe_elink.c.

◆ MDIO_RX_ALL_RX_EQ_BOOST

#define MDIO_RX_ALL_RX_EQ_BOOST 0x1c

Definition at line 88 of file bxe_elink.c.

◆ MDIO_RX_ALL_RX_EQ_BOOST_EQUALIZER_CTRL_MASK

#define MDIO_RX_ALL_RX_EQ_BOOST_EQUALIZER_CTRL_MASK 0x7

Definition at line 89 of file bxe_elink.c.

◆ MDIO_RX_ALL_RX_EQ_BOOST_OFFSET_CTRL

#define MDIO_RX_ALL_RX_EQ_BOOST_OFFSET_CTRL 0x10

Definition at line 90 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1 0x10

Definition at line 202 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET 0x0010

Definition at line 207 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE 0x0001

Definition at line 203 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT 0x0008

Definition at line 206 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE 0x0020

Definition at line 208 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN 0x0004

Definition at line 205 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_TBI_IF

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_TBI_IF 0x0002

Definition at line 204 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL2

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL2 0x11

Definition at line 209 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_AN_FST_TMR

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_AN_FST_TMR 0x0040

Definition at line 211 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN

#define MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN 0x0001

Definition at line 210 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1 0x14

Definition at line 212 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_DUPLEX

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_DUPLEX 0x0004

Definition at line 215 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_LINK

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_LINK 0x0002

Definition at line 214 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SGMII

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SGMII 0x0001

Definition at line 213 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_100M

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_100M 0x0008

Definition at line 220 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_10M

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_10M 0x0000

Definition at line 221 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_1G

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_1G 0x0010

Definition at line 219 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_2_5G

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_2_5G 0x0018

Definition at line 218 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_MASK

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_MASK 0x0018

Definition at line 216 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_SHIFT

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_SHIFT 3

Definition at line 217 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS2

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS2 0x15

Definition at line 222 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED

#define MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED 0x0002

Definition at line 223 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1

#define MDIO_SERDES_DIGITAL_MISC1 0x18

Definition at line 224 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4 0x0004

Definition at line 237 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_HIG

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_HIG 0x0003

Definition at line 236 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12_5G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12_5G 0x0006

Definition at line 239 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_12G 0x0005

Definition at line 238 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G 0x0007

Definition at line 240 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_15G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_15G 0x0008

Definition at line 241 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_16G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_16G 0x0009

Definition at line 242 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_2_5G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_2_5G 0x0000

Definition at line 233 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_5G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_5G 0x0001

Definition at line 234 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_6G

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_6G 0x0002

Definition at line 235 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK 0x000f

Definition at line 232 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL

#define MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL 0x0010

Definition at line 231 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_100M

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_100M 0x2000

Definition at line 227 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_125M

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_125M 0x4000

Definition at line 228 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M 0x6000

Definition at line 229 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_187_5M

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_187_5M 0x8000

Definition at line 230 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_25M

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_25M 0x0000

Definition at line 226 of file bxe_elink.c.

◆ MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_MASK

#define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_MASK 0xE000

Definition at line 225 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER

#define MDIO_TX0_TX_DRIVER 0x17

Definition at line 93 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_ICBUF1T [1/4]

#define MDIO_TX0_TX_DRIVER_ICBUF1T 1

Definition at line 138 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_ICBUF1T [2/4]

#define MDIO_TX0_TX_DRIVER_ICBUF1T 1

Definition at line 138 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_ICBUF1T [3/4]

#define MDIO_TX0_TX_DRIVER_ICBUF1T 1

Definition at line 138 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_ICBUF1T [4/4]

#define MDIO_TX0_TX_DRIVER_ICBUF1T 1

Definition at line 138 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_MASK [1/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

Definition at line 132 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_MASK [2/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

Definition at line 132 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_MASK [3/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

Definition at line 132 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_MASK [4/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

Definition at line 132 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT [1/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

Definition at line 133 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT [2/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

Definition at line 133 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT [3/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

Definition at line 133 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT [4/4]

#define MDIO_TX0_TX_DRIVER_IDRIVER_SHIFT 8

Definition at line 133 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_MASK [1/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

Definition at line 136 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_MASK [2/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

Definition at line 136 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_MASK [3/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

Definition at line 136 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_MASK [4/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_MASK 0x000e

Definition at line 136 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT [1/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

Definition at line 137 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT [2/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

Definition at line 137 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT [3/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

Definition at line 137 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT [4/4]

#define MDIO_TX0_TX_DRIVER_IFULLSPD_SHIFT 1

Definition at line 137 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK [1/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

Definition at line 134 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK [2/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

Definition at line 134 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK [3/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

Definition at line 134 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK [4/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_MASK 0x00f0

Definition at line 134 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT [1/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

Definition at line 135 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT [2/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

Definition at line 135 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT [3/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

Definition at line 135 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT [4/4]

#define MDIO_TX0_TX_DRIVER_IPREDRIVER_SHIFT 4

Definition at line 135 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK [1/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

Definition at line 130 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK [2/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

Definition at line 130 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK [3/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

Definition at line 130 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK [4/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK 0xf000

Definition at line 130 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT [1/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

Definition at line 131 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT [2/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

Definition at line 131 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT [3/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

Definition at line 131 of file bxe_elink.c.

◆ MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT [4/4]

#define MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT 12

Definition at line 131 of file bxe_elink.c.

◆ MDIO_TX1_TX_DRIVER

#define MDIO_TX1_TX_DRIVER 0x17

Definition at line 105 of file bxe_elink.c.

◆ MDIO_TX2_TX_DRIVER

#define MDIO_TX2_TX_DRIVER 0x17

Definition at line 117 of file bxe_elink.c.

◆ MDIO_TX3_TX_DRIVER

#define MDIO_TX3_TX_DRIVER 0x17

Definition at line 129 of file bxe_elink.c.

◆ MDIO_WC0_XGXS_BLK2_LANE_RESET

#define MDIO_WC0_XGXS_BLK2_LANE_RESET 0x810A

Definition at line 727 of file bxe_elink.c.

◆ MDIO_WC0_XGXS_BLK2_LANE_RESET_RX_BITSHIFT

#define MDIO_WC0_XGXS_BLK2_LANE_RESET_RX_BITSHIFT 0

Definition at line 728 of file bxe_elink.c.

◆ MDIO_WC0_XGXS_BLK2_LANE_RESET_TX_BITSHIFT

#define MDIO_WC0_XGXS_BLK2_LANE_RESET_TX_BITSHIFT 4

Definition at line 729 of file bxe_elink.c.

◆ MDIO_WC0_XGXS_BLK6_XGXS_X2_CONTROL2

#define MDIO_WC0_XGXS_BLK6_XGXS_X2_CONTROL2 0x8141

Definition at line 731 of file bxe_elink.c.

◆ MDIO_WC_DEVAD

#define MDIO_WC_DEVAD 0x3

Definition at line 582 of file bxe_elink.c.

◆ MDIO_WC_REG_AERBLK_AER

#define MDIO_WC_REG_AERBLK_AER 0xffde

Definition at line 723 of file bxe_elink.c.

◆ MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY

#define MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY 0x4000

Definition at line 588 of file bxe_elink.c.

◆ MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ

#define MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ 0x8000

Definition at line 589 of file bxe_elink.c.

◆ MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT0

#define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT0 0x10

Definition at line 585 of file bxe_elink.c.

◆ MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1

#define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1 0x11

Definition at line 586 of file bxe_elink.c.

◆ MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2

#define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2 0x12

Definition at line 587 of file bxe_elink.c.

◆ MDIO_WC_REG_CL49_USERB0_CTRL

#define MDIO_WC_REG_CL49_USERB0_CTRL 0x8368

Definition at line 688 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL

#define MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL 0x82e8

Definition at line 671 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_BR_DEF_CTRL

#define MDIO_WC_REG_CL72_USERB0_CL72_BR_DEF_CTRL 0x82e7

Definition at line 670 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL

#define MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL 0x82e3

Definition at line 668 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_MISC4_CONTROL

#define MDIO_WC_REG_CL72_USERB0_CL72_MISC4_CONTROL 0x82ec

Definition at line 672 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_OS_DEF_CTRL

#define MDIO_WC_REG_CL72_USERB0_CL72_OS_DEF_CTRL 0x82e6

Definition at line 669 of file bxe_elink.c.

◆ MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP

#define MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP 0x82e2

Definition at line 667 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_BAM_CODE_FIELD

#define MDIO_WC_REG_CL73_BAM_CODE_FIELD 0x837b

Definition at line 694 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_BAM_CTRL1

#define MDIO_WC_REG_CL73_BAM_CTRL1 0x8372

Definition at line 691 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_BAM_CTRL2

#define MDIO_WC_REG_CL73_BAM_CTRL2 0x8373

Definition at line 692 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_BAM_CTRL3

#define MDIO_WC_REG_CL73_BAM_CTRL3 0x8374

Definition at line 693 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_USERB0_CTRL

#define MDIO_WC_REG_CL73_USERB0_CTRL 0x8370

Definition at line 689 of file bxe_elink.c.

◆ MDIO_WC_REG_CL73_USERB0_USTAT

#define MDIO_WC_REG_CL73_USERB0_USTAT 0x8371

Definition at line 690 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_RX_CTRL10

#define MDIO_WC_REG_CL82_USERB1_RX_CTRL10 0x843a

Definition at line 712 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_RX_CTRL11

#define MDIO_WC_REG_CL82_USERB1_RX_CTRL11 0x843b

Definition at line 713 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_TX_CTRL5

#define MDIO_WC_REG_CL82_USERB1_TX_CTRL5 0x8436

Definition at line 708 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_TX_CTRL6

#define MDIO_WC_REG_CL82_USERB1_TX_CTRL6 0x8437

Definition at line 709 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_TX_CTRL7

#define MDIO_WC_REG_CL82_USERB1_TX_CTRL7 0x8438

Definition at line 710 of file bxe_elink.c.

◆ MDIO_WC_REG_CL82_USERB1_TX_CTRL9

#define MDIO_WC_REG_CL82_USERB1_TX_CTRL9 0x8439

Definition at line 711 of file bxe_elink.c.

◆ MDIO_WC_REG_COMBO_IEEE0_MIICTRL

#define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0

Definition at line 724 of file bxe_elink.c.

◆ MDIO_WC_REG_COMBO_IEEE0_MIIISTAT

#define MDIO_WC_REG_COMBO_IEEE0_MIIISTAT 0xffe1

Definition at line 725 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL3_LP_UP1

#define MDIO_WC_REG_DIGITAL3_LP_UP1 0x832c

Definition at line 680 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL3_UP1

#define MDIO_WC_REG_DIGITAL3_UP1 0x8329

Definition at line 679 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL4_MISC3

#define MDIO_WC_REG_DIGITAL4_MISC3 0x833c

Definition at line 681 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL4_MISC5

#define MDIO_WC_REG_DIGITAL4_MISC5 0x833e

Definition at line 682 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL5_ACTUAL_SPEED

#define MDIO_WC_REG_DIGITAL5_ACTUAL_SPEED 0x834e

Definition at line 686 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL5_LINK_STATUS

#define MDIO_WC_REG_DIGITAL5_LINK_STATUS 0x834d

Definition at line 685 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL5_MISC6

#define MDIO_WC_REG_DIGITAL5_MISC6 0x8345

Definition at line 683 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL5_MISC7

#define MDIO_WC_REG_DIGITAL5_MISC7 0x8349

Definition at line 684 of file bxe_elink.c.

◆ MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL

#define MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL 0x8350

Definition at line 687 of file bxe_elink.c.

◆ MDIO_WC_REG_DSC1B0_UC_CTRL

#define MDIO_WC_REG_DSC1B0_UC_CTRL 0x820e

Definition at line 655 of file bxe_elink.c.

◆ MDIO_WC_REG_DSC1B0_UC_CTRL_RDY4CMD

#define MDIO_WC_REG_DSC1B0_UC_CTRL_RDY4CMD (1<<7)

Definition at line 656 of file bxe_elink.c.

◆ MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0

#define MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0 0x821e

Definition at line 658 of file bxe_elink.c.

◆ MDIO_WC_REG_DSC_SMC

#define MDIO_WC_REG_DSC_SMC 0x8213

Definition at line 657 of file bxe_elink.c.

◆ MDIO_WC_REG_EEE_COMBO_CONTROL0

#define MDIO_WC_REG_EEE_COMBO_CONTROL0 0x8390

Definition at line 695 of file bxe_elink.c.

◆ MDIO_WC_REG_ETA_CL73_LD_BAM_CODE

#define MDIO_WC_REG_ETA_CL73_LD_BAM_CODE 0x8456

Definition at line 717 of file bxe_elink.c.

◆ MDIO_WC_REG_ETA_CL73_LD_UD_CODE

#define MDIO_WC_REG_ETA_CL73_LD_UD_CODE 0x8457

Definition at line 718 of file bxe_elink.c.

◆ MDIO_WC_REG_ETA_CL73_OUI1

#define MDIO_WC_REG_ETA_CL73_OUI1 0x8453

Definition at line 714 of file bxe_elink.c.

◆ MDIO_WC_REG_ETA_CL73_OUI2

#define MDIO_WC_REG_ETA_CL73_OUI2 0x8454

Definition at line 715 of file bxe_elink.c.

◆ MDIO_WC_REG_ETA_CL73_OUI3

#define MDIO_WC_REG_ETA_CL73_OUI3 0x8455

Definition at line 716 of file bxe_elink.c.

◆ MDIO_WC_REG_FX100_CTRL1

#define MDIO_WC_REG_FX100_CTRL1 0x8400

Definition at line 706 of file bxe_elink.c.

◆ MDIO_WC_REG_FX100_CTRL3

#define MDIO_WC_REG_FX100_CTRL3 0x8402

Definition at line 707 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_0

#define MDIO_WC_REG_GP2_STATUS_GP_2_0 0x81d0

Definition at line 633 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_1

#define MDIO_WC_REG_GP2_STATUS_GP_2_1 0x81d1

Definition at line 634 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_2

#define MDIO_WC_REG_GP2_STATUS_GP_2_2 0x81d2

Definition at line 635 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_3

#define MDIO_WC_REG_GP2_STATUS_GP_2_3 0x81d3

Definition at line 636 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_4

#define MDIO_WC_REG_GP2_STATUS_GP_2_4 0x81d4

Definition at line 637 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CAP

#define MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CAP 0x1

Definition at line 641 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CMPL

#define MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_AN_CMPL 0x0100

Definition at line 639 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_LP_AN_CAP

#define MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_LP_AN_CAP 0x0010

Definition at line 640 of file bxe_elink.c.

◆ MDIO_WC_REG_GP2_STATUS_GP_2_4_CL73_AN_CMPL

#define MDIO_WC_REG_GP2_STATUS_GP_2_4_CL73_AN_CMPL 0x1000

Definition at line 638 of file bxe_elink.c.

◆ MDIO_WC_REG_IEEE0BLK_AUTONEGNP

#define MDIO_WC_REG_IEEE0BLK_AUTONEGNP 0x7

Definition at line 584 of file bxe_elink.c.

◆ MDIO_WC_REG_IEEE0BLK_MIICNTL

#define MDIO_WC_REG_IEEE0BLK_MIICNTL 0x0

Definition at line 583 of file bxe_elink.c.

◆ MDIO_WC_REG_MICROBLK_CMD

#define MDIO_WC_REG_MICROBLK_CMD 0xffc2

Definition at line 719 of file bxe_elink.c.

◆ MDIO_WC_REG_MICROBLK_CMD3

#define MDIO_WC_REG_MICROBLK_CMD3 0xffcc

Definition at line 721 of file bxe_elink.c.

◆ MDIO_WC_REG_MICROBLK_DL_STATUS

#define MDIO_WC_REG_MICROBLK_DL_STATUS 0xffc5

Definition at line 720 of file bxe_elink.c.

◆ MDIO_WC_REG_PAR_DET_10G_CTRL

#define MDIO_WC_REG_PAR_DET_10G_CTRL 0x8131

Definition at line 627 of file bxe_elink.c.

◆ MDIO_WC_REG_PAR_DET_10G_STATUS

#define MDIO_WC_REG_PAR_DET_10G_STATUS 0x8130

Definition at line 626 of file bxe_elink.c.

◆ MDIO_WC_REG_PCS_STATUS2

#define MDIO_WC_REG_PCS_STATUS2 0x0021

Definition at line 590 of file bxe_elink.c.

◆ MDIO_WC_REG_PMD_KR_CONTROL

#define MDIO_WC_REG_PMD_KR_CONTROL 0x0096

Definition at line 591 of file bxe_elink.c.

◆ MDIO_WC_REG_RX0_ANARXCONTROL1G

#define MDIO_WC_REG_RX0_ANARXCONTROL1G 0x80b9

Definition at line 616 of file bxe_elink.c.

◆ MDIO_WC_REG_RX0_PCI_CTRL

#define MDIO_WC_REG_RX0_PCI_CTRL 0x80ba

Definition at line 618 of file bxe_elink.c.

◆ MDIO_WC_REG_RX1_PCI_CTRL

#define MDIO_WC_REG_RX1_PCI_CTRL 0x80ca

Definition at line 619 of file bxe_elink.c.

◆ MDIO_WC_REG_RX2_ANARXCONTROL1G

#define MDIO_WC_REG_RX2_ANARXCONTROL1G 0x80d9

Definition at line 617 of file bxe_elink.c.

◆ MDIO_WC_REG_RX2_PCI_CTRL

#define MDIO_WC_REG_RX2_PCI_CTRL 0x80da

Definition at line 620 of file bxe_elink.c.

◆ MDIO_WC_REG_RX3_PCI_CTRL

#define MDIO_WC_REG_RX3_PCI_CTRL 0x80ea

Definition at line 621 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_CONTROL

#define MDIO_WC_REG_RX66_CONTROL 0x83c0

Definition at line 697 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW0

#define MDIO_WC_REG_RX66_SCW0 0x83c2

Definition at line 698 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW0_MASK

#define MDIO_WC_REG_RX66_SCW0_MASK 0x83c6

Definition at line 702 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW1

#define MDIO_WC_REG_RX66_SCW1 0x83c3

Definition at line 699 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW1_MASK

#define MDIO_WC_REG_RX66_SCW1_MASK 0x83c7

Definition at line 703 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW2

#define MDIO_WC_REG_RX66_SCW2 0x83c4

Definition at line 700 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW2_MASK

#define MDIO_WC_REG_RX66_SCW2_MASK 0x83c8

Definition at line 704 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW3

#define MDIO_WC_REG_RX66_SCW3 0x83c5

Definition at line 701 of file bxe_elink.c.

◆ MDIO_WC_REG_RX66_SCW3_MASK

#define MDIO_WC_REG_RX66_SCW3_MASK 0x83c9

Definition at line 705 of file bxe_elink.c.

◆ MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI

#define MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI 0x80fa

Definition at line 622 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1

#define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 0x8300

Definition at line 673 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2

#define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2 0x8301

Definition at line 674 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3

#define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3 0x8302

Definition at line 675 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_MISC1

#define MDIO_WC_REG_SERDESDIGITAL_MISC1 0x8308

Definition at line 677 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_MISC2

#define MDIO_WC_REG_SERDESDIGITAL_MISC2 0x8309

Definition at line 678 of file bxe_elink.c.

◆ MDIO_WC_REG_SERDESDIGITAL_STATUS1000X1

#define MDIO_WC_REG_SERDESDIGITAL_STATUS1000X1 0x8304

Definition at line 676 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_ANA_CTRL0

#define MDIO_WC_REG_TX0_ANA_CTRL0 0x8061

Definition at line 600 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER

#define MDIO_WC_REG_TX0_TX_DRIVER 0x8067

Definition at line 604 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_MASK

#define MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_MASK 0x0f00

Definition at line 610 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET

#define MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET 0x08

Definition at line 609 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IFIR_MASK

#define MDIO_WC_REG_TX0_TX_DRIVER_IFIR_MASK 0x000e

Definition at line 606 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IFIR_OFFSET

#define MDIO_WC_REG_TX0_TX_DRIVER_IFIR_OFFSET 0x01

Definition at line 605 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_MASK

#define MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_MASK 0x00f0

Definition at line 608 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET

#define MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET 0x04

Definition at line 607 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_MASK

#define MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_MASK 0x7000

Definition at line 612 of file bxe_elink.c.

◆ MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET

#define MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET 0x0c

Definition at line 611 of file bxe_elink.c.

◆ MDIO_WC_REG_TX1_ANA_CTRL0

#define MDIO_WC_REG_TX1_ANA_CTRL0 0x8071

Definition at line 601 of file bxe_elink.c.

◆ MDIO_WC_REG_TX1_TX_DRIVER

#define MDIO_WC_REG_TX1_TX_DRIVER 0x8077

Definition at line 613 of file bxe_elink.c.

◆ MDIO_WC_REG_TX2_ANA_CTRL0

#define MDIO_WC_REG_TX2_ANA_CTRL0 0x8081

Definition at line 602 of file bxe_elink.c.

◆ MDIO_WC_REG_TX2_TX_DRIVER

#define MDIO_WC_REG_TX2_TX_DRIVER 0x8087

Definition at line 614 of file bxe_elink.c.

◆ MDIO_WC_REG_TX3_ANA_CTRL0

#define MDIO_WC_REG_TX3_ANA_CTRL0 0x8091

Definition at line 603 of file bxe_elink.c.

◆ MDIO_WC_REG_TX3_TX_DRIVER

#define MDIO_WC_REG_TX3_TX_DRIVER 0x8097

Definition at line 615 of file bxe_elink.c.

◆ MDIO_WC_REG_TX66_CONTROL

#define MDIO_WC_REG_TX66_CONTROL 0x83b0

Definition at line 696 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP

#define MDIO_WC_REG_TX_FIR_TAP 0x82e2

Definition at line 659 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_ENABLE

#define MDIO_WC_REG_TX_FIR_TAP_ENABLE 0x8000

Definition at line 666 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_MASK

#define MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_MASK 0x03f0

Definition at line 663 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET

#define MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET 0x04

Definition at line 662 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_POST_TAP_MASK

#define MDIO_WC_REG_TX_FIR_TAP_POST_TAP_MASK 0x7c00

Definition at line 665 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET

#define MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET 0x0a

Definition at line 664 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_MASK

#define MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_MASK 0x000f

Definition at line 661 of file bxe_elink.c.

◆ MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET

#define MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET 0x00

Definition at line 660 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B0_DEAD_TRAP

#define MDIO_WC_REG_UC_INFO_B0_DEAD_TRAP 0x81EE

Definition at line 642 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_CRC

#define MDIO_WC_REG_UC_INFO_B1_CRC 0x81FE

Definition at line 654 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE0_OFFSET

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE0_OFFSET 0x0

Definition at line 645 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE1_OFFSET

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE1_OFFSET 0x4

Definition at line 651 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE2_OFFSET

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE2_OFFSET 0x8

Definition at line 652 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE3_OFFSET

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_LANE3_OFFSET 0xc

Definition at line 653 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE 0x81F2

Definition at line 644 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT 0x0

Definition at line 646 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_LONG_CH_6G

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_LONG_CH_6G 0x4

Definition at line 650 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC 0x2

Definition at line 648 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_OPT_LR

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_OPT_LR 0x1

Definition at line 647 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_XLAUI

#define MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_XLAUI 0x3

Definition at line 649 of file bxe_elink.c.

◆ MDIO_WC_REG_UC_INFO_B1_VERSION

#define MDIO_WC_REG_UC_INFO_B1_VERSION 0x81F0

Definition at line 643 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_RX_LN_SWAP1

#define MDIO_WC_REG_XGXS_RX_LN_SWAP1 0x816B

Definition at line 631 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_STATUS3

#define MDIO_WC_REG_XGXS_STATUS3 0x8129

Definition at line 625 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_STATUS4

#define MDIO_WC_REG_XGXS_STATUS4 0x813c

Definition at line 628 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_TX_LN_SWAP1

#define MDIO_WC_REG_XGXS_TX_LN_SWAP1 0x8169

Definition at line 632 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_X2_CONTROL2

#define MDIO_WC_REG_XGXS_X2_CONTROL2 0x8141

Definition at line 629 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXS_X2_CONTROL3

#define MDIO_WC_REG_XGXS_X2_CONTROL3 0x8142

Definition at line 630 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK0_MISCCONTROL1

#define MDIO_WC_REG_XGXSBLK0_MISCCONTROL1 0x800e

Definition at line 593 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK0_XGXSCONTROL

#define MDIO_WC_REG_XGXSBLK0_XGXSCONTROL 0x8000

Definition at line 592 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_DESKEW

#define MDIO_WC_REG_XGXSBLK1_DESKEW 0x8010

Definition at line 594 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_LANECTRL0

#define MDIO_WC_REG_XGXSBLK1_LANECTRL0 0x8015

Definition at line 595 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_LANECTRL1

#define MDIO_WC_REG_XGXSBLK1_LANECTRL1 0x8016

Definition at line 596 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_LANECTRL2

#define MDIO_WC_REG_XGXSBLK1_LANECTRL2 0x8017

Definition at line 597 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_LANECTRL3

#define MDIO_WC_REG_XGXSBLK1_LANECTRL3 0x8018

Definition at line 598 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK1_LANETEST0

#define MDIO_WC_REG_XGXSBLK1_LANETEST0 0x801a

Definition at line 599 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK2_LANE_RESET

#define MDIO_WC_REG_XGXSBLK2_LANE_RESET 0x810a

Definition at line 624 of file bxe_elink.c.

◆ MDIO_WC_REG_XGXSBLK2_UNICORE_MODE_10G

#define MDIO_WC_REG_XGXSBLK2_UNICORE_MODE_10G 0x8104

Definition at line 623 of file bxe_elink.c.

◆ MDIO_WIS_DEVAD

#define MDIO_WIS_DEVAD 0x2

Definition at line 421 of file bxe_elink.c.

◆ MDIO_WIS_REG_LASI_CNTL

#define MDIO_WIS_REG_LASI_CNTL 0x9002

Definition at line 423 of file bxe_elink.c.

◆ MDIO_WIS_REG_LASI_STATUS

#define MDIO_WIS_REG_LASI_STATUS 0x9005

Definition at line 424 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_RX_LN_SWAP

#define MDIO_XGXS_BLOCK2_RX_LN_SWAP 0x10

Definition at line 150 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE

#define MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE 0x8000

Definition at line 151 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE

#define MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE 0x4000

Definition at line 152 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_TEST_MODE_LANE

#define MDIO_XGXS_BLOCK2_TEST_MODE_LANE 0x15

Definition at line 158 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_TX_LN_SWAP

#define MDIO_XGXS_BLOCK2_TX_LN_SWAP 0x11

Definition at line 153 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE

#define MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE 0x8000

Definition at line 154 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_UNICORE_MODE_10G

#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G 0x14

Definition at line 155 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS

#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS 0x0001

Definition at line 156 of file bxe_elink.c.

◆ MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS

#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS 0x0010

Definition at line 157 of file bxe_elink.c.

◆ MDIO_XS_8706_REG_BANK_RX0

#define MDIO_XS_8706_REG_BANK_RX0 0x80bc

Definition at line 446 of file bxe_elink.c.

◆ MDIO_XS_8706_REG_BANK_RX1

#define MDIO_XS_8706_REG_BANK_RX1 0x80cc

Definition at line 447 of file bxe_elink.c.

◆ MDIO_XS_8706_REG_BANK_RX2

#define MDIO_XS_8706_REG_BANK_RX2 0x80dc

Definition at line 448 of file bxe_elink.c.

◆ MDIO_XS_8706_REG_BANK_RX3

#define MDIO_XS_8706_REG_BANK_RX3 0x80ec

Definition at line 449 of file bxe_elink.c.

◆ MDIO_XS_8706_REG_BANK_RXA

#define MDIO_XS_8706_REG_BANK_RXA 0x80fc

Definition at line 450 of file bxe_elink.c.

◆ MDIO_XS_DEVAD

#define MDIO_XS_DEVAD 0x4

Definition at line 441 of file bxe_elink.c.

◆ MDIO_XS_PLL_SEQUENCER

#define MDIO_XS_PLL_SEQUENCER 0x8000

Definition at line 443 of file bxe_elink.c.

◆ MDIO_XS_REG_8073_RX_CTRL_PCIE

#define MDIO_XS_REG_8073_RX_CTRL_PCIE 0x80FA

Definition at line 452 of file bxe_elink.c.

◆ MDIO_XS_REG_STATUS

#define MDIO_XS_REG_STATUS 0x0001

Definition at line 442 of file bxe_elink.c.

◆ MDIO_XS_SFX7101_XGXS_TEST1

#define MDIO_XS_SFX7101_XGXS_TEST1 0xc00a

Definition at line 444 of file bxe_elink.c.

◆ MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF

#define MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF 0x0008

Definition at line 493 of file bxe_elink.c.

◆ PHY84833_CONSTANT_LATENCY

#define PHY84833_CONSTANT_LATENCY 1193

Definition at line 11168 of file bxe_elink.c.

◆ PHY84833_MB_PROCESS1

#define PHY84833_MB_PROCESS1 1

Definition at line 568 of file bxe_elink.c.

◆ PHY84833_MB_PROCESS2

#define PHY84833_MB_PROCESS2 2

Definition at line 569 of file bxe_elink.c.

◆ PHY84833_MB_PROCESS3

#define PHY84833_MB_PROCESS3 3

Definition at line 570 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_CLEAR_COMPLETE

#define PHY84833_STATUS_CMD_CLEAR_COMPLETE 0x0080

Definition at line 565 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_COMPLETE_ERROR

#define PHY84833_STATUS_CMD_COMPLETE_ERROR 0x0008

Definition at line 561 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_COMPLETE_PASS

#define PHY84833_STATUS_CMD_COMPLETE_PASS 0x0004

Definition at line 560 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_IN_PROGRESS

#define PHY84833_STATUS_CMD_IN_PROGRESS 0x0002

Definition at line 559 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_NOT_OPEN_FOR_CMDS

#define PHY84833_STATUS_CMD_NOT_OPEN_FOR_CMDS 0x0040

Definition at line 564 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_OPEN_FOR_CMDS

#define PHY84833_STATUS_CMD_OPEN_FOR_CMDS 0x0010

Definition at line 562 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_OPEN_OVERRIDE

#define PHY84833_STATUS_CMD_OPEN_OVERRIDE 0xa5a5

Definition at line 566 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_RECEIVED

#define PHY84833_STATUS_CMD_RECEIVED 0x0001

Definition at line 558 of file bxe_elink.c.

◆ PHY84833_STATUS_CMD_SYSTEM_BOOT

#define PHY84833_STATUS_CMD_SYSTEM_BOOT 0x0020

Definition at line 563 of file bxe_elink.c.

◆ PHY84858_STATUS_CMD_COMPLETE_ERROR

#define PHY84858_STATUS_CMD_COMPLETE_ERROR 0x0008

Definition at line 577 of file bxe_elink.c.

◆ PHY84858_STATUS_CMD_COMPLETE_PASS

#define PHY84858_STATUS_CMD_COMPLETE_PASS 0x0004

Definition at line 576 of file bxe_elink.c.

◆ PHY84858_STATUS_CMD_IN_PROGRESS

#define PHY84858_STATUS_CMD_IN_PROGRESS 0x0002

Definition at line 575 of file bxe_elink.c.

◆ PHY84858_STATUS_CMD_RECEIVED

#define PHY84858_STATUS_CMD_RECEIVED 0x0001

Definition at line 574 of file bxe_elink.c.

◆ PHY84858_STATUS_CMD_SYSTEM_BUSY

#define PHY84858_STATUS_CMD_SYSTEM_BUSY 0xbbbb

Definition at line 578 of file bxe_elink.c.

◆ PHY848xx_CMD_GET_CURRENT_TEMP

#define PHY848xx_CMD_GET_CURRENT_TEMP 0x8031

Definition at line 556 of file bxe_elink.c.

◆ PHY848xx_CMD_GET_EEE_MODE

#define PHY848xx_CMD_GET_EEE_MODE 0x8008

Definition at line 554 of file bxe_elink.c.

◆ PHY848xx_CMD_SET_EEE_MODE

#define PHY848xx_CMD_SET_EEE_MODE 0x8009

Definition at line 555 of file bxe_elink.c.

◆ PHY848xx_CMD_SET_PAIR_SWAP

#define PHY848xx_CMD_SET_PAIR_SWAP 0x8001

Definition at line 553 of file bxe_elink.c.

◆ PHY848xx_CMDHDLR_MAX_ARGS

#define PHY848xx_CMDHDLR_MAX_ARGS 5

Definition at line 10850 of file bxe_elink.c.

◆ PHY848xx_CMDHDLR_WAIT

#define PHY848xx_CMDHDLR_WAIT 300

Definition at line 10849 of file bxe_elink.c.

◆ WC_LANE_MAX

#define WC_LANE_MAX 4

Definition at line 771 of file bxe_elink.c.

◆ WC_TX_DRIVER

#define WC_TX_DRIVER	(	post2,
		idriver,
		ipre,
		ifir
	)

Value:

        ((post2 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) | \
         (idriver << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) | \
         (ipre << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET) | \
         (ifir << MDIO_WC_REG_TX0_TX_DRIVER_IFIR_OFFSET))

Definition at line 4442 of file bxe_elink.c.

◆ WC_TX_FIR

#define WC_TX_FIR	(	post,
		main,
		pre
	)

Value:

        ((post << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | \
         (main << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) | \
         (pre << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET))

Definition at line 4448 of file bxe_elink.c.

Typedef Documentation

◆ read_sfp_module_eeprom_func_p

typedef elink_status_t(* read_sfp_module_eeprom_func_p) (struct elink_phy *phy, struct elink_params *params, uint8_t dev_addr, uint16_t addr, uint8_t byte_cnt, uint8_t *o_buf, uint8_t)

Definition at line 759 of file bxe_elink.c.

Function Documentation

◆ __FBSDID()

__FBSDID ( "$FreeBSD$" )

◆ elink_54618se_config_init()

static elink_status_t elink_54618se_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 11843 of file bxe_elink.c.

References DUPLEX_FULL, elink_params::eee_mode, elink_vars::eee_status, elink_54618se_specific_func(), elink_calc_ieee_aneg_adv(), elink_cl22_read(), elink_cl22_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_eee_advertise(), elink_eee_calc_timer(), elink_eee_disable(), elink_eee_has_cap(), elink_eee_initial_config(), ELINK_EEE_MODE_ADV_LPI, ELINK_EEE_MODE_ENABLE_LPI, ELINK_FEATURE_CONFIG_AUTOGREEEN_ENABLED, ELINK_FLAGS_EEE, ELINK_PHY_INIT, elink_set_cfg_pin(), ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, elink_wait_reset_complete(), elink_params::feature_config_flags, elink_phy::flags, elink_vars::ieee_fc, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC, MDIO_AN_REG_ADV_PAUSE_PAUSE, MDIO_AN_REG_EEE_ADV, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, MDIO_PMA_REG_CTRL, MDIO_REG_GPHY_EXP_ACCESS, MDIO_REG_GPHY_EXP_ACCESS_GATE, MDIO_REG_GPHY_EXP_ACCESS_TOP, MDIO_REG_GPHY_EXP_TOP_2K_BUF, MDIO_REG_GPHY_SHADOW, MDIO_REG_GPHY_SHADOW_AUTO_DET_MED, MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD, MDIO_REG_GPHY_SHADOW_WR_ENA, bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_PHY_RESET_MASK, PORT_HW_CFG_E3_PHY_RESET_SHIFT, PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL, PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF, PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL, PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, REG_RD, elink_phy::req_duplex, elink_phy::req_line_speed, elink_params::sc, elink_params::shmem_base, SHMEM_EEE_1G_ADV, SHMEM_EEE_SUPPORTED_SHIFT, and elink_phy::speed_cap_mask.

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◆ elink_54618se_config_loopback()

static void elink_54618se_config_loopback	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 12218 of file bxe_elink.c.

References elink_cl22_read(), elink_cl22_write(), ELINK_DEBUG_P0, GRCBASE_UMAC0, GRCBASE_UMAC1, NIG_REG_EGRESS_EMAC0_PORT, elink_params::port, REG_WR, elink_params::sc, and UMAC_REG_MAXFR.

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◆ elink_54618se_link_reset()

static void elink_54618se_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 12086 of file bxe_elink.c.

References elink_cl22_write(), elink_set_cfg_pin(), MDIO_PMA_REG_CTRL, bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_PHY_RESET_MASK, PORT_HW_CFG_E3_PHY_RESET_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

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◆ elink_54618se_read_status()

static uint8_t elink_54618se_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 12111 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, DUPLEX_HALF, elink_cl22_read(), ELINK_DEBUG_P1, ELINK_DEBUG_P2, elink_eee_an_resolve(), elink_eee_has_cap(), elink_ext_phy_resolve_fc(), ELINK_FLAGS_EEE, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, elink_phy::flags, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE, LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE, LINK_STATUS_LINK_PARTNER_100T4_CAPABLE, LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE, LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE, LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE, LINK_STATUS_LINK_PARTNER_10THD_CAPABLE, LINK_STATUS_PARALLEL_DETECTION_USED, MDIO_REG_GPHY_AUX_STATUS, MDIO_REG_INTR_STATUS, and elink_params::sc.

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◆ elink_54618se_specific_func()

static void elink_54618se_specific_func	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint32_t	action
	)

static

Definition at line 11814 of file bxe_elink.c.

References action, elink_cl22_read(), elink_cl22_write(), ELINK_PHY_INIT, MDIO_REG_GPHY_SHADOW, MDIO_REG_GPHY_SHADOW_LED_SEL2, MDIO_REG_GPHY_SHADOW_WR_ENA, MDIO_REG_INTR_MASK, MDIO_REG_INTR_MASK_LINK_STATUS, and elink_params::sc.

Referenced by elink_54618se_config_init().

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◆ elink_5461x_set_link_led()

static void elink_5461x_set_link_led	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	mode
	)

static

Definition at line 12050 of file bxe_elink.c.

References elink_cl22_read(), elink_cl22_write(), ELINK_DEBUG_P1, ELINK_LED_MODE_FRONT_PANEL_OFF, ELINK_LED_MODE_OFF, ELINK_LED_MODE_ON, ELINK_LED_MODE_OPER, MDIO_REG_GPHY_SHADOW, MDIO_REG_GPHY_SHADOW_LED_SEL1, MDIO_REG_GPHY_SHADOW_WR_ENA, and elink_params::sc.

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◆ elink_7101_config_init()

static elink_status_t elink_7101_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 12270 of file bxe_elink.c.

References elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, elink_ext_phy_hw_reset(), elink_ext_phy_set_pause(), elink_save_spirom_version(), ELINK_STATUS_OK, elink_wait_reset_complete(), MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_REG_7101_VER1, MDIO_PMA_REG_7101_VER2, MDIO_PMA_REG_7107_LED_CNTL, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, elink_params::port, elink_params::sc, and elink_phy::ver_addr.

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◆ elink_7101_config_loopback()

static void elink_7101_config_loopback	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 12261 of file bxe_elink.c.

References elink_cl45_write(), MDIO_XS_DEVAD, MDIO_XS_SFX7101_XGXS_TEST1, and elink_params::sc.

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◆ elink_7101_format_ver()

static elink_status_t elink_7101_format_ver	(	uint32_t	spirom_ver,
		uint8_t *	str,
		uint16_t *	len
	)

static

Definition at line 12350 of file bxe_elink.c.

References ELINK_STATUS_ERROR, and ELINK_STATUS_OK.

◆ elink_7101_hw_reset()

static void elink_7101_hw_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 12388 of file bxe_elink.c.

References elink_cb_gpio_write(), MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_LOW, elink_params::port, and elink_params::sc.

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◆ elink_7101_read_status()

static uint8_t elink_7101_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 12310 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_cl45_read(), ELINK_DEBUG_P2, elink_ext_phy_10G_an_resolve(), elink_ext_phy_resolve_fc(), ELINK_SPEED_10000, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE, MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS, MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, MDIO_PMA_REG_STATUS, and elink_params::sc.

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◆ elink_7101_set_link_led()

static void elink_7101_set_link_led	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	mode
	)

static

Definition at line 12398 of file bxe_elink.c.

References elink_cl45_write(), ELINK_LED_MODE_FRONT_PANEL_OFF, ELINK_LED_MODE_OFF, ELINK_LED_MODE_ON, ELINK_LED_MODE_OPER, MDIO_PMA_DEVAD, MDIO_PMA_REG_7107_LINK_LED_CNTL, and elink_params::sc.

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◆ elink_8073_8727_external_rom_boot()

static elink_status_t elink_8073_8727_external_rom_boot	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	port
	)

static

Definition at line 8042 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P2, elink_save_bcm_spirom_ver(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET, MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP, MDIO_PMA_REG_M8051_MSGOUT_REG, MDIO_PMA_REG_MISC_CTRL1, MDIO_PMA_REG_ROM_VER1, bxe_softc::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073, and elink_phy::type.

Referenced by elink_8073_common_init_phy(), and elink_8727_common_init_phy().

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◆ elink_8073_common_init_phy()

static elink_status_t elink_8073_common_init_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint8_t	phy_index,
		uint32_t	chip_id
	)

static

Definition at line 14232 of file bxe_elink.c.

References addr, CHIP_IS_E1x, elink_8073_8727_external_rom_boot(), elink_bits_dis(), elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_ext_phy_hw_reset(), ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, elink_populate_phy(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, MDIO_PMA_REG_EDC_FFE_MAIN, MDIO_PMA_REG_TX_POWER_DOWN, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, MISC_REGISTERS_GPIO_OUTPUT_LOW, NIG_REG_MASK_INTERRUPT_PORT0, NIG_REG_PORT_SWAP, NIG_REG_STRAP_OVERRIDE, PORT_0, PORT_1, PORT_MAX, and REG_RD.

Referenced by elink_ext_phy_common_init().

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◆ elink_8073_config_init()

static elink_status_t elink_8073_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 8269 of file bxe_elink.c.

References CHIP_IS_E2, DUPLEX_FULL, elink_8073_is_snr_needed(), elink_8073_set_pause_cl37(), elink_8073_specific_func(), elink_807x_force_10G(), elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, elink_ext_phy_set_pause(), ELINK_LOOPBACK_EXT, ELINK_PHY_INIT, ELINK_SPEED_10000, ELINK_SPEED_2500, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, elink_params::lane_config, elink_params::loopback_mode, MDIO_AN_DEVAD, MDIO_AN_REG_8073_2_5G, MDIO_AN_REG_8073_BAM, MDIO_AN_REG_ADV, MDIO_AN_REG_ADV2, MDIO_AN_REG_CL37_AN, MDIO_AN_REG_CL37_FC_LD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_REG_8073_CHIP_REV, MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL, MDIO_PMA_REG_BCM_CTRL, MDIO_PMA_REG_EDC_FFE_MAIN, MDIO_PMA_REG_M8051_MSGOUT_REG, MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, elink_params::port, PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G, PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED, REG_RD, elink_phy::req_duplex, elink_phy::req_line_speed, elink_params::sc, SC_PATH, elink_params::shmem_base, and elink_phy::speed_cap_mask.

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◆ elink_8073_is_snr_needed()

static elink_status_t elink_8073_is_snr_needed	(	struct bxe_softc *	sc,
		struct elink_phy *	phy
	)

static

Definition at line 8123 of file bxe_elink.c.

References elink_cl45_read(), ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, and MDIO_PMA_REG_ROM_VER2.

Referenced by elink_8073_config_init(), and elink_8073_read_status().

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◆ elink_8073_link_reset()

static void elink_8073_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 8562 of file bxe_elink.c.

References CHIP_IS_E2, elink_cb_gpio_write(), ELINK_DEBUG_P1, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_LOW, elink_params::port, elink_params::sc, and SC_PATH.

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◆ elink_8073_read_status()

static uint8_t elink_8073_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 8417 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_8073_is_snr_needed(), elink_8073_resolve_fc(), elink_8073_xaui_wa(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_DEBUG_P3, elink_ext_phy_10G_an_resolve(), ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_2500, elink_params::lane_config, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE, LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE, MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, MDIO_AN_REG_LP_AUTO_NEG2, MDIO_PCS_DEVAD, MDIO_PCS_REG_STATUS, MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_LASI_STAT, MDIO_PMA_REG_8073_SPEED_LINK_STATUS, MDIO_PMA_REG_CDR_BANDWIDTH, MDIO_PMA_REG_M8051_MSGOUT_REG, MDIO_PMA_REG_PLL_BANDWIDTH, MDIO_PMA_REG_STATUS, MDIO_XS_DEVAD, MDIO_XS_REG_8073_RX_CTRL_PCIE, elink_params::port, PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED, elink_phy::req_line_speed, and elink_params::sc.

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◆ elink_8073_resolve_fc()

static void elink_8073_resolve_fc	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 8009 of file bxe_elink.c.

References elink_cl45_read(), ELINK_DEBUG_P1, elink_ext_phy_resolve_fc(), ELINK_FLOW_CTRL_NONE, elink_pause_resolve(), ELINK_SPEED_10, ELINK_SPEED_100, elink_vars::flow_ctrl, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, MDIO_AN_REG_CL37_FC_LP, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, elink_phy::req_flow_ctrl, elink_phy::req_line_speed, and elink_params::sc.

Referenced by elink_8073_read_status().

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◆ elink_8073_set_pause_cl37()

static void elink_8073_set_pause_cl37	(	struct elink_params *	params,
		struct elink_phy *	phy,
		struct elink_vars *	vars
	)

static

Definition at line 8218 of file bxe_elink.c.

References elink_calc_ieee_aneg_adv(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P1, elink_vars::ieee_fc, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_SYMMETRIC, and elink_params::sc.

Referenced by elink_8073_config_init().

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◆ elink_8073_specific_func()

static void elink_8073_specific_func	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint32_t	action
	)

static

Definition at line 8253 of file bxe_elink.c.

References action, elink_cl45_write(), ELINK_PHY_INIT, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_LASI_RXCTRL, and elink_params::sc.

Referenced by elink_8073_config_init().

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◆ elink_8073_xaui_wa()

static elink_status_t elink_8073_xaui_wa	(	struct bxe_softc *	sc,
		struct elink_phy *	phy
	)

static

Definition at line 8149 of file bxe_elink.c.

References elink_cl45_read(), ELINK_DEBUG_P0, ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, MDIO_PMA_REG_8073_SPEED_LINK_STATUS, and MDIO_PMA_REG_8073_XAUI_WA.

Referenced by elink_8073_read_status().

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◆ elink_807x_force_10G()

static void elink_807x_force_10G	(	struct bxe_softc *	sc,
		struct elink_phy *	phy
	)

static

Definition at line 8205 of file bxe_elink.c.

References elink_cl45_write(), MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, MDIO_PMA_REG_BCM_CTRL, and MDIO_PMA_REG_CTRL.

Referenced by elink_8073_config_init().

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◆ elink_8481_config_init()

static elink_status_t elink_8481_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 10832 of file bxe_elink.c.

References elink_848xx_cmn_config_init(), elink_cb_gpio_write(), elink_cl45_write(), elink_ext_phy_hw_reset(), elink_wait_reset_complete(), MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, elink_params::port, and elink_params::sc.

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◆ elink_8481_hw_reset()

static void elink_8481_hw_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 11494 of file bxe_elink.c.

References elink_cb_gpio_write(), MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_OUTPUT_LOW, and elink_params::sc.

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◆ elink_8481_link_reset()

static void elink_8481_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 11503 of file bxe_elink.c.

References elink_cl45_write(), MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, and elink_params::sc.

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◆ elink_84833_cmd_hdlr()

static elink_status_t elink_84833_cmd_hdlr	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t	fw_cmd,
		uint16_t	cmd_args[],
		int	argc,
		int	process
	)

static

Definition at line 10929 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_848xx_CMD_HDLR_COMMAND, MDIO_848xx_CMD_HDLR_DATA1, MDIO_848xx_CMD_HDLR_STATUS, MDIO_CTL_DEVAD, PHY84833_MB_PROCESS1, PHY84833_MB_PROCESS2, PHY84833_MB_PROCESS3, PHY84833_STATUS_CMD_CLEAR_COMPLETE, PHY84833_STATUS_CMD_COMPLETE_ERROR, PHY84833_STATUS_CMD_COMPLETE_PASS, PHY84833_STATUS_CMD_OPEN_FOR_CMDS, PHY84833_STATUS_CMD_OPEN_OVERRIDE, PHY848xx_CMDHDLR_WAIT, and elink_params::sc.

Referenced by elink_848xx_cmd_hdlr().

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◆ elink_84833_common_init_phy()

static elink_status_t elink_84833_common_init_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint8_t	phy_index,
		uint32_t	chip_id
	)

static

Definition at line 14552 of file bxe_elink.c.

References elink_84833_get_reset_gpios(), elink_cb_gpio_mult_write(), ELINK_DEBUG_P1, ELINK_STATUS_OK, MISC_REGISTERS_GPIO_OUTPUT_HIGH, and MISC_REGISTERS_GPIO_OUTPUT_LOW.

Referenced by elink_ext_phy_common_init().

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◆ elink_84833_get_reset_gpios()

static uint8_t elink_84833_get_reset_gpios	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	chip_id
	)

static

Definition at line 11058 of file bxe_elink.c.

References CHIP_IS_E3, PIN_CFG_GPIO0_P0, PORT_HW_CFG_E3_PHY_RESET_MASK, PORT_HW_CFG_E3_PHY_RESET_SHIFT, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P0, PORT_HW_CFG_EXT_PHY_GPIO_RST_MASK, PORT_HW_CFG_EXT_PHY_GPIO_RST_SHIFT, and REG_RD.

Referenced by elink_84833_common_init_phy(), and elink_84833_hw_reset_phy().

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◆ elink_84833_hw_reset_phy()

static elink_status_t elink_84833_hw_reset_phy	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 11096 of file bxe_elink.c.

References elink_params::chip_id, elink_84833_get_reset_gpios(), elink_cb_gpio_mult_write(), elink_cl45_write(), ELINK_DEBUG_P1, ELINK_STATUS_OK, MDIO_AN_DEVAD, MDIO_AN_REG_8481_1G_100T_EXT_CTRL, MDIO_AN_REG_8481_LEGACY_MII_CTRL, MDIO_AN_REG_8481_MII_CTRL_FORCE_1G, MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF, MISC_REGISTERS_GPIO_OUTPUT_LOW, REG_RD, elink_params::sc, elink_params::shmem2_base, and elink_params::shmem_base.

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◆ elink_8483x_disable_eee()

static elink_status_t elink_8483x_disable_eee	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 11129 of file bxe_elink.c.

References elink_848xx_cmd_hdlr(), ELINK_DEBUG_P0, elink_eee_disable(), ELINK_STATUS_OK, PHY84833_MB_PROCESS1, PHY848xx_CMD_SET_EEE_MODE, and elink_params::sc.

Referenced by elink_848x3_config_init().

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◆ elink_8483x_enable_eee()

static elink_status_t elink_8483x_enable_eee	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 11150 of file bxe_elink.c.

References elink_848xx_cmd_hdlr(), ELINK_DEBUG_P0, elink_eee_advertise(), ELINK_STATUS_OK, PHY84833_MB_PROCESS1, PHY848xx_CMD_SET_EEE_MODE, elink_params::sc, and SHMEM_EEE_10G_ADV.

Referenced by elink_848x3_config_init().

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◆ elink_84858_cmd_hdlr()

static elink_status_t elink_84858_cmd_hdlr	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t	fw_cmd,
		uint16_t	cmd_args[],
		int	argc
	)

static

Definition at line 10852 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_848xx_CMD_HDLR_COMMAND, MDIO_848xx_CMD_HDLR_DATA1, MDIO_848xx_CMD_HDLR_STATUS, MDIO_CTL_DEVAD, PHY84858_STATUS_CMD_COMPLETE_ERROR, PHY84858_STATUS_CMD_COMPLETE_PASS, PHY84858_STATUS_CMD_IN_PROGRESS, PHY84858_STATUS_CMD_SYSTEM_BUSY, PHY848xx_CMDHDLR_WAIT, and elink_params::sc.

Referenced by elink_848xx_cmd_hdlr().

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◆ elink_848x3_config_init()

static elink_status_t elink_848x3_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 11169 of file bxe_elink.c.

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◆ elink_848x3_link_reset()

static void elink_848x3_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 11512 of file bxe_elink.c.

References CHIP_IS_E1x, elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), MDIO_84833_SUPER_ISOLATE, MDIO_84833_TOP_CFG_XGPHY_STRAP1, MDIO_CTL_DEVAD, MISC_REGISTERS_GPIO_3, MISC_REGISTERS_GPIO_OUTPUT_LOW, bxe_softc::port, elink_params::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823, elink_params::sc, SC_PATH, and elink_phy::type.

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◆ elink_848xx_cmd_hdlr()

static elink_status_t elink_848xx_cmd_hdlr	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t	fw_cmd,
		uint16_t	cmd_args[],
		int	argc,
		int	process
	)

static

Definition at line 11008 of file bxe_elink.c.

References elink_84833_cmd_hdlr(), elink_84858_cmd_hdlr(), LINK_ATTR_84858, elink_params::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84858, REG_RD, elink_params::sc, elink_params::shmem2_base, and elink_phy::type.

Referenced by elink_8483x_disable_eee(), elink_8483x_enable_eee(), elink_848x3_config_init(), and elink_848xx_pair_swap_cfg().

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◆ elink_848xx_cmn_config_init()

static elink_status_t elink_848xx_cmn_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 10686 of file bxe_elink.c.

References DUPLEX_FULL, elink_848xx_specific_func(), elink_cl45_read(), elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_ext_phy_set_pause(), elink_is_8483x_8485x(), ELINK_PHY_INIT, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, ELINK_SUPPORTED_100baseT_Full, ELINK_SUPPORTED_100baseT_Half, ELINK_SUPPORTED_10baseT_Full, ELINK_SUPPORTED_10baseT_Half, MDIO_AN_DEVAD, MDIO_AN_REG_8481_1000T_CTRL, MDIO_AN_REG_8481_10GBASE_T_AN_CTRL, MDIO_AN_REG_8481_AUX_CTRL, MDIO_AN_REG_8481_LEGACY_AN_ADV, MDIO_AN_REG_8481_LEGACY_MII_CTRL, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL, PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL, PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, elink_phy::req_duplex, elink_phy::req_line_speed, elink_params::sc, elink_phy::speed_cap_mask, and elink_phy::supported.

Referenced by elink_8481_config_init(), and elink_848x3_config_init().

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◆ elink_848xx_format_ver()

static elink_status_t elink_848xx_format_ver	(	uint32_t	raw_ver,
		uint8_t *	str,
		uint16_t *	len
	)

static

Definition at line 11485 of file bxe_elink.c.

References elink_format_ver(), and ELINK_STATUS_OK.

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◆ elink_848xx_pair_swap_cfg()

static elink_status_t elink_848xx_pair_swap_cfg	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 11028 of file bxe_elink.c.

References elink_848xx_cmd_hdlr(), ELINK_DEBUG_P1, ELINK_STATUS_OK, PHY84833_MB_PROCESS2, PHY848xx_CMD_SET_PAIR_SWAP, PHY848xx_CMDHDLR_MAX_ARGS, elink_params::port, PORT_HW_CFG_RJ45_PAIR_SWAP_MASK, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_848x3_config_init().

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◆ elink_848xx_read_status()

static uint8_t elink_848xx_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

◆ elink_848xx_set_led()

static void elink_848xx_set_led	(	struct bxe_softc *	sc,
		struct elink_phy *	phy
	)

static

Definition at line 10624 of file bxe_elink.c.

References ARRAY_SIZE, elink_reg_set::devad, elink_cl45_read(), elink_cl45_read_or_write(), elink_cl45_write(), elink_is_8483x_8485x(), MDIO_AN_DEVAD, MDIO_PMA_DEVAD, MDIO_PMA_REG_8481_LED1_MASK, MDIO_PMA_REG_8481_LED2_MASK, MDIO_PMA_REG_8481_LED3_BLINK, MDIO_PMA_REG_8481_LED3_MASK, MDIO_PMA_REG_8481_LINK_SIGNAL, MDIO_PMA_REG_84823_BLINK_RATE_VAL_15P9HZ, MDIO_PMA_REG_84823_CTL_LED_CTL_1, MDIO_PMA_REG_84823_CTL_SLOW_CLK_CNT_HIGH, MDIO_PMA_REG_84823_LED3_STRETCH_EN, MDIO_PMA_REG_84833_CTL_LED_CTL_1, offset, elink_reg_set::reg, and elink_reg_set::val.

Referenced by elink_848xx_specific_func().

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◆ elink_848xx_set_link_led()

static void elink_848xx_set_link_led	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	mode
	)

static

Definition at line 11539 of file bxe_elink.c.

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◆ elink_848xx_specific_func()

static void elink_848xx_specific_func	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint32_t	action
	)

static

Definition at line 10663 of file bxe_elink.c.

References action, elink_848xx_set_led(), elink_bits_en(), elink_is_8483x_8485x(), ELINK_NIG_LATCH_BC_ENABLE_MI_INT, ELINK_PHY_INIT, elink_save_848xx_spirom_version(), NIG_REG_LATCH_BC_0, elink_params::port, and elink_params::sc.

Referenced by elink_848xx_cmn_config_init().

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◆ elink_8705_config_init()

static elink_status_t elink_8705_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 8581 of file bxe_elink.c.

References elink_cb_gpio_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_ext_phy_hw_reset(), elink_save_spirom_version(), ELINK_STATUS_OK, elink_wait_reset_complete(), MDIO_PMA_DEVAD, MDIO_PMA_REG_CMU_PLL_BYPASS, MDIO_PMA_REG_CTRL, MDIO_PMA_REG_MISC_CTRL, MDIO_PMA_REG_PHY_IDENTIFIER, MDIO_WIS_DEVAD, MDIO_WIS_REG_LASI_CNTL, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, elink_params::port, elink_params::sc, and elink_params::shmem_base.

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◆ elink_8705_read_status()

static uint8_t elink_8705_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 8608 of file bxe_elink.c.

References elink_cl45_read(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_ext_phy_resolve_fc(), ELINK_SPEED_10000, elink_vars::line_speed, MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_SD, MDIO_WIS_DEVAD, MDIO_WIS_REG_LASI_STATUS, and elink_params::sc.

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◆ elink_8706_8726_read_status()

static uint8_t elink_8706_8726_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 9738 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_cl45_read(), ELINK_DEBUG_P0, ELINK_DEBUG_P2, ELINK_DEBUG_P3, elink_ext_phy_resolve_fc(), elink_sfp_mask_fault(), ELINK_SPEED_1000, ELINK_SPEED_10000, elink_vars::fault_detected, elink_vars::line_speed, MDIO_AN_DEVAD, MDIO_AN_REG_LINK_STATUS, MDIO_PCS_DEVAD, MDIO_PCS_REG_STATUS, MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_LASI_STAT, MDIO_PMA_LASI_TXCTRL, MDIO_PMA_LASI_TXSTAT, MDIO_PMA_REG_RX_SD, and elink_params::sc.

Referenced by elink_8706_read_status(), and elink_8726_read_status().

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◆ elink_8706_config_init()

static uint8_t elink_8706_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 9800 of file bxe_elink.c.

References elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, elink_ext_phy_hw_reset(), ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED, elink_save_bcm_spirom_ver(), ELINK_SPEED_10000, ELINK_STATUS_OK, elink_wait_reset_complete(), elink_params::feature_config_flags, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, MDIO_AN_REG_CL37_AN, MDIO_AN_REG_CL37_CL73, MDIO_AN_REG_CL37_FC_LP, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_LASI_RXCTRL, MDIO_PMA_LASI_TXCTRL, MDIO_PMA_REG_CTRL, MDIO_PMA_REG_DIGITAL_CTRL, MDIO_PMA_REG_ROM_VER1, MDIO_XS_8706_REG_BANK_RX0, MDIO_XS_8706_REG_BANK_RX1, MDIO_XS_DEVAD, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_HIGH, elink_params::port, PORT_HW_CFG_TX_LASER_GPIO0, PORT_HW_CFG_TX_LASER_MASK, REG_RD, elink_phy::req_line_speed, elink_phy::rx_preemphasis, elink_params::sc, and elink_params::shmem_base.

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◆ elink_8706_read_status()

static elink_status_t elink_8706_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 9906 of file bxe_elink.c.

References elink_8706_8726_read_status().

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◆ elink_8726_common_init_phy()

static elink_status_t elink_8726_common_init_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint8_t	phy_index,
		uint32_t	chip_id
	)

static

Definition at line 14358 of file bxe_elink.c.

References CHIP_IS_E1x, elink_cb_gpio_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_ext_phy_hw_reset(), elink_populate_phy(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, MISC_REG_GPIO_EVENT_EN, MISC_REGISTERS_GPIO_0, MISC_REGISTERS_GPIO_3, MISC_REGISTERS_GPIO_HIGH, MISC_REGISTERS_GPIO_PORT_SHIFT, PORT_MAX, REG_RD, and REG_WR.

Referenced by elink_ext_phy_common_init().

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◆ elink_8726_config_init()

static elink_status_t elink_8726_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 9983 of file bxe_elink.c.

References elink_8726_external_rom_boot(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P2, elink_ext_phy_set_pause(), ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED, elink_sfp_module_detection(), ELINK_SPEED_1000, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, elink_wait_reset_complete(), elink_params::feature_config_flags, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, MDIO_AN_REG_CL37_AN, MDIO_AN_REG_CL37_CL73, MDIO_AN_REG_CL37_FC_LD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_LASI_RXCTRL, MDIO_PMA_REG_10G_CTRL2, MDIO_PMA_REG_8726_TX_CTRL1, MDIO_PMA_REG_8726_TX_CTRL2, MDIO_PMA_REG_CTRL, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, elink_phy::req_line_speed, elink_params::sc, elink_phy::speed_cap_mask, and elink_phy::tx_preemphasis.

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◆ elink_8726_config_loopback()

static void elink_8726_config_loopback	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9916 of file bxe_elink.c.

References elink_cl45_write(), ELINK_DEBUG_P0, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, and elink_params::sc.

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◆ elink_8726_external_rom_boot()

static void elink_8726_external_rom_boot	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9924 of file bxe_elink.c.

References elink_cl45_write(), elink_save_bcm_spirom_ver(), MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET, MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP, MDIO_PMA_REG_MISC_CTRL1, elink_params::port, and elink_params::sc.

Referenced by elink_8726_config_init().

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◆ elink_8726_link_reset()

static void elink_8726_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 10068 of file bxe_elink.c.

References elink_cl45_write(), ELINK_DEBUG_P1, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, elink_params::port, and elink_params::sc.

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◆ elink_8726_read_sfp_module_eeprom()

static elink_status_t elink_8726_read_sfp_module_eeprom	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	dev_addr,
		uint16_t	addr,
		uint8_t	byte_cnt,
		uint8_t *	o_buf,
		uint8_t	is_init
	)

static

Definition at line 8750 of file bxe_elink.c.

References addr, elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_SFP_EEPROM_PAGE_SIZE, ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF, MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK, MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK, MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR, MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE, MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE, and elink_params::sc.

Referenced by elink_read_sfp_module_eeprom().

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◆ elink_8726_read_status()

static uint8_t elink_8726_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 9962 of file bxe_elink.c.

References elink_8706_8726_read_status(), elink_cl45_read(), ELINK_DEBUG_P0, elink_vars::line_speed, MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, and elink_params::sc.

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◆ elink_8726_set_limiting_mode()

static elink_status_t elink_8726_set_limiting_mode	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	edc_mode
	)

static

Definition at line 9306 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_EDC_MODE_LIMITING, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_LRM_MODE, MDIO_PMA_REG_MISC_CTRL0, and MDIO_PMA_REG_ROM_VER2.

Referenced by elink_set_limiting_mode().

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◆ elink_8727_common_init_phy()

static elink_status_t elink_8727_common_init_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint8_t	phy_index,
		uint32_t	chip_id
	)

static

Definition at line 14453 of file bxe_elink.c.

References addr, CHIP_IS_E1x, elink_8073_8727_external_rom_boot(), elink_bits_dis(), elink_cb_gpio_write(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_get_ext_phy_reset_gpio(), ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, elink_populate_phy(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, MDIO_PMA_REG_TX_DISABLE, MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_OUTPUT_HIGH, MISC_REGISTERS_GPIO_OUTPUT_LOW, NIG_REG_MASK_INTERRUPT_PORT0, NIG_REG_PORT_SWAP, NIG_REG_STRAP_OVERRIDE, PORT_0, PORT_1, PORT_MAX, and REG_RD.

Referenced by elink_ext_phy_common_init().

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◆ elink_8727_config_init()

static elink_status_t elink_8727_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 10201 of file bxe_elink.c.

References elink_8727_config_speed(), elink_8727_power_module(), elink_8727_specific_func(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P2, ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED, ELINK_FLAGS_NOC, ELINK_PHY_INIT, elink_set_disable_pmd_transmit(), ELINK_STATUS_OK, elink_wait_reset_complete(), elink_params::feature_config_flags, elink_phy::flags, MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_REG_8727_OPT_CFG_REG, MDIO_PMA_REG_8727_TX_CTRL1, MDIO_PMA_REG_8727_TX_CTRL2, MDIO_PMA_REG_M8051_MSGOUT_REG, MDIO_PMA_REG_PHY_IDENTIFIER, elink_params::port, PORT_HW_CFG_TX_LASER_GPIO0, PORT_HW_CFG_TX_LASER_MASK, REG_RD, elink_params::sc, elink_params::shmem_base, and elink_phy::tx_preemphasis.

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◆ elink_8727_config_speed()

static void elink_8727_config_speed	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 10144 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DUAL_MEDIA, ELINK_ETH_PHY_SFP_1G_FIBER, ELINK_SPEED_1000, ELINK_SPEED_AUTO_NEG, MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, MDIO_AN_REG_CL37_AN, MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, MDIO_PMA_REG_8727_PCS_GP, MDIO_PMA_REG_CTRL, elink_phy::media_type, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, elink_phy::req_line_speed, elink_params::sc, and elink_phy::speed_cap_mask.

Referenced by elink_8727_config_init(), and elink_8727_handle_mod_abs().

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◆ elink_8727_handle_mod_abs()

static void elink_8727_handle_mod_abs	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 10287 of file bxe_elink.c.

References elink_8727_config_speed(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_ETH_PHY_NOT_PRESENT, ELINK_FLAGS_NOC, elink_sfp_module_detection(), elink_sfp_set_transmitter(), elink_wait_for_sfp_module_initialized(), elink_phy::flags, MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_REG_PHY_IDENTIFIER, elink_phy::media_type, elink_params::port, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_8727_read_status().

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◆ elink_8727_hw_reset()

static void elink_8727_hw_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 10129 of file bxe_elink.c.

References elink_cb_gpio_write(), MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_OUTPUT_LOW, NIG_REG_PORT_SWAP, NIG_REG_STRAP_OVERRIDE, bxe_softc::port, REG_RD, and elink_params::sc.

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◆ elink_8727_link_reset()

static void elink_8727_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 10531 of file bxe_elink.c.

References elink_cl45_write(), elink_set_disable_pmd_transmit(), elink_sfp_set_transmitter(), MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, and elink_params::sc.

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◆ elink_8727_power_module()

static void elink_8727_power_module	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	is_power_up
	)

static

Definition at line 9274 of file bxe_elink.c.

References elink_cl45_write(), ELINK_FLAGS_NOC, elink_phy::flags, MDIO_PMA_DEVAD, and MDIO_PMA_REG_8727_GPIO_CTRL.

Referenced by elink_8727_config_init(), elink_8727_read_status(), and elink_power_sfp_module().

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◆ elink_8727_read_sfp_module_eeprom()

static elink_status_t elink_8727_read_sfp_module_eeprom	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	dev_addr,
		uint16_t	addr,
		uint8_t	byte_cnt,
		uint8_t *	o_buf,
		uint8_t	is_init
	)

static

Definition at line 8881 of file bxe_elink.c.

References addr, elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_SFP_EEPROM_PAGE_SIZE, ELINK_STATUS_ERROR, ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF, MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK, MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR, MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK, MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR, MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE, MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE, and elink_params::sc.

Referenced by elink_read_sfp_module_eeprom().

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◆ elink_8727_read_status()

static uint8_t elink_8727_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 10372 of file bxe_elink.c.

References CHIP_IS_E1x, elink_vars::duplex, DUPLEX_FULL, elink_8727_handle_mod_abs(), elink_8727_power_module(), elink_cb_event_log(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DUAL_MEDIA, elink_ext_phy_resolve_fc(), ELINK_FLAGS_NOC, ELINK_FLAGS_SFP_NOT_APPROVED, ELINK_LOG_ID_OVER_CURRENT, elink_sfp_mask_fault(), elink_sfp_set_transmitter(), ELINK_SPEED_1000, ELINK_SPEED_10000, elink_vars::fault_detected, elink_phy::flags, elink_vars::line_speed, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_LASI_RXCTRL, MDIO_PMA_LASI_RXSTAT, MDIO_PMA_LASI_STAT, MDIO_PMA_LASI_TXCTRL, MDIO_PMA_LASI_TXSTAT, MDIO_PMA_REG_8073_SPEED_LINK_STATUS, MDIO_PMA_REG_8727_GPIO_CTRL, MDIO_PMA_REG_8727_PCS_GP, MDIO_PMA_REG_M8051_MSGOUT_REG, MDIO_PMA_REG_PHY_IDENTIFIER, elink_params::port, elink_phy::req_line_speed, elink_params::sc, and SC_PATH.

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◆ elink_8727_set_limiting_mode()

static elink_status_t elink_8727_set_limiting_mode	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	edc_mode
	)

static

Definition at line 9355 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_STATUS_OK, MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, and MDIO_PMA_REG_ROM_VER2.

Referenced by elink_set_limiting_mode().

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◆ elink_8727_set_link_led()

static void elink_8727_set_link_led	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	mode
	)

static

Definition at line 10083 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_FLAGS_NOC, ELINK_LED_MODE_FRONT_PANEL_OFF, ELINK_LED_MODE_OFF, ELINK_LED_MODE_ON, ELINK_LED_MODE_OPER, elink_phy::flags, MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_GPIO_CTRL, MDIO_PMA_REG_8727_PCS_OPT_CTRL, and elink_params::sc.

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◆ elink_8727_specific_func()

static void elink_8727_specific_func	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint32_t	action
	)

static

Definition at line 9389 of file bxe_elink.c.

References action, elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P1, ELINK_DISABLE_TX, ELINK_ENABLE_TX, ELINK_FLAGS_NOC, ELINK_FLAGS_SFP_NOT_APPROVED, ELINK_PHY_INIT, elink_sfp_set_transmitter(), elink_phy::flags, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, MDIO_PMA_LASI_RXCTRL, MDIO_PMA_LASI_TXCTRL, MDIO_PMA_REG_8727_PCS_OPT_CTRL, and elink_params::sc.

Referenced by elink_8727_config_init().

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◆ elink_analyze_link_error()

static uint8_t elink_analyze_link_error	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	status,
		uint32_t	phy_flag,
		uint32_t	link_flag,
		uint8_t	notify
	)

static

Definition at line 14703 of file bxe_elink.c.

References elink_cb_notify_link_changed(), ELINK_DEBUG_P0, ELINK_DEBUG_P3, ELINK_LED_MODE_OFF, ELINK_LED_MODE_OPER, ELINK_PERIODIC_FLAGS_LINK_EVENT, elink_set_led(), ELINK_SPEED_10000, elink_sync_link(), elink_update_mng(), elink_vars::link_status, LINK_STATUS_LINK_UP, elink_vars::link_up, NIG_REG_EGRESS_DRAIN0_MODE, elink_vars::periodic_flags, elink_vars::phy_flags, PHY_HALF_OPEN_CONN_FLAG, PHY_PHYSICAL_LINK_FLAG, PHY_SFP_TX_FAULT_FLAG, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_check_half_open_conn(), and elink_sfp_tx_fault_detection().

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◆ elink_avoid_link_flap()

static elink_status_t elink_avoid_link_flap	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13821 of file bxe_elink.c.

References CHIP_IS_E3, elink_bmac_enable(), ELINK_DEBUG_P0, elink_emac_enable(), ELINK_ETH_PHY_DA_TWINAX, ELINK_ETH_PHY_SFP_1G_FIBER, ELINK_ETH_PHY_SFPP_10G_FIBER, ELINK_INT_PHY, elink_link_int_enable(), elink_link_status_update(), ELINK_PHY_INIT, elink_set_mdio_emac_per_phy(), ELINK_SPEED_10000, ELINK_STATUS_OK, elink_umac_enable(), elink_verify_sfp_module(), elink_xmac_enable(), GRCBASE_MISC, elink_params::lfa_base, elink_vars::line_speed, LINK_FLAP_AVOIDANCE_COUNT_MASK, LINK_FLAP_AVOIDANCE_COUNT_OFFSET, elink_phy::media_type, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_MSTAT0, MISC_REGISTERS_RESET_REG_2_SET, NIG_REG_EGRESS_DRAIN0_MODE, elink_params::num_phys, elink_params::phy, elink_phy::phy_specific_func, elink_params::port, REG_RD, REG_WR, elink_params::sc, and SHMEM_LFA_DONT_CLEAR_STAT.

Referenced by elink_phy_init().

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◆ elink_bits_dis()

static uint32_t elink_bits_dis	(	struct bxe_softc *	sc,
		uint32_t	reg,
		uint32_t	bits
	)

static

Definition at line 962 of file bxe_elink.c.

References REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_8073_common_init_phy(), elink_848xx_set_link_led(), elink_8727_common_init_phy(), elink_cl45_read(), elink_cl45_write(), elink_emac_enable(), elink_emac_program(), elink_hw_reset_phy(), elink_link_initialize(), elink_link_int_ack(), elink_link_reset(), elink_phy_init(), and elink_rearm_latch_signal().

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◆ elink_bits_en()

static uint32_t elink_bits_en	(	struct bxe_softc *	sc,
		uint32_t	reg,
		uint32_t	bits
	)

static

Definition at line 953 of file bxe_elink.c.

References bits, REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_848xx_specific_func(), elink_cl45_read(), elink_cl45_write(), elink_emac_enable(), elink_emac_program(), elink_link_int_ack(), elink_link_int_enable(), and elink_rearm_latch_signal().

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◆ elink_bmac1_enable()

static elink_status_t elink_bmac1_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_lb
	)

static

Definition at line 3085 of file bxe_elink.c.

References BIGMAC_REGISTER_BMAC_CONTROL, BIGMAC_REGISTER_BMAC_XGXS_CONTROL, BIGMAC_REGISTER_CNT_MAX_SIZE, BIGMAC_REGISTER_RX_LLFC_MSG_FLDS, BIGMAC_REGISTER_RX_MAX_SIZE, BIGMAC_REGISTER_TX_MAX_SIZE, BIGMAC_REGISTER_TX_PAUSE_THRESHOLD, BIGMAC_REGISTER_TX_SOURCE_ADDR, CHIP_REV_IS_EMUL, ELINK_DEBUG_P0, ELINK_ETH_MAX_JUMBO_PACKET_SIZE, ELINK_ETH_OVREHEAD, ELINK_STATUS_OK, elink_update_pfc_bmac1(), elink_params::mac_addr, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, bxe_softc::port, elink_params::port, REG_WR_DMAE, and elink_params::sc.

Referenced by elink_bmac_enable().

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◆ elink_bmac2_enable()

static elink_status_t elink_bmac2_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_lb
	)

static

Definition at line 3158 of file bxe_elink.c.

References BIGMAC2_REGISTER_BMAC_CONTROL, BIGMAC2_REGISTER_BMAC_XGXS_CONTROL, BIGMAC2_REGISTER_CNT_MAX_SIZE, BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS, BIGMAC2_REGISTER_RX_MAX_SIZE, BIGMAC2_REGISTER_TX_MAX_SIZE, BIGMAC2_REGISTER_TX_SOURCE_ADDR, ELINK_DEBUG_P0, ELINK_ETH_MAX_JUMBO_PACKET_SIZE, ELINK_ETH_OVREHEAD, ELINK_STATUS_OK, elink_update_pfc_bmac2(), elink_params::mac_addr, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, bxe_softc::port, elink_params::port, REG_WR_DMAE, and elink_params::sc.

Referenced by elink_bmac_enable().

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◆ elink_bmac_enable()

static elink_status_t elink_bmac_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_lb,
		uint8_t	reset_bmac
	)

static

Definition at line 3223 of file bxe_elink.c.

References CHIP_IS_E2, elink_bmac1_enable(), elink_bmac2_enable(), ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_TX, ELINK_MAC_TYPE_BMAC, ELINK_STATUS_OK, elink_params::feature_config_flags, elink_vars::flow_ctrl, GRCBASE_MISC, elink_vars::mac_type, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_RST_BMAC0, MISC_REGISTERS_RESET_REG_2_SET, NIG_REG_BMAC0_IN_EN, NIG_REG_BMAC0_OUT_EN, NIG_REG_BMAC0_PAUSE_OUT_EN, NIG_REG_BMAC0_REGS_OUT_EN, NIG_REG_EGRESS_EMAC0_OUT_EN, NIG_REG_EGRESS_EMAC0_PORT, NIG_REG_EMAC0_IN_EN, NIG_REG_EMAC0_PAUSE_OUT_EN, NIG_REG_XGXS_LANE_SEL_P0, NIG_REG_XGXS_SERDES0_MODE_SEL, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_avoid_link_flap(), elink_init_bmac_loopback(), elink_init_xgxs_loopback(), and elink_update_link_up().

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◆ elink_bsc_module_sel()

static void elink_bsc_module_sel ( struct elink_params * params )

static

Definition at line 3883 of file bxe_elink.c.

References ELINK_DEBUG_P0, elink_set_cfg_pin(), I2C_BSC0, I2C_BSC1, I2C_SWITCH_WIDTH, bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_I2C_MUX0_MASK, PORT_HW_CFG_E3_I2C_MUX1_MASK, REG_RD, elink_params::sc, SHARED_HW_CFG_E3_I2C_MUX0_MASK, SHARED_HW_CFG_E3_I2C_MUX1_MASK, SHARED_HW_CFG_E3_I2C_MUX1_SHIFT, and elink_params::shmem_base.

Referenced by elink_warpcore_read_sfp_module_eeprom().

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◆ elink_bsc_read()

static elink_status_t elink_bsc_read	(	struct bxe_softc *	sc,
		uint8_t	sl_devid,
		uint16_t	sl_addr,
		uint8_t	lc_addr,
		uint8_t	xfer_cnt,
		uint32_t *	data_array
	)

static

Definition at line 3909 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_STATUS_ERROR, ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, MCP_REG_MCPR_IMC_COMMAND, MCP_REG_MCPR_IMC_DATAREG0, MCP_REG_MCPR_IMC_SLAVE_CONTROL, MCPR_IMC_COMMAND_ENABLE, MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT, MCPR_IMC_COMMAND_OPERATION_BITSHIFT, MCPR_IMC_COMMAND_READ_OP, MCPR_IMC_COMMAND_TRANSFER_ADDRESS_BITSHIFT, MCPR_IMC_COMMAND_WRITE_OP, REG_RD, and REG_WR.

Referenced by elink_warpcore_read_sfp_module_eeprom().

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◆ elink_calc_ieee_aneg_adv()

static void elink_calc_ieee_aneg_adv	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t *	ieee_fc
	)

static

Definition at line 4203 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_FLOW_CTRL_AUTO, ELINK_FLOW_CTRL_BOTH, ELINK_FLOW_CTRL_NONE, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE, elink_params::req_fc_auto_adv, elink_phy::req_flow_ctrl, and elink_params::sc.

Referenced by elink_54618se_config_init(), elink_8073_set_pause_cl37(), elink_ext_phy_set_pause(), and elink_prepare_xgxs().

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◆ elink_cannot_avoid_link_flap()

static void elink_cannot_avoid_link_flap	(	struct elink_params *	params,
		struct elink_vars *	vars,
		int	lfa_status
	)

static

Definition at line 13896 of file bxe_elink.c.

References elink_link_reset(), elink_params::lfa_base, LFA_LINK_FLAP_REASON_MASK, LFA_LINK_FLAP_REASON_OFFSET, LINK_FLAP_COUNT_MASK, LINK_FLAP_COUNT_OFFSET, REG_RD, REG_WR, elink_params::req_duplex, elink_params::req_fc_auto_adv, elink_params::req_flow_ctrl, elink_params::req_line_speed, elink_params::sc, SHMEM_LINK_CONFIG_SIZE, and elink_params::speed_cap_mask.

Referenced by elink_phy_init().

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◆ elink_check_fallback_to_cl37()

static void elink_check_fallback_to_cl37	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 6283 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_restart_autoneg(), MDIO_CL73_IEEEB0_CL73_AN_CONTROL, MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN, MDIO_CL73_USERB0_CL73_USTAT1, MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37, MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK, MDIO_REG_BANK_CL73_IEEEB0, MDIO_REG_BANK_CL73_USERB0, MDIO_REG_BANK_REMOTE_PHY, MDIO_REG_BANK_RX0, MDIO_REMOTE_PHY_MISC_RX_STATUS, MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG, MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG, MDIO_RX0_RX_STATUS, MDIO_RX0_RX_STATUS_SIGDET, and elink_params::sc.

Referenced by elink_link_settings_status().

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◆ elink_check_half_open_conn()

static elink_status_t elink_check_half_open_conn	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	notify
	)

static

Definition at line 14783 of file bxe_elink.c.

References BIGMAC2_REGISTER_RX_LSS_STAT, BIGMAC_REGISTER_RX_LSS_STATUS, CHIP_IS_E2, CHIP_IS_E3, elink_analyze_link_error(), ELINK_STATUS_OK, GRCBASE_XMAC0, GRCBASE_XMAC1, LINK_STATUS_NONE, MISC_REG_RESET_REG_2, MISC_REGISTERS_RESET_REG_2_RST_BMAC0, MISC_REGISTERS_RESET_REG_2_XMAC, NIG_REG_EGRESS_EMAC0_PORT, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, elink_vars::phy_flags, PHY_HALF_OPEN_CONN_FLAG, PHY_PHYSICAL_LINK_FLAG, elink_params::port, REG_RD, REG_RD_DMAE, REG_WR, elink_params::sc, XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS, XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS, XMAC_REG_CLEAR_RX_LSS_STATUS, and XMAC_REG_RX_LSS_STATUS.

Referenced by elink_period_func(), and elink_update_link_up().

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◆ elink_check_kr2_wa()

static void elink_check_kr2_wa	(	struct elink_params *	params,
		struct elink_vars *	vars,
		struct elink_phy *	phy
	)

static

Definition at line 14891 of file bxe_elink.c.

References elink_vars::check_kr2_recovery_cnt, CL22_WR_OVER_CL45, elink_cl45_read(), ELINK_DEBUG_P0, ELINK_DEBUG_P2, elink_disable_kr2(), elink_get_warpcore_lane(), elink_kr2_recovery(), elink_set_aer_mmd(), elink_warpcore_get_sigdet(), elink_warpcore_restart_AN_KR(), elink_params::link_attr_sync, LINK_ATTR_SYNC_KR2_ENABLE, MDIO_AER_BLOCK_AER_REG, MDIO_AN_DEVAD, MDIO_AN_REG_LP_AUTO_NEG, MDIO_AN_REG_LP_AUTO_NEG2, MDIO_REG_BANK_AER_BLOCK, and elink_params::sc.

Referenced by elink_period_func().

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◆ elink_check_lfa()

static int elink_check_lfa ( struct elink_params * params )

static

Definition at line 979 of file bxe_elink.c.

References elink_params::eee_mode, ELINK_DEBUG_P0, ELINK_DEBUG_P2, ELINK_EEE_MODE_ADV_LPI, ELINK_EEE_MODE_ENABLE_LPI, ELINK_FEATURE_CONFIG_BOOT_FROM_SAN, elink_params::feature_config_flags, elink_params::lfa_base, LFA_DCC_LFA_DISABLED, LFA_DUPLEX_MISMATCH, LFA_EEE_MISMATCH, LFA_FLOW_CTRL_MISMATCH, LFA_LINK_DOWN, LFA_LINK_SPEED_MISMATCH, LFA_LOOPBACK_ENABLED, LFA_MFW_IS_TOO_OLD, LFA_SPEED_CAP_MISMATCH, LINK_STATUS_LINK_UP, elink_params::loopback_mode, NO_LFA_DUE_TO_DCC_MASK, elink_params::num_phys, elink_params::port, REG_RD, REG_WR, elink_params::req_duplex, elink_params::req_fc_auto_adv, REQ_FC_AUTO_ADV_MASK, elink_params::req_flow_ctrl, elink_params::req_line_speed, elink_params::sc, elink_params::shmem2_base, elink_params::shmem_base, SHMEM_EEE_LPI_REQUESTED_BIT, SHMEM_EEE_REQUESTED_BIT, and elink_params::speed_cap_mask.

Referenced by elink_phy_init().

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◆ elink_check_over_curr()

static void elink_check_over_curr	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 14668 of file bxe_elink.c.

References elink_cb_event_log(), elink_get_cfg_pin(), ELINK_LOG_ID_OVER_CURRENT, ELINK_STATUS_OK, elink_warpcore_power_module(), elink_vars::phy_flags, PHY_OVER_CURRENT_FLAG, bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_OVER_CURRENT_MASK, PORT_HW_CFG_E3_OVER_CURRENT_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_period_func().

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◆ elink_chng_link_count()

static void elink_chng_link_count	(	struct elink_params *	params,
		uint8_t	clear
	)

static

Definition at line 7650 of file bxe_elink.c.

References addr, elink_params::port, REG_RD, REG_WR, elink_params::sc, elink_params::shmem2_base, and SHMEM2_HAS.

Referenced by elink_link_reset(), elink_link_update(), and elink_phy_init().

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◆ elink_cl22_read()

static elink_status_t elink_cl22_read	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	reg,
		uint16_t *	ret_val
	)

static

Definition at line 3449 of file bxe_elink.c.

References elink_phy::addr, ELINK_DEBUG_P0, ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, EMAC_MDIO_COMM_COMMAND_READ_22, EMAC_MDIO_COMM_DATA, EMAC_MDIO_COMM_START_BUSY, EMAC_MDIO_MODE_CLAUSE_45, EMAC_REG_EMAC_MDIO_COMM, EMAC_REG_EMAC_MDIO_MODE, elink_phy::mdio_ctrl, REG_RD, and REG_WR.

Referenced by elink_54618se_config_init(), elink_54618se_config_loopback(), elink_54618se_read_status(), elink_54618se_specific_func(), elink_5461x_set_link_led(), elink_ext_phy_update_adv_fc(), and elink_wait_reset_complete().

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◆ elink_cl22_write()

static elink_status_t elink_cl22_write	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	reg,
		uint16_t	val
	)

static

Definition at line 3414 of file bxe_elink.c.

References elink_phy::addr, ELINK_DEBUG_P0, ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, EMAC_MDIO_COMM_COMMAND_WRITE_22, EMAC_MDIO_COMM_START_BUSY, EMAC_MDIO_MODE_CLAUSE_45, EMAC_REG_EMAC_MDIO_COMM, EMAC_REG_EMAC_MDIO_MODE, elink_phy::mdio_ctrl, REG_RD, and REG_WR.

Referenced by elink_54618se_config_init(), elink_54618se_config_loopback(), elink_54618se_link_reset(), elink_54618se_specific_func(), and elink_5461x_set_link_led().

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◆ elink_cl45_read()

static elink_status_t elink_cl45_read	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t *	ret_val
	)

static

Definition at line 3491 of file bxe_elink.c.

References elink_phy::addr, elink_bits_dis(), elink_bits_en(), elink_cb_event_log(), elink_cl45_read(), ELINK_DEBUG_P0, ELINK_FLAGS_DUMMY_READ, ELINK_FLAGS_MDC_MDIO_WA, ELINK_FLAGS_MDC_MDIO_WA_B0, ELINK_FLAGS_MDC_MDIO_WA_G, ELINK_LOG_ID_MDIO_ACCESS_TIMEOUT, elink_set_mdio_clk(), ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, EMAC_MDIO_COMM_COMMAND_ADDRESS, EMAC_MDIO_COMM_COMMAND_READ_45, EMAC_MDIO_COMM_DATA, EMAC_MDIO_COMM_START_BUSY, EMAC_MDIO_STATUS_10MB, EMAC_REG_EMAC_MDIO_COMM, EMAC_REG_EMAC_MDIO_STATUS, elink_phy::flags, elink_phy::mdio_ctrl, MISC_REG_CHIP_NUM, MISC_REG_CHIP_REV, REG_RD, and REG_WR.

Referenced by elink_7101_config_init(), elink_7101_read_status(), elink_8073_8727_external_rom_boot(), elink_8073_common_init_phy(), elink_8073_config_init(), elink_8073_is_snr_needed(), elink_8073_read_status(), elink_8073_resolve_fc(), elink_8073_set_pause_cl37(), elink_8073_xaui_wa(), elink_84833_cmd_hdlr(), elink_84858_cmd_hdlr(), elink_848x3_config_init(), elink_848x3_link_reset(), elink_848xx_cmn_config_init(), elink_848xx_read_status(), elink_848xx_set_led(), elink_848xx_set_link_led(), elink_8705_read_status(), elink_8706_8726_read_status(), elink_8706_config_init(), elink_8726_read_sfp_module_eeprom(), elink_8726_read_status(), elink_8726_set_limiting_mode(), elink_8727_config_init(), elink_8727_config_speed(), elink_8727_handle_mod_abs(), elink_8727_read_sfp_module_eeprom(), elink_8727_read_status(), elink_8727_set_limiting_mode(), elink_8727_set_link_led(), elink_8727_specific_func(), elink_check_kr2_wa(), elink_cl45_read(), elink_cl45_read_and_write(), elink_cl45_read_or_write(), elink_cl45_write(), elink_eee_an_resolve(), elink_ext_phy_10G_an_resolve(), elink_ext_phy_set_pause(), elink_ext_phy_update_adv_fc(), elink_handle_module_detect_int(), elink_phy_read(), elink_save_848xx_spirom_version(), elink_save_bcm_spirom_ver(), elink_set_warpcore_loopback(), elink_set_xgxs_loopback(), elink_sfp_e1e2_set_transmitter(), elink_sfp_mask_fault(), elink_sfx7101_sp_sw_reset(), elink_test_link(), elink_wait_reset_complete(), elink_warpcore_config_runtime(), elink_warpcore_enable_AN_KR(), elink_warpcore_get_sigdet(), elink_warpcore_link_reset(), elink_warpcore_read_status(), elink_warpcore_reset_lane(), elink_warpcore_set_10G_KR(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_20G_force_KR2(), elink_warpcore_set_limiting_mode(), and elink_warpcore_set_sgmii_speed().

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◆ elink_cl45_read_and_write()

static void elink_cl45_read_and_write	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t	and_val
	)

static

Definition at line 4002 of file bxe_elink.c.

References elink_cl45_read(), and elink_cl45_write().

Referenced by elink_848x3_config_init(), elink_warpcore_link_reset(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_20G_force_KR2(), and elink_warpcore_set_sgmii_speed().

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◆ elink_cl45_read_or_write()

static void elink_cl45_read_or_write	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t	or_val
	)

static

Definition at line 3994 of file bxe_elink.c.

References elink_cl45_read(), and elink_cl45_write().

Referenced by elink_848xx_cmn_config_init(), elink_848xx_set_led(), elink_set_warpcore_loopback(), elink_warpcore_clear_regs(), elink_warpcore_enable_AN_KR(), elink_warpcore_enable_AN_KR2(), elink_warpcore_set_10G_KR(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_20G_force_KR2(), elink_warpcore_set_lpi_passthrough(), and elink_warpcore_set_sgmii_speed().

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◆ elink_cl45_write()

static elink_status_t elink_cl45_write	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t	val
	)

static

Definition at line 3568 of file bxe_elink.c.

References elink_phy::addr, elink_bits_dis(), elink_bits_en(), elink_cb_event_log(), elink_cl45_read(), ELINK_DEBUG_P0, ELINK_FLAGS_DUMMY_READ, ELINK_FLAGS_MDC_MDIO_WA, ELINK_FLAGS_MDC_MDIO_WA_B0, ELINK_FLAGS_MDC_MDIO_WA_G, ELINK_LOG_ID_MDIO_ACCESS_TIMEOUT, elink_set_mdio_clk(), ELINK_STATUS_OK, ELINK_STATUS_TIMEOUT, EMAC_MDIO_COMM_COMMAND_ADDRESS, EMAC_MDIO_COMM_COMMAND_WRITE_45, EMAC_MDIO_COMM_START_BUSY, EMAC_MDIO_STATUS_10MB, EMAC_REG_EMAC_MDIO_COMM, EMAC_REG_EMAC_MDIO_STATUS, elink_phy::flags, elink_phy::mdio_ctrl, MISC_REG_CHIP_NUM, MISC_REG_CHIP_REV, REG_RD, and REG_WR.

Referenced by elink_54618se_config_init(), elink_7101_config_init(), elink_7101_config_loopback(), elink_7101_set_link_led(), elink_8073_8727_external_rom_boot(), elink_8073_common_init_phy(), elink_8073_config_init(), elink_8073_read_status(), elink_8073_set_pause_cl37(), elink_8073_specific_func(), elink_807x_force_10G(), elink_8481_config_init(), elink_8481_link_reset(), elink_84833_cmd_hdlr(), elink_84833_hw_reset_phy(), elink_84858_cmd_hdlr(), elink_848x3_config_init(), elink_848x3_link_reset(), elink_848xx_cmn_config_init(), elink_848xx_read_status(), elink_848xx_set_led(), elink_848xx_set_link_led(), elink_8705_config_init(), elink_8706_config_init(), elink_8726_common_init_phy(), elink_8726_config_init(), elink_8726_config_loopback(), elink_8726_external_rom_boot(), elink_8726_link_reset(), elink_8726_read_sfp_module_eeprom(), elink_8726_set_limiting_mode(), elink_8727_common_init_phy(), elink_8727_config_init(), elink_8727_config_speed(), elink_8727_handle_mod_abs(), elink_8727_link_reset(), elink_8727_power_module(), elink_8727_read_sfp_module_eeprom(), elink_8727_read_status(), elink_8727_set_limiting_mode(), elink_8727_set_link_led(), elink_8727_specific_func(), elink_cl45_read_and_write(), elink_cl45_read_or_write(), elink_disable_kr2(), elink_eee_advertise(), elink_eee_disable(), elink_ext_phy_set_pause(), elink_phy_write(), elink_save_848xx_spirom_version(), elink_set_disable_pmd_transmit(), elink_set_warpcore_loopback(), elink_set_xgxs_loopback(), elink_sfp_e1e2_set_transmitter(), elink_sfp_mask_fault(), elink_sfx7101_sp_sw_reset(), elink_warpcore_clear_regs(), elink_warpcore_config_runtime(), elink_warpcore_enable_AN_KR(), elink_warpcore_enable_AN_KR2(), elink_warpcore_link_reset(), elink_warpcore_reset_lane(), elink_warpcore_restart_AN_KR(), elink_warpcore_set_10G_KR(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_20G_DXGXS(), elink_warpcore_set_20G_force_KR2(), elink_warpcore_set_limiting_mode(), elink_warpcore_set_lpi_passthrough(), and elink_warpcore_set_sgmii_speed().

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◆ elink_common_ext_link_reset()

static void elink_common_ext_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 7493 of file bxe_elink.c.

References CHIP_IS_E2, elink_cb_gpio_write(), ELINK_DEBUG_P0, MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_2, MISC_REGISTERS_GPIO_OUTPUT_LOW, elink_params::port, elink_params::sc, and SC_PATH.

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◆ elink_common_init_phy()

elink_status_t elink_common_init_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint32_t	chip_id,
		uint8_t	one_port_enabled
	)

Definition at line 14622 of file bxe_elink.c.

References CHIP_IS_E3, CHIP_REV_IS_EMUL, CHIP_REV_IS_FPGA, ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_EXT_PHY1, elink_ext_phy_common_init(), elink_get_ext_phy_config(), ELINK_MAX_PHYS, elink_set_mdio_clk(), ELINK_STATUS_OK, ELINK_XGXS_EXT_PHY_TYPE, GRCBASE_EMAC0, GRCBASE_EMAC1, MISC_REG_GEN_PURP_HWG, PORT_0, REG_RD, and REG_WR.

Referenced by bxe_common_init_phy().

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◆ elink_direct_parallel_detect_used()

static elink_status_t elink_direct_parallel_detect_used	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 6174 of file bxe_elink.c.

References CL22_RD_OVER_CL45, ELINK_DEBUG_P1, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK, MDIO_REG_BANK_10G_PARALLEL_DETECT, MDIO_REG_BANK_SERDES_DIGITAL, MDIO_SERDES_DIGITAL_A_1000X_STATUS2, MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED, elink_params::port, elink_phy::req_line_speed, and elink_params::sc.

Referenced by elink_flow_ctrl_resolve(), and elink_xgxs_an_resolve().

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◆ elink_disable_kr2()

static void elink_disable_kr2	(	struct elink_params *	params,
		struct elink_vars *	vars,
		struct elink_phy *	phy
	)

static

Definition at line 4502 of file bxe_elink.c.

References ARRAY_SIZE, elink_vars::check_kr2_recovery_cnt, elink_reg_set::devad, ELINK_CHECK_KR2_RECOVERY_CNT, elink_cl45_write(), ELINK_DEBUG_P0, elink_update_link_attr(), elink_params::link_attr_sync, MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CODE_FIELD, MDIO_WC_REG_CL73_BAM_CTRL1, MDIO_WC_REG_CL73_BAM_CTRL3, MDIO_WC_REG_CL73_USERB0_CTRL, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, MDIO_WC_REG_CL82_USERB1_RX_CTRL11, MDIO_WC_REG_CL82_USERB1_TX_CTRL5, MDIO_WC_REG_CL82_USERB1_TX_CTRL6, MDIO_WC_REG_CL82_USERB1_TX_CTRL7, MDIO_WC_REG_CL82_USERB1_TX_CTRL9, MDIO_WC_REG_ETA_CL73_LD_BAM_CODE, MDIO_WC_REG_ETA_CL73_LD_UD_CODE, MDIO_WC_REG_ETA_CL73_OUI1, MDIO_WC_REG_ETA_CL73_OUI2, MDIO_WC_REG_ETA_CL73_OUI3, elink_reg_set::reg, elink_params::sc, and elink_reg_set::val.

Referenced by elink_check_kr2_wa(), and elink_warpcore_enable_AN_KR().

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◆ elink_e3b0_sp_get_pri_cli_reg()

static uint64_t elink_e3b0_sp_get_pri_cli_reg	(	const uint8_t	cos,
		const uint8_t	cos_offset,
		const uint8_t	pri_set,
		const uint8_t	pri_offset,
		const uint8_t	entry_size
	)

static

Definition at line 1723 of file bxe_elink.c.

Referenced by elink_e3b0_sp_get_pri_cli_reg_nig(), and elink_e3b0_sp_get_pri_cli_reg_pbf().

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◆ elink_e3b0_sp_get_pri_cli_reg_nig()

static uint64_t elink_e3b0_sp_get_pri_cli_reg_nig	(	const uint8_t	cos,
		const uint8_t	pri_set
	)

static

Definition at line 1740 of file bxe_elink.c.

References elink_e3b0_sp_get_pri_cli_reg().

Referenced by elink_ets_e3b0_sp_set_pri_cli_reg().

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◆ elink_e3b0_sp_get_pri_cli_reg_pbf()

static uint64_t elink_e3b0_sp_get_pri_cli_reg_pbf	(	const uint8_t	cos,
		const uint8_t	pri_set
	)

static

Definition at line 1756 of file bxe_elink.c.

References elink_e3b0_sp_get_pri_cli_reg().

Referenced by elink_ets_e3b0_sp_set_pri_cli_reg().

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◆ elink_eee_advertise()

static elink_status_t elink_eee_advertise	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	modes
	)

static

Definition at line 3797 of file bxe_elink.c.

References elink_vars::eee_status, elink_cl45_write(), ELINK_DEBUG_P0, ELINK_STATUS_OK, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, MISC_REG_CPMU_LP_MASK_EXT_P0, elink_params::port, REG_WR, elink_params::sc, SHMEM_EEE_10G_ADV, SHMEM_EEE_1G_ADV, and SHMEM_EEE_ADV_STATUS_SHIFT.

Referenced by elink_54618se_config_init(), and elink_8483x_enable_eee().

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◆ elink_eee_an_resolve()

static void elink_eee_an_resolve	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 3834 of file bxe_elink.c.

References elink_vars::eee_status, elink_cl45_read(), ELINK_DEBUG_P0, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, elink_vars::line_speed, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, MDIO_AN_REG_LP_EEE_ADV, elink_params::sc, SHMEM_EEE_100M_ADV, SHMEM_EEE_10G_ADV, SHMEM_EEE_1G_ADV, SHMEM_EEE_ACTIVE_BIT, and SHMEM_EEE_LP_ADV_STATUS_SHIFT.

Referenced by elink_54618se_read_status().

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◆ elink_eee_calc_timer()

static uint32_t elink_eee_calc_timer ( struct elink_params * params )

static

Definition at line 3697 of file bxe_elink.c.

References elink_params::eee_mode, ELINK_EEE_MODE_NVRAM_MASK, ELINK_EEE_MODE_OUTPUT_TIME, ELINK_EEE_MODE_OVERRIDE_NVRAM, ELINK_EEE_MODE_TIMER_MASK, elink_eee_nvram_to_time(), elink_params::port, PORT_FEAT_CFG_EEE_POWER_MODE_MASK, PORT_FEAT_CFG_EEE_POWER_MODE_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_54618se_config_init(), elink_848x3_config_init(), and elink_eee_set_timers().

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◆ elink_eee_disable()

static elink_status_t elink_eee_disable	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 3781 of file bxe_elink.c.

References elink_vars::eee_status, elink_cl45_write(), ELINK_STATUS_OK, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, MISC_REG_CPMU_LP_FW_ENABLE_P0, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_54618se_config_init(), and elink_8483x_disable_eee().

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◆ elink_eee_has_cap()

static uint8_t elink_eee_has_cap ( struct elink_params * params )

static

Definition at line 3646 of file bxe_elink.c.

References elink_params::port, REG_RD, elink_params::sc, and elink_params::shmem2_base.

Referenced by elink_54618se_config_init(), elink_54618se_read_status(), elink_848x3_config_init(), elink_link_status_update(), and elink_update_mng_eee().

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◆ elink_eee_initial_config()

static elink_status_t elink_eee_initial_config	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	mode
	)

static

Definition at line 3762 of file bxe_elink.c.

References elink_params::eee_mode, elink_vars::eee_status, ELINK_EEE_MODE_ADV_LPI, ELINK_EEE_MODE_ENABLE_LPI, elink_eee_set_timers(), SHMEM_EEE_LPI_REQUESTED_BIT, SHMEM_EEE_REQUESTED_BIT, and SHMEM_EEE_SUPPORTED_SHIFT.

Referenced by elink_54618se_config_init(), and elink_848x3_config_init().

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◆ elink_eee_nvram_to_time()

static elink_status_t elink_eee_nvram_to_time	(	uint32_t	nvram_mode,
		uint32_t *	idle_timer
	)

static

Definition at line 3657 of file bxe_elink.c.

References ELINK_EEE_MODE_NVRAM_AGGRESSIVE_TIME, ELINK_EEE_MODE_NVRAM_BALANCED_TIME, ELINK_EEE_MODE_NVRAM_LATENCY_TIME, ELINK_STATUS_OK, PORT_FEAT_CFG_EEE_POWER_MODE_AGGRESSIVE, PORT_FEAT_CFG_EEE_POWER_MODE_BALANCED, and PORT_FEAT_CFG_EEE_POWER_MODE_LOW_LATENCY.

Referenced by elink_eee_calc_timer().

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◆ elink_eee_set_timers()

static elink_status_t elink_eee_set_timers	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 3729 of file bxe_elink.c.

References elink_params::eee_mode, elink_vars::eee_status, ELINK_DEBUG_P0, elink_eee_calc_timer(), ELINK_EEE_MODE_ENABLE_LPI, ELINK_EEE_MODE_OUTPUT_TIME, ELINK_EEE_MODE_OVERRIDE_NVRAM, elink_eee_time_to_nvram(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MISC_REG_CPMU_LP_IDLE_THR_P0, elink_params::port, REG_WR, elink_params::sc, SHMEM_EEE_TIME_OUTPUT_BIT, and SHMEM_EEE_TIMER_MASK.

Referenced by elink_eee_initial_config().

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◆ elink_eee_time_to_nvram()

static elink_status_t elink_eee_time_to_nvram	(	uint32_t	idle_timer,
		uint32_t *	nvram_mode
	)

static

Definition at line 3677 of file bxe_elink.c.

References ELINK_EEE_MODE_NVRAM_AGGRESSIVE_TIME, ELINK_EEE_MODE_NVRAM_BALANCED_TIME, ELINK_EEE_MODE_NVRAM_LATENCY_TIME, ELINK_STATUS_OK, PORT_FEAT_CFG_EEE_POWER_MODE_AGGRESSIVE, PORT_FEAT_CFG_EEE_POWER_MODE_BALANCED, PORT_FEAT_CFG_EEE_POWER_MODE_DISABLED, and PORT_FEAT_CFG_EEE_POWER_MODE_LOW_LATENCY.

Referenced by elink_eee_set_timers().

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◆ elink_emac_enable()

static elink_status_t elink_emac_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	lb
	)

static

Definition at line 2592 of file bxe_elink.c.

References CHIP_REV_IS_EMUL, CHIP_REV_IS_FPGA, CHIP_REV_IS_SLOW, elink_bits_dis(), elink_bits_en(), elink_cb_reg_write(), ELINK_DEBUG_P0, ELINK_ETH_MAX_JUMBO_PACKET_SIZE, ELINK_ETH_OVREHEAD, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, ELINK_MAC_TYPE_EMAC, ELINK_STATUS_OK, EMAC_MODE_PORT_GMII, EMAC_REG_EMAC_MODE, EMAC_REG_EMAC_RX_MODE, EMAC_REG_EMAC_RX_MTU_SIZE, EMAC_REG_EMAC_TX_MODE, EMAC_REG_RX_PFC_MODE, EMAC_REG_RX_PFC_MODE_PRIORITIES, EMAC_REG_RX_PFC_MODE_RX_EN, EMAC_REG_RX_PFC_MODE_TX_EN, EMAC_REG_RX_PFC_PARAM, EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT, EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT, EMAC_RX_MODE_FLOW_EN, EMAC_RX_MODE_KEEP_MAC_CONTROL, EMAC_RX_MODE_KEEP_VLAN_TAG, EMAC_RX_MODE_PROMISCUOUS, EMAC_RX_MODE_RESET, EMAC_RX_MTU_SIZE_JUMBO_ENA, EMAC_TX_MODE_EXT_PAUSE_EN, EMAC_TX_MODE_FLOW_EN, EMAC_TX_MODE_RESET, elink_params::feature_config_flags, elink_vars::flow_ctrl, GRCBASE_EMAC0, GRCBASE_EMAC1, GRCBASE_MISC, elink_params::lane_config, elink_vars::mac_type, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_RST_BMAC0, MISC_REGISTERS_RESET_REG_2_SET, NIG_REG_BMAC0_IN_EN, NIG_REG_BMAC0_OUT_EN, NIG_REG_BMAC0_PAUSE_OUT_EN, NIG_REG_BMAC0_REGS_OUT_EN, NIG_REG_EGRESS_EMAC0_OUT_EN, NIG_REG_EGRESS_EMAC0_PORT, NIG_REG_EMAC0_IN_EN, NIG_REG_EMAC0_PAUSE_OUT_EN, NIG_REG_NIG_EMAC0_EN, NIG_REG_NIG_INGRESS_EMAC0_NO_CRC, NIG_REG_XGXS_LANE_SEL_P0, NIG_REG_XGXS_SERDES0_MODE_SEL, elink_vars::phy_flags, PHY_XGXS_FLAG, bxe_softc::port, elink_params::port, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT, REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_avoid_link_flap(), elink_init_emac_loopback(), elink_init_xgxs_loopback(), elink_update_link_up(), and elink_update_pfc().

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◆ elink_emac_get_pfc_stat()

static void elink_emac_get_pfc_stat	(	struct elink_params *	params,
		uint32_t	pfc_frames_sent[2],
		uint32_t	pfc_frames_received[2]
	)

static

Definition at line 2147 of file bxe_elink.c.

References ELINK_DEBUG_P0, EMAC_REG_RX_PFC_STATS_XOFF_RCVD, EMAC_REG_RX_PFC_STATS_XOFF_RCVD_COUNT, EMAC_REG_RX_PFC_STATS_XOFF_SENT, EMAC_REG_RX_PFC_STATS_XOFF_SENT_COUNT, EMAC_REG_RX_PFC_STATS_XON_RCVD, EMAC_REG_RX_PFC_STATS_XON_RCVD_COUNT, EMAC_REG_RX_PFC_STATS_XON_SENT, EMAC_REG_RX_PFC_STATS_XON_SENT_COUNT, GRCBASE_EMAC0, GRCBASE_EMAC1, elink_params::port, REG_RD, and elink_params::sc.

Referenced by elink_pfc_statistic().

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◆ elink_emac_init()

static void elink_emac_init	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 2255 of file bxe_elink.c.

References elink_cb_reg_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_set_mdio_emac_per_phy(), EMAC_MODE_RESET, EMAC_REG_EMAC_MAC_MATCH, EMAC_REG_EMAC_MODE, GRCBASE_EMAC0, GRCBASE_EMAC1, GRCBASE_MISC, elink_params::mac_addr, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE, MISC_REGISTERS_RESET_REG_2_SET, bxe_softc::port, elink_params::port, REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_phy_init().

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◆ elink_emac_program()

static elink_status_t elink_emac_program	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6716 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_HALF, elink_bits_dis(), elink_bits_en(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_LED_MODE_OPER, elink_set_led(), ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_2500, ELINK_STATUS_ERROR, ELINK_STATUS_OK, EMAC_MODE_25G_MODE, EMAC_MODE_HALF_DUPLEX, EMAC_MODE_PORT_GMII, EMAC_MODE_PORT_MII, EMAC_MODE_PORT_MII_10M, EMAC_REG_EMAC_MODE, GRCBASE_EMAC0, elink_vars::line_speed, bxe_softc::port, elink_params::port, and elink_params::sc.

Referenced by elink_init_emac_loopback(), elink_init_xgxs_loopback(), and elink_update_link_up().

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◆ elink_ets_bw_limit()

void elink_ets_bw_limit	(	const struct elink_params *	params,
		const uint32_t	cos0_bw,
		const uint32_t	cos1_bw
	)

Definition at line 2011 of file bxe_elink.c.

References ELINK_DEBUG_P0, elink_ets_bw_limit_common(), ELINK_ETS_BW_LIMIT_CREDIT_WEIGHT, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1, PBF_REG_COS0_WEIGHT, PBF_REG_COS1_WEIGHT, REG_WR, and elink_params::sc.

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◆ elink_ets_bw_limit_common()

static void elink_ets_bw_limit_common ( const struct elink_params * params )

static

Definition at line 1967 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_ETS_BW_LIMIT_CREDIT_UPPER_BOUND, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1, PBF_REG_COS0_UPPER_BOUND, PBF_REG_COS1_UPPER_BOUND, PBF_REG_ETS_ENABLED, PBF_REG_NUM_STRICT_ARB_SLOTS, REG_WR, and elink_params::sc.

Referenced by elink_ets_bw_limit().

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◆ elink_ets_disabled()

elink_status_t elink_ets_disabled	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 1500 of file bxe_elink.c.

References CHIP_IS_E2, CHIP_IS_E3A0, CHIP_IS_E3B0, ELINK_DEBUG_P0, elink_ets_e2e3a0_disabled(), elink_ets_e3b0_disabled(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, and elink_params::sc.

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◆ elink_ets_e2e3a0_disabled()

static void elink_ets_e2e3a0_disabled ( struct elink_params * params )

static

Definition at line 1173 of file bxe_elink.c.

References ELINK_DEBUG_P0, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, PBF_REG_COS0_UPPER_BOUND, PBF_REG_COS0_WEIGHT, PBF_REG_COS1_UPPER_BOUND, PBF_REG_COS1_WEIGHT, PBF_REG_ETS_ENABLED, PBF_REG_HIGH_PRIORITY_COS_NUM, PBF_REG_NUM_STRICT_ARB_SLOTS, REG_WR, and elink_params::sc.

Referenced by elink_ets_disabled().

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◆ elink_ets_e3b0_cli_map()

static elink_status_t elink_ets_e3b0_cli_map	(	const struct elink_params *	params,
		const struct elink_ets_params *	ets_params,
		const uint8_t	cos_sp_bitmap,
		const uint8_t	cos_bw_bitmap
	)

static

Definition at line 1523 of file bxe_elink.c.

References ELINK_STATUS_OK, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, NIG_REG_P1_TX_ARB_CLIENT_IS_STRICT, NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ, PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0, PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1, PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0, PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_e3b0_config()

elink_status_t elink_ets_e3b0_config	(	const struct elink_params *	params,
		const struct elink_vars *	vars,
		struct elink_ets_params *	ets_params
	)

Definition at line 1865 of file bxe_elink.c.

References elink_ets_bw_params::bw, elink_ets_cos_params::bw_params, CHIP_IS_E3B0, elink_ets_params::cos, elink_cos_state_bw, elink_cos_state_strict, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT0, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT1, ELINK_DCBX_MAX_NUM_COS, ELINK_DEBUG_P0, elink_ets_e3b0_cli_map(), elink_ets_e3b0_get_total_bw(), ELINK_ETS_E3B0_PBF_MIN_W_VAL, elink_ets_e3b0_set_cos_bw(), elink_ets_e3b0_set_credit_upper_bound_nig(), elink_ets_e3b0_set_credit_upper_bound_pbf(), elink_ets_e3b0_sp_pri_to_cos_init(), elink_ets_e3b0_sp_pri_to_cos_set(), elink_ets_e3b0_sp_set_pri_cli_reg(), elink_ets_get_min_w_val_nig(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_ets_params::num_of_cos, elink_ets_cos_params::params, bxe_softc::port, elink_params::port, elink_ets_sp_params::pri, elink_params::sc, elink_ets_cos_params::sp_params, and elink_ets_cos_params::state.

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◆ elink_ets_e3b0_disabled()

static elink_status_t elink_ets_e3b0_disabled	(	const struct elink_params *	params,
		const struct elink_vars *	vars
	)

static

Definition at line 1477 of file bxe_elink.c.

References CHIP_IS_E3B0, ELINK_DEBUG_P0, elink_ets_e3b0_nig_disabled(), elink_ets_e3b0_pbf_disabled(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, and elink_params::sc.

Referenced by elink_ets_disabled().

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◆ elink_ets_e3b0_get_total_bw()

static elink_status_t elink_ets_e3b0_get_total_bw	(	const struct elink_params *	params,
		struct elink_ets_params *	ets_params,
		uint16_t *	total_bw
	)

static

Definition at line 1629 of file bxe_elink.c.

References elink_ets_bw_params::bw, elink_ets_cos_params::bw_params, elink_ets_params::cos, elink_cos_state_bw, ELINK_DEBUG_P0, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_ets_params::num_of_cos, elink_ets_cos_params::params, elink_params::sc, and elink_ets_cos_params::state.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_e3b0_nig_disabled()

static void elink_ets_e3b0_nig_disabled	(	const struct elink_params *	params,
		const struct elink_vars *	vars
	)

static

Definition at line 1302 of file bxe_elink.c.

Referenced by elink_ets_e3b0_disabled().

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◆ elink_ets_e3b0_pbf_disabled()

static void elink_ets_e3b0_pbf_disabled ( const struct elink_params * params )

static

Definition at line 1419 of file bxe_elink.c.

References ELINK_DCBX_E3B0_MAX_NUM_COS_PORT0, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT1, ELINK_ETS_E3B0_PBF_MIN_W_VAL, elink_ets_e3b0_set_credit_upper_bound_pbf(), bxe_softc::max_cos, PBF_REG_COS0_WEIGHT_P0, PBF_REG_COS0_WEIGHT_P1, PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P0, PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P1, PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0, PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1, PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0, PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1, PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P0, PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P1, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_ets_e3b0_disabled().

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◆ elink_ets_e3b0_set_cos_bw()

static elink_status_t elink_ets_e3b0_set_cos_bw	(	struct bxe_softc *	sc,
		const uint8_t	cos_entry,
		const uint32_t	min_w_val_nig,
		const uint32_t	min_w_val_pbf,
		const uint16_t	total_bw,
		const uint8_t	bw,
		const uint8_t	port
	)

static

Definition at line 1557 of file bxe_elink.c.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_e3b0_set_credit_upper_bound_nig()

static void elink_ets_e3b0_set_credit_upper_bound_nig	(	const struct elink_params *	params,
		const uint32_t	min_w_val
	)

static

Definition at line 1263 of file bxe_elink.c.

Referenced by elink_ets_e3b0_config(), and elink_ets_e3b0_nig_disabled().

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◆ elink_ets_e3b0_set_credit_upper_bound_pbf()

static void elink_ets_e3b0_set_credit_upper_bound_pbf	(	const struct elink_params *	params,
		const uint32_t	min_w_val
	)

static

Definition at line 1385 of file bxe_elink.c.

References ELINK_DCBX_E3B0_MAX_NUM_COS_PORT0, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT1, elink_ets_get_credit_upper_bound(), bxe_softc::max_cos, PBF_REG_COS0_UPPER_BOUND_P0, PBF_REG_COS0_UPPER_BOUND_P1, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_ets_e3b0_config(), and elink_ets_e3b0_pbf_disabled().

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◆ elink_ets_e3b0_sp_pri_to_cos_init()

static void elink_ets_e3b0_sp_pri_to_cos_init ( uint8_t * sp_pri_to_cos )

static

Definition at line 1678 of file bxe_elink.c.

References DCBX_INVALID_COS, and ELINK_DCBX_MAX_NUM_COS.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_e3b0_sp_pri_to_cos_set()

static elink_status_t elink_ets_e3b0_sp_pri_to_cos_set	(	const struct elink_params *	params,
		uint8_t *	sp_pri_to_cos,
		const uint8_t	pri,
		const uint8_t	cos_entry
	)

static

Definition at line 1690 of file bxe_elink.c.

References DCBX_INVALID_COS, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT0, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT1, ELINK_DEBUG_P0, ELINK_STATUS_ERROR, ELINK_STATUS_OK, bxe_softc::port, elink_params::port, and elink_params::sc.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_e3b0_sp_set_pri_cli_reg()

static elink_status_t elink_ets_e3b0_sp_set_pri_cli_reg	(	const struct elink_params *	params,
		uint8_t *	sp_pri_to_cos
	)

static

Definition at line 1772 of file bxe_elink.c.

References DCBX_INVALID_COS, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT0, ELINK_DCBX_E3B0_MAX_NUM_COS_PORT1, ELINK_DCBX_MAX_NUM_COS, ELINK_DEBUG_P0, elink_e3b0_sp_get_pri_cli_reg_nig(), elink_e3b0_sp_get_pri_cli_reg_pbf(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_LSB, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_ets_e3b0_config().

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◆ elink_ets_get_credit_upper_bound()

static uint32_t elink_ets_get_credit_upper_bound ( const uint32_t min_w_val )

static

Definition at line 1252 of file bxe_elink.c.

References ELINK_MAX_PACKET_SIZE, and ELINK_MAXVAL.

Referenced by elink_ets_e3b0_set_credit_upper_bound_nig(), and elink_ets_e3b0_set_credit_upper_bound_pbf().

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◆ elink_ets_get_min_w_val_nig()

static uint32_t elink_ets_get_min_w_val_nig ( const struct elink_vars * vars )

static

Definition at line 1231 of file bxe_elink.c.

References ELINK_ETS_E3B0_NIG_MIN_W_VAL_20GBPS, ELINK_ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS, ELINK_SPEED_20000, elink_vars::line_speed, and elink_vars::link_up.

Referenced by elink_ets_e3b0_config(), and elink_ets_e3b0_nig_disabled().

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◆ elink_ets_strict()

elink_status_t elink_ets_strict	(	const struct elink_params *	params,
		const uint8_t	strict_cos
	)

Definition at line 2043 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_STATUS_OK, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, PBF_REG_ETS_ENABLED, PBF_REG_HIGH_PRIORITY_COS_NUM, PBF_REG_NUM_STRICT_ARB_SLOTS, REG_WR, and elink_params::sc.

◆ elink_ext_phy_10G_an_resolve()

static void elink_ext_phy_10G_an_resolve	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		struct elink_vars *	vars
	)

static

Definition at line 7989 of file bxe_elink.c.

References elink_cl45_read(), elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_PARALLEL_DETECTION_USED, MDIO_AN_DEVAD, and MDIO_AN_REG_STATUS.

Referenced by elink_7101_read_status(), elink_8073_read_status(), and elink_848xx_read_status().

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◆ elink_ext_phy_common_init()

static elink_status_t elink_ext_phy_common_init	(	struct bxe_softc *	sc,
		uint32_t	shmem_base_path[],
		uint32_t	shmem2_base_path[],
		uint8_t	phy_index,
		uint32_t	ext_phy_type,
		uint32_t	chip_id
	)

static

Definition at line 14567 of file bxe_elink.c.

Referenced by elink_common_init_phy().

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◆ elink_ext_phy_hw_reset()

void elink_ext_phy_hw_reset	(	struct bxe_softc *	sc,
		uint8_t	port
	)

Definition at line 7956 of file bxe_elink.c.

References elink_cb_gpio_write(), MISC_REGISTERS_GPIO_1, MISC_REGISTERS_GPIO_OUTPUT_HIGH, and MISC_REGISTERS_GPIO_OUTPUT_LOW.

Referenced by elink_7101_config_init(), elink_8073_common_init_phy(), elink_8481_config_init(), elink_8705_config_init(), elink_8706_config_init(), and elink_8726_common_init_phy().

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◆ elink_ext_phy_resolve_fc()

static uint8_t elink_ext_phy_resolve_fc	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4414 of file bxe_elink.c.

References elink_ext_phy_update_adv_fc(), ELINK_FLOW_CTRL_AUTO, ELINK_FLOW_CTRL_NONE, ELINK_SPEED_AUTO_NEG, elink_vars::flow_ctrl, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, elink_params::req_fc_auto_adv, elink_phy::req_flow_ctrl, and elink_phy::req_line_speed.

Referenced by elink_54618se_read_status(), elink_7101_read_status(), elink_8073_resolve_fc(), elink_8705_read_status(), elink_8706_8726_read_status(), elink_8727_read_status(), and elink_warpcore_read_status().

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◆ elink_ext_phy_set_pause()

static void elink_ext_phy_set_pause	(	struct elink_params *	params,
		struct elink_phy *	phy,
		struct elink_vars *	vars
	)

static

Definition at line 4285 of file bxe_elink.c.

References elink_calc_ieee_aneg_adv(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P1, elink_vars::ieee_fc, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC, MDIO_AN_REG_ADV_PAUSE_PAUSE, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, and elink_params::sc.

Referenced by elink_7101_config_init(), elink_8073_config_init(), elink_848xx_cmn_config_init(), elink_8726_config_init(), and elink_warpcore_enable_AN_KR().

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◆ elink_ext_phy_update_adv_fc()

static void elink_ext_phy_update_adv_fc	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4359 of file bxe_elink.c.

References CHIP_IS_E3, elink_cl22_read(), elink_cl45_read(), ELINK_DEBUG_P1, elink_get_warpcore_lane(), elink_pause_resolve(), ELINK_SINGLE_MEDIA_DIRECT, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, MDIO_AN_REG_ADV_PAUSE_MASK, MDIO_AN_REG_CL37_FC_LD, MDIO_AN_REG_CL37_FC_LP, MDIO_AN_REG_LP_AUTO_NEG, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH, MDIO_WC_REG_GP2_STATUS_GP_2_4, MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_LP_AN_CAP, MDIO_WC_REG_GP2_STATUS_GP_2_4_CL73_AN_CMPL, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE, elink_params::sc, and elink_phy::type.

Referenced by elink_ext_phy_resolve_fc().

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◆ elink_fan_failure_det_req()

uint8_t elink_fan_failure_det_req	(	struct bxe_softc *	sc,
		uint32_t	shmem_base,
		uint32_t	shmem2_base,
		uint8_t	port
	)

Definition at line 15009 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_EXT_PHY1, ELINK_FLAGS_FAN_FAILURE_DET_REQ, ELINK_MAX_PHYS, elink_populate_phy(), ELINK_STATUS_OK, and elink_phy::flags.

Referenced by bxe_setup_fan_failure_detection().

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◆ elink_flow_ctrl_resolve()

static void elink_flow_ctrl_resolve	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	gp_status
	)

static

Definition at line 6255 of file bxe_elink.c.

References ELINK_DEBUG_P1, elink_direct_parallel_detect_used(), ELINK_FLOW_CTRL_AUTO, ELINK_FLOW_CTRL_NONE, ELINK_MDIO_AN_CL73_OR_37_COMPLETE, ELINK_SPEED_AUTO_NEG, elink_update_adv_fc(), elink_vars::flow_ctrl, elink_vars::phy_flags, PHY_SGMII_FLAG, elink_params::req_fc_auto_adv, elink_phy::req_flow_ctrl, elink_phy::req_line_speed, and elink_params::sc.

Referenced by elink_link_settings_status().

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◆ elink_format_ver()

static elink_status_t elink_format_ver	(	uint32_t	num,
		uint8_t *	str,
		uint16_t *	len
	)

static

Definition at line 7024 of file bxe_elink.c.

References ELINK_STATUS_ERROR, and ELINK_STATUS_OK.

Referenced by elink_848xx_format_ver().

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◆ elink_get_cfg_pin()

static uint32_t elink_get_cfg_pin	(	struct bxe_softc *	sc,
		uint32_t	pin_cfg,
		uint32_t *	val
	)

static

Definition at line 1156 of file bxe_elink.c.

References elink_cb_gpio_read(), elink_get_epio(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, PIN_CFG_EPIO0, PIN_CFG_GPIO0_P0, and PIN_CFG_NA.

Referenced by elink_check_over_curr(), and elink_sfp_tx_fault_detection().

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◆ elink_get_edc_mode()

static elink_status_t elink_get_edc_mode	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t *	edc_mode
	)

static

Definition at line 9017 of file bxe_elink.c.

References CHIP_IS_E1x, elink_cb_event_log(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_EDC_MODE_ACTIVE_DAC, ELINK_EDC_MODE_LIMITING, ELINK_EDC_MODE_LINEAR, ELINK_EDC_MODE_PASSIVE_DAC, ELINK_ETH_PHY_DA_TWINAX, ELINK_ETH_PHY_SFP_1G_FIBER, ELINK_ETH_PHY_SFPP_10G_FIBER, ELINK_ETH_PHY_UNSPECIFIED, ELINK_I2C_DEV_ADDR_A0, ELINK_INT_PHY, ELINK_LINK_CONFIG_IDX, ELINK_LOG_ID_NON_10G_MODULE, ELINK_MAX_PHYS, elink_read_sfp_module_eeprom(), ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR, ELINK_SFP_EEPROM_10G_COMP_CODE_LR_MASK, ELINK_SFP_EEPROM_10G_COMP_CODE_LRM_MASK, ELINK_SFP_EEPROM_10G_COMP_CODE_SR_MASK, ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR, ELINK_SFP_EEPROM_1G_COMP_CODE_BASE_T, ELINK_SFP_EEPROM_CON_TYPE_ADDR, ELINK_SFP_EEPROM_CON_TYPE_VAL_COPPER, ELINK_SFP_EEPROM_CON_TYPE_VAL_LC, ELINK_SFP_EEPROM_CON_TYPE_VAL_RJ45, ELINK_SFP_EEPROM_CON_TYPE_VAL_UNKNOWN, ELINK_SFP_EEPROM_FC_TX_TECH_ADDR, ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE, ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE, ELINK_SFP_EEPROM_OPTIONS_ADDR, ELINK_SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK, ELINK_SFP_EEPROM_OPTIONS_SIZE, elink_sfp_set_transmitter(), ELINK_SPEED_1000, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_update_link_attr(), elink_params::link_attr_sync, LINK_SFP_EEPROM_COMP_CODE_SHIFT, elink_phy::media_type, elink_params::phy, elink_params::port, PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK, PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, REG_RD, REG_WR, elink_phy::req_line_speed, elink_params::req_line_speed, elink_params::sc, SC_PATH, elink_params::shmem_base, and elink_phy::type.

Referenced by elink_sfp_module_detection().

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◆ elink_get_emac_base()

static uint32_t elink_get_emac_base	(	struct bxe_softc *	sc,
		uint32_t	mdc_mdio_access,
		uint8_t	port
	)

static

elink_get_emac_base - retrive emac base address

@bp: driver handle @mdc_mdio_access: access type @port: port id

This function selects the MDC/MDIO access (through emac0 or emac1) depend on the mdc_mdio_access, port, port swapped. Each phy has a default access mode, which could also be overridden by nvram configuration. This parameter, whether this is the default phy configuration, or the nvram overrun configuration, is passed here as mdc_mdio_access and selects the emac_base for the CL45 read/writes operations

Definition at line 3379 of file bxe_elink.c.

References GRCBASE_EMAC0, GRCBASE_EMAC1, NIG_REG_PORT_SWAP, bxe_softc::port, REG_RD, SHARED_HW_CFG_MDC_MDIO_ACCESS1_BOTH, SHARED_HW_CFG_MDC_MDIO_ACCESS1_EMAC0, SHARED_HW_CFG_MDC_MDIO_ACCESS1_EMAC1, SHARED_HW_CFG_MDC_MDIO_ACCESS1_PHY_TYPE, and SHARED_HW_CFG_MDC_MDIO_ACCESS1_SWAPPED.

Referenced by elink_populate_ext_phy(), and elink_populate_int_phy().

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◆ elink_get_epio()

static void elink_get_epio	(	struct bxe_softc *	sc,
		uint32_t	epio_pin,
		uint32_t *	en
	)

static

Definition at line 1101 of file bxe_elink.c.

References ELINK_DEBUG_P1, MCP_REG_MCPR_GP_INPUTS, MCP_REG_MCPR_GP_OENABLE, REG_RD, and REG_WR.

Referenced by elink_get_cfg_pin().

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◆ elink_get_ext_phy_config()

static uint32_t elink_get_ext_phy_config	(	struct bxe_softc *	sc,
		uint32_t	shmem_base,
		uint8_t	phy_index,
		uint8_t	port
	)

static

Definition at line 12997 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_STATUS_ERROR, and REG_RD.

Referenced by elink_common_init_phy(), and elink_populate_ext_phy().

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◆ elink_get_ext_phy_fw_version()

elink_status_t elink_get_ext_phy_fw_version	(	struct elink_params *	params,
		uint8_t *	version,
		uint16_t	len
	)

Definition at line 7070 of file bxe_elink.c.

References ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_MAX_PHYS, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_phy::format_fw_ver, elink_params::num_phys, elink_params::phy, REG_RD, elink_params::sc, and elink_phy::ver_addr.

◆ elink_get_ext_phy_reset_gpio()

static void elink_get_ext_phy_reset_gpio	(	struct bxe_softc *	sc,
		uint32_t	shmem_base,
		uint8_t *	io_gpio,
		uint8_t *	io_port
	)

static

Definition at line 14407 of file bxe_elink.c.

References PORT_0, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P0, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P1, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P0, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P1, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P0, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P1, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P0, PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P1, and REG_RD.

Referenced by elink_8727_common_init_phy().

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◆ elink_get_gpio_port()

static uint8_t elink_get_gpio_port ( struct elink_params * params )

static

Definition at line 8667 of file bxe_elink.c.

References CHIP_IS_E2, NIG_REG_PORT_SWAP, NIG_REG_STRAP_OVERRIDE, elink_params::port, REG_RD, elink_params::sc, and SC_PATH.

Referenced by elink_set_e1e2_module_fault_led(), and elink_sfp_e1e2_set_transmitter().

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◆ elink_get_link_speed_duplex()

static elink_status_t elink_get_link_speed_duplex	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint16_t	is_link_up,
		uint16_t	speed_mask,
		uint16_t	is_duplex
	)

static

Definition at line 6364 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_FLOW_CTRL_NONE, ELINK_GP_STATUS_100M, ELINK_GP_STATUS_10G_CX4, ELINK_GP_STATUS_10G_HIG, ELINK_GP_STATUS_10G_KR, ELINK_GP_STATUS_10G_KX4, ELINK_GP_STATUS_10G_SFI, ELINK_GP_STATUS_10G_XFI, ELINK_GP_STATUS_10M, ELINK_GP_STATUS_1G, ELINK_GP_STATUS_1G_KX, ELINK_GP_STATUS_20G_DXGXS, ELINK_GP_STATUS_20G_KR2, ELINK_GP_STATUS_2_5G, ELINK_GP_STATUS_5G, ELINK_GP_STATUS_6G, ELINK_LINK_1000TFD, ELINK_LINK_1000THD, ELINK_LINK_100TXFD, ELINK_LINK_100TXHD, ELINK_LINK_10GTFD, ELINK_LINK_10TFD, ELINK_LINK_10THD, ELINK_LINK_20GTFD, ELINK_LINK_2500TFD, ELINK_LINK_2500THD, ELINK_MAC_TYPE_NONE, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_20000, ELINK_SPEED_2500, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_ENABLED, LINK_STATUS_LINK_UP, elink_vars::mac_type, elink_vars::phy_link_up, elink_phy::req_line_speed, and elink_params::sc.

Referenced by elink_link_settings_status(), and elink_warpcore_read_status().

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◆ elink_get_mod_abs_int_cfg()

static elink_status_t elink_get_mod_abs_int_cfg	(	struct bxe_softc *	sc,
		uint32_t	chip_id,
		uint32_t	shmem_base,
		uint8_t	port,
		uint8_t *	gpio_num,
		uint8_t *	gpio_port
	)

static

Definition at line 5164 of file bxe_elink.c.

References CHIP_IS_E3, ELINK_DEBUG_P1, ELINK_STATUS_ERROR, ELINK_STATUS_OK, MISC_REGISTERS_GPIO_3, PIN_CFG_GPIO0_P0, PIN_CFG_GPIO3_P1, PORT_HW_CFG_E3_MOD_ABS_MASK, PORT_HW_CFG_E3_MOD_ABS_SHIFT, and REG_RD.

Referenced by elink_handle_module_detect_int(), elink_init_mod_abs_int(), and elink_is_sfp_module_plugged().

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◆ elink_get_warpcore_lane()

static uint8_t elink_get_warpcore_lane	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 4045 of file bxe_elink.c.

References elink_is_4_port_mode(), MISC_REG_FOUR_PORT_PATH_SWAP, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR, MISC_REG_FOUR_PORT_PORT_SWAP, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR, MISC_REG_TWO_PORT_PATH_SWAP, MISC_REG_TWO_PORT_PATH_SWAP_OVWR, bxe_softc::port, elink_params::port, REG_RD, elink_params::sc, and SC_PATH.

Referenced by elink_check_kr2_wa(), elink_ext_phy_update_adv_fc(), elink_set_aer_mmd(), elink_set_warpcore_loopback(), elink_test_link(), elink_warpcore_clear_regs(), elink_warpcore_config_init(), elink_warpcore_config_runtime(), elink_warpcore_config_sfi(), elink_warpcore_enable_AN_KR(), elink_warpcore_get_sigdet(), elink_warpcore_link_reset(), elink_warpcore_read_status(), elink_warpcore_restart_AN_KR(), elink_warpcore_set_10G_KR(), elink_warpcore_set_10G_XFI(), and elink_warpcore_set_limiting_mode().

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◆ elink_handle_module_detect_int()

void elink_handle_module_detect_int ( struct elink_params * params )

Definition at line 9643 of file bxe_elink.c.

References elink_params::chip_id, CHIP_IS_E3, elink_cb_gpio_int_write(), elink_cb_gpio_read(), elink_cl45_read(), ELINK_DEBUG_P0, ELINK_ETH_PHY_NOT_PRESENT, ELINK_EXT_PHY1, elink_get_mod_abs_int_cfg(), ELINK_INT_PHY, ELINK_PHY_INITIALIZED, elink_power_sfp_module(), elink_set_aer_mmd(), elink_set_mdio_emac_per_phy(), elink_set_sfp_module_fault_led(), elink_sfp_module_detection(), elink_sfp_set_transmitter(), ELINK_STATUS_ERROR, elink_wait_for_sfp_module_initialized(), elink_warpcore_config_sfi(), elink_warpcore_reset_lane(), elink_params::link_flags, MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC6, elink_phy::media_type, MISC_REGISTERS_GPIO_HIGH, MISC_REGISTERS_GPIO_INT_OUTPUT_CLR, MISC_REGISTERS_GPIO_INT_OUTPUT_SET, elink_params::phy, elink_params::port, elink_params::sc, and elink_params::shmem_base.

Referenced by bxe_attn_int_deasserted0().

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◆ elink_hw_reset_phy()

void elink_hw_reset_phy ( struct elink_params * params )

Definition at line 15030 of file bxe_elink.c.

References elink_bits_dis(), ELINK_INT_PHY, ELINK_MAX_PHYS, ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, elink_update_mng(), elink_phy::hw_reset, NIG_REG_MASK_INTERRUPT_PORT0, elink_params::phy, phy_null, elink_params::port, and elink_params::sc.

Referenced by bxe_attn_int_deasserted0().

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◆ elink_init_bmac_loopback()

static void elink_init_bmac_loopback	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13671 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_bmac_enable(), ELINK_FLOW_CTRL_NONE, ELINK_MAC_TYPE_BMAC, ELINK_SPEED_10000, elink_xgxs_deassert(), elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_up, elink_vars::mac_type, NIG_REG_EGRESS_DRAIN0_MODE, elink_vars::phy_flags, PHY_XGXS_FLAG, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_phy_init().

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◆ elink_init_emac_loopback()

static void elink_init_emac_loopback	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13691 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_emac_enable(), elink_emac_program(), ELINK_FLOW_CTRL_NONE, ELINK_MAC_TYPE_EMAC, ELINK_SPEED_1000, elink_xgxs_deassert(), elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_up, elink_vars::mac_type, NIG_REG_EGRESS_DRAIN0_MODE, elink_vars::phy_flags, PHY_XGXS_FLAG, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_phy_init().

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◆ elink_init_mod_abs_int()

void elink_init_mod_abs_int	(	struct bxe_softc *	sc,
		struct elink_vars *	vars,
		uint32_t	chip_id,
		uint32_t	shmem_base,
		uint32_t	shmem2_base,
		uint8_t	port
	)

Definition at line 15052 of file bxe_elink.c.

References AEU_INPUTS_ATTN_BITS_GPIO0_FUNCTION_0, elink_vars::aeu_int_mask, CHIP_IS_E3, elink_cb_gpio_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P3, ELINK_EXT_PHY1, elink_get_mod_abs_int_cfg(), ELINK_MAX_PHYS, elink_populate_phy(), ELINK_STATUS_OK, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, MISC_REG_GPIO_EVENT_EN, MISC_REGISTERS_GPIO_3, MISC_REGISTERS_GPIO_INPUT_HI_Z, NIG_REG_PORT_SWAP, NIG_REG_STRAP_OVERRIDE, offset, bxe_softc::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726, REG_RD, REG_WR, and elink_phy::type.

Referenced by bxe_nic_init().

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◆ elink_init_umac_loopback()

static void elink_init_umac_loopback	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13736 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, ELINK_FLOW_CTRL_NONE, ELINK_MAC_TYPE_UMAC, ELINK_SPEED_1000, elink_umac_enable(), elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_up, elink_vars::mac_type, NIG_REG_EGRESS_DRAIN0_MODE, elink_vars::phy_flags, PHY_XGXS_FLAG, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_phy_init().

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◆ elink_init_xgxs_loopback()

static void elink_init_xgxs_loopback	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13751 of file bxe_elink.c.

References elink_phy::config_loopback, elink_vars::duplex, DUPLEX_FULL, elink_bmac_enable(), elink_emac_enable(), elink_emac_program(), ELINK_EXT_PHY1, ELINK_FLAGS_WC_DUAL_MODE, ELINK_FLOW_CTRL_NONE, ELINK_INT_PHY, ELINK_LED_MODE_OPER, elink_link_initialize(), ELINK_LOOPBACK_XGXS, elink_set_led(), ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_20000, elink_umac_enable(), elink_xgxs_deassert(), elink_xmac_enable(), elink_phy::flags, elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_up, elink_params::loopback_mode, NIG_REG_EGRESS_DRAIN0_MODE, elink_params::num_phys, elink_params::phy, elink_params::port, REG_WR, elink_params::req_line_speed, elink_params::sc, and USES_WARPCORE.

Referenced by elink_phy_init().

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◆ elink_init_xmac_loopback()

static void elink_init_xmac_loopback	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 13710 of file bxe_elink.c.

References elink_phy::config_loopback, elink_vars::duplex, DUPLEX_FULL, ELINK_FLOW_CTRL_NONE, ELINK_INT_PHY, ELINK_MAC_TYPE_XMAC, elink_set_aer_mmd(), ELINK_SPEED_10000, elink_warpcore_reset_lane(), elink_xmac_enable(), elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_up, elink_vars::mac_type, NIG_REG_EGRESS_DRAIN0_MODE, elink_params::phy, elink_vars::phy_flags, PHY_XGXS_FLAG, elink_params::port, REG_WR, elink_params::req_line_speed, and elink_params::sc.

Referenced by elink_phy_init().

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◆ elink_initialize_sgmii_process()

static void elink_initialize_sgmii_process	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6102 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, DUPLEX_FULL, ELINK_DEBUG_P1, elink_restart_autoneg(), ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_AUTO_NEG, elink_vars::line_speed, MDIO_COMBO_IEEE0_MII_CONTROL, MDIO_COMBO_IEEO_MII_CONTROL_AN_EN, MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX, MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_100, MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_1000, MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK, MDIO_REG_BANK_COMBO_IEEE0, MDIO_REG_BANK_SERDES_DIGITAL, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE, elink_phy::req_duplex, and elink_params::sc.

Referenced by elink_xgxs_config_init().

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◆ elink_int_link_reset()

static void elink_int_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 7485 of file bxe_elink.c.

References GRCBASE_MISC, MISC_REGISTERS_RESET_REG_3_CLEAR, elink_params::port, REG_WR, and elink_params::sc.

◆ elink_is_4_port_mode()

static uint8_t elink_is_4_port_mode ( struct bxe_softc * sc )

static

Definition at line 2230 of file bxe_elink.c.

References MISC_REG_PORT4MODE_EN, MISC_REG_PORT4MODE_EN_OVWR, and REG_RD.

Referenced by elink_get_warpcore_lane(), and elink_xmac_init().

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◆ elink_is_8483x_8485x()

static int elink_is_8483x_8485x ( struct elink_phy * phy )

static

Definition at line 10549 of file bxe_elink.c.

References PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84834, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84858, and elink_phy::type.

Referenced by elink_848x3_config_init(), elink_848xx_cmn_config_init(), elink_848xx_set_led(), elink_848xx_specific_func(), elink_populate_ext_phy(), and elink_save_848xx_spirom_version().

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◆ elink_is_sfp_module_plugged()

static int elink_is_sfp_module_plugged	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5203 of file bxe_elink.c.

References elink_params::chip_id, elink_cb_gpio_read(), elink_get_mod_abs_int_cfg(), ELINK_STATUS_OK, elink_params::port, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_period_func(), and elink_warpcore_config_init().

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◆ elink_kr2_recovery()

static void elink_kr2_recovery	(	struct elink_params *	params,
		struct elink_vars *	vars,
		struct elink_phy *	phy
	)

static

Definition at line 14881 of file bxe_elink.c.

References ELINK_DEBUG_P0, elink_warpcore_enable_AN_KR2(), elink_warpcore_restart_AN_KR(), and elink_params::sc.

Referenced by elink_check_kr2_wa().

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◆ elink_lfa_reset()

elink_status_t elink_lfa_reset	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 14177 of file bxe_elink.c.

References elink_params::chip_id, CHIP_IS_E3, elink_link_reset(), elink_set_bmac_rx(), elink_set_rx_filter(), elink_set_umac_rxtx(), elink_set_xmac_rxtx(), ELINK_STATUS_OK, elink_params::lfa_base, elink_params::link_flags, elink_vars::link_up, NIG_REG_EGRESS_DRAIN0_MODE, elink_vars::phy_flags, elink_params::port, REG_WR, and elink_params::sc.

Referenced by bxe_link_reset().

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◆ elink_link_initialize()

static elink_status_t elink_link_initialize	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 7407 of file bxe_elink.c.

References CHIP_IS_E1x, CHIP_IS_E2, elink_phy::config_init, elink_bits_dis(), ELINK_DEBUG_P0, ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_FLAGS_INIT_XGXS_FIRST, ELINK_INT_PHY, ELINK_LOOPBACK_EXT_PHY, ELINK_LOOPBACK_XGXS, ELINK_NIG_MASK_MI_INT, ELINK_NIG_STATUS_SERDES0_LINK_STATUS, ELINK_NIG_STATUS_XGXS0_LINK10G, ELINK_NIG_STATUS_XGXS0_LINK_STATUS, elink_phy_selection(), elink_prepare_xgxs(), elink_set_parallel_detection(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, ELINK_SUPPORTED_FIBRE, elink_phy::flags, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_SERDES_LINK, elink_params::loopback_mode, NIG_REG_STATUS_INTERRUPT_PORT0, elink_params::num_phys, elink_params::phy, elink_params::port, PORT_HW_CFG_PHY_SELECTION_FIRST_PHY, elink_phy::req_line_speed, elink_params::sc, elink_phy::supported, and USES_WARPCORE.

Referenced by elink_init_xgxs_loopback(), and elink_phy_init().

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◆ elink_link_int_ack()

static void elink_link_int_ack	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_10g_plus
	)

static

Definition at line 6984 of file bxe_elink.c.

References elink_bits_dis(), elink_bits_en(), ELINK_DEBUG_P1, ELINK_NIG_STATUS_SERDES0_LINK_STATUS, ELINK_NIG_STATUS_XGXS0_LINK10G, ELINK_NIG_STATUS_XGXS0_LINK_STATUS, ELINK_NIG_STATUS_XGXS0_LINK_STATUS_SIZE, ELINK_SWITCH_CFG_10G, elink_params::lane_config, NIG_REG_STATUS_INTERRUPT_PORT0, elink_vars::phy_link_up, bxe_softc::port, elink_params::port, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT, elink_params::sc, elink_params::switch_cfg, and USES_WARPCORE.

Referenced by elink_link_update().

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◆ elink_link_int_enable()

static void elink_link_int_enable ( struct elink_params * params )

static

Definition at line 6902 of file bxe_elink.c.

References CHIP_IS_E3, elink_bits_en(), ELINK_DEBUG_P0, ELINK_DEBUG_P2, ELINK_DEBUG_P3, ELINK_INT_PHY, ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, ELINK_SINGLE_MEDIA_DIRECT, ELINK_SWITCH_CFG_10G, NIG_REG_EMAC0_STATUS_MISC_MI_INT, NIG_REG_MASK_INTERRUPT_PORT0, NIG_REG_SERDES0_STATUS_LINK_STATUS, NIG_REG_STATUS_INTERRUPT_PORT0, NIG_REG_XGXS0_STATUS_LINK10G, NIG_REG_XGXS0_STATUS_LINK_STATUS, elink_params::phy, bxe_softc::port, elink_params::port, PORT_HW_CFG_SERDES_EXT_PHY_TYPE_NOT_CONN, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE, REG_RD, elink_params::sc, elink_params::switch_cfg, and elink_phy::type.

Referenced by elink_848xx_set_link_led(), elink_avoid_link_flap(), and elink_phy_init().

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◆ elink_link_reset()

elink_status_t elink_link_reset	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	reset_ext_phy
	)

Definition at line 14072 of file bxe_elink.c.

References elink_params::chip_id, CHIP_IS_E3, CHIP_REV_IS_FPGA, CHIP_REV_IS_SLOW, elink_vars::eee_status, elink_bits_dis(), elink_chng_link_count(), ELINK_DEBUG_P1, ELINK_EXT_PHY1, ELINK_FEATURE_CONFIG_EMUL_DISABLE_BMAC, ELINK_FEATURE_CONFIG_EMUL_DISABLE_XMAC, ELINK_FLAGS_REARM_LATCH_SIGNAL, ELINK_INT_PHY, ELINK_LED_MODE_OFF, ELINK_NIG_LATCH_BC_ENABLE_MI_INT, ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, elink_rearm_latch_signal(), elink_set_aer_mmd(), elink_set_bmac_rx(), elink_set_led(), elink_set_mdio_emac_per_phy(), elink_set_umac_rxtx(), elink_set_xmac_rxtx(), elink_set_xumac_nig(), ELINK_STATUS_OK, elink_update_mng(), elink_update_mng_eee(), elink_params::feature_config_flags, elink_phy::flags, GRCBASE_MISC, GRCBASE_XMAC0, GRCBASE_XMAC1, elink_phy::link_reset, elink_vars::link_status, elink_vars::link_up, MISC_REG_RESET_REG_2, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_RST_BMAC0, MISC_REGISTERS_RESET_REG_2_XMAC, NIG_REG_BMAC0_IN_EN, NIG_REG_BMAC0_OUT_EN, NIG_REG_EGRESS_DRAIN0_MODE, NIG_REG_EGRESS_EMAC0_OUT_EN, NIG_REG_EMAC0_IN_EN, NIG_REG_LATCH_BC_0, NIG_REG_MASK_INTERRUPT_PORT0, NIG_REG_NIG_EMAC0_EN, elink_params::num_phys, elink_params::phy, elink_vars::phy_flags, bxe_softc::port, elink_params::port, REG_RD, REG_WR, elink_params::sc, SHMEM_EEE_ACTIVE_BIT, SHMEM_EEE_LP_ADV_STATUS_MASK, XMAC_CTRL_REG_SOFT_RESET, and XMAC_REG_CTRL.

Referenced by bxe_force_link_reset(), elink_cannot_avoid_link_flap(), and elink_lfa_reset().

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◆ elink_link_settings_status()

static elink_status_t elink_link_settings_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6457 of file bxe_elink.c.

References CL22_RD_OVER_CL45, elink_vars::duplex, DUPLEX_FULL, DUPLEX_HALF, elink_check_fallback_to_cl37(), ELINK_DEBUG_P1, ELINK_DEBUG_P3, elink_flow_ctrl_resolve(), elink_get_link_speed_duplex(), ELINK_GP_STATUS_SPEED_MASK, ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_xgxs_an_resolve(), elink_vars::flow_ctrl, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE, LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE, LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4, MDIO_CL73_IEEEB1_AN_LP_ADV2, MDIO_GP_STATUS_TOP_AN_STATUS1, MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS, MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS, MDIO_OVER_1G_LP_UP1, MDIO_OVER_1G_UP1_10G, MDIO_OVER_1G_UP1_10GH, MDIO_OVER_1G_UP1_2_5G, MDIO_REG_BANK_CL73_IEEEB1, MDIO_REG_BANK_GP_STATUS, MDIO_REG_BANK_OVER_1G, elink_phy::req_line_speed, and elink_params::sc.

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◆ elink_link_status_update()

void elink_link_status_update	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 5641 of file bxe_elink.c.

References elink_vars::aeu_int_mask, elink_vars::duplex, elink_vars::eee_status, ELINK_DEBUG_P1, ELINK_DEBUG_P3, elink_eee_has_cap(), ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_INT_PHY, ELINK_LOOPBACK_EXT, ELINK_LOOPBACK_NONE, elink_sync_link(), elink_params::feature_config_flags, elink_vars::flow_ctrl, elink_vars::line_speed, elink_params::link_attr_sync, elink_vars::link_status, LINK_STATUS_LINK_UP, LINK_STATUS_PFC_ENABLED, elink_params::loopback_mode, elink_phy::media_type, elink_params::phy, elink_vars::phy_flags, elink_vars::phy_link_up, PHY_XGXS_FLAG, bxe_softc::port, elink_params::port, PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK, PORT_HW_CFG_MEDIA_TYPE_PHY0_SHIFT, PORT_HW_CFG_MEDIA_TYPE_PHY1_MASK, PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT, PORT_HW_CFG_MEDIA_TYPE_PHY2_MASK, PORT_HW_CFG_MEDIA_TYPE_PHY2_SHIFT, REG_RD, elink_params::sc, set_phy_vars(), elink_params::shmem2_base, SHMEM2_HAS, SHMEM2_RD, and elink_params::shmem_base.

Referenced by bxe_link_status_update(), and elink_avoid_link_flap().

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◆ elink_link_update()

elink_status_t elink_link_update	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 7680 of file bxe_elink.c.

References elink_vars::aeu_int_mask, elink_vars::check_kr2_recovery_cnt, CHIP_IS_E3, elink_phy::config_init, DRV_MSG_CODE_LINK_STATUS_CHANGED, elink_vars::duplex, DUPLEX_FULL, elink_vars::eee_status, elink_cb_fw_command(), elink_chng_link_count(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_DEBUG_P3, ELINK_DISABLE_TX, ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_FEATURE_CONFIG_BC_SUPPORTS_AFEX, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLAGS_INIT_XGXS_FIRST, ELINK_FLAGS_REARM_LATCH_SIGNAL, ELINK_INT_PHY, elink_link_int_ack(), ELINK_MAX_PHYS, elink_phy_selection(), elink_rearm_latch_signal(), elink_set_aer_mmd(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_STATUS_OK, ELINK_SUPPORTED_FIBRE, elink_update_link_down(), elink_update_link_up(), elink_vars::fault_detected, elink_params::feature_config_flags, elink_phy::flags, elink_vars::flow_ctrl, elink_vars::ieee_fc, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_LINK_UP, LINK_STATUS_PFC_ENABLED, LINK_STATUS_SERDES_LINK, elink_vars::link_up, elink_vars::mac_type, elink_params::multi_phy_config, NIG_REG_EGRESS_DRAIN0_MODE, NIG_REG_EMAC0_STATUS_MISC_MI_INT, NIG_REG_MASK_INTERRUPT_PORT0, NIG_REG_NIG_EMAC0_EN, NIG_REG_SERDES0_STATUS_LINK_STATUS, NIG_REG_STATUS_INTERRUPT_PORT0, NIG_REG_XGXS0_STATUS_LINK10G, NIG_REG_XGXS0_STATUS_LINK_STATUS, elink_params::num_phys, elink_vars::periodic_flags, elink_params::phy, elink_vars::phy_flags, elink_vars::phy_link_up, PHY_SGMII_FLAG, elink_phy::phy_specific_func, PHY_XGXS_FLAG, elink_params::port, PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY, PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT, PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY, elink_phy::read_status, REG_RD, REG_WR, elink_vars::rsrv2, elink_vars::rx_tx_asic_rst, elink_params::sc, elink_phy::supported, elink_vars::turn_to_run_wc_rt, and USES_WARPCORE.

Referenced by bxe_link_attn().

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◆ elink_null_format_ver()

static elink_status_t elink_null_format_ver	(	uint32_t	spirom_ver,
		uint8_t *	str,
		uint16_t *	len
	)

static

Definition at line 7063 of file bxe_elink.c.

References ELINK_STATUS_OK.

◆ elink_pause_resolve()

static void elink_pause_resolve	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	pause_result
	)

static

Definition at line 4312 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_FLOW_CTRL_BOTH, ELINK_FLOW_CTRL_NONE, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, elink_vars::flow_ctrl, elink_vars::link_status, LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE, LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE, elink_params::req_fc_auto_adv, and elink_params::sc.

Referenced by elink_8073_resolve_fc(), elink_ext_phy_update_adv_fc(), and elink_update_adv_fc().

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◆ elink_pbf_update()

static elink_status_t elink_pbf_update	(	struct elink_params *	params,
		uint32_t	flow_ctrl,
		uint32_t	line_speed
	)

static

Definition at line 3294 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_ETH_MAX_JUMBO_PACKET_SIZE, ELINK_ETH_OVREHEAD, ELINK_FLOW_CTRL_RX, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_2500, ELINK_STATUS_ERROR, ELINK_STATUS_OK, PBF_REG_DISABLE_NEW_TASK_PROC_P0, PBF_REG_INIT_P0, PBF_REG_P0_ARB_THRSH, PBF_REG_P0_CREDIT, PBF_REG_P0_INIT_CRD, PBF_REG_P0_PAUSE_ENABLE, bxe_softc::port, elink_params::port, REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_update_link_up().

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◆ elink_period_func()

void elink_period_func	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 14964 of file bxe_elink.c.

References CHIP_IS_E3, elink_check_half_open_conn(), elink_check_kr2_wa(), elink_check_over_curr(), ELINK_DEBUG_P0, ELINK_FLAGS_TX_ERROR_CHECK, ELINK_INT_PHY, elink_is_sfp_module_plugged(), ELINK_MAX_PHYS, elink_set_aer_mmd(), elink_sfp_tx_fault_detection(), ELINK_SPEED_20000, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, elink_update_mng(), elink_warpcore_config_runtime(), elink_phy::flags, elink_vars::link_status, LINK_STATUS_SFP_TX_FAULT, elink_params::phy, elink_vars::phy_flags, elink_params::port, PORT_HW_CFG_NET_SERDES_IF_MASK, PORT_HW_CFG_NET_SERDES_IF_SFI, PORT_HW_CFG_SPEED_CAPABILITY_D0_20G, REG_RD, elink_phy::req_line_speed, elink_vars::rx_tx_asic_rst, elink_params::sc, elink_params::shmem_base, and elink_phy::speed_cap_mask.

Referenced by bxe_periodic_callout_func().

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◆ elink_pfc_nig_rx_priority_mask()

static elink_status_t elink_pfc_nig_rx_priority_mask	(	struct bxe_softc *	sc,
		uint8_t	cos_entry,
		uint32_t	priority_mask,
		uint8_t	port
	)

static

Definition at line 2883 of file bxe_elink.c.

References ELINK_STATUS_ERROR, ELINK_STATUS_OK, NIG_REG_P0_RX_COS0_PRIORITY_MASK, NIG_REG_P0_RX_COS1_PRIORITY_MASK, NIG_REG_P0_RX_COS2_PRIORITY_MASK, NIG_REG_P0_RX_COS3_PRIORITY_MASK, NIG_REG_P0_RX_COS4_PRIORITY_MASK, NIG_REG_P0_RX_COS5_PRIORITY_MASK, NIG_REG_P1_RX_COS0_PRIORITY_MASK, NIG_REG_P1_RX_COS1_PRIORITY_MASK, NIG_REG_P1_RX_COS2_PRIORITY_MASK, bxe_softc::port, and REG_WR.

Referenced by elink_update_pfc_nig().

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◆ elink_pfc_statistic()

void elink_pfc_statistic	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	pfc_frames_sent[2],
		uint32_t	pfc_frames_received[2]
	)

Definition at line 2179 of file bxe_elink.c.

References ELINK_DEBUG_P0, elink_emac_get_pfc_stat(), ELINK_MAC_TYPE_EMAC, elink_vars::link_up, elink_vars::mac_type, and elink_params::sc.

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◆ elink_phy_def_cfg()

static void elink_phy_def_cfg	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	phy_index
	)

static

Definition at line 13299 of file bxe_elink.c.

Referenced by elink_phy_probe().

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◆ elink_phy_init()

elink_status_t elink_phy_init	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

Definition at line 13956 of file bxe_elink.c.

References elink_vars::check_kr2_recovery_cnt, elink_params::chip_id, CHIP_IS_E3, CHIP_REV_IS_EMUL, CHIP_REV_IS_FPGA, CHIP_REV_IS_SLOW, elink_vars::duplex, DUPLEX_FULL, elink_params::eee_mode, elink_vars::eee_status, elink_avoid_link_flap(), elink_bits_dis(), elink_cannot_avoid_link_flap(), elink_check_lfa(), elink_chng_link_count(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_DEBUG_P3, elink_emac_init(), ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_NONE, elink_init_bmac_loopback(), elink_init_emac_loopback(), elink_init_umac_loopback(), elink_init_xgxs_loopback(), elink_init_xmac_loopback(), elink_link_initialize(), elink_link_int_enable(), ELINK_LOOPBACK_BMAC, ELINK_LOOPBACK_EMAC, ELINK_LOOPBACK_EXT_PHY, ELINK_LOOPBACK_UMAC, ELINK_LOOPBACK_XGXS, ELINK_LOOPBACK_XMAC, ELINK_MAC_TYPE_NONE, ELINK_NIG_MASK_MI_INT, ELINK_NIG_MASK_SERDES0_LINK_STATUS, ELINK_NIG_MASK_XGXS0_LINK10G, ELINK_NIG_MASK_XGXS0_LINK_STATUS, ELINK_PHY_INITIALIZED, elink_serdes_deassert(), elink_set_rx_filter(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, ELINK_SWITCH_CFG_10G, elink_update_mng(), elink_update_mng_eee(), elink_xgxs_deassert(), elink_params::feature_config_flags, elink_vars::flow_ctrl, elink_params::hw_led_mode, elink_params::lane_config, elink_params::lfa_base, elink_vars::line_speed, elink_params::link_attr_sync, elink_params::link_flags, elink_vars::link_status, LINK_STATUS_PFC_ENABLED, elink_vars::link_up, elink_params::loopback_mode, elink_vars::mac_type, elink_params::multi_phy_config, NIG_REG_MASK_INTERRUPT_PORT0, elink_params::num_phys, elink_vars::phy_flags, elink_vars::phy_link_up, elink_params::port, elink_params::req_duplex, elink_params::req_fc_auto_adv, elink_params::req_flow_ctrl, elink_params::req_line_speed, elink_params::rsrv, elink_params::sc, set_phy_vars(), and elink_params::switch_cfg.

Referenced by bxe_initial_phy_init(), and bxe_sysctl_pauseparam().

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◆ elink_phy_probe()

elink_status_t elink_phy_probe ( struct elink_params * params )

Definition at line 13409 of file bxe_elink.c.

References CHIP_REV_IS_EMUL, ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P3, ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET, ELINK_FEATURE_CONFIG_MT_SUPPORT, ELINK_FLAGS_MDC_MDIO_WA_G, ELINK_INT_PHY, ELINK_MAX_PHYS, elink_phy_def_cfg(), elink_populate_phy(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_params::feature_config_flags, elink_phy::flags, elink_phy::media_type, elink_params::multi_phy_config, elink_params::num_phys, elink_params::phy, phy_null, elink_params::port, PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK, PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT, PORT_HW_CFG_PHY_SWAPPED_ENABLED, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN, REG_RD, REG_WR, elink_params::sc, elink_params::shmem2_base, elink_params::shmem_base, and elink_phy::type.

Referenced by bxe_get_device_info(), and bxe_init_hw_func().

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◆ elink_phy_read()

elink_status_t elink_phy_read	(	struct elink_params *	params,
		uint8_t	phy_addr,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t *	ret_val
	)

Definition at line 4011 of file bxe_elink.c.

References elink_phy::addr, elink_cl45_read(), ELINK_STATUS_ERROR, elink_params::num_phys, elink_params::phy, and elink_params::sc.

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◆ elink_phy_selection()

uint32_t elink_phy_selection ( struct elink_params * params )

Definition at line 13377 of file bxe_elink.c.

References elink_params::multi_phy_config, PORT_HW_CFG_PHY_SELECTION_FIRST_PHY, PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY, PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT, PORT_HW_CFG_PHY_SELECTION_MASK, PORT_HW_CFG_PHY_SELECTION_SECOND_PHY, PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY, and PORT_HW_CFG_PHY_SWAPPED_ENABLED.

Referenced by bxe_get_cur_phy_idx(), elink_848x3_config_init(), elink_link_initialize(), and elink_link_update().

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◆ elink_phy_write()

elink_status_t elink_phy_write	(	struct elink_params *	params,
		uint8_t	phy_addr,
		uint8_t	devad,
		uint16_t	reg,
		uint16_t	val
	)

Definition at line 4028 of file bxe_elink.c.

References elink_phy::addr, elink_cl45_write(), ELINK_STATUS_ERROR, elink_params::num_phys, elink_params::phy, and elink_params::sc.

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◆ elink_populate_ext_phy()

static elink_status_t elink_populate_ext_phy	(	struct bxe_softc *	sc,
		uint8_t	phy_index,
		uint32_t	shmem_base,
		uint32_t	shmem2_base,
		uint8_t	port,
		struct elink_phy *	phy
	)

static

Definition at line 13159 of file bxe_elink.c.

Referenced by elink_populate_phy().

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◆ elink_populate_int_phy()

static elink_status_t elink_populate_int_phy	(	struct bxe_softc *	sc,
		uint32_t	shmem_base,
		uint8_t	port,
		struct elink_phy *	phy
	)

static

Definition at line 13019 of file bxe_elink.c.

References elink_phy::addr, CHIP_IS_E2, CHIP_REV, CHIP_REV_Ax, elink_phy::def_md_devad, ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P3, ELINK_DEFAULT_PHY_DEV_ADDR, ELINK_E2_DEFAULT_PHY_DEV_ADDR, ELINK_ETH_PHY_BASE_T, ELINK_ETH_PHY_KR, ELINK_ETH_PHY_SFPP_10G_FIBER, ELINK_ETH_PHY_XFP_FIBER, ELINK_FLAGS_4_PORT_MODE, ELINK_FLAGS_MDC_MDIO_WA, ELINK_FLAGS_MDC_MDIO_WA_B0, ELINK_FLAGS_WC_DUAL_MODE, elink_get_emac_base(), ELINK_INT_PHY, elink_populate_preemphasis(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, ELINK_SUPPORTED_10000baseKR_Full, ELINK_SUPPORTED_10000baseT_Full, ELINK_SUPPORTED_1000baseKX_Full, ELINK_SUPPORTED_1000baseT_Full, ELINK_SUPPORTED_100baseT_Full, ELINK_SUPPORTED_100baseT_Half, ELINK_SUPPORTED_10baseT_Full, ELINK_SUPPORTED_10baseT_Half, ELINK_SUPPORTED_20000baseKR2_Full, ELINK_SUPPORTED_20000baseMLD2_Full, ELINK_SUPPORTED_Asym_Pause, ELINK_SUPPORTED_Autoneg, ELINK_SUPPORTED_FIBRE, ELINK_SUPPORTED_Pause, ELINK_SWITCH_CFG_10G, ELINK_SWITCH_CFG_1G, elink_phy::flags, elink_phy::mdio_ctrl, elink_phy::media_type, MISC_REG_CHIP_NUM, MISC_REG_CHIP_REV, MISC_REG_PORT4MODE_EN_OVWR, MISC_REG_WC0_CTRL_PHY_ADDR, NIG_REG_SERDES0_CTRL_PHY_ADDR, NIG_REG_XGXS0_CTRL_PHY_ADDR, phy_serdes, phy_warpcore, phy_xgxs, PORT_FEATURE_CONNECTED_SWITCH_MASK, PORT_HW_CFG_NET_SERDES_IF_DXGXS, PORT_HW_CFG_NET_SERDES_IF_KR, PORT_HW_CFG_NET_SERDES_IF_KR2, PORT_HW_CFG_NET_SERDES_IF_MASK, PORT_HW_CFG_NET_SERDES_IF_SFI, PORT_HW_CFG_NET_SERDES_IF_SGMII, PORT_HW_CFG_NET_SERDES_IF_XFI, REG_RD, SHARED_HW_CFG_MDC_MDIO_ACCESS1_BOTH, elink_phy::supported, and USES_WARPCORE.

Referenced by elink_populate_phy().

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◆ elink_populate_phy()

static elink_status_t elink_populate_phy	(	struct bxe_softc *	sc,
		uint8_t	phy_index,
		uint32_t	shmem_base,
		uint32_t	shmem2_base,
		uint8_t	port,
		struct elink_phy *	phy
	)

static

Definition at line 13287 of file bxe_elink.c.

References ELINK_INT_PHY, elink_populate_ext_phy(), elink_populate_int_phy(), ELINK_STATUS_OK, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN, and elink_phy::type.

Referenced by elink_8073_common_init_phy(), elink_8726_common_init_phy(), elink_8727_common_init_phy(), elink_fan_failure_det_req(), elink_init_mod_abs_int(), and elink_phy_probe().

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◆ elink_populate_preemphasis()

static void elink_populate_preemphasis	(	struct bxe_softc *	sc,
		uint32_t	shmem_base,
		struct elink_phy *	phy,
		uint8_t	port,
		uint8_t	phy_index
	)

static

Definition at line 12958 of file bxe_elink.c.

References ELINK_DEBUG_P2, ELINK_EXT_PHY1, ELINK_INT_PHY, REG_RD, elink_phy::rx_preemphasis, and elink_phy::tx_preemphasis.

Referenced by elink_populate_ext_phy(), and elink_populate_int_phy().

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◆ elink_power_sfp_module()

static void elink_power_sfp_module	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	power
	)

static

Definition at line 9511 of file bxe_elink.c.

References elink_8727_power_module(), ELINK_DEBUG_P1, elink_warpcore_power_module(), PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, and elink_phy::type.

Referenced by elink_handle_module_detect_int(), and elink_sfp_module_detection().

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◆ elink_prepare_xgxs()

static elink_status_t elink_prepare_xgxs	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6836 of file bxe_elink.c.

References elink_calc_ieee_aneg_adv(), elink_reset_unicore(), elink_set_aer_mmd(), elink_set_master_ln(), elink_set_swap_lanes(), ELINK_SPEED_10, ELINK_SPEED_100, ELINK_STATUS_OK, elink_vars::ieee_fc, elink_vars::phy_flags, PHY_SGMII_FLAG, PHY_XGXS_FLAG, PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT_SD, PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_phy::req_line_speed, elink_phy::speed_cap_mask, and elink_phy::type.

Referenced by elink_link_initialize().

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◆ elink_program_serdes()

static void elink_program_serdes	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

◆ elink_read_sfp_module_eeprom()

elink_status_t elink_read_sfp_module_eeprom	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	dev_addr,
		uint16_t	addr,
		uint16_t	byte_cnt,
		uint8_t *	o_buf
	)

Definition at line 8976 of file bxe_elink.c.

References addr, elink_8726_read_sfp_module_eeprom(), elink_8727_read_sfp_module_eeprom(), ELINK_DEBUG_P1, ELINK_OP_NOT_SUPPORTED, ELINK_SFP_EEPROM_PAGE_SIZE, ELINK_STATUS_ERROR, elink_warpcore_read_sfp_module_eeprom(), PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, and elink_phy::type.

Referenced by elink_get_edc_mode(), elink_verify_sfp_module(), and elink_wait_for_sfp_module_initialized().

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◆ elink_rearm_latch_signal()

static void elink_rearm_latch_signal	(	struct bxe_softc *	sc,
		uint8_t	port,
		uint8_t	exp_mi_int
	)

static

Definition at line 6950 of file bxe_elink.c.

References elink_bits_dis(), elink_bits_en(), ELINK_DEBUG_P1, ELINK_NIG_STATUS_EMAC0_MI_INT, NIG_REG_LATCH_STATUS_0, NIG_REG_STATUS_INTERRUPT_PORT0, bxe_softc::port, REG_RD, and REG_WR.

Referenced by elink_link_reset(), and elink_link_update().

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◆ elink_reset_unicore()

static elink_status_t elink_reset_unicore	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	set_serdes
	)

static

Definition at line 5729 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, elink_cb_event_log(), ELINK_DEBUG_P0, ELINK_LOG_ID_PHY_UNINITIALIZED, ELINK_MDIO_ACCESS_TIMEOUT, elink_set_serdes_access(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, MDIO_COMBO_IEEE0_MII_CONTROL, MDIO_COMBO_IEEO_MII_CONTROL_RESET, MDIO_REG_BANK_COMBO_IEEE0, elink_params::port, and elink_params::sc.

Referenced by elink_prepare_xgxs().

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◆ elink_restart_autoneg()

static void elink_restart_autoneg	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	enable_cl73
	)

static

Definition at line 6062 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, ELINK_DEBUG_P0, ELINK_DEBUG_P1, MDIO_CL73_IEEEB0_CL73_AN_CONTROL, MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN, MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN, MDIO_COMBO_IEEE0_MII_CONTROL, MDIO_COMBO_IEEO_MII_CONTROL_AN_EN, MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN, MDIO_REG_BANK_CL73_IEEEB0, MDIO_REG_BANK_COMBO_IEEE0, and elink_params::sc.

Referenced by elink_check_fallback_to_cl37(), elink_initialize_sgmii_process(), and elink_xgxs_config_init().

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◆ elink_save_848xx_spirom_version()

static void elink_save_848xx_spirom_version	(	struct elink_phy *	phy,
		struct bxe_softc *	sc,
		uint8_t	port
	)

static

Definition at line 10556 of file bxe_elink.c.

References ARRAY_SIZE, elink_reg_set::devad, elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, elink_is_8483x_8485x(), elink_save_spirom_version(), MDIO_CTL_DEVAD, MDIO_PMA_DEVAD, elink_reg_set::reg, elink_reg_set::val, and elink_phy::ver_addr.

Referenced by elink_848x3_config_init(), and elink_848xx_specific_func().

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◆ elink_save_bcm_spirom_ver()

static void elink_save_bcm_spirom_ver	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	port
	)

static

Definition at line 7975 of file bxe_elink.c.

References elink_cl45_read(), elink_save_spirom_version(), MDIO_PMA_DEVAD, MDIO_PMA_REG_ROM_VER1, MDIO_PMA_REG_ROM_VER2, and elink_phy::ver_addr.

Referenced by elink_8073_8727_external_rom_boot(), elink_8706_config_init(), and elink_8726_external_rom_boot().

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◆ elink_save_spirom_version()

static void elink_save_spirom_version	(	struct bxe_softc *	sc,
		uint8_t	port,
		uint32_t	spirom_ver,
		uint32_t	ver_addr
	)

static

Definition at line 7965 of file bxe_elink.c.

References ELINK_DEBUG_P3, REG_WR, and elink_phy::ver_addr.

Referenced by elink_7101_config_init(), elink_8705_config_init(), elink_save_848xx_spirom_version(), and elink_save_bcm_spirom_ver().

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◆ elink_serdes_deassert()

static void elink_serdes_deassert	(	struct bxe_softc *	sc,
		uint8_t	port
	)

static

Definition at line 4151 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_DEFAULT_PHY_DEV_ADDR, ELINK_SERDES_RESET_BITS, elink_set_serdes_access(), GRCBASE_MISC, MISC_REGISTERS_RESET_REG_3_CLEAR, MISC_REGISTERS_RESET_REG_3_SET, NIG_REG_SERDES0_CTRL_MD_DEVAD, bxe_softc::port, and REG_WR.

Referenced by elink_phy_init().

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◆ elink_set_aer_mmd()

static void elink_set_aer_mmd	(	struct elink_params *	params,
		struct elink_phy *	phy
	)

static

Definition at line 4100 of file bxe_elink.c.

References elink_phy::addr, CHIP_IS_E2, CL22_WR_OVER_CL45, ELINK_FLAGS_WC_DUAL_MODE, elink_get_warpcore_lane(), elink_phy::flags, elink_params::lane_config, MDIO_AER_BLOCK_AER_REG, MDIO_REG_BANK_AER_BLOCK, offset, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, elink_phy::type, and USES_WARPCORE.

Referenced by elink_check_kr2_wa(), elink_handle_module_detect_int(), elink_init_xmac_loopback(), elink_link_reset(), elink_link_update(), elink_period_func(), elink_prepare_xgxs(), elink_set_warpcore_loopback(), elink_set_xgxs_loopback(), elink_warpcore_config_init(), elink_warpcore_enable_AN_KR(), elink_warpcore_link_reset(), elink_warpcore_restart_AN_KR(), elink_warpcore_set_10G_KR(), and elink_warpcore_set_20G_force_KR2().

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◆ elink_set_autoneg()

static void elink_set_autoneg	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	enable_cl73
	)

static

Definition at line 5868 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, ELINK_SPEED_AUTO_NEG, elink_vars::line_speed, MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE, MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN, MDIO_CL73_IEEEB0_CL73_AN_CONTROL, MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN, MDIO_CL73_IEEEB1_AN_ADV2, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4, MDIO_CL73_USERB0_CL73_BAM_CTRL1, MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN, MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN, MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN, MDIO_CL73_USERB0_CL73_UCTRL, MDIO_COMBO_IEEE0_MII_CONTROL, MDIO_COMBO_IEEO_MII_CONTROL_AN_EN, MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN, MDIO_REG_BANK_BAM_NEXT_PAGE, MDIO_REG_BANK_CL73_IEEEB0, MDIO_REG_BANK_CL73_IEEEB1, MDIO_REG_BANK_CL73_USERB0, MDIO_REG_BANK_COMBO_IEEE0, MDIO_REG_BANK_SERDES_DIGITAL, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT, MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, elink_params::sc, and elink_phy::speed_cap_mask.

Referenced by elink_848x3_config_init(), and elink_xgxs_config_init().

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◆ elink_set_bmac_rx()

static void elink_set_bmac_rx	(	struct bxe_softc *	sc,
		uint32_t	chip_id,
		uint8_t	port,
		uint8_t	en
	)

static

Definition at line 3268 of file bxe_elink.c.

References BIGMAC2_REGISTER_BMAC_CONTROL, BIGMAC_REGISTER_BMAC_CONTROL, CHIP_IS_E2, ELINK_BMAC_CONTROL_RX_ENABLE, MISC_REG_RESET_REG_2, MISC_REGISTERS_RESET_REG_2_RST_BMAC0, NIG_REG_BMAC0_REGS_OUT_EN, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, bxe_softc::port, REG_RD, REG_RD_DMAE, and REG_WR_DMAE.

Referenced by elink_lfa_reset(), elink_link_reset(), and elink_update_link_down().

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◆ elink_set_brcm_cl37_advertisement()

static void elink_set_brcm_cl37_advertisement	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 6021 of file bxe_elink.c.

References CL22_WR_OVER_CL45, MDIO_OVER_1G_UP1, MDIO_OVER_1G_UP1_10G, MDIO_OVER_1G_UP1_2_5G, MDIO_OVER_1G_UP3, MDIO_REG_BANK_OVER_1G, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G, elink_params::sc, and elink_phy::speed_cap_mask.

Referenced by elink_xgxs_config_init().

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◆ elink_set_cfg_pin()

static void elink_set_cfg_pin	(	struct bxe_softc *	sc,
		uint32_t	pin_cfg,
		uint32_t	val
	)

static

Definition at line 1143 of file bxe_elink.c.

References elink_cb_gpio_write(), elink_set_epio(), PIN_CFG_EPIO0, PIN_CFG_GPIO0_P0, and PIN_CFG_NA.

Referenced by elink_54618se_config_init(), elink_54618se_link_reset(), elink_bsc_module_sel(), elink_set_e3_module_fault_led(), elink_sfp_e3_set_transmitter(), and elink_warpcore_power_module().

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◆ elink_set_disable_pmd_transmit()

static void elink_set_disable_pmd_transmit	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	pmd_dis
	)

static

Definition at line 8644 of file bxe_elink.c.

References elink_cl45_write(), ELINK_DEBUG_P0, ELINK_FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED, elink_params::feature_config_flags, MDIO_PMA_DEVAD, MDIO_PMA_REG_TX_DISABLE, and elink_params::sc.

Referenced by elink_8727_config_init(), and elink_8727_link_reset().

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◆ elink_set_e1e2_module_fault_led()

static void elink_set_e1e2_module_fault_led	(	struct elink_params *	params,
		uint8_t	gpio_mode
	)

static

Definition at line 9435 of file bxe_elink.c.

References elink_cb_gpio_write(), ELINK_DEBUG_P1, ELINK_DEBUG_P3, elink_get_gpio_port(), elink_params::port, PORT_HW_CFG_FAULT_MODULE_LED_DISABLED, PORT_HW_CFG_FAULT_MODULE_LED_GPIO0, PORT_HW_CFG_FAULT_MODULE_LED_GPIO1, PORT_HW_CFG_FAULT_MODULE_LED_GPIO2, PORT_HW_CFG_FAULT_MODULE_LED_GPIO3, PORT_HW_CFG_FAULT_MODULE_LED_MASK, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_set_sfp_module_fault_led().

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◆ elink_set_e3_module_fault_led()

static void elink_set_e3_module_fault_led	(	struct elink_params *	params,
		uint8_t	gpio_mode
	)

static

Definition at line 9467 of file bxe_elink.c.

References ELINK_DEBUG_P2, elink_set_cfg_pin(), bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_FAULT_MDL_LED_MASK, PORT_HW_CFG_E3_FAULT_MDL_LED_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_set_sfp_module_fault_led(), and elink_sfp_tx_fault_detection().

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◆ elink_set_epio()

static void elink_set_epio	(	struct bxe_softc *	sc,
		uint32_t	epio_pin,
		uint32_t	en
	)

static

Definition at line 1118 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_DEBUG_P2, MCP_REG_MCPR_GP_OENABLE, MCP_REG_MCPR_GP_OUTPUTS, REG_RD, and REG_WR.

Referenced by elink_set_cfg_pin().

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◆ elink_set_gmii_tx_driver()

static void elink_set_gmii_tx_driver ( struct elink_params * params )

static

Definition at line 6677 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, ELINK_INT_PHY, MDIO_OVER_1G_LP_UP2, MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK, MDIO_OVER_1G_LP_UP2_PREEMPHASIS_SHIFT, MDIO_REG_BANK_OVER_1G, MDIO_REG_BANK_TX0, MDIO_REG_BANK_TX1, MDIO_REG_BANK_TX3, MDIO_TX0_TX_DRIVER, MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK, MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT, elink_params::phy, and elink_params::sc.

Referenced by elink_update_link_up().

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◆ elink_set_ieee_aneg_advertisement()

static void elink_set_ieee_aneg_advertisement	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t	ieee_fc
	)

static

Definition at line 6041 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, MDIO_CL73_IEEEB1_AN_ADV1, MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK, MDIO_COMBO_IEEE0_AUTO_NEG_ADV, MDIO_REG_BANK_CL73_IEEEB1, MDIO_REG_BANK_COMBO_IEEE0, and elink_params::sc.

Referenced by elink_xgxs_config_init().

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◆ elink_set_led()

elink_status_t elink_set_led	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	mode,
		uint32_t	speed
	)

Definition at line 7165 of file bxe_elink.c.

References CHIP_IS_E1, CHIP_IS_E1x, CHIP_IS_E2, CHIP_IS_E3, elink_cb_reg_read(), elink_cb_reg_write(), ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_EXT_PHY1, ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC, ELINK_LED_MODE_FRONT_PANEL_OFF, ELINK_LED_MODE_OFF, ELINK_LED_MODE_ON, ELINK_LED_MODE_OPER, ELINK_MAX_PHYS, ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_2500, ELINK_STATUS_ERROR, ELINK_STATUS_OK, EMAC_LED_1000MB_OVERRIDE, EMAC_LED_100MB_OVERRIDE, EMAC_LED_10MB_OVERRIDE, EMAC_LED_OVERRIDE, EMAC_REG_EMAC_LED, elink_params::feature_config_flags, GRCBASE_EMAC0, GRCBASE_EMAC1, elink_params::hw_led_mode, LED_BLINK_RATE_VAL_E1X_E2, LED_BLINK_RATE_VAL_E3, elink_vars::link_up, NIG_REG_LED_10G_P0, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0, NIG_REG_LED_CONTROL_BLINK_RATE_P0, NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0, NIG_REG_LED_CONTROL_TRAFFIC_P0, NIG_REG_LED_MODE_P0, elink_params::num_phys, elink_params::phy, bxe_softc::port, elink_params::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, REG_WR, elink_params::sc, elink_phy::set_link_led, SHARED_HW_CFG_LED_EXTPHY2, SHARED_HW_CFG_LED_MAC1, SHARED_HW_CFG_LED_MODE_SHIFT, SHARED_HW_CFG_LED_PHY1, and elink_phy::type.

Referenced by elink_analyze_link_error(), elink_emac_program(), elink_init_xgxs_loopback(), elink_link_reset(), elink_update_link_down(), and elink_update_link_up().

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◆ elink_set_limiting_mode()

static void elink_set_limiting_mode	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint16_t	edc_mode
	)

static

Definition at line 9570 of file bxe_elink.c.

References elink_8726_set_limiting_mode(), elink_8727_set_limiting_mode(), elink_warpcore_set_limiting_mode(), PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, and elink_phy::type.

Referenced by elink_sfp_module_detection().

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◆ elink_set_master_ln()

static void elink_set_master_ln	(	struct elink_params *	params,
		struct elink_phy *	phy
	)

static

Definition at line 5708 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, elink_params::lane_config, MDIO_REG_BANK_XGXS_BLOCK2, MDIO_XGXS_BLOCK2_TEST_MODE_LANE, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT, and elink_params::sc.

Referenced by elink_prepare_xgxs().

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◆ elink_set_mdio_clk()

static void elink_set_mdio_clk	(	struct bxe_softc *	sc,
		uint32_t	chip_id,
		uint32_t	emac_base
	)

static

Definition at line 2200 of file bxe_elink.c.

References ELINK_DEBUG_P2, EMAC_MDIO_MODE_AUTO_POLL, EMAC_MDIO_MODE_CLAUSE_45, EMAC_MDIO_MODE_CLOCK_CNT, EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT, EMAC_REG_EMAC_MDIO_MODE, REG_RD, REG_WR, and USES_WARPCORE.

Referenced by elink_cl45_read(), elink_cl45_write(), elink_common_init_phy(), and elink_set_mdio_emac_per_phy().

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◆ elink_set_mdio_emac_per_phy()

static void elink_set_mdio_emac_per_phy	(	struct bxe_softc *	sc,
		struct elink_params *	params
	)

static

Definition at line 2243 of file bxe_elink.c.

References elink_params::chip_id, ELINK_INT_PHY, elink_set_mdio_clk(), elink_phy::mdio_ctrl, elink_params::num_phys, and elink_params::phy.

Referenced by elink_avoid_link_flap(), elink_emac_init(), elink_handle_module_detect_int(), elink_link_reset(), and elink_warpcore_link_reset().

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◆ elink_set_parallel_detection()

static void elink_set_parallel_detection	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5815 of file bxe_elink.c.

References CL22_RD_OVER_CL45, CL22_WR_OVER_CL45, ELINK_DEBUG_P0, ELINK_DEBUG_P2, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK, MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT, MDIO_REG_BANK_10G_PARALLEL_DETECT, MDIO_REG_BANK_SERDES_DIGITAL, MDIO_REG_BANK_XGXS_BLOCK2, MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN, MDIO_XGXS_BLOCK2_UNICORE_MODE_10G, MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS, MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, elink_phy::speed_cap_mask, and elink_phy::type.

Referenced by elink_link_initialize().

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◆ elink_set_preemphasis()

static void elink_set_preemphasis	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 6763 of file bxe_elink.c.

References CL22_WR_OVER_CL45, MDIO_REG_BANK_RX0, MDIO_REG_BANK_RX1, MDIO_REG_BANK_RX3, MDIO_REG_BANK_TX0, MDIO_REG_BANK_TX1, MDIO_REG_BANK_TX3, MDIO_RX0_RX_EQ_BOOST, MDIO_TX0_TX_DRIVER, elink_phy::rx_preemphasis, elink_params::sc, and elink_phy::tx_preemphasis.

Referenced by elink_xgxs_config_init().

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◆ elink_set_rx_filter()

void elink_set_rx_filter	(	struct elink_params *	params,
		uint8_t	en
	)

Definition at line 13803 of file bxe_elink.c.

References CHIP_IS_E1, CHIP_IS_E1x, NIG_REG_LLH0_BRB1_DRV_MASK, NIG_REG_LLH0_BRB1_DRV_MASK_MF, NIG_REG_LLH0_BRB1_NOT_MCP, NIG_REG_LLH1_BRB1_NOT_MCP, elink_params::port, REG_WR, and elink_params::sc.

Referenced by bxe_prev_unload_common(), elink_lfa_reset(), and elink_phy_init().

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◆ elink_set_serdes_access()

static void elink_set_serdes_access	(	struct bxe_softc *	sc,
		uint8_t	port
	)

static

Definition at line 4137 of file bxe_elink.c.

References EMAC_REG_EMAC_MDIO_COMM, GRCBASE_EMAC0, GRCBASE_EMAC1, NIG_REG_SERDES0_CTRL_MD_ST, bxe_softc::port, and REG_WR.

Referenced by elink_reset_unicore(), and elink_serdes_deassert().

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◆ elink_set_sfp_module_fault_led()

static void elink_set_sfp_module_fault_led	(	struct elink_params *	params,
		uint8_t	gpio_mode
	)

static

Definition at line 9483 of file bxe_elink.c.

References CHIP_IS_E3, ELINK_DEBUG_P1, elink_set_e1e2_module_fault_led(), elink_set_e3_module_fault_led(), and elink_params::sc.

Referenced by elink_handle_module_detect_int(), and elink_sfp_module_detection().

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◆ elink_set_swap_lanes()

static void elink_set_swap_lanes	(	struct elink_params *	params,
		struct elink_phy *	phy
	)

static

Definition at line 5773 of file bxe_elink.c.

References CL22_WR_OVER_CL45, elink_params::lane_config, MDIO_REG_BANK_XGXS_BLOCK2, MDIO_XGXS_BLOCK2_RX_LN_SWAP, MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE, MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE, MDIO_XGXS_BLOCK2_TX_LN_SWAP, MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE, PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK, PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT, PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK, PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT, and elink_params::sc.

Referenced by elink_prepare_xgxs().

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◆ elink_set_umac_rxtx()

static void elink_set_umac_rxtx	(	struct elink_params *	params,
		uint8_t	en
	)

static

Definition at line 2314 of file bxe_elink.c.

References GRCBASE_UMAC0, GRCBASE_UMAC1, MISC_REG_RESET_REG_2, MISC_REGISTERS_RESET_REG_2_UMAC0, elink_params::port, REG_RD, REG_WR, elink_params::sc, UMAC_COMMAND_CONFIG_REG_RX_ENA, UMAC_COMMAND_CONFIG_REG_TX_ENA, and UMAC_REG_COMMAND_CONFIG.

Referenced by elink_lfa_reset(), elink_link_reset(), and elink_update_link_down().

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◆ elink_set_warpcore_loopback()

static void elink_set_warpcore_loopback	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5489 of file bxe_elink.c.

References CL22_WR_OVER_CL45, elink_cl45_read(), elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P2, ELINK_FLAGS_WC_DUAL_MODE, elink_get_warpcore_lane(), elink_set_aer_mmd(), ELINK_SPEED_10000, ELINK_SUPPORTED_20000baseKR2_Full, elink_phy::flags, elink_params::loopback_mode, MDIO_AER_BLOCK_AER_REG, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, MDIO_WC_REG_XGXSBLK1_LANECTRL2, elink_phy::req_line_speed, elink_params::sc, and elink_phy::supported.

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◆ elink_set_xgxs_loopback()

static void elink_set_xgxs_loopback	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 7110 of file bxe_elink.c.

References CHIP_IS_E3, elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P0, elink_set_aer_mmd(), ELINK_SPEED_1000, MDIO_AER_BLOCK_AER_REG, MDIO_CL73_IEEEB0_CL73_AN_CONTROL, MDIO_COMBO_IEEE0_MII_CONTROL, MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK, MDIO_REG_BANK_AER_BLOCK, MDIO_REG_BANK_CL73_IEEEB0, MDIO_REG_BANK_COMBO_IEEE0, NIG_REG_XGXS0_CTRL_MD_DEVAD, bxe_softc::port, elink_params::port, REG_RD, REG_WR, elink_phy::req_line_speed, and elink_params::sc.

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◆ elink_set_xmac_rxtx()

static void elink_set_xmac_rxtx	(	struct elink_params *	params,
		uint8_t	en
	)

static

Definition at line 2494 of file bxe_elink.c.

References ELINK_DEBUG_P1, GRCBASE_XMAC0, GRCBASE_XMAC1, MISC_REG_RESET_REG_2, MISC_REGISTERS_RESET_REG_2_XMAC, bxe_softc::port, elink_params::port, REG_RD, REG_WR, elink_params::sc, XMAC_CTRL_REG_RX_EN, XMAC_CTRL_REG_TX_EN, XMAC_REG_CTRL, and XMAC_REG_PFC_CTRL_HI.

Referenced by elink_lfa_reset(), elink_link_reset(), and elink_update_link_down().

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◆ elink_set_xumac_nig()

static void elink_set_xumac_nig	(	struct elink_params *	params,
		uint16_t	tx_pause_en,
		uint8_t	enable
	)

static

Definition at line 2300 of file bxe_elink.c.

References NIG_REG_P0_MAC_IN_EN, NIG_REG_P0_MAC_OUT_EN, NIG_REG_P0_MAC_PAUSE_OUT_EN, NIG_REG_P1_MAC_IN_EN, NIG_REG_P1_MAC_OUT_EN, NIG_REG_P1_MAC_PAUSE_OUT_EN, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_link_reset(), elink_umac_enable(), and elink_xmac_enable().

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◆ elink_sfp_e1e2_set_transmitter()

static void elink_sfp_e1e2_set_transmitter	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	tx_en
	)

static

Definition at line 8681 of file bxe_elink.c.

References elink_cb_gpio_write(), elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P1, ELINK_DEBUG_P3, elink_get_gpio_port(), MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, MISC_REGISTERS_GPIO_OUTPUT_HIGH, MISC_REGISTERS_GPIO_OUTPUT_LOW, bxe_softc::port, elink_params::port, PORT_HW_CFG_TX_LASER_GPIO0, PORT_HW_CFG_TX_LASER_GPIO1, PORT_HW_CFG_TX_LASER_GPIO2, PORT_HW_CFG_TX_LASER_GPIO3, PORT_HW_CFG_TX_LASER_MASK, PORT_HW_CFG_TX_LASER_MDIO, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_sfp_set_transmitter().

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◆ elink_sfp_e3_set_transmitter()

static void elink_sfp_e3_set_transmitter	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	tx_en
	)

static

Definition at line 5305 of file bxe_elink.c.

References ELINK_DEBUG_P1, elink_set_cfg_pin(), bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_TX_LASER_MASK, PORT_HW_CFG_SPEED_CAPABILITY_D0_20G, REG_RD, elink_params::sc, elink_params::shmem_base, and elink_phy::speed_cap_mask.

Referenced by elink_sfp_set_transmitter(), elink_warpcore_config_init(), and elink_warpcore_link_reset().

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◆ elink_sfp_mask_fault()

static void elink_sfp_mask_fault	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	alarm_status_offset,
		uint16_t	alarm_ctrl_offset
	)

static

Definition at line 9715 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), and MDIO_PMA_DEVAD.

Referenced by elink_8706_8726_read_status(), and elink_8727_read_status().

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◆ elink_sfp_module_detection()

elink_status_t elink_sfp_module_detection	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9588 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_DEBUG_P1, elink_get_edc_mode(), elink_power_sfp_module(), elink_set_limiting_mode(), elink_set_sfp_module_fault_led(), elink_sfp_set_transmitter(), ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_verify_sfp_module(), MISC_REGISTERS_GPIO_HIGH, MISC_REGISTERS_GPIO_LOW, elink_params::port, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_8726_config_init(), elink_8727_handle_mod_abs(), elink_handle_module_detect_int(), and elink_warpcore_config_init().

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◆ elink_sfp_set_transmitter()

static void elink_sfp_set_transmitter	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint8_t	tx_en
	)

static

Definition at line 8738 of file bxe_elink.c.

References CHIP_IS_E3, ELINK_DEBUG_P1, elink_sfp_e1e2_set_transmitter(), elink_sfp_e3_set_transmitter(), and elink_params::sc.

Referenced by elink_8727_handle_mod_abs(), elink_8727_link_reset(), elink_8727_read_status(), elink_8727_specific_func(), elink_get_edc_mode(), elink_handle_module_detect_int(), and elink_sfp_module_detection().

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◆ elink_sfp_tx_fault_detection()

static void elink_sfp_tx_fault_detection	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 14838 of file bxe_elink.c.

References elink_analyze_link_error(), ELINK_DEBUG_P1, ELINK_FLAGS_SFP_NOT_APPROVED, elink_get_cfg_pin(), elink_set_e3_module_fault_led(), elink_phy::flags, elink_vars::link_status, LINK_STATUS_SFP_TX_FAULT, MISC_REGISTERS_GPIO_HIGH, MISC_REGISTERS_GPIO_LOW, elink_vars::phy_flags, PHY_SFP_TX_FAULT_FLAG, bxe_softc::port, elink_params::port, PORT_HW_CFG_E3_TX_FAULT_MASK, PORT_HW_CFG_E3_TX_FAULT_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_period_func().

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◆ elink_sfx7101_sp_sw_reset()

void elink_sfx7101_sp_sw_reset	(	struct bxe_softc *	sc,
		struct elink_phy *	phy
	)

Definition at line 12363 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), MDIO_PMA_DEVAD, and MDIO_PMA_REG_7101_RESET.

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◆ elink_sync_link()

static void elink_sync_link	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 5534 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, DUPLEX_HALF, ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_FLOW_CTRL_NONE, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, ELINK_LINK_1000TFD, ELINK_LINK_1000THD, ELINK_LINK_100T4, ELINK_LINK_100TXFD, ELINK_LINK_100TXHD, ELINK_LINK_10GTFD, ELINK_LINK_10TFD, ELINK_LINK_10THD, ELINK_LINK_20GTFD, ELINK_LINK_2500TFD, ELINK_LINK_2500THD, ELINK_MAC_TYPE_BMAC, ELINK_MAC_TYPE_EMAC, ELINK_MAC_TYPE_NONE, ELINK_MAC_TYPE_UMAC, ELINK_MAC_TYPE_XMAC, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_20000, ELINK_SPEED_2500, elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_LINK_UP, LINK_STATUS_PHYSICAL_LINK_FLAG, LINK_STATUS_RX_FLOW_CONTROL_ENABLED, LINK_STATUS_SFP_TX_FAULT, LINK_STATUS_SPEED_AND_DUPLEX_MASK, LINK_STATUS_TX_FLOW_CONTROL_ENABLED, elink_vars::link_up, elink_vars::mac_type, elink_vars::phy_flags, PHY_HALF_OPEN_CONN_FLAG, elink_vars::phy_link_up, PHY_PHYSICAL_LINK_FLAG, PHY_SFP_TX_FAULT_FLAG, PHY_SGMII_FLAG, elink_params::sc, and USES_WARPCORE.

Referenced by elink_analyze_link_error(), and elink_link_status_update().

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◆ elink_test_link()

elink_status_t elink_test_link	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_serdes
	)

◆ elink_umac_enable()

static void elink_umac_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	lb
	)

static

Definition at line 2333 of file bxe_elink.c.

Referenced by elink_avoid_link_flap(), elink_init_umac_loopback(), elink_init_xgxs_loopback(), and elink_update_link_up().

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◆ elink_update_adv_fc()

static void elink_update_adv_fc	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	gp_status
	)

static

Definition at line 6208 of file bxe_elink.c.

References CL22_RD_OVER_CL45, ELINK_DEBUG_P1, elink_pause_resolve(), MDIO_CL73_IEEEB1_AN_ADV1, MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK, MDIO_CL73_IEEEB1_AN_LP_ADV1, MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK, MDIO_COMBO_IEEE0_AUTO_NEG_ADV, MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK, MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1, MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE, MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE, MDIO_REG_BANK_CL73_IEEEB1, MDIO_REG_BANK_COMBO_IEEE0, and elink_params::sc.

Referenced by elink_flow_ctrl_resolve().

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◆ elink_update_link_attr()

static void elink_update_link_attr	(	struct elink_params *	params,
		uint32_t	link_attr
	)

static

Definition at line 4453 of file bxe_elink.c.

References elink_params::port, REG_WR, elink_params::sc, elink_params::shmem2_base, and SHMEM2_HAS.

Referenced by elink_848x3_config_init(), elink_disable_kr2(), elink_get_edc_mode(), and elink_warpcore_enable_AN_KR2().

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◆ elink_update_link_down()

static elink_status_t elink_update_link_down	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 7512 of file bxe_elink.c.

References elink_params::chip_id, CHIP_IS_E1x, CHIP_IS_E2, CHIP_IS_E3, elink_vars::eee_status, ELINK_DEBUG_P1, ELINK_LED_MODE_OFF, ELINK_MAC_TYPE_NONE, elink_set_bmac_rx(), elink_set_led(), elink_set_umac_rxtx(), elink_set_xmac_rxtx(), ELINK_STATUS_OK, elink_update_mng(), elink_update_mng_eee(), elink_vars::line_speed, elink_vars::link_status, elink_vars::mac_type, MISC_REG_CPMU_LP_FW_ENABLE_P0, MISC_REG_CPMU_LP_MASK_ENT_P0, NIG_REG_EGRESS_DRAIN0_MODE, NIG_REG_NIG_EMAC0_EN, elink_vars::phy_flags, bxe_softc::port, elink_params::port, REG_WR, elink_params::sc, SHMEM_EEE_ACTIVE_BIT, and SHMEM_EEE_LP_ADV_STATUS_MASK.

Referenced by elink_link_update().

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◆ elink_update_link_up()

static elink_status_t elink_update_link_up	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	link_10g
	)

static

Definition at line 7559 of file bxe_elink.c.

References CHIP_IS_E1x, CHIP_IS_E2, elink_vars::eee_status, elink_bmac_enable(), elink_check_half_open_conn(), ELINK_DEBUG_P0, elink_emac_enable(), elink_emac_program(), ELINK_FLAGS_TX_ERROR_CHECK, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, ELINK_INT_PHY, ELINK_LED_MODE_OPER, ELINK_MAX_PHYS, elink_pbf_update(), elink_set_gmii_tx_driver(), elink_set_led(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_10000, ELINK_STATUS_NO_LINK, ELINK_STATUS_OK, elink_umac_enable(), elink_update_mng(), elink_update_mng_eee(), elink_xmac_enable(), elink_phy::flags, elink_vars::flow_ctrl, elink_vars::line_speed, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_LINK_UP, LINK_STATUS_PHYSICAL_LINK_FLAG, LINK_STATUS_RX_FLOW_CONTROL_ENABLED, LINK_STATUS_TX_FLOW_CONTROL_ENABLED, elink_vars::link_up, MISC_REG_CPMU_LP_DR_ENABLE, MISC_REG_CPMU_LP_FW_ENABLE_P0, MISC_REG_CPMU_LP_MASK_ENT_P0, NIG_REG_EGRESS_DRAIN0_MODE, elink_params::phy, elink_vars::phy_flags, PHY_HALF_OPEN_CONN_FLAG, PHY_PHYSICAL_LINK_FLAG, PHY_SGMII_FLAG, bxe_softc::port, elink_params::port, REG_WR, elink_params::sc, SHMEM_EEE_ACTIVE_BIT, SHMEM_EEE_LPI_REQUESTED_BIT, and USES_WARPCORE.

Referenced by elink_link_update().

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◆ elink_update_mng()

static void elink_update_mng	(	struct elink_params *	params,
		uint32_t	link_status
	)

static

Definition at line 2926 of file bxe_elink.c.

References elink_params::port, REG_WR, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_analyze_link_error(), elink_hw_reset_phy(), elink_link_reset(), elink_period_func(), elink_phy_init(), elink_update_link_down(), elink_update_link_up(), and elink_update_pfc().

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◆ elink_update_mng_eee()

static void elink_update_mng_eee	(	struct elink_params *	params,
		uint32_t	eee_status
	)

static

Definition at line 3824 of file bxe_elink.c.

References elink_eee_has_cap(), elink_params::port, REG_WR, elink_params::sc, and elink_params::shmem2_base.

Referenced by elink_link_reset(), elink_phy_init(), elink_update_link_down(), and elink_update_link_up().

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◆ elink_update_pfc()

elink_status_t elink_update_pfc	(	struct elink_params *	params,
		struct elink_vars *	vars,
		struct elink_nig_brb_pfc_port_params *	pfc_params
	)

◆ elink_update_pfc_bmac1()

static void elink_update_pfc_bmac1	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 2764 of file bxe_elink.c.

References BIGMAC_REGISTER_RX_CONTROL, BIGMAC_REGISTER_TX_CONTROL, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, elink_params::feature_config_flags, elink_vars::flow_ctrl, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, elink_params::port, REG_WR_DMAE, and elink_params::sc.

Referenced by elink_bmac1_enable(), and elink_update_pfc().

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◆ elink_update_pfc_bmac2()

static void elink_update_pfc_bmac2	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_lb
	)

static

Definition at line 2793 of file bxe_elink.c.

References BIGMAC2_REGISTER_BMAC_CONTROL, BIGMAC2_REGISTER_PFC_CONTROL, BIGMAC2_REGISTER_RX_CONTROL, BIGMAC2_REGISTER_TX_CONTROL, BIGMAC2_REGISTER_TX_PAUSE_CONTROL, ELINK_DEBUG_P0, ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, elink_params::feature_config_flags, elink_vars::flow_ctrl, NIG_REG_INGRESS_BMAC0_MEM, NIG_REG_INGRESS_BMAC1_MEM, elink_params::port, REG_WR_DMAE, and elink_params::sc.

Referenced by elink_bmac2_enable(), and elink_update_pfc().

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◆ elink_update_pfc_nig()

static void elink_update_pfc_nig	(	struct elink_params *	params,
		struct elink_vars *	vars,
		struct elink_nig_brb_pfc_port_params *	nig_params
	)

static

Definition at line 2935 of file bxe_elink.c.

Referenced by elink_update_pfc().

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◆ elink_update_pfc_xmac()

static void elink_update_pfc_xmac	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	is_lb
	)

static

Definition at line 2086 of file bxe_elink.c.

References ELINK_FEATURE_CONFIG_PFC_ENABLED, ELINK_FLOW_CTRL_RX, ELINK_FLOW_CTRL_TX, elink_params::feature_config_flags, elink_vars::flow_ctrl, GRCBASE_XMAC0, GRCBASE_XMAC1, elink_params::mac_addr, elink_params::port, REG_WR, elink_params::sc, XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN, XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN, XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON, XMAC_PFC_CTRL_HI_REG_PFC_REFRESH_EN, XMAC_PFC_CTRL_HI_REG_PFC_STATS_EN, XMAC_PFC_CTRL_HI_REG_RX_PFC_EN, XMAC_PFC_CTRL_HI_REG_TX_PFC_EN, XMAC_REG_CTRL_SA_HI, XMAC_REG_CTRL_SA_LO, XMAC_REG_PAUSE_CTRL, XMAC_REG_PFC_CTRL, and XMAC_REG_PFC_CTRL_HI.

Referenced by elink_update_pfc(), and elink_xmac_enable().

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◆ elink_verify_sfp_module()

static elink_status_t elink_verify_sfp_module	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9166 of file bxe_elink.c.

References elink_phy::addr, DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL, DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL, elink_cb_event_log(), elink_cb_fw_command(), ELINK_DEBUG_P0, ELINK_DUAL_MEDIA, ELINK_FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY, ELINK_FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY, ELINK_FLAGS_SFP_NOT_APPROVED, ELINK_FW_PARAM_SET, ELINK_I2C_DEV_ADDR_A0, ELINK_LOG_ID_UNQUAL_IO_MODULE, elink_read_sfp_module_eeprom(), ELINK_SFP_EEPROM_PART_NO_ADDR, ELINK_SFP_EEPROM_PART_NO_SIZE, ELINK_SFP_EEPROM_VENDOR_NAME_ADDR, ELINK_SFP_EEPROM_VENDOR_NAME_SIZE, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_params::feature_config_flags, elink_phy::flags, FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS, elink_phy::mdio_ctrl, elink_params::port, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_NO_ENFORCEMENT, PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_WARNING_MSG, REG_RD, elink_params::sc, elink_params::shmem_base, and elink_phy::type.

Referenced by elink_avoid_link_flap(), and elink_sfp_module_detection().

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◆ elink_wait_for_sfp_module_initialized()

static elink_status_t elink_wait_for_sfp_module_initialized	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9240 of file bxe_elink.c.

References ELINK_DEBUG_P1, ELINK_I2C_DEV_ADDR_A0, elink_read_sfp_module_eeprom(), ELINK_STATUS_OK, elink_warpcore_read_sfp_module_eeprom(), PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, elink_params::sc, and elink_phy::type.

Referenced by elink_8727_handle_mod_abs(), and elink_handle_module_detect_int().

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◆ elink_wait_reset_complete()

static uint16_t elink_wait_reset_complete	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 6875 of file bxe_elink.c.

References elink_cb_event_log(), elink_cl22_read(), elink_cl45_read(), ELINK_DEBUG_P2, ELINK_LOG_ID_PHY_UNINITIALIZED, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, elink_params::port, PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE, and elink_phy::type.

Referenced by elink_54618se_config_init(), elink_7101_config_init(), elink_8481_config_init(), elink_848x3_config_init(), elink_8705_config_init(), elink_8706_config_init(), elink_8726_config_init(), and elink_8727_config_init().

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◆ elink_warpcore_clear_regs()

static void elink_warpcore_clear_regs	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint16_t	lane
	)

static

Definition at line 5128 of file bxe_elink.c.

References ARRAY_SIZE, elink_reg_set::devad, elink_cl45_read_or_write(), elink_cl45_write(), elink_get_warpcore_lane(), MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, MDIO_WC_REG_DIGITAL4_MISC3, MDIO_WC_REG_FX100_CTRL1, MDIO_WC_REG_FX100_CTRL3, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_RX66_CONTROL, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, MDIO_WC_REG_SERDESDIGITAL_MISC1, MDIO_WC_REG_TX0_TX_DRIVER, MDIO_WC_REG_TX_FIR_TAP, elink_reg_set::reg, elink_params::sc, and elink_reg_set::val.

Referenced by elink_warpcore_config_init(), and elink_warpcore_config_sfi().

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◆ elink_warpcore_config_init()

static void elink_warpcore_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 5326 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_DEBUG_P2, elink_get_warpcore_lane(), elink_is_sfp_module_plugged(), ELINK_LOOPBACK_EXT, ELINK_LOOPBACK_NONE, elink_set_aer_mmd(), elink_sfp_e3_set_transmitter(), elink_sfp_module_detection(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_10000, ELINK_SPEED_20000, elink_warpcore_clear_regs(), elink_warpcore_config_sfi(), elink_warpcore_enable_AN_KR(), elink_warpcore_reset_lane(), elink_warpcore_set_10G_KR(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_20G_DXGXS(), elink_warpcore_set_20G_force_KR2(), elink_warpcore_set_sgmii_speed(), elink_vars::line_speed, elink_params::loopback_mode, elink_vars::phy_flags, PHY_SGMII_FLAG, PHY_XGXS_FLAG, elink_params::port, PORT_HW_CFG_NET_SERDES_IF_DXGXS, PORT_HW_CFG_NET_SERDES_IF_KR, PORT_HW_CFG_NET_SERDES_IF_KR2, PORT_HW_CFG_NET_SERDES_IF_MASK, PORT_HW_CFG_NET_SERDES_IF_SFI, PORT_HW_CFG_NET_SERDES_IF_SGMII, PORT_HW_CFG_NET_SERDES_IF_XFI, REG_RD, elink_phy::req_line_speed, elink_params::sc, and elink_params::shmem_base.

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◆ elink_warpcore_config_runtime()

static void elink_warpcore_config_runtime	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 5235 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_DEBUG_P1, elink_get_warpcore_lane(), elink_warpcore_reset_lane(), MDIO_AN_DEVAD, MDIO_WC_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, elink_params::port, PORT_HW_CFG_NET_SERDES_IF_KR, PORT_HW_CFG_NET_SERDES_IF_MASK, REG_RD, elink_vars::rx_tx_asic_rst, elink_params::sc, elink_params::shmem_base, and elink_vars::turn_to_run_wc_rt.

Referenced by elink_period_func().

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◆ elink_warpcore_config_sfi()

static void elink_warpcore_config_sfi	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5288 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_ETH_PHY_SFP_1G_FIBER, elink_get_warpcore_lane(), ELINK_INT_PHY, ELINK_LINK_CONFIG_IDX, ELINK_SPEED_10000, elink_warpcore_clear_regs(), elink_warpcore_set_10G_XFI(), elink_warpcore_set_sgmii_speed(), elink_phy::media_type, elink_params::req_line_speed, and elink_params::sc.

Referenced by elink_handle_module_detect_int(), and elink_warpcore_config_init().

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◆ elink_warpcore_enable_AN_KR()

static void elink_warpcore_enable_AN_KR	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4564 of file bxe_elink.c.

References addr, ARRAY_SIZE, CL22_WR_OVER_CL45, elink_reg_set::devad, elink_cl45_read(), elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_disable_kr2(), elink_ext_phy_set_pause(), ELINK_FLAGS_WC_DUAL_MODE, elink_get_warpcore_lane(), elink_set_aer_mmd(), ELINK_SPEED_1000, ELINK_SPEED_10000, ELINK_SPEED_20000, ELINK_SPEED_AUTO_NEG, elink_warpcore_enable_AN_KR2(), elink_warpcore_restart_AN_KR(), elink_phy::flags, elink_vars::line_speed, MAX_KR_LINK_RETRY, MDIO_AER_BLOCK_AER_REG, MDIO_AN_DEVAD, MDIO_PMA_DEVAD, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY, MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2, MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, MDIO_WC_REG_CL72_USERB0_CL72_OS_DEF_CTRL, MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP, MDIO_WC_REG_DIGITAL3_UP1, MDIO_WC_REG_DIGITAL5_MISC7, MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_PAR_DET_10G_CTRL, MDIO_WC_REG_PMD_KR_CONTROL, MDIO_WC_REG_RX0_PCI_CTRL, MDIO_WC_REG_RX1_PCI_CTRL, MDIO_WC_REG_RX66_CONTROL, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, MDIO_WC_REG_SERDESDIGITAL_MISC2, MDIO_WC_REG_TX0_TX_DRIVER, MDIO_WC_REG_XGXS_X2_CONTROL3, elink_params::port, PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G, PORT_HW_CFG_SPEED_CAPABILITY_D0_1G, PORT_HW_CFG_SPEED_CAPABILITY_D0_20G, elink_reg_set::reg, REG_RD, elink_phy::req_line_speed, elink_vars::rx_tx_asic_rst, elink_params::sc, SHARED_HW_CFG_RX_LANE0_POL_FLIP_ENABLED, elink_params::shmem_base, elink_phy::speed_cap_mask, elink_reg_set::val, and WC_TX_DRIVER.

Referenced by elink_warpcore_config_init().

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◆ elink_warpcore_enable_AN_KR2()

static void elink_warpcore_enable_AN_KR2	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4463 of file bxe_elink.c.

References ARRAY_SIZE, elink_reg_set::devad, elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P0, elink_update_link_attr(), elink_params::link_attr_sync, LINK_ATTR_SYNC_KR2_ENABLE, MDIO_WC_DEVAD, MDIO_WC_REG_CL49_USERB0_CTRL, MDIO_WC_REG_CL73_BAM_CODE_FIELD, MDIO_WC_REG_CL73_BAM_CTRL1, MDIO_WC_REG_CL73_BAM_CTRL3, MDIO_WC_REG_CL73_USERB0_CTRL, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, MDIO_WC_REG_CL82_USERB1_RX_CTRL11, MDIO_WC_REG_CL82_USERB1_TX_CTRL5, MDIO_WC_REG_CL82_USERB1_TX_CTRL6, MDIO_WC_REG_CL82_USERB1_TX_CTRL7, MDIO_WC_REG_CL82_USERB1_TX_CTRL9, MDIO_WC_REG_ETA_CL73_LD_BAM_CODE, MDIO_WC_REG_ETA_CL73_LD_UD_CODE, MDIO_WC_REG_ETA_CL73_OUI1, MDIO_WC_REG_ETA_CL73_OUI2, MDIO_WC_REG_ETA_CL73_OUI3, elink_reg_set::reg, elink_params::sc, and elink_reg_set::val.

Referenced by elink_kr2_recovery(), and elink_warpcore_enable_AN_KR().

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◆ elink_warpcore_get_sigdet()

static int elink_warpcore_get_sigdet	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5221 of file bxe_elink.c.

References elink_cl45_read(), elink_get_warpcore_lane(), MDIO_WC_DEVAD, MDIO_WC_REG_GP2_STATUS_GP_2_0, and elink_params::sc.

Referenced by elink_check_kr2_wa().

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◆ elink_warpcore_hw_reset()

static void elink_warpcore_hw_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 9497 of file bxe_elink.c.

References elink_warpcore_power_module(), MISC_REG_LCPLL_E40_PWRDWN, MISC_REG_LCPLL_E40_RESETB_ANA, MISC_REG_LCPLL_E40_RESETB_DIG, MISC_REG_WC0_RESET, REG_WR, and elink_params::sc.

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◆ elink_warpcore_link_reset()

static void elink_warpcore_link_reset	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 5434 of file bxe_elink.c.

References CL22_WR_OVER_CL45, elink_cl45_read(), elink_cl45_read_and_write(), elink_cl45_write(), ELINK_FLAGS_WC_DUAL_MODE, elink_get_warpcore_lane(), elink_set_aer_mmd(), elink_set_mdio_emac_per_phy(), elink_sfp_e3_set_transmitter(), elink_warpcore_reset_lane(), elink_phy::flags, MDIO_AER_BLOCK_AER_REG, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, MDIO_WC_REG_XGXSBLK1_LANECTRL0, MDIO_WC_REG_XGXSBLK1_LANECTRL1, MDIO_WC_REG_XGXSBLK1_LANECTRL2, and elink_params::sc.

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◆ elink_warpcore_power_module()

static void elink_warpcore_power_module	(	struct elink_params *	params,
		uint8_t	power
	)

static

Definition at line 8817 of file bxe_elink.c.

References ELINK_DEBUG_P2, elink_set_cfg_pin(), PIN_CFG_NA, elink_params::port, PORT_HW_CFG_E3_PWR_DIS_MASK, PORT_HW_CFG_E3_PWR_DIS_SHIFT, REG_RD, elink_params::sc, and elink_params::shmem_base.

Referenced by elink_check_over_curr(), elink_power_sfp_module(), elink_warpcore_hw_reset(), and elink_warpcore_read_sfp_module_eeprom().

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◆ elink_warpcore_read_sfp_module_eeprom()

static elink_status_t elink_warpcore_read_sfp_module_eeprom	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	dev_addr,
		uint16_t	addr,
		uint8_t	byte_cnt,
		uint8_t *	o_buf,
		uint8_t	is_init
	)

static

Definition at line 8838 of file bxe_elink.c.

References addr, elink_bsc_module_sel(), elink_bsc_read(), ELINK_DEBUG_P0, ELINK_SFP_EEPROM_PAGE_SIZE, ELINK_STATUS_ERROR, ELINK_STATUS_OK, elink_warpcore_power_module(), I2C_WA_PWR_ITER, I2C_WA_RETRY_CNT, and elink_params::sc.

Referenced by elink_read_sfp_module_eeprom(), and elink_wait_for_sfp_module_initialized().

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◆ elink_warpcore_read_status()

static elink_status_t elink_warpcore_read_status	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6539 of file bxe_elink.c.

References elink_vars::duplex, DUPLEX_FULL, elink_cl45_read(), ELINK_DEBUG_P1, ELINK_DEBUG_P2, ELINK_DEBUG_P3, ELINK_ETH_PHY_KR, elink_ext_phy_resolve_fc(), ELINK_FLAGS_WC_DUAL_MODE, elink_get_link_speed_duplex(), elink_get_warpcore_lane(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_10000, ELINK_SPEED_AUTO_NEG, ELINK_STATUS_OK, ELINK_SUPPORTED_20000baseKR2_Full, ELINK_SUPPORTED_20000baseMLD2_Full, elink_phy::flags, elink_vars::flow_ctrl, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE, LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE, LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE, LINK_STATUS_PARALLEL_DETECTION_USED, elink_params::loopback_mode, MAX_KR_LINK_RETRY, MDIO_AN_DEVAD, MDIO_AN_REG_LP_AUTO_NEG2, MDIO_AN_REG_STATUS, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR, MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4, MDIO_OVER_1G_UP1_10G, MDIO_OVER_1G_UP1_10GH, MDIO_OVER_1G_UP1_2_5G, MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL3_LP_UP1, MDIO_WC_REG_DIGITAL5_LINK_STATUS, MDIO_WC_REG_GP2_STATUS_GP_2_1, MDIO_WC_REG_GP2_STATUS_GP_2_2, MDIO_WC_REG_GP2_STATUS_GP_2_3, MDIO_WC_REG_GP2_STATUS_GP_2_4, MDIO_WC_REG_PAR_DET_10G_STATUS, elink_phy::media_type, elink_phy::req_line_speed, elink_vars::rx_tx_asic_rst, elink_params::sc, and elink_phy::supported.

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◆ elink_warpcore_reset_lane()

static void elink_warpcore_reset_lane	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint8_t	reset
	)

static

Definition at line 5109 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), MDIO_WC_DEVAD, and MDIO_WC_REG_DIGITAL5_MISC6.

Referenced by elink_handle_module_detect_int(), elink_init_xmac_loopback(), elink_warpcore_config_init(), elink_warpcore_config_runtime(), elink_warpcore_link_reset(), and elink_warpcore_set_limiting_mode().

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◆ elink_warpcore_restart_AN_KR()

static void elink_warpcore_restart_AN_KR	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 4549 of file bxe_elink.c.

References CL22_WR_OVER_CL45, elink_cl45_write(), elink_get_warpcore_lane(), elink_set_aer_mmd(), MDIO_AER_BLOCK_AER_REG, MDIO_AN_DEVAD, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_REG_IEEE0BLK_MIICNTL, and elink_params::sc.

Referenced by elink_check_kr2_wa(), elink_kr2_recovery(), and elink_warpcore_enable_AN_KR().

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◆ elink_warpcore_set_10G_KR()

static void elink_warpcore_set_10G_KR	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4716 of file bxe_elink.c.

References ARRAY_SIZE, CL22_WR_OVER_CL45, elink_reg_set::devad, elink_cl45_read(), elink_cl45_read_or_write(), elink_cl45_write(), elink_get_warpcore_lane(), elink_set_aer_mmd(), MDIO_AER_BLOCK_AER_REG, MDIO_AN_DEVAD, MDIO_PMA_DEVAD, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_DEVAD, MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, MDIO_WC_REG_DIGITAL3_UP1, MDIO_WC_REG_DIGITAL5_MISC7, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_PMD_KR_CONTROL, MDIO_WC_REG_RX66_CONTROL, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, MDIO_WC_REG_SERDESDIGITAL_MISC2, MDIO_WC_REG_TX66_CONTROL, MDIO_WC_REG_XGXSBLK1_LANECTRL0, MDIO_WC_REG_XGXSBLK1_LANECTRL1, elink_reg_set::reg, elink_params::sc, and elink_reg_set::val.

Referenced by elink_warpcore_config_init().

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◆ elink_warpcore_set_10G_XFI()

static void elink_warpcore_set_10G_XFI	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	is_xfi
	)

static

Definition at line 4784 of file bxe_elink.c.

References DEFAULT_TX_DRV_BRDCT, DEFAULT_TX_DRV_IFIR, DEFAULT_TX_DRV_IPRE_DRIVER, DEFAULT_TX_DRV_POST2, elink_cl45_read(), elink_cl45_read_and_write(), elink_cl45_read_or_write(), elink_cl45_write(), elink_get_warpcore_lane(), elink_warpcore_set_lpi_passthrough(), MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL4_MISC3, MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0, MDIO_WC_REG_FX100_CTRL1, MDIO_WC_REG_FX100_CTRL3, MDIO_WC_REG_IEEE0BLK_MIICNTL, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, MDIO_WC_REG_SERDESDIGITAL_MISC1, MDIO_WC_REG_TX0_TX_DRIVER, MDIO_WC_REG_TX_FIR_TAP, MDIO_WC_REG_TX_FIR_TAP_ENABLE, elink_params::port, PORT_HW_CFG_TX_DRV_BROADCAST_MASK, PORT_HW_CFG_TX_DRV_BROADCAST_SHIFT, PORT_HW_CFG_TX_DRV_IFIR_MASK, PORT_HW_CFG_TX_DRV_IFIR_SHIFT, PORT_HW_CFG_TX_DRV_IPREDRIVER_MASK, PORT_HW_CFG_TX_DRV_IPREDRIVER_SHIFT, PORT_HW_CFG_TX_DRV_POST2_MASK, PORT_HW_CFG_TX_DRV_POST2_SHIFT, PORT_HW_CFG_TX_EQUALIZATION_MASK, REG_RD, elink_params::sc, elink_params::shmem_base, WC_TX_DRIVER, and WC_TX_FIR.

Referenced by elink_warpcore_config_init(), and elink_warpcore_config_sfi().

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◆ elink_warpcore_set_20G_DXGXS()

static void elink_warpcore_set_20G_DXGXS	(	struct bxe_softc *	sc,
		struct elink_phy *	phy,
		uint16_t	lane
	)

static

Definition at line 4972 of file bxe_elink.c.

References elink_cl45_write(), MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL4_MISC3, MDIO_WC_REG_RX0_ANARXCONTROL1G, MDIO_WC_REG_RX2_ANARXCONTROL1G, MDIO_WC_REG_RX66_SCW0, MDIO_WC_REG_RX66_SCW0_MASK, MDIO_WC_REG_RX66_SCW1, MDIO_WC_REG_RX66_SCW1_MASK, MDIO_WC_REG_RX66_SCW2, MDIO_WC_REG_RX66_SCW2_MASK, MDIO_WC_REG_RX66_SCW3, MDIO_WC_REG_RX66_SCW3_MASK, MDIO_WC_REG_SERDESDIGITAL_MISC1, MDIO_WC_REG_TX0_TX_DRIVER, MDIO_WC_REG_TX_FIR_TAP, MDIO_WC_REG_TX_FIR_TAP_ENABLE, WC_TX_DRIVER, and WC_TX_FIR.

Referenced by elink_warpcore_config_init().

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◆ elink_warpcore_set_20G_force_KR2()

static void elink_warpcore_set_20G_force_KR2	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 4919 of file bxe_elink.c.

References CL22_WR_OVER_CL45, elink_cl45_read(), elink_cl45_read_and_write(), elink_cl45_read_or_write(), elink_cl45_write(), elink_set_aer_mmd(), MDIO_AER_BLOCK_AER_REG, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, MDIO_PMA_DEVAD, MDIO_REG_BANK_AER_BLOCK, MDIO_WC_DEVAD, MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP, MDIO_WC_REG_CL73_USERB0_CTRL, MDIO_WC_REG_DIGITAL4_MISC3, MDIO_WC_REG_PMD_KR_CONTROL, MDIO_WC_REG_SERDESDIGITAL_MISC1, MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, and elink_params::sc.

Referenced by elink_warpcore_config_init().

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◆ elink_warpcore_set_limiting_mode()

static void elink_warpcore_set_limiting_mode	(	struct elink_params *	params,
		struct elink_phy *	phy,
		uint16_t	edc_mode
	)

static

Definition at line 9530 of file bxe_elink.c.

References elink_cl45_read(), elink_cl45_write(), ELINK_EDC_MODE_ACTIVE_DAC, ELINK_EDC_MODE_LIMITING, ELINK_EDC_MODE_LINEAR, ELINK_EDC_MODE_PASSIVE_DAC, elink_get_warpcore_lane(), elink_warpcore_reset_lane(), MDIO_WC_DEVAD, MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT, MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC, and elink_params::sc.

Referenced by elink_set_limiting_mode().

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◆ elink_warpcore_set_lpi_passthrough()

static void elink_warpcore_set_lpi_passthrough	(	struct elink_phy *	phy,
		struct elink_params *	params
	)

static

Definition at line 4537 of file bxe_elink.c.

References elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P0, MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL4_MISC5, MDIO_WC_REG_EEE_COMBO_CONTROL0, and elink_params::sc.

Referenced by elink_warpcore_set_10G_XFI(), and elink_warpcore_set_sgmii_speed().

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◆ elink_warpcore_set_sgmii_speed()

static void elink_warpcore_set_sgmii_speed	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint8_t	fiber_mode,
		uint8_t	always_autoneg
	)

static

Definition at line 5026 of file bxe_elink.c.

References DUPLEX_FULL, elink_cl45_read(), elink_cl45_read_and_write(), elink_cl45_read_or_write(), elink_cl45_write(), ELINK_DEBUG_P0, ELINK_DEBUG_P1, ELINK_SPEED_10, ELINK_SPEED_100, ELINK_SPEED_1000, ELINK_SPEED_AUTO_NEG, elink_warpcore_set_lpi_passthrough(), MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, MDIO_WC_REG_RX66_CONTROL, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, elink_phy::req_duplex, elink_phy::req_line_speed, and elink_params::sc.

Referenced by elink_warpcore_config_init(), and elink_warpcore_config_sfi().

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◆ elink_xgxs_an_resolve()

static void elink_xgxs_an_resolve	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars,
		uint32_t	gp_status
	)

static

Definition at line 6351 of file bxe_elink.c.

References elink_direct_parallel_detect_used(), ELINK_MDIO_AN_CL73_OR_37_COMPLETE, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_COMPLETE, and LINK_STATUS_PARALLEL_DETECTION_USED.

Referenced by elink_link_settings_status().

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◆ elink_xgxs_config_init()

static void elink_xgxs_config_init	(	struct elink_phy *	phy,
		struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 6787 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED, elink_initialize_sgmii_process(), ELINK_LOOPBACK_EXT, ELINK_LOOPBACK_XGXS, elink_program_serdes(), elink_restart_autoneg(), elink_set_autoneg(), elink_set_brcm_cl37_advertisement(), elink_set_ieee_aneg_advertisement(), elink_set_preemphasis(), ELINK_SINGLE_MEDIA_DIRECT, ELINK_SPEED_AUTO_NEG, elink_params::feature_config_flags, elink_vars::ieee_fc, elink_vars::line_speed, elink_params::loopback_mode, elink_vars::phy_flags, PHY_SGMII_FLAG, and elink_params::sc.

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◆ elink_xgxs_deassert()

static void elink_xgxs_deassert ( struct elink_params * params )

static

Definition at line 4185 of file bxe_elink.c.

References ELINK_DEBUG_P0, ELINK_INT_PHY, ELINK_PHY_INIT, ELINK_XGXS_RESET_BITS, elink_xgxs_specific_func(), GRCBASE_MISC, MISC_REGISTERS_RESET_REG_3_CLEAR, MISC_REGISTERS_RESET_REG_3_SET, elink_params::phy, bxe_softc::port, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_init_bmac_loopback(), elink_init_emac_loopback(), elink_init_xgxs_loopback(), and elink_phy_init().

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◆ elink_xgxs_specific_func()

static void elink_xgxs_specific_func	(	struct elink_phy *	phy,
		struct elink_params *	params,
		uint32_t	action
	)

static

Definition at line 4170 of file bxe_elink.c.

References action, elink_phy::def_md_devad, ELINK_PHY_INIT, NIG_REG_XGXS0_CTRL_MD_DEVAD, NIG_REG_XGXS0_CTRL_MD_ST, elink_params::port, REG_WR, and elink_params::sc.

Referenced by elink_xgxs_deassert().

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◆ elink_xmac_enable()

static elink_status_t elink_xmac_enable	(	struct elink_params *	params,
		struct elink_vars *	vars,
		uint8_t	lb
	)

static

Definition at line 2522 of file bxe_elink.c.

References elink_vars::eee_status, ELINK_DEBUG_P0, ELINK_FLAGS_TX_ERROR_CHECK, ELINK_FLOW_CTRL_TX, ELINK_INT_PHY, ELINK_MAC_TYPE_XMAC, elink_set_xumac_nig(), ELINK_SPEED_20000, ELINK_STATUS_OK, ELINK_SUPPORTED_20000baseKR2_Full, elink_update_pfc_xmac(), elink_xmac_init(), elink_phy::flags, elink_vars::flow_ctrl, GRCBASE_XMAC0, GRCBASE_XMAC1, elink_vars::line_speed, elink_vars::mac_type, NIG_REG_EGRESS_EMAC0_PORT, elink_params::phy, elink_params::port, REG_WR, elink_params::sc, SHMEM_EEE_ADV_STATUS_MASK, elink_phy::supported, XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS, XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS, XMAC_CTRL_REG_LINE_LOCAL_LPBK, XMAC_CTRL_REG_RX_EN, XMAC_CTRL_REG_TX_EN, XMAC_CTRL_REG_XLGMII_ALIGN_ENB, XMAC_REG_CLEAR_RX_LSS_STATUS, XMAC_REG_CTRL, XMAC_REG_EEE_CTRL, XMAC_REG_EEE_TIMERS_HI, XMAC_REG_RX_LSS_CTRL, XMAC_REG_RX_MAX_SIZE, XMAC_REG_TX_CTRL, XMAC_RX_LSS_CTRL_REG_LOCAL_FAULT_DISABLE, and XMAC_RX_LSS_CTRL_REG_REMOTE_FAULT_DISABLE.

Referenced by elink_avoid_link_flap(), elink_init_xgxs_loopback(), elink_init_xmac_loopback(), and elink_update_link_up().

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◆ elink_xmac_init()

static void elink_xmac_init	(	struct elink_params *	params,
		uint32_t	max_speed
	)

static

Definition at line 2432 of file bxe_elink.c.

References CHIP_NUM, CHIP_NUM_57840_2_20, CHIP_NUM_57840_4_10, CHIP_NUM_57840_OBS, ELINK_DEBUG_P0, elink_is_4_port_mode(), ELINK_SPEED_10000, GRCBASE_MISC, MISC_REG_RESET_REG_2, MISC_REG_XMAC_CORE_PORT_MODE, MISC_REG_XMAC_PHY_PORT_MODE, MISC_REGISTERS_RESET_REG_2_CLEAR, MISC_REGISTERS_RESET_REG_2_SET, MISC_REGISTERS_RESET_REG_2_XMAC, MISC_REGISTERS_RESET_REG_2_XMAC_SOFT, REG_RD, REG_WR, and elink_params::sc.

Referenced by elink_xmac_enable().

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◆ set_phy_vars()

static void set_phy_vars	(	struct elink_params *	params,
		struct elink_vars *	vars
	)

static

Definition at line 4244 of file bxe_elink.c.

References ELINK_DEBUG_P3, ELINK_EXT_PHY1, ELINK_EXT_PHY2, ELINK_INT_PHY, ELINK_LINK_CONFIG_IDX, ELINK_SPEED_AUTO_NEG, elink_vars::link_status, LINK_STATUS_AUTO_NEGOTIATE_ENABLED, elink_params::multi_phy_config, elink_params::num_phys, elink_params::phy, PORT_HW_CFG_PHY_SWAPPED_ENABLED, elink_phy::req_duplex, elink_params::req_duplex, elink_phy::req_flow_ctrl, elink_params::req_flow_ctrl, elink_phy::req_line_speed, elink_params::req_line_speed, elink_params::sc, elink_phy::speed_cap_mask, and elink_params::speed_cap_mask.

Referenced by elink_link_status_update(), and elink_phy_init().

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Variable Documentation

◆ phy_54618se

const struct elink_phy phy_54618se

static

Definition at line 12919 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_7101

const struct elink_phy phy_7101

static

Initial value:

= {
        .type           = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101,
        .addr           = 0xff,
        .def_md_devad   = 0,
        .flags          = ELINK_FLAGS_FAN_FAILURE_DET_REQ,
        .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .mdio_ctrl      = 0,
        .supported      = (ELINK_SUPPORTED_10000baseT_Full |
                           ELINK_SUPPORTED_TP |
                           ELINK_SUPPORTED_Autoneg |
                           ELINK_SUPPORTED_Pause |
                           ELINK_SUPPORTED_Asym_Pause),
        .media_type     = ELINK_ETH_PHY_BASE_T,
        .ver_addr       = 0,
        .req_flow_ctrl  = 0,
        .req_line_speed = 0,
        .speed_cap_mask = 0,
        .req_duplex     = 0,
        .rsrv           = 0,
        .config_init    = (config_init_t)elink_7101_config_init,
        .read_status    = (read_status_t)elink_7101_read_status,
        .link_reset     = (link_reset_t)elink_common_ext_link_reset,
        .config_loopback = (config_loopback_t)elink_7101_config_loopback,
        .format_fw_ver  = (format_fw_ver_t)elink_7101_format_ver,
        .hw_reset       = (hw_reset_t)elink_7101_hw_reset,
        .set_link_led   = (set_link_led_t)elink_7101_set_link_led,
        .phy_specific_func = (phy_specific_func_t)NULL
}

Definition at line 12561 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8073

const struct elink_phy phy_8073

static

Definition at line 12590 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8481

const struct elink_phy phy_8481

static

Definition at line 12741 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_84823

const struct elink_phy phy_84823

static

Definition at line 12777 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_84833

const struct elink_phy phy_84833

static

Definition at line 12814 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_84834

const struct elink_phy phy_84834

static

Definition at line 12850 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_84858

const struct elink_phy phy_84858

static

Definition at line 12884 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8705

const struct elink_phy phy_8705

static

Initial value:

= {
        .type           = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705,
        .addr           = 0xff,
        .def_md_devad   = 0,
        .flags          = ELINK_FLAGS_INIT_XGXS_FIRST,
        .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .mdio_ctrl      = 0,
        .supported      = (ELINK_SUPPORTED_10000baseT_Full |
                           ELINK_SUPPORTED_FIBRE |
                           ELINK_SUPPORTED_Pause |
                           ELINK_SUPPORTED_Asym_Pause),
        .media_type     = ELINK_ETH_PHY_XFP_FIBER,
        .ver_addr       = 0,
        .req_flow_ctrl  = 0,
        .req_line_speed = 0,
        .speed_cap_mask = 0,
        .req_duplex     = 0,
        .rsrv           = 0,
        .config_init    = (config_init_t)elink_8705_config_init,
        .read_status    = (read_status_t)elink_8705_read_status,
        .link_reset     = (link_reset_t)elink_common_ext_link_reset,
        .config_loopback = (config_loopback_t)NULL,
        .format_fw_ver  = (format_fw_ver_t)elink_null_format_ver,
        .hw_reset       = (hw_reset_t)NULL,
        .set_link_led   = (set_link_led_t)NULL,
        .phy_specific_func = (phy_specific_func_t)NULL
}

Definition at line 12621 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8706

const struct elink_phy phy_8706

static

Initial value:

= {
        .type           = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706,
        .addr           = 0xff,
        .def_md_devad   = 0,
        .flags          = ELINK_FLAGS_INIT_XGXS_FIRST,
        .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .mdio_ctrl      = 0,
        .supported      = (ELINK_SUPPORTED_10000baseT_Full |
                           ELINK_SUPPORTED_1000baseT_Full |
                           ELINK_SUPPORTED_FIBRE |
                           ELINK_SUPPORTED_Pause |
                           ELINK_SUPPORTED_Asym_Pause),
        .media_type     = ELINK_ETH_PHY_SFPP_10G_FIBER,
        .ver_addr       = 0,
        .req_flow_ctrl  = 0,
        .req_line_speed = 0,
        .speed_cap_mask = 0,
        .req_duplex     = 0,
        .rsrv           = 0,
        .config_init    = (config_init_t)elink_8706_config_init,
        .read_status    = (read_status_t)elink_8706_read_status,
        .link_reset     = (link_reset_t)elink_common_ext_link_reset,
        .config_loopback = (config_loopback_t)NULL,
        .format_fw_ver  = (format_fw_ver_t)elink_format_ver,
        .hw_reset       = (hw_reset_t)NULL,
        .set_link_led   = (set_link_led_t)NULL,
        .phy_specific_func = (phy_specific_func_t)NULL
}

Definition at line 12649 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8726

const struct elink_phy phy_8726

static

Definition at line 12679 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_8727

const struct elink_phy phy_8727

static

Initial value:

= {
        .type           = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727,
        .addr           = 0xff,
        .def_md_devad   = 0,
        .flags          = (ELINK_FLAGS_FAN_FAILURE_DET_REQ |
                           ELINK_FLAGS_TX_ERROR_CHECK),
        .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .mdio_ctrl      = 0,
        .supported      = (ELINK_SUPPORTED_10000baseT_Full |
                           ELINK_SUPPORTED_1000baseT_Full |
                           ELINK_SUPPORTED_FIBRE |
                           ELINK_SUPPORTED_Pause |
                           ELINK_SUPPORTED_Asym_Pause),
        .media_type     = ELINK_ETH_PHY_NOT_PRESENT,
        .ver_addr       = 0,
        .req_flow_ctrl  = 0,
        .req_line_speed = 0,
        .speed_cap_mask = 0,
        .req_duplex     = 0,
        .rsrv           = 0,
        .config_init    = (config_init_t)elink_8727_config_init,
        .read_status    = (read_status_t)elink_8727_read_status,
        .link_reset     = (link_reset_t)elink_8727_link_reset,
        .config_loopback = (config_loopback_t)NULL,
        .format_fw_ver  = (format_fw_ver_t)elink_format_ver,
        .hw_reset       = (hw_reset_t)elink_8727_hw_reset,
        .set_link_led   = (set_link_led_t)elink_8727_set_link_led,
        .phy_specific_func = (phy_specific_func_t)elink_8727_specific_func
}

Definition at line 12711 of file bxe_elink.c.

Referenced by elink_populate_ext_phy().

◆ phy_null

const struct elink_phy phy_null

static

Initial value:

= {
        .type           = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN,
        .addr           = 0,
        .def_md_devad   = 0,
        .flags          = ELINK_FLAGS_INIT_XGXS_FIRST,
        .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
        .mdio_ctrl      = 0,
        .supported      = 0,
        .media_type     = ELINK_ETH_PHY_NOT_PRESENT,
        .ver_addr       = 0,
        .req_flow_ctrl  = 0,
        .req_line_speed = 0,
        .speed_cap_mask = 0,
        .req_duplex     = 0,
        .rsrv           = 0,
        .config_init    = (config_init_t)NULL,
        .read_status    = (read_status_t)NULL,
        .link_reset     = (link_reset_t)NULL,
        .config_loopback = (config_loopback_t)NULL,
        .format_fw_ver  = (format_fw_ver_t)NULL,
        .hw_reset       = (hw_reset_t)NULL,
        .set_link_led   = (set_link_led_t)NULL,
        .phy_specific_func = (phy_specific_func_t)NULL
}

Definition at line 12425 of file bxe_elink.c.

Referenced by elink_hw_reset_phy(), elink_phy_probe(), and elink_populate_ext_phy().

◆ phy_serdes

const struct elink_phy phy_serdes

static

Definition at line 12451 of file bxe_elink.c.

Referenced by elink_populate_int_phy().

◆ phy_warpcore

const struct elink_phy phy_warpcore

static

Definition at line 12521 of file bxe_elink.c.

Referenced by elink_populate_int_phy().

◆ phy_xgxs

const struct elink_phy phy_xgxs

static

Definition at line 12486 of file bxe_elink.c.

Referenced by elink_populate_int_phy().

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ BCM84858_PHY_ID

◆ CL22_RD_OVER_CL45

◆ CL22_WR_OVER_CL45

◆ DCBX_INVALID_COS

◆ DEFAULT_TX_DRV_BRDCT

◆ DEFAULT_TX_DRV_IFIR

◆ DEFAULT_TX_DRV_IPRE_DRIVER

◆ DEFAULT_TX_DRV_POST2

◆ DIGITAL5_ACTUAL_SPEED_TX_MASK

◆ ELINK_AUTONEG_BAM

◆ ELINK_AUTONEG_CL37

◆ ELINK_AUTONEG_CL73

◆ ELINK_AUTONEG_PARALLEL

◆ ELINK_AUTONEG_REMOTE_PHY

◆ ELINK_AUTONEG_SGMII_FIBER_AUTODET

◆ ELINK_EDC_MODE_ACTIVE_DAC

◆ ELINK_EDC_MODE_LIMITING

◆ ELINK_EDC_MODE_LINEAR

◆ ELINK_EDC_MODE_PASSIVE_DAC

◆ ELINK_ETH_HLEN

◆ ELINK_ETH_MAX_JUMBO_PACKET_SIZE

◆ ELINK_ETH_MAX_PACKET_SIZE

◆ ELINK_ETH_MIN_PACKET_SIZE

◆ ELINK_ETH_OVREHEAD

◆ ELINK_ETS_BW_LIMIT_CREDIT_UPPER_BOUND

◆ ELINK_ETS_BW_LIMIT_CREDIT_WEIGHT

◆ ELINK_ETS_E3B0_NIG_MIN_W_VAL_20GBPS

◆ ELINK_ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS

◆ ELINK_ETS_E3B0_PBF_MIN_W_VAL

◆ ELINK_GP_STATUS_100M

◆ ELINK_GP_STATUS_10G_CX4

◆ ELINK_GP_STATUS_10G_HIG

◆ ELINK_GP_STATUS_10G_KR

◆ ELINK_GP_STATUS_10G_KX4

◆ ELINK_GP_STATUS_10G_SFI

◆ ELINK_GP_STATUS_10G_XFI

◆ ELINK_GP_STATUS_10M

◆ ELINK_GP_STATUS_1G

◆ ELINK_GP_STATUS_1G_KX

◆ ELINK_GP_STATUS_20G_DXGXS

◆ ELINK_GP_STATUS_20G_KR2

◆ ELINK_GP_STATUS_2_5G

◆ ELINK_GP_STATUS_5G

◆ ELINK_GP_STATUS_6G

◆ ELINK_GP_STATUS_PAUSE_RSOLUTION_RXSIDE

◆ ELINK_GP_STATUS_PAUSE_RSOLUTION_TXSIDE

◆ ELINK_GP_STATUS_SPEED_MASK

◆ ELINK_LINK_1000TFD

◆ ELINK_LINK_1000THD

◆ ELINK_LINK_1000XFD

◆ ELINK_LINK_100T4

◆ ELINK_LINK_100TXFD

◆ ELINK_LINK_100TXHD

◆ ELINK_LINK_10GTFD

◆ ELINK_LINK_10GXFD

◆ ELINK_LINK_10TFD

◆ ELINK_LINK_10THD

◆ ELINK_LINK_20GTFD

◆ ELINK_LINK_20GXFD

◆ ELINK_LINK_2500TFD

◆ ELINK_LINK_2500THD

◆ ELINK_LINK_2500XFD

◆ ELINK_LINK_UPDATE_MASK

◆ ELINK_MAX_PACKET_SIZE

◆ ELINK_MDIO_ACCESS_TIMEOUT

◆ ELINK_MDIO_AN_CL73_OR_37_COMPLETE

◆ ELINK_NIG_LATCH_BC_ENABLE_MI_INT

◆ ELINK_NIG_MASK_MI_INT

◆ ELINK_NIG_MASK_SERDES0_LINK_STATUS

◆ ELINK_NIG_MASK_XGXS0_LINK10G

◆ ELINK_NIG_MASK_XGXS0_LINK_STATUS

◆ ELINK_NIG_STATUS_EMAC0_MI_INT

◆ ELINK_NIG_STATUS_SERDES0_LINK_STATUS

◆ ELINK_NIG_STATUS_XGXS0_LINK10G

◆ ELINK_NIG_STATUS_XGXS0_LINK_STATUS