FreeBSD kernel BXE device code
Data Structures | Macros | Enumerations | Functions | Variables
ecore_init.h File Reference
#include <sys/cdefs.h>
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Data Structures

struct  raw_op
 
struct  op_read
 
struct  op_write
 
struct  op_arr_write
 
struct  op_zero
 
struct  op_if_mode
 
struct  op_if_phase
 
struct  op_delay
 
union  init_op
 
struct  ilt_line
 
struct  ilt_client_info
 
struct  ecore_ilt
 
struct  src_ent
 

Macros

#define ECORE_INIT_H
 
#define BLOCK_OPS_IDX(block, stage, end)    (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))
 
#define ECORE_PORT2_MODE_NUM_VNICS   4
 
#define ECORE_ETH_Q   0
 
#define ECORE_TOE_Q   3
 
#define ECORE_TOE_ACK_Q   6
 
#define ECORE_ISCSI_Q   9
 
#define ECORE_ISCSI_ACK_Q   11
 
#define ECORE_FCOE_Q   10
 
#define ECORE_PORT4_MODE_NUM_VNICS   2
 
#define ECORE_E3B0_PORT1_COS_OFFSET   3
 
#define ECORE_Q_VOQ_REG_ADDR(pf_q_num)    (QM_REG_QVOQIDX_0 + 4 * (pf_q_num))
 
#define ECORE_VOQ_Q_REG_ADDR(cos, pf_q_num)    (QM_REG_VOQQMASK_0_LSB + 4 * ((cos) * 2 + ((pf_q_num) >> 5)))
 
#define ECORE_Q_CMDQ_REG_ADDR(pf_q_num)    (QM_REG_BYTECRDCMDQ_0 + 4 * ((pf_q_num) >> 4))
 
#define ECORE_PF_Q_NUM(q_num, port, vnic)    ((((port) << 1) | (vnic)) * 16 + (q_num))
 
#define BITS_TO_BYTES(x)   ((x)/8)
 
#define DEF_MIN_RATE   100
 
#define RS_PERIODIC_TIMEOUT_USEC   400
 
#define QM_ARB_BYTES   160000
 
#define MIN_RES   100
 
#define MIN_ABOVE_THRESH   32768
 
#define T_FAIR_COEF   ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)
 
#define FAIR_MEM   2
 
#define SAFC_TIMEOUT_USEC   52
 
#define SDM_TICKS   4
 
#define BLOCK_OPS_IDX(block, stage, end)    (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))
 
#define INITOP_SET   0 /* set the HW directly */
 
#define INITOP_CLEAR   1 /* clear the HW directly */
 
#define INITOP_INIT   2 /* set the init-value array */
 
#define ILT_CLIENT_SKIP_INIT   0x1
 
#define ILT_CLIENT_SKIP_MEM   0x2
 
#define ILT_CLIENT_CDU   0
 
#define ILT_CLIENT_QM   1
 
#define ILT_CLIENT_SRC   2
 
#define ILT_CLIENT_TM   3
 
#define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3)
 
#define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3)
 
#define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3)
 
#define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS
 
#define MISC_AEU_ENABLE_MCP_PRTY_BITS
 

Enumerations

enum  {
  OP_RD = 0x1 , OP_WR , OP_SW , OP_ZR ,
  OP_ZP , OP_WR_64 , OP_WB , OP_FW ,
  OP_WB_ZR , OP_IF_MODE_OR , OP_IF_MODE_AND , OP_IF_PHASE ,
  OP_RT , OP_DELAY , OP_VERIFY , OP_MAX
}
 
enum  { STAGE_START , STAGE_END }
 
enum  {
  PHASE_COMMON , PHASE_PORT0 , PHASE_PORT1 , PHASE_PF0 ,
  PHASE_PF1 , PHASE_PF2 , PHASE_PF3 , PHASE_PF4 ,
  PHASE_PF5 , PHASE_PF6 , PHASE_PF7 , NUM_OF_INIT_PHASES
}
 
enum  {
  MODE_ASIC = 0x00000001 , MODE_FPGA = 0x00000002 , MODE_EMUL = 0x00000004 , MODE_E2 = 0x00000008 ,
  MODE_E3 = 0x00000010 , MODE_PORT2 = 0x00000020 , MODE_PORT4 = 0x00000040 , MODE_SF = 0x00000080 ,
  MODE_MF = 0x00000100 , MODE_MF_SD = 0x00000200 , MODE_MF_SI = 0x00000400 , MODE_MF_AFEX = 0x00000800 ,
  MODE_E3_A0 = 0x00001000 , MODE_E3_B0 = 0x00002000 , MODE_COS3 = 0x00004000 , MODE_COS6 = 0x00008000 ,
  MODE_LITTLE_ENDIAN = 0x00010000 , MODE_BIG_ENDIAN = 0x00020000
}
 
enum  {
  BLOCK_ATC , BLOCK_BRB1 , BLOCK_CCM , BLOCK_CDU ,
  BLOCK_CFC , BLOCK_CSDM , BLOCK_CSEM , BLOCK_DBG ,
  BLOCK_DMAE , BLOCK_DORQ , BLOCK_HC , BLOCK_IGU ,
  BLOCK_MISC , BLOCK_NIG , BLOCK_PBF , BLOCK_PGLUE_B ,
  BLOCK_PRS , BLOCK_PXP2 , BLOCK_PXP , BLOCK_QM ,
  BLOCK_SRC , BLOCK_TCM , BLOCK_TM , BLOCK_TSDM ,
  BLOCK_TSEM , BLOCK_UCM , BLOCK_UPB , BLOCK_USDM ,
  BLOCK_USEM , BLOCK_XCM , BLOCK_XPB , BLOCK_XSDM ,
  BLOCK_XSEM , BLOCK_MISC_AEU , NUM_OF_INIT_BLOCKS
}
 

Functions

 __FBSDID ("$FreeBSD$")
 
static void ecore_map_q_cos (struct bxe_softc *sc, uint32_t q_num, uint32_t new_cos)
 
static void ecore_dcb_config_qm (struct bxe_softc *sc, enum cos_mode mode, struct priority_cos *traffic_cos)
 
static void ecore_init_max (const struct cmng_init_input *input_data, uint32_t r_param, struct cmng_init *ram_data)
 
static void ecore_init_max_per_vn (uint16_t vnic_max_rate, struct rate_shaping_vars_per_vn *ram_data)
 
static void ecore_init_min (const struct cmng_init_input *input_data, uint32_t r_param, struct cmng_init *ram_data)
 
static void ecore_init_fw_wrr (const struct cmng_init_input *input_data, uint32_t r_param, struct cmng_init *ram_data)
 
static void ecore_init_safc (const struct cmng_init_input *input_data, struct cmng_init *ram_data)
 
static void ecore_init_cmng (const struct cmng_init_input *input_data, struct cmng_init *ram_data)
 
static void ecore_set_mcp_parity (struct bxe_softc *sc, uint8_t enable)
 
static uint32_t ecore_parity_reg_mask (struct bxe_softc *sc, int idx)
 
static void ecore_disable_blocks_parity (struct bxe_softc *sc)
 
static void ecore_clear_blocks_parity (struct bxe_softc *sc)
 
static void ecore_enable_blocks_parity (struct bxe_softc *sc)
 

Variables

struct {
   uint32_t   mask_addr
 
   uint32_t   sts_clr_addr
 
   uint32_t   en_mask
 
   struct {
      uint32_t   e1
 
      uint32_t   e1h
 
      uint32_t   e2
 
      uint32_t   e3
 
   }   reg_mask
 
   char   name [8]
 
} ecore_blocks_parity_data []
 
struct {
   uint32_t   addr
 
   uint32_t   bits
 
} mcp_attn_ctl_regs []
 

Macro Definition Documentation

◆ BITS_TO_BYTES

#define BITS_TO_BYTES (   x)    ((x)/8)

Definition at line 342 of file ecore_init.h.

◆ BLOCK_OPS_IDX [1/2]

#define BLOCK_OPS_IDX (   block,
  stage,
  end 
)     (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))

Definition at line 562 of file ecore_init.h.

◆ BLOCK_OPS_IDX [2/2]

#define BLOCK_OPS_IDX (   block,
  stage,
  end 
)     (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))

Definition at line 562 of file ecore_init.h.

◆ BLOCK_PRTY_INFO

#define BLOCK_PRTY_INFO (   block,
  en_mask,
  m1,
  m1h,
  m2,
  m3 
)
Value:
{ \
block##_REG_##block##_PRTY_MASK, \
block##_REG_##block##_PRTY_STS_CLR, \
en_mask, {m1, m1h, m2, m3}, #block \
}

Definition at line 610 of file ecore_init.h.

◆ BLOCK_PRTY_INFO_0

#define BLOCK_PRTY_INFO_0 (   block,
  en_mask,
  m1,
  m1h,
  m2,
  m3 
)
Value:
{ \
block##_REG_##block##_PRTY_MASK_0, \
block##_REG_##block##_PRTY_STS_CLR_0, \
en_mask, {m1, m1h, m2, m3}, #block"_0" \
}

Definition at line 617 of file ecore_init.h.

◆ BLOCK_PRTY_INFO_1

#define BLOCK_PRTY_INFO_1 (   block,
  en_mask,
  m1,
  m1h,
  m2,
  m3 
)
Value:
{ \
block##_REG_##block##_PRTY_MASK_1, \
block##_REG_##block##_PRTY_STS_CLR_1, \
en_mask, {m1, m1h, m2, m3}, #block"_1" \
}

Definition at line 624 of file ecore_init.h.

◆ DEF_MIN_RATE

#define DEF_MIN_RATE   100

Definition at line 347 of file ecore_init.h.

◆ ECORE_E3B0_PORT1_COS_OFFSET

#define ECORE_E3B0_PORT1_COS_OFFSET   3

Definition at line 234 of file ecore_init.h.

◆ ECORE_ETH_Q

#define ECORE_ETH_Q   0

Definition at line 223 of file ecore_init.h.

◆ ECORE_FCOE_Q

#define ECORE_FCOE_Q   10

Definition at line 228 of file ecore_init.h.

◆ ECORE_INIT_H

#define ECORE_INIT_H

Definition at line 33 of file ecore_init.h.

◆ ECORE_ISCSI_ACK_Q

#define ECORE_ISCSI_ACK_Q   11

Definition at line 227 of file ecore_init.h.

◆ ECORE_ISCSI_Q

#define ECORE_ISCSI_Q   9

Definition at line 226 of file ecore_init.h.

◆ ECORE_PF_Q_NUM

#define ECORE_PF_Q_NUM (   q_num,
  port,
  vnic 
)     ((((port) << 1) | (vnic)) * 16 + (q_num))

Definition at line 245 of file ecore_init.h.

◆ ECORE_PORT2_MODE_NUM_VNICS

#define ECORE_PORT2_MODE_NUM_VNICS   4

Definition at line 219 of file ecore_init.h.

◆ ECORE_PORT4_MODE_NUM_VNICS

#define ECORE_PORT4_MODE_NUM_VNICS   2

Definition at line 231 of file ecore_init.h.

◆ ECORE_Q_CMDQ_REG_ADDR

#define ECORE_Q_CMDQ_REG_ADDR (   pf_q_num)     (QM_REG_BYTECRDCMDQ_0 + 4 * ((pf_q_num) >> 4))

Definition at line 241 of file ecore_init.h.

◆ ECORE_Q_VOQ_REG_ADDR

#define ECORE_Q_VOQ_REG_ADDR (   pf_q_num)     (QM_REG_QVOQIDX_0 + 4 * (pf_q_num))

Definition at line 237 of file ecore_init.h.

◆ ECORE_TOE_ACK_Q

#define ECORE_TOE_ACK_Q   6

Definition at line 225 of file ecore_init.h.

◆ ECORE_TOE_Q

#define ECORE_TOE_Q   3

Definition at line 224 of file ecore_init.h.

◆ ECORE_VOQ_Q_REG_ADDR

#define ECORE_VOQ_Q_REG_ADDR (   cos,
  pf_q_num 
)     (QM_REG_VOQQMASK_0_LSB + 4 * ((cos) * 2 + ((pf_q_num) >> 5)))

Definition at line 239 of file ecore_init.h.

◆ FAIR_MEM

#define FAIR_MEM   2

Definition at line 374 of file ecore_init.h.

◆ ILT_CLIENT_CDU

#define ILT_CLIENT_CDU   0

Definition at line 593 of file ecore_init.h.

◆ ILT_CLIENT_QM

#define ILT_CLIENT_QM   1

Definition at line 594 of file ecore_init.h.

◆ ILT_CLIENT_SKIP_INIT

#define ILT_CLIENT_SKIP_INIT   0x1

Definition at line 585 of file ecore_init.h.

◆ ILT_CLIENT_SKIP_MEM

#define ILT_CLIENT_SKIP_MEM   0x2

Definition at line 586 of file ecore_init.h.

◆ ILT_CLIENT_SRC

#define ILT_CLIENT_SRC   2

Definition at line 595 of file ecore_init.h.

◆ ILT_CLIENT_TM

#define ILT_CLIENT_TM   3

Definition at line 596 of file ecore_init.h.

◆ INITOP_CLEAR

#define INITOP_CLEAR   1 /* clear the HW directly */

Definition at line 567 of file ecore_init.h.

◆ INITOP_INIT

#define INITOP_INIT   2 /* set the init-value array */

Definition at line 568 of file ecore_init.h.

◆ INITOP_SET

#define INITOP_SET   0 /* set the HW directly */

Definition at line 566 of file ecore_init.h.

◆ MIN_ABOVE_THRESH

#define MIN_ABOVE_THRESH   32768

Definition at line 365 of file ecore_init.h.

◆ MIN_RES

#define MIN_RES   100

Definition at line 359 of file ecore_init.h.

◆ MISC_AEU_ENABLE_MCP_PRTY_BITS

#define MISC_AEU_ENABLE_MCP_PRTY_BITS
Value:
(MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS | \
AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY)
MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS
#define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS
Definition: ecore_init.h:715

Definition at line 720 of file ecore_init.h.

◆ MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS

#define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS
Value:
(AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \
AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \
AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY)
AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY
#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY
Definition: ecore_reg.h:1976

Definition at line 715 of file ecore_init.h.

◆ QM_ARB_BYTES

#define QM_ARB_BYTES   160000

Definition at line 356 of file ecore_init.h.

◆ RS_PERIODIC_TIMEOUT_USEC

#define RS_PERIODIC_TIMEOUT_USEC   400

Definition at line 350 of file ecore_init.h.

◆ SAFC_TIMEOUT_USEC

#define SAFC_TIMEOUT_USEC   52

Definition at line 375 of file ecore_init.h.

◆ SDM_TICKS

#define SDM_TICKS   4

Definition at line 377 of file ecore_init.h.

◆ T_FAIR_COEF

#define T_FAIR_COEF   ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)

Definition at line 371 of file ecore_init.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
OP_RD 
OP_WR 
OP_SW 
OP_ZR 
OP_ZP 
OP_WR_64 
OP_WB 
OP_FW 
OP_WB_ZR 
OP_IF_MODE_OR 
OP_IF_MODE_AND 
OP_IF_PHASE 
OP_RT 
OP_DELAY 
OP_VERIFY 
OP_MAX 

Definition at line 36 of file ecore_init.h.

◆ anonymous enum

anonymous enum
Enumerator
STAGE_START 
STAGE_END 

Definition at line 57 of file ecore_init.h.

◆ anonymous enum

anonymous enum
Enumerator
PHASE_COMMON 
PHASE_PORT0 
PHASE_PORT1 
PHASE_PF0 
PHASE_PF1 
PHASE_PF2 
PHASE_PF3 
PHASE_PF4 
PHASE_PF5 
PHASE_PF6 
PHASE_PF7 
NUM_OF_INIT_PHASES 

Definition at line 135 of file ecore_init.h.

◆ anonymous enum

anonymous enum
Enumerator
MODE_ASIC 
MODE_FPGA 
MODE_EMUL 
MODE_E2 
MODE_E3 
MODE_PORT2 
MODE_PORT4 
MODE_SF 
MODE_MF 
MODE_MF_SD 
MODE_MF_SI 
MODE_MF_AFEX 
MODE_E3_A0 
MODE_E3_B0 
MODE_COS3 
MODE_COS6 
MODE_LITTLE_ENDIAN 
MODE_BIG_ENDIAN 

Definition at line 151 of file ecore_init.h.

◆ anonymous enum

anonymous enum
Enumerator
BLOCK_ATC 
BLOCK_BRB1 
BLOCK_CCM 
BLOCK_CDU 
BLOCK_CFC 
BLOCK_CSDM 
BLOCK_CSEM 
BLOCK_DBG 
BLOCK_DMAE 
BLOCK_DORQ 
BLOCK_HC 
BLOCK_IGU 
BLOCK_MISC 
BLOCK_NIG 
BLOCK_PBF 
BLOCK_PGLUE_B 
BLOCK_PRS 
BLOCK_PXP2 
BLOCK_PXP 
BLOCK_QM 
BLOCK_SRC 
BLOCK_TCM 
BLOCK_TM 
BLOCK_TSDM 
BLOCK_TSEM 
BLOCK_UCM 
BLOCK_UPB 
BLOCK_USDM 
BLOCK_USEM 
BLOCK_XCM 
BLOCK_XPB 
BLOCK_XSDM 
BLOCK_XSEM 
BLOCK_MISC_AEU 
NUM_OF_INIT_BLOCKS 

Definition at line 173 of file ecore_init.h.

Function Documentation

◆ __FBSDID()

__FBSDID ( "$FreeBSD$"  )

◆ ecore_clear_blocks_parity()

static void ecore_clear_blocks_parity ( struct bxe_softc *  sc)
inlinestatic

Clear the parity error status registers.

Definition at line 798 of file ecore_init.h.

References AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY, AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY, AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY, AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY, ARRSIZE, CSEM_REG_FAST_MEMORY, ecore_blocks_parity_data, ECORE_MSG, ecore_parity_reg_mask(), MISC_REG_AEU_AFTER_INVERT_4_MCP, MISC_REG_AEU_CLR_LATCH_SIGNAL, name, reg_mask, REG_RD, REG_WR, SEM_FAST_REG_PARITY_RST, sts_clr_addr, TSEM_REG_FAST_MEMORY, USEM_REG_FAST_MEMORY, and XSEM_REG_FAST_MEMORY.

Referenced by bxe_grc_dump().

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◆ ecore_dcb_config_qm()

static void ecore_dcb_config_qm ( struct bxe_softc *  sc,
enum cos_mode  mode,
struct priority_cos *  traffic_cos 
)
inlinestatic

Definition at line 304 of file ecore_init.h.

References ECORE_ETH_Q, ECORE_FCOE_Q, ECORE_ISCSI_ACK_Q, ECORE_ISCSI_Q, ecore_map_q_cos(), ECORE_TOE_ACK_Q, ECORE_TOE_Q, LLFC_TRAFFIC_TYPE_FCOE, LLFC_TRAFFIC_TYPE_ISCSI, LLFC_TRAFFIC_TYPE_NW, and STATIC_COS.

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◆ ecore_disable_blocks_parity()

static void ecore_disable_blocks_parity ( struct bxe_softc *  sc)
inlinestatic

Definition at line 775 of file ecore_init.h.

References ARRSIZE, ecore_blocks_parity_data, ECORE_MSG, ecore_parity_reg_mask(), ecore_set_mcp_parity(), mask_addr, name, and REG_WR.

Referenced by bxe_grc_dump().

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◆ ecore_enable_blocks_parity()

static void ecore_enable_blocks_parity ( struct bxe_softc *  sc)
inlinestatic

Definition at line 842 of file ecore_init.h.

References ARRSIZE, ecore_blocks_parity_data, ecore_parity_reg_mask(), ecore_set_mcp_parity(), en_mask, mask_addr, reg_mask, and REG_WR.

Referenced by bxe_grc_dump(), and bxe_init_hw_common().

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◆ ecore_init_cmng()

static void ecore_init_cmng ( const struct cmng_init_input *  input_data,
struct cmng_init *  ram_data 
)
inlinestatic

Definition at line 539 of file ecore_init.h.

References BITS_TO_BYTES, ecore_init_fw_wrr(), ecore_init_max(), ecore_init_min(), ecore_init_safc(), ECORE_MEMSET, cmng_struct_per_port::flags, cmng_init_input::flags, cmng_init::port, and cmng_init_input::port_rate.

Referenced by bxe_cmng_fns_init().

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◆ ecore_init_fw_wrr()

static void ecore_init_fw_wrr ( const struct cmng_init_input *  input_data,
uint32_t  r_param,
struct cmng_init *  ram_data 
)
inlinestatic

Definition at line 492 of file ecore_init.h.

References fairness_vars_per_vn::cos_credit_delta, cmng_init_input::cos_min_rate, ECORE_PORT2_MODE_NUM_VNICS, fairness_vars_per_port::fair_threshold, cmng_struct_per_port::fair_vars, MAX_COS_NUMBER, MIN_ABOVE_THRESH, cmng_init::port, T_FAIR_COEF, cmng_init::vnic, and cmng_vnic::vnic_min_rate.

Referenced by ecore_init_cmng().

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◆ ecore_init_max()

static void ecore_init_max ( const struct cmng_init_input *  input_data,
uint32_t  r_param,
struct cmng_init *  ram_data 
)
inlinestatic

Definition at line 380 of file ecore_init.h.

References ECORE_PORT2_MODE_NUM_VNICS, cmng_init::port, rate_shaping_counter::quota, rate_shaping_vars_per_port::rs_periodic_timeout, RS_PERIODIC_TIMEOUT_USEC, rate_shaping_vars_per_port::rs_threshold, cmng_struct_per_port::rs_vars, SDM_TICKS, rate_shaping_vars_per_vn::vn_counter, cmng_init::vnic, cmng_vnic::vnic_max_rate, and cmng_init_input::vnic_max_rate.

Referenced by ecore_init_cmng().

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◆ ecore_init_max_per_vn()

static void ecore_init_max_per_vn ( uint16_t  vnic_max_rate,
struct rate_shaping_vars_per_vn *  ram_data 
)
inlinestatic

Definition at line 419 of file ecore_init.h.

References rate_shaping_counter::quota, RS_PERIODIC_TIMEOUT_USEC, and rate_shaping_vars_per_vn::vn_counter.

◆ ecore_init_min()

static void ecore_init_min ( const struct cmng_init_input *  input_data,
uint32_t  r_param,
struct cmng_init *  ram_data 
)
inlinestatic

Definition at line 434 of file ecore_init.h.

References ECORE_PORT2_MODE_NUM_VNICS, FAIR_MEM, fairness_vars_per_port::fair_threshold, cmng_struct_per_port::fair_vars, fairness_vars_per_port::fairness_timeout, MIN_ABOVE_THRESH, cmng_init::port, cmng_init_input::port_rate, QM_ARB_BYTES, SDM_TICKS, T_FAIR_COEF, fairness_vars_per_port::upper_bound, fairness_vars_per_vn::vn_credit_delta, cmng_init::vnic, cmng_vnic::vnic_min_rate, and cmng_init_input::vnic_min_rate.

Referenced by ecore_init_cmng().

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◆ ecore_init_safc()

static void ecore_init_safc ( const struct cmng_init_input *  input_data,
struct cmng_init *  ram_data 
)
inlinestatic

Definition at line 531 of file ecore_init.h.

References cmng_init::port, SAFC_TIMEOUT_USEC, and cmng_struct_per_port::safc_vars.

Referenced by ecore_init_cmng().

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◆ ecore_map_q_cos()

static void ecore_map_q_cos ( struct bxe_softc *  sc,
uint32_t  q_num,
uint32_t  new_cos 
)
inlinestatic

Definition at line 250 of file ecore_init.h.

References ECORE_E3B0_PORT1_COS_OFFSET, ECORE_PF_Q_NUM, ECORE_PORT2_MODE_NUM_VNICS, ECORE_PORT4_MODE_NUM_VNICS, ECORE_Q_CMDQ_REG_ADDR, ECORE_Q_VOQ_REG_ADDR, ECORE_VOQ_Q_REG_ADDR, INIT_MODE_FLAGS, MODE_E3_B0, MODE_PORT4, PORT_ID, QM_REG_QVOQIDX_0, REG_RD, and REG_WR.

Referenced by ecore_dcb_config_qm().

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◆ ecore_parity_reg_mask()

static uint32_t ecore_parity_reg_mask ( struct bxe_softc *  sc,
int  idx 
)
inlinestatic

Definition at line 763 of file ecore_init.h.

References CHIP_IS_E1, CHIP_IS_E1H, CHIP_IS_E2, and ecore_blocks_parity_data.

Referenced by ecore_clear_blocks_parity(), ecore_disable_blocks_parity(), and ecore_enable_blocks_parity().

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◆ ecore_set_mcp_parity()

static void ecore_set_mcp_parity ( struct bxe_softc *  sc,
uint8_t  enable 
)
inlinestatic

Definition at line 746 of file ecore_init.h.

References addr, ARRSIZE, mcp_attn_ctl_regs, MISC_AEU_ENABLE_MCP_PRTY_BITS, REG_RD, and REG_WR.

Referenced by ecore_disable_blocks_parity(), and ecore_enable_blocks_parity().

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Variable Documentation

◆ addr

uint32_t addr

Definition at line 729 of file ecore_init.h.

Referenced by __storm_memset_dma_mapping(), __storm_memset_mac_filters(), bxe_clear_bit(), bxe_cmpxchg(), bxe_disable_close_the_gate(), bxe_fill(), bxe_get_preset_regs(), bxe_hc_int_disable(), bxe_hc_int_enable(), bxe_ilt_wr(), bxe_init_hw_func(), bxe_read_pages_regs(), bxe_reg_rd_ind(), bxe_reg_wr_ind(), bxe_set_bit(), bxe_storm_memset_hc_disable(), bxe_storm_memset_hc_timeout(), bxe_test_and_clear_bit(), bxe_test_and_set_bit(), bxe_test_bit(), bxe_write_dmae_phys_len(), ecore_init_block(), ecore_init_fill(), ecore_init_fw(), ecore_init_ind_wr(), ecore_init_str_wr(), ecore_init_wr_64(), ecore_init_wr_wb(), ecore_init_wr_zp(), ecore_reg_wr_ind(), ecore_sel_blob(), ecore_set_mcp_parity(), ecore_storm_memset_struct(), ecore_write_big_buf(), ecore_write_big_buf_wb(), ecore_write_dmae_phys_len(), elink_8073_common_init_phy(), elink_8726_read_sfp_module_eeprom(), elink_8727_common_init_phy(), elink_8727_read_sfp_module_eeprom(), elink_chng_link_count(), elink_read_sfp_module_eeprom(), elink_warpcore_enable_AN_KR(), elink_warpcore_read_sfp_module_eeprom(), storm_memset_cmng(), storm_memset_eq_data(), storm_memset_eq_prod(), storm_memset_func_cfg(), and storm_memset_spq_addr().

◆ bits

uint32_t bits

Definition at line 730 of file ecore_init.h.

Referenced by elink_bits_en().

◆ e1

uint32_t e1

Definition at line 636 of file ecore_init.h.

◆ e1h

uint32_t e1h

Definition at line 637 of file ecore_init.h.

◆ e2

uint32_t e2

Definition at line 638 of file ecore_init.h.

◆ e3

uint32_t e3

Definition at line 639 of file ecore_init.h.

◆ 

const struct { ... } ecore_blocks_parity_data[]

Referenced by ecore_clear_blocks_parity(), ecore_disable_blocks_parity(), ecore_enable_blocks_parity(), and ecore_parity_reg_mask().

◆ en_mask

uint32_t en_mask

Definition at line 634 of file ecore_init.h.

Referenced by ecore_enable_blocks_parity().

◆ mask_addr

uint32_t mask_addr

Definition at line 632 of file ecore_init.h.

Referenced by ecore_disable_blocks_parity(), and ecore_enable_blocks_parity().

◆ 

const struct { ... } mcp_attn_ctl_regs[]
Initial value:
= {
{ MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0,
MISC_AEU_ENABLE_MCP_PRTY_BITS },
{ MISC_REG_AEU_ENABLE4_NIG_0,
MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS },
{ MISC_REG_AEU_ENABLE4_PXP_0,
MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS },
{ MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0,
MISC_AEU_ENABLE_MCP_PRTY_BITS },
{ MISC_REG_AEU_ENABLE4_NIG_1,
MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS },
{ MISC_REG_AEU_ENABLE4_PXP_1,
MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }
}
MISC_AEU_ENABLE_MCP_PRTY_BITS
#define MISC_AEU_ENABLE_MCP_PRTY_BITS
Definition: ecore_init.h:720
MISC_REG_AEU_ENABLE4_NIG_1
#define MISC_REG_AEU_ENABLE4_NIG_1
Definition: ecore_reg.h:360
MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0
#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0
Definition: ecore_reg.h:354
MISC_REG_AEU_ENABLE4_NIG_0
#define MISC_REG_AEU_ENABLE4_NIG_0
Definition: ecore_reg.h:358
MISC_REG_AEU_ENABLE4_PXP_0
#define MISC_REG_AEU_ENABLE4_PXP_0
Definition: ecore_reg.h:362
MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0
#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0
Definition: ecore_reg.h:356
MISC_REG_AEU_ENABLE4_PXP_1
#define MISC_REG_AEU_ENABLE4_PXP_1
Definition: ecore_reg.h:364

Referenced by ecore_set_mcp_parity().

◆ name

char name[8]

Definition at line 641 of file ecore_init.h.

Referenced by ecore_clear_blocks_parity(), and ecore_disable_blocks_parity().

◆ 

struct { ... } reg_mask

Referenced by ecore_clear_blocks_parity(), and ecore_enable_blocks_parity().

◆ sts_clr_addr

uint32_t sts_clr_addr

Definition at line 633 of file ecore_init.h.

Referenced by ecore_clear_blocks_parity().