32#include <net/rss_config.h>
33#include <netinet/in_rss.h>
37#define DPRINTF device_printf
48 u32 *txd_upper,
u32 *txd_lower);
53static void em_isc_rxd_flush(
void *arg, uint16_t rxqid, uint8_t flid __unused,
96 if_softc_ctx_t scctx = sc->
shared;
99 qidx_t i, ntxd, qid, cur;
104 ntxd = scctx->isc_ntxd[0];
105 for (qid = 0; qid <
sc->tx_num_queues; qid++) {
110 cur = txr->
tx_rsq[rs_cidx];
113 printf(
"qid[%d]->tx_rsq[%d]: %d clear ", qid, rs_cidx, cur);
115 rs_cidx = (rs_cidx-1)&(ntxd-1);
116 cur = txr->
tx_rsq[rs_cidx];
117 printf(
"qid[%d]->tx_rsq[rs_cidx-1=%d]: %d ", qid, rs_cidx, cur);
120 for (i = 0; i < ntxd; i++) {
122 printf(
"%d set ", i);
143 hdr_len = pi->ipi_ehdrlen + pi->ipi_ip_hlen + pi->ipi_tcp_hlen;
161 htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1);
172 pi->ipi_ehdrlen + pi->ipi_ip_hlen + offsetof(
struct tcphdr, th_sum);
189 if (++cur == scctx->isc_ntxd[0]) {
192 DPRINTF(iflib_get_dev(sc->
ctx),
"%s: pidx: %d cur: %d\n", __FUNCTION__, pi->ipi_pidx, cur);
196#define TSO_WORKAROUND 4
197#define DONT_FORCE_CTX 1
221 if_softc_ctx_t scctx = sc->
shared;
229 hdr_len = pi->ipi_ehdrlen + pi->ipi_ip_hlen;
240 sc->tx_num_queues == 1 &&
254 if (csum_flags & CSUM_IP) {
267 if (csum_flags & (CSUM_TCP|CSUM_UDP)) {
273 if (csum_flags & CSUM_TCP) {
293 if (++cur == scctx->isc_ntxd[0]) {
296 DPRINTF(iflib_get_dev(sc->
ctx),
"checksum_setup csum_flags=%x txd_upper=%x txd_lower=%x hdr_len=%d cmd=%x\n",
297 csum_flags, *txd_upper, *txd_lower,
hdr_len, cmd);
305 if_softc_ctx_t scctx = sc->
shared;
308 bus_dma_segment_t *segs = pi->ipi_segs;
309 int nsegs = pi->ipi_nsegs;
311 int i, j, first, pidx_last;
312 u32 txd_flags, txd_upper = 0, txd_lower = 0;
315 bool do_tso, tso_desc;
319 i = first = pi->ipi_pidx;
322 ntxd = scctx->isc_ntxd[0];
329 if ((!do_tso) && (txr->
tx_tso ==
true)) {
343 if (pi->ipi_mflags & M_VLANTAG) {
345 txd_upper |= htole16(pi->ipi_vtag) << 16;
350 DPRINTF(iflib_get_dev(sc->
ctx),
"encap: set up tx: nsegs=%d first=%d i=%d\n", nsegs, first, i);
354 for (j = 0; j < nsegs; j++) {
360 seg_addr = segs[j].ds_addr;
361 seg_len = segs[j].ds_len;
369 if (tso_desc && (j == (nsegs - 1)) && (seg_len > 8)) {
375 if (++i == scctx->isc_ntxd[0])
384 if (++i == scctx->isc_ntxd[0])
386 DPRINTF(iflib_get_dev(sc->
ctx),
"TSO path pidx_last=%d i=%d ntxd[0]=%d\n", pidx_last, i, scctx->isc_ntxd[0]);
392 if (++i == scctx->isc_ntxd[0])
394 DPRINTF(iflib_get_dev(sc->
ctx),
"pidx_last=%d i=%d ntxd[0]=%d\n", pidx_last, i, scctx->isc_ntxd[0]);
403 if (txd_flags && nsegs) {
405 DPRINTF(iflib_get_dev(sc->
ctx),
"setting to RS on %d rs_pidx %d first: %d\n", pidx_last, txr->
tx_rs_pidx, first);
410 DPRINTF(iflib_get_dev(sc->
ctx),
"tx_buffers[%d]->eop = %d ipi_new_pidx=%d\n", first, pidx_last, i);
411 pi->ipi_new_pidx = i;
430 if_softc_ctx_t scctx = sc->
shared;
434 qidx_t processed = 0;
436 qidx_t cur, prev, ntxd, rs_cidx;
443 cur = txr->
tx_rsq[rs_cidx];
444 MPASS(cur != QIDX_INVALID);
457 ntxd = scctx->isc_ntxd[0];
460 delta = (int32_t)cur - (int32_t)prev;
465 "%s: cidx_processed=%u cur=%u clear=%d delta=%d\n",
466 __FUNCTION__, prev, cur, clear, delta);
470 rs_cidx = (rs_cidx + 1) & (ntxd-1);
473 cur = txr->
tx_rsq[rs_cidx];
474 MPASS(cur != QIDX_INVALID);
487 if_softc_ctx_t scctx = sc->
shared;
492 uint32_t next_pidx, pidx;
496 paddrs = iru->iru_paddrs;
497 pidx = iru->iru_pidx;
498 count = iru->iru_count;
500 for (i = 0, next_pidx = pidx; i < count; i++) {
506 if (++next_pidx == scctx->isc_nrxd[0])
515 if_softc_ctx_t scctx = sc->
shared;
516 uint16_t rxqid = iru->iru_qsidx;
521 uint32_t next_pidx, pidx;
525 paddrs = iru->iru_paddrs;
526 pidx = iru->iru_pidx;
527 count = iru->iru_count;
529 for (i = 0, next_pidx = pidx; i < count; i++) {
530 rxd = &rxr->
rx_base[next_pidx];
535 if (++next_pidx == scctx->isc_nrxd[0])
554 if_softc_ctx_t scctx = sc->
shared;
561 for (cnt = 0, i = idx; cnt < scctx->isc_nrxd[0] && cnt <= budget;) {
567 if (++i == scctx->isc_nrxd[0])
579 if_softc_ctx_t scctx = sc->
shared;
586 for (cnt = 0, i = idx; cnt < scctx->isc_nrxd[0] && cnt <= budget;) {
592 if (++i == scctx->isc_nrxd[0])
604 if_softc_ctx_t scctx = sc->
shared;
624 len = le16toh(rxd->
length);
636 ri->iri_frags[i].irf_flid = 0;
637 ri->iri_frags[i].irf_idx = cidx;
638 ri->iri_frags[i].irf_len = len;
642 if (++cidx == scctx->isc_nrxd[0])
652 ri->iri_vtag = le16toh(rxd->
special);
653 ri->iri_flags |= M_VLANTAG;
665 if_softc_ctx_t scctx = sc->
shared;
698 ri->iri_frags[i].irf_flid = 0;
699 ri->iri_frags[i].irf_idx = cidx;
700 ri->iri_frags[i].irf_len = len;
704 if (++cidx == scctx->isc_nrxd[0])
709 if (scctx->isc_capenable & IFCAP_RXCSUM)
714 ri->iri_flags |= M_VLANTAG;
743 ri->iri_csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID);
746 if (__predict_true(status &
748 ri->iri_csum_flags |= CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
749 ri->iri_csum_data = htons(0xffff);
763 return M_HASHTYPE_RSS_TCP_IPV4;
765 return M_HASHTYPE_RSS_IPV4;
767 return M_HASHTYPE_RSS_TCP_IPV6;
769 return M_HASHTYPE_RSS_IPV6_EX;
771 return M_HASHTYPE_RSS_IPV6;
773 return M_HASHTYPE_RSS_TCP_IPV6_EX;
775 return M_HASHTYPE_OPAQUE;
#define E1000_RXDADV_RSSTYPE_IPV4_TCP
#define E1000_RXDADV_RSSTYPE_IPV6
#define E1000_RXDADV_RSSTYPE_MASK
#define E1000_RXDADV_RSSTYPE_IPV4
#define E1000_RXDADV_RSSTYPE_IPV6_TCP
#define E1000_RXDADV_RSSTYPE_IPV6_EX
#define E1000_RXDADV_RSSTYPE_IPV6_TCP_EX
#define E1000_RXD_STAT_VP
#define E1000_RXD_STAT_IPCS
#define E1000_TXD_CMD_TCP
#define E1000_TXD_CMD_VLE
#define E1000_RXD_ERR_IPE
#define E1000_RXD_STAT_IXSM
#define E1000_TXD_CMD_DEXT
#define E1000_RXD_STAT_UDPCS
#define E1000_TXD_CMD_IFCS
#define E1000_TXD_STAT_DD
#define E1000_RXDEXT_ERR_FRAME_ERR_MASK
#define E1000_RXD_STAT_DD
#define E1000_RXD_STAT_TCPCS
#define E1000_RXD_ERR_TCPE
#define E1000_TXD_POPTS_TXSM
#define E1000_RXD_STAT_EOP
#define E1000_TXD_POPTS_IXSM
#define E1000_RXD_ERR_FRAME_ERR_MASK
#define E1000_TXD_CMD_EOP
#define E1000_TXD_CMD_TSE
#define E1000_WRITE_REG(hw, reg, value)
static int lem_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget)
static int em_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear)
static int em_transmit_checksum_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower)
void em_dump_rs(struct e1000_softc *sc)
static void em_isc_rxd_refill(void *arg, if_rxd_update_t iru)
static int em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower)
static int em_isc_txd_encap(void *arg, if_pkt_info_t pi)
static int em_determine_rsstype(u32 pkt_info)
static int em_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget)
static void lem_isc_rxd_refill(void *arg, if_rxd_update_t iru)
static void em_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx)
static int em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri)
static int lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri)
static void em_receive_checksum(uint16_t, uint8_t, if_rxd_info_t)
static void em_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx)
struct e1000_context_desc::@38::@41 fields
struct e1000_context_desc::@37::@40 tcp_fields
struct e1000_context_desc::@36::@39 ip_fields
union e1000_context_desc::@38 tcp_seg_setup
union e1000_context_desc::@37 upper_setup
union e1000_context_desc::@36 lower_setup
struct e1000_mac_info mac
struct em_rx_queue * rx_queues
unsigned long dropped_pkts
struct em_tx_queue * tx_queues
union e1000_tx_desc::@32 lower
union e1000_tx_desc::@33 upper
struct e1000_tx_desc::@33::@35 fields
union e1000_rx_desc_extended * rx_base
struct e1000_tx_desc * tx_base
union e1000_rx_desc_extended::@20::@21::@23 hi_dword
struct e1000_rx_desc_extended::@19 read
struct e1000_rx_desc_extended::@20 wb
struct e1000_rx_desc_extended::@20::@22 upper
struct e1000_rx_desc_extended::@20::@21 lower