FreeBSD kernel E1000 device code
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#include "opt_ddb.h"
#include "opt_inet.h"
#include "opt_inet6.h"
#include "opt_rss.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf_ring.h>
#include <sys/bus.h>
#include <sys/endian.h>
#include <sys/kernel.h>
#include <sys/kthread.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/smp.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <sys/sysctl.h>
#include <sys/taskqueue.h>
#include <sys/eventhandler.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <net/bpf.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/iflib.h>
#include <net/if_types.h>
#include <net/if_vlan_var.h>
#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <netinet/ip.h>
#include <netinet/ip6.h>
#include <netinet/tcp.h>
#include <netinet/udp.h>
#include <machine/in_cksum.h>
#include <dev/led/led.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include "e1000_api.h"
#include "e1000_82571.h"
#include "ifdi_if.h"
Go to the source code of this file.
Data Structures | |
struct | em_int_delay_info |
struct | tx_ring |
struct | rx_ring |
struct | em_tx_queue |
struct | em_rx_queue |
struct | e1000_softc |
struct | _em_vendor_info_t |
Macros | |
#define | EM_MIN_TXD 128 |
#define | EM_MAX_TXD 4096 |
#define | EM_DEFAULT_TXD 1024 |
#define | EM_DEFAULT_MULTI_TXD 4096 |
#define | IGB_MAX_TXD 4096 |
#define | EM_MIN_RXD 128 |
#define | EM_MAX_RXD 4096 |
#define | EM_DEFAULT_RXD 1024 |
#define | EM_DEFAULT_MULTI_RXD 4096 |
#define | IGB_MAX_RXD 4096 |
#define | EM_TIDV 64 |
#define | EM_TADV 64 |
#define | EM_RDTR 0 |
#define | EM_RADV 64 |
#define | DO_AUTO_NEG 1 |
#define | WAIT_FOR_AUTO_NEG_DEFAULT 0 |
#define | AUTONEG_ADV_DEFAULT |
#define | AUTO_ALL_MODES 0 |
#define | EM_MASTER_SLAVE e1000_ms_hw_default |
#define | EM_VENDOR_ID 0x8086 |
#define | EM_FLASH 0x0014 |
#define | EM_JUMBO_PBA 0x00000028 |
#define | EM_DEFAULT_PBA 0x00000030 |
#define | EM_SMARTSPEED_DOWNSHIFT 3 |
#define | EM_SMARTSPEED_MAX 15 |
#define | EM_MAX_LOOP 10 |
#define | MAX_NUM_MULTICAST_ADDRESSES 128 |
#define | PCI_ANY_ID (~0U) |
#define | ETHER_ALIGN 2 |
#define | EM_FC_PAUSE_TIME 0x0680 |
#define | EM_EEPROM_APME 0x400; |
#define | EM_82544_APME 0x0004; |
#define | IGB_MEDIA_RESET (1 << 0) |
#define | IGB_INTS_PER_SEC 8000 |
#define | IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) |
#define | IGB_LINK_ITR 2000 |
#define | I210_LINK_DELAY 1000 |
#define | IGB_TXPBSIZE 20408 |
#define | IGB_HDR_BUF 128 |
#define | IGB_PKTTYPE_MASK 0x0000FFF0 |
#define | IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ |
#define | EM_TX_IDLE 0x00000000 |
#define | EM_TX_BUSY 0x00000001 |
#define | EM_TX_HUNG 0x80000000 |
#define | EM_TX_MAXTRIES 10 |
#define | PCICFG_DESC_RING_STATUS 0xe4 |
#define | FLUSH_DESC_REQUIRED 0x100 |
#define | IGB_RX_PTHRESH |
#define | IGB_RX_HTHRESH 8 |
#define | IGB_RX_WTHRESH |
#define | IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) |
#define | IGB_TX_HTHRESH 1 |
#define | IGB_TX_WTHRESH |
#define | EM_DBA_ALIGN 128 |
#define | TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ |
#define | TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ |
#define | TARC_MQ_FIX |
#define | TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ |
#define | EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) |
#define | EM_BAR_TYPE_MASK 0x00000001 |
#define | EM_BAR_TYPE_MMEM 0x00000000 |
#define | EM_BAR_TYPE_IO 0x00000001 |
#define | EM_BAR_TYPE_FLASH 0x0014 |
#define | EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) |
#define | EM_BAR_MEM_TYPE_MASK 0x00000006 |
#define | EM_BAR_MEM_TYPE_32BIT 0x00000000 |
#define | EM_BAR_MEM_TYPE_64BIT 0x00000004 |
#define | DEBUG_INIT 0 |
#define | DEBUG_IOCTL 0 |
#define | DEBUG_HW 0 |
#define | INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") |
#define | INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) |
#define | INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) |
#define | IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") |
#define | IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) |
#define | IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) |
#define | HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") |
#define | HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) |
#define | HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) |
#define | EM_MAX_SCATTER 40 |
#define | EM_VFTA_SIZE 128 |
#define | EM_TSO_SIZE 65535 |
#define | EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ |
#define | ETH_ZLEN 60 |
#define | EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */ |
#define | IGB_CSUM_OFFLOAD |
#define | IGB_PKTTYPE_MASK 0x0000FFF0 |
#define | IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ |
#define | EM_EIAC 0x000DC |
#define | EM_NVM_PCIE_CTRL 0x1B |
#define | EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) |
#define | EM_NVM_MSIX_N_SHIFT 7 |
#define | tx_num_queues shared->isc_ntxqsets |
#define | rx_num_queues shared->isc_nrxqsets |
#define | intr_type shared->isc_intr |
#define | EM_RSSRK_SIZE 4 |
#define | EM_RSSRK_VAL(key, i) |
Typedefs | |
typedef struct _em_vendor_info_t | em_vendor_info_t |
Functions | |
void | em_dump_rs (struct e1000_softc *) |
#define AUTONEG_ADV_DEFAULT |
#define EM_BAR_MEM_TYPE | ( | v | ) | ((v) & EM_BAR_MEM_TYPE_MASK) |
#define EM_BAR_TYPE | ( | v | ) | ((v) & EM_BAR_TYPE_MASK) |
#define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */ |
#define EM_MASTER_SLAVE e1000_ms_hw_default |
#define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) |
#define EM_RSSRK_VAL | ( | key, | |
i | |||
) |
#define HW_DEBUGOUT1 | ( | S, | |
A | |||
) | if (DEBUG_HW) printf(S "\n", A) |
#define HW_DEBUGOUT2 | ( | S, | |
A, | |||
B | |||
) | if (DEBUG_HW) printf(S "\n", A, B) |
#define IGB_CSUM_OFFLOAD |
#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) |
#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ |
#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ |
#define IGB_RX_PTHRESH |
#define IGB_RX_WTHRESH |
#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) |
#define IGB_TX_WTHRESH |
#define INIT_DEBUGOUT | ( | S | ) | if (DEBUG_INIT) printf(S "\n") |
#define INIT_DEBUGOUT1 | ( | S, | |
A | |||
) | if (DEBUG_INIT) printf(S "\n", A) |
#define INIT_DEBUGOUT2 | ( | S, | |
A, | |||
B | |||
) | if (DEBUG_INIT) printf(S "\n", A, B) |
#define IOCTL_DEBUGOUT | ( | S | ) | if (DEBUG_IOCTL) printf(S "\n") |
#define IOCTL_DEBUGOUT1 | ( | S, | |
A | |||
) | if (DEBUG_IOCTL) printf(S "\n", A) |
#define IOCTL_DEBUGOUT2 | ( | S, | |
A, | |||
B | |||
) | if (DEBUG_IOCTL) printf(S "\n", A, B) |
#define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ |
#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ |
#define TARC_MQ_FIX |
#define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ |
typedef struct _em_vendor_info_t em_vendor_info_t |
void em_dump_rs | ( | struct e1000_softc * | sc | ) |
Definition at line 94 of file em_txrx.c.
References E1000_TXD_STAT_DD, e1000_tx_desc::fields, tx_ring::sc, e1000_softc::shared, e1000_tx_desc::status, tx_ring::tx_base, tx_ring::tx_cidx_processed, e1000_softc::tx_queues, tx_ring::tx_rs_cidx, tx_ring::tx_rs_pidx, tx_ring::tx_rsq, em_tx_queue::txr, and e1000_tx_desc::upper.
Referenced by em_get_rs(), and em_if_debug().