39#ifdef HAVE_KERNEL_OPTION_HEADERS
40#include "opt_device_polling.h"
49#include <sys/buf_ring.h>
51#include <sys/endian.h>
52#include <sys/kernel.h>
53#include <sys/kthread.h>
54#include <sys/malloc.h>
56#include <sys/module.h>
59#include <sys/socket.h>
60#include <sys/sockio.h>
61#include <sys/sysctl.h>
62#include <sys/taskqueue.h>
63#include <sys/eventhandler.h>
64#include <machine/bus.h>
65#include <machine/resource.h>
68#include <net/ethernet.h>
70#include <net/if_var.h>
71#include <net/if_arp.h>
73#include <net/if_media.h>
76#include <net/rss_config.h>
77#include <netinet/in_rss.h>
80#include <net/if_types.h>
81#include <net/if_vlan_var.h>
83#include <netinet/in_systm.h>
84#include <netinet/in.h>
85#include <netinet/if_ether.h>
86#include <netinet/ip.h>
87#include <netinet/ip6.h>
88#include <netinet/tcp.h>
89#include <netinet/udp.h>
91#include <machine/in_cksum.h>
92#include <dev/led/led.h>
93#include <dev/pci/pcivar.h>
94#include <dev/pci/pcireg.h>
114#define EM_MIN_TXD 128
115#define EM_MAX_TXD 4096
116#define EM_DEFAULT_TXD 1024
117#define EM_DEFAULT_MULTI_TXD 4096
118#define IGB_MAX_TXD 4096
133#define EM_MIN_RXD 128
134#define EM_MAX_RXD 4096
135#define EM_DEFAULT_RXD 1024
136#define EM_DEFAULT_MULTI_RXD 4096
137#define IGB_MAX_RXD 4096
212#define WAIT_FOR_AUTO_NEG_DEFAULT 0
216#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
217 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
220#define AUTO_ALL_MODES 0
223#define EM_MASTER_SLAVE e1000_ms_hw_default
228#define EM_VENDOR_ID 0x8086
229#define EM_FLASH 0x0014
231#define EM_JUMBO_PBA 0x00000028
232#define EM_DEFAULT_PBA 0x00000030
233#define EM_SMARTSPEED_DOWNSHIFT 3
234#define EM_SMARTSPEED_MAX 15
235#define EM_MAX_LOOP 10
237#define MAX_NUM_MULTICAST_ADDRESSES 128
238#define PCI_ANY_ID (~0U)
240#define EM_FC_PAUSE_TIME 0x0680
241#define EM_EEPROM_APME 0x400;
242#define EM_82544_APME 0x0004;
245#define IGB_MEDIA_RESET (1 << 0)
248#define IGB_INTS_PER_SEC 8000
249#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
251#define IGB_LINK_ITR 2000
252#define I210_LINK_DELAY 1000
254#define IGB_TXPBSIZE 20408
255#define IGB_HDR_BUF 128
256#define IGB_PKTTYPE_MASK 0x0000FFF0
257#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000
268#define EM_TX_IDLE 0x00000000
269#define EM_TX_BUSY 0x00000001
270#define EM_TX_HUNG 0x80000000
271#define EM_TX_MAXTRIES 10
273#define PCICFG_DESC_RING_STATUS 0xe4
274#define FLUSH_DESC_REQUIRED 0x100
277#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
278 ((hw->mac.type <= e1000_82576) ? 16 : 8))
279#define IGB_RX_HTHRESH 8
280#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
281 (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
283#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
284#define IGB_TX_HTHRESH 1
285#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
286 sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
293#define EM_DBA_ALIGN 128
298#define TARC_COMPENSATION_MODE (1 << 7)
299#define TARC_SPEED_MODE_BIT (1 << 21)
300#define TARC_MQ_FIX (1 << 23) | \
303#define TARC_ERRATA_BIT (1 << 26)
306#define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK)
307#define EM_BAR_TYPE_MASK 0x00000001
308#define EM_BAR_TYPE_MMEM 0x00000000
309#define EM_BAR_TYPE_IO 0x00000001
310#define EM_BAR_TYPE_FLASH 0x0014
311#define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK)
312#define EM_BAR_MEM_TYPE_MASK 0x00000006
313#define EM_BAR_MEM_TYPE_32BIT 0x00000000
314#define EM_BAR_MEM_TYPE_64BIT 0x00000004
321#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
322#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
323#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
324#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
325#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
326#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
327#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
328#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
329#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
331#define EM_MAX_SCATTER 40
332#define EM_VFTA_SIZE 128
333#define EM_TSO_SIZE 65535
334#define EM_TSO_SEG_SIZE 4096
336#define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP)
337#define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
338 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \
341#define IGB_PKTTYPE_MASK 0x0000FFF0
342#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000
350#define EM_EIAC 0x000DC
356#define EM_NVM_PCIE_CTRL 0x1B
357#define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT)
358#define EM_NVM_MSIX_N_SHIFT 7
446#define tx_num_queues shared->isc_ntxqsets
447#define rx_num_queues shared->isc_nrxqsets
448#define intr_type shared->isc_intr
548#define EM_RSSRK_SIZE 4
549#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \
550 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
551 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
552 key[(i) * EM_RSSRK_SIZE + 3] << 24)
struct _em_vendor_info_t em_vendor_info_t
void em_dump_rs(struct e1000_softc *)
unsigned int subvendor_id
unsigned int subdevice_id
struct em_rx_queue * rx_queues
unsigned long watchdog_events
unsigned long rx_overruns
struct grouptask link_task
struct em_int_delay_info rx_int_delay
struct e1000_hw_stats stats
struct em_int_delay_info tx_itr
int em_insert_vlan_header
struct e1000_fw_version fw_ver
struct em_int_delay_info tx_int_delay
u32 shadow_vfta[EM_VFTA_SIZE]
struct em_int_delay_info tx_abs_int_delay
struct em_int_delay_info rx_abs_int_delay
unsigned long dropped_pkts
struct em_tx_queue * tx_queues
unsigned long rx_discarded
union e1000_rx_desc_extended * rx_base
struct e1000_tx_desc * tx_base