FreeBSD kernel usb device Code
ohci.c
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1/* $FreeBSD$ */
2/*-
3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 *
5 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
6 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
7 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31/*
32 * USB Open Host Controller driver.
33 *
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
36 */
37
38#ifdef USB_GLOBAL_INCLUDE_FILE
39#include USB_GLOBAL_INCLUDE_FILE
40#else
41#include <sys/stdint.h>
42#include <sys/stddef.h>
43#include <sys/param.h>
44#include <sys/queue.h>
45#include <sys/types.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/bus.h>
49#include <sys/module.h>
50#include <sys/lock.h>
51#include <sys/mutex.h>
52#include <sys/condvar.h>
53#include <sys/sysctl.h>
54#include <sys/sx.h>
55#include <sys/unistd.h>
56#include <sys/callout.h>
57#include <sys/malloc.h>
58#include <sys/priv.h>
59
60#include <dev/usb/usb.h>
61#include <dev/usb/usbdi.h>
62
63#define USB_DEBUG_VAR ohcidebug
64
65#include <dev/usb/usb_core.h>
66#include <dev/usb/usb_debug.h>
67#include <dev/usb/usb_busdma.h>
68#include <dev/usb/usb_process.h>
69#include <dev/usb/usb_transfer.h>
70#include <dev/usb/usb_device.h>
71#include <dev/usb/usb_hub.h>
72#include <dev/usb/usb_util.h>
73
74#include <dev/usb/usb_controller.h>
75#include <dev/usb/usb_bus.h>
76#endif /* USB_GLOBAL_INCLUDE_FILE */
77
78#include <dev/usb/controller/ohci.h>
79#include <dev/usb/controller/ohcireg.h>
80
81#define OHCI_BUS2SC(bus) \
82 __containerof(bus, ohci_softc_t, sc_bus)
83
84#ifdef USB_DEBUG
85static int ohcidebug = 0;
86
87static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
88 "USB ohci");
89SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RWTUN,
90 &ohcidebug, 0, "ohci debug level");
91
92static void ohci_dumpregs(ohci_softc_t *);
93static void ohci_dump_tds(ohci_td_t *);
94static uint8_t ohci_dump_td(ohci_td_t *);
95static void ohci_dump_ed(ohci_ed_t *);
96static uint8_t ohci_dump_itd(ohci_itd_t *);
97static void ohci_dump_itds(ohci_itd_t *);
98
99#endif
100
101#define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
102 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
103#define OWRITE1(sc, r, x) \
104 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
105#define OWRITE2(sc, r, x) \
106 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
107#define OWRITE4(sc, r, x) \
108 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
109#define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
110#define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
111#define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
112
113#define OHCI_INTR_ENDPT 1
114
115static const struct usb_bus_methods ohci_bus_methods;
116static const struct usb_pipe_methods ohci_device_bulk_methods;
117static const struct usb_pipe_methods ohci_device_ctrl_methods;
118static const struct usb_pipe_methods ohci_device_intr_methods;
119static const struct usb_pipe_methods ohci_device_isoc_methods;
120
121static void ohci_do_poll(struct usb_bus *bus);
122static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
123static void ohci_timeout(void *arg);
124static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
125static void ohci_root_intr(ohci_softc_t *sc);
126
127struct ohci_std_temp {
128 struct usb_page_cache *pc;
129 ohci_td_t *td;
130 ohci_td_t *td_next;
131 uint32_t average;
132 uint32_t td_flags;
133 uint32_t len;
134 uint16_t max_frame_size;
135 uint8_t shortpkt;
136 uint8_t setup_alt_next;
137 uint8_t last_frame;
138};
139
140static struct ohci_hcca *
141ohci_get_hcca(ohci_softc_t *sc)
142{
143 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
144 return (sc->sc_hcca_p);
145}
146
147void
148ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
149{
150 struct ohci_softc *sc = OHCI_BUS2SC(bus);
151 uint32_t i;
152
153 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
154 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
155
156 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
157 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
158
159 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
160 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
161
162 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
163 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
164
165 for (i = 0; i != OHCI_NO_EDS; i++) {
166 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
167 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
168 }
169}
170
171static usb_error_t
172ohci_controller_init(ohci_softc_t *sc, int do_suspend)
173{
174 struct usb_page_search buf_res;
175 uint32_t i;
176 uint32_t ctl;
177 uint32_t ival;
178 uint32_t hcr;
179 uint32_t fm;
180 uint32_t per;
181 uint32_t desca;
182
183 /* Determine in what context we are running. */
184 ctl = OREAD4(sc, OHCI_CONTROL);
185 if (ctl & OHCI_IR) {
186 /* SMM active, request change */
187 DPRINTF("SMM active, request owner change\n");
188 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
189 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
190 usb_pause_mtx(NULL, hz / 1000);
191 ctl = OREAD4(sc, OHCI_CONTROL);
192 }
193 if (ctl & OHCI_IR) {
194 device_printf(sc->sc_bus.bdev,
195 "SMM does not respond, resetting\n");
196 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
197 goto reset;
198 }
199 } else {
200 DPRINTF("cold started\n");
201reset:
202 /* controller was cold started */
203 usb_pause_mtx(NULL,
204 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
205 }
206
207 /*
208 * This reset should not be necessary according to the OHCI spec, but
209 * without it some controllers do not start.
210 */
211 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
212 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
213
214 usb_pause_mtx(NULL,
215 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
216
217 /* we now own the host controller and the bus has been reset */
218 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
219
220 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
221 /* nominal time for a reset is 10 us */
222 for (i = 0; i < 10; i++) {
223 DELAY(10);
224 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
225 if (!hcr) {
226 break;
227 }
228 }
229 if (hcr) {
230 device_printf(sc->sc_bus.bdev, "reset timeout\n");
231 return (USB_ERR_IOERROR);
232 }
233#ifdef USB_DEBUG
234 if (ohcidebug > 15) {
235 ohci_dumpregs(sc);
236 }
237#endif
238
239 if (do_suspend) {
240 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
241 return (USB_ERR_NORMAL_COMPLETION);
242 }
243
244 /* The controller is now in SUSPEND state, we have 2ms to finish. */
245
246 /* set up HC registers */
247 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
248 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
249
250 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
251 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
252
253 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
254 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
255
256 /* disable all interrupts and then switch on all desired interrupts */
257 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
258 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
259 /* switch on desired functional features */
260 ctl = OREAD4(sc, OHCI_CONTROL);
261 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
262 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
263 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
264 /* And finally start it! */
265 OWRITE4(sc, OHCI_CONTROL, ctl);
266
267 /*
268 * The controller is now OPERATIONAL. Set a some final
269 * registers that should be set earlier, but that the
270 * controller ignores when in the SUSPEND state.
271 */
272 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
273 fm |= OHCI_FSMPS(ival) | ival;
274 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
275 per = OHCI_PERIODIC(ival); /* 90% periodic */
276 OWRITE4(sc, OHCI_PERIODIC_START, per);
277
278 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
279 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
280 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
281 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
282 usb_pause_mtx(NULL,
283 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
284 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
285
286 /*
287 * The AMD756 requires a delay before re-reading the register,
288 * otherwise it will occasionally report 0 ports.
289 */
290 sc->sc_noport = 0;
291 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
292 usb_pause_mtx(NULL,
293 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
294 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
295 }
296
297#ifdef USB_DEBUG
298 if (ohcidebug > 5) {
299 ohci_dumpregs(sc);
300 }
301#endif
302 return (USB_ERR_NORMAL_COMPLETION);
303}
304
305static struct ohci_ed *
306ohci_init_ed(struct usb_page_cache *pc)
307{
308 struct usb_page_search buf_res;
309 struct ohci_ed *ed;
310
311 usbd_get_page(pc, 0, &buf_res);
312
313 ed = buf_res.buffer;
314
315 ed->ed_self = htole32(buf_res.physaddr);
316 ed->ed_flags = htole32(OHCI_ED_SKIP);
317 ed->page_cache = pc;
318
319 return (ed);
320}
321
322usb_error_t
323ohci_init(ohci_softc_t *sc)
324{
325 struct usb_page_search buf_res;
326 uint16_t i;
327 uint16_t bit;
328 uint16_t x;
329 uint16_t y;
330
331 DPRINTF("start\n");
332
333 sc->sc_eintrs = OHCI_NORMAL_INTRS;
334
335 /*
336 * Setup all ED's
337 */
338
339 sc->sc_ctrl_p_last =
340 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
341
342 sc->sc_bulk_p_last =
343 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
344
345 sc->sc_isoc_p_last =
346 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
347
348 for (i = 0; i != OHCI_NO_EDS; i++) {
349 sc->sc_intr_p_last[i] =
350 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
351 }
352
353 /*
354 * the QHs are arranged to give poll intervals that are
355 * powers of 2 times 1ms
356 */
357 bit = OHCI_NO_EDS / 2;
358 while (bit) {
359 x = bit;
360 while (x & bit) {
361 ohci_ed_t *ed_x;
362 ohci_ed_t *ed_y;
363
364 y = (x ^ bit) | (bit / 2);
365
366 /*
367 * the next QH has half the poll interval
368 */
369 ed_x = sc->sc_intr_p_last[x];
370 ed_y = sc->sc_intr_p_last[y];
371
372 ed_x->next = NULL;
373 ed_x->ed_next = ed_y->ed_self;
374
375 x++;
376 }
377 bit >>= 1;
378 }
379
380 if (1) {
381 ohci_ed_t *ed_int;
382 ohci_ed_t *ed_isc;
383
384 ed_int = sc->sc_intr_p_last[0];
385 ed_isc = sc->sc_isoc_p_last;
386
387 /* the last (1ms) QH */
388 ed_int->next = ed_isc;
389 ed_int->ed_next = ed_isc->ed_self;
390 }
391 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
392
393 sc->sc_hcca_p = buf_res.buffer;
394
395 /*
396 * Fill HCCA interrupt table. The bit reversal is to get
397 * the tree set up properly to spread the interrupts.
398 */
399 for (i = 0; i != OHCI_NO_INTRS; i++) {
400 sc->sc_hcca_p->hcca_interrupt_table[i] =
401 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
402 }
403 /* flush all cache into memory */
404
405 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
406
407 /* set up the bus struct */
408 sc->sc_bus.methods = &ohci_bus_methods;
409
410 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
411
412#ifdef USB_DEBUG
413 if (ohcidebug > 15) {
414 for (i = 0; i != OHCI_NO_EDS; i++) {
415 printf("ed#%d ", i);
416 ohci_dump_ed(sc->sc_intr_p_last[i]);
417 }
418 printf("iso ");
419 ohci_dump_ed(sc->sc_isoc_p_last);
420 }
421#endif
422
423 sc->sc_bus.usbrev = USB_REV_1_0;
424
425 if (ohci_controller_init(sc, 0) != 0)
426 return (USB_ERR_INVAL);
427
428 /* catch any lost interrupts */
429 ohci_do_poll(&sc->sc_bus);
430 return (USB_ERR_NORMAL_COMPLETION);
431}
432
433/*
434 * shut down the controller when the system is going down
435 */
436void
437ohci_detach(struct ohci_softc *sc)
438{
439 USB_BUS_LOCK(&sc->sc_bus);
440
441 usb_callout_stop(&sc->sc_tmo_rhsc);
442
443 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
444 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
445
446 USB_BUS_UNLOCK(&sc->sc_bus);
447
448 /* XXX let stray task complete */
449 usb_pause_mtx(NULL, hz / 20);
450
451 usb_callout_drain(&sc->sc_tmo_rhsc);
452}
453
454static void
455ohci_suspend(ohci_softc_t *sc)
456{
457 DPRINTF("\n");
458
459#ifdef USB_DEBUG
460 if (ohcidebug > 2)
461 ohci_dumpregs(sc);
462#endif
463
464 /* reset HC and leave it suspended */
465 ohci_controller_init(sc, 1);
466}
467
468static void
469ohci_resume(ohci_softc_t *sc)
470{
471 DPRINTF("\n");
472
473#ifdef USB_DEBUG
474 if (ohcidebug > 2)
475 ohci_dumpregs(sc);
476#endif
477
478 /* some broken BIOSes never initialize the Controller chip */
479 ohci_controller_init(sc, 0);
480
481 /* catch any lost interrupts */
482 ohci_do_poll(&sc->sc_bus);
483}
484
485#ifdef USB_DEBUG
486static void
487ohci_dumpregs(ohci_softc_t *sc)
488{
489 struct ohci_hcca *hcca;
490
491 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
492 OREAD4(sc, OHCI_REVISION),
493 OREAD4(sc, OHCI_CONTROL),
494 OREAD4(sc, OHCI_COMMAND_STATUS));
495 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
496 OREAD4(sc, OHCI_INTERRUPT_STATUS),
497 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
498 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
499 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
500 OREAD4(sc, OHCI_HCCA),
501 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
502 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
503 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
504 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
505 OREAD4(sc, OHCI_BULK_HEAD_ED),
506 OREAD4(sc, OHCI_BULK_CURRENT_ED));
507 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
508 OREAD4(sc, OHCI_DONE_HEAD),
509 OREAD4(sc, OHCI_FM_INTERVAL),
510 OREAD4(sc, OHCI_FM_REMAINING));
511 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
512 OREAD4(sc, OHCI_FM_NUMBER),
513 OREAD4(sc, OHCI_PERIODIC_START),
514 OREAD4(sc, OHCI_LS_THRESHOLD));
515 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
516 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
517 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
518 OREAD4(sc, OHCI_RH_STATUS));
519 DPRINTF(" port1=0x%08x port2=0x%08x\n",
520 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
521 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
522
523 hcca = ohci_get_hcca(sc);
524
525 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
526 le32toh(hcca->hcca_frame_number),
527 le32toh(hcca->hcca_done_head));
528}
529static void
530ohci_dump_tds(ohci_td_t *std)
531{
532 for (; std; std = std->obj_next) {
533 if (ohci_dump_td(std)) {
534 break;
535 }
536 }
537}
538
539static uint8_t
540ohci_dump_td(ohci_td_t *std)
541{
542 uint32_t td_flags;
543 uint8_t temp;
544
545 usb_pc_cpu_invalidate(std->page_cache);
546
547 td_flags = le32toh(std->td_flags);
548 temp = (std->td_next == 0);
549
550 printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
551 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
552 std, le32toh(std->td_self),
553 (td_flags & OHCI_TD_R) ? "-R" : "",
554 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
555 (td_flags & OHCI_TD_IN) ? "-IN" : "",
556 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
557 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
558 OHCI_TD_GET_DI(td_flags),
559 OHCI_TD_GET_EC(td_flags),
560 OHCI_TD_GET_CC(td_flags),
561 le32toh(std->td_cbp),
562 le32toh(std->td_next),
563 le32toh(std->td_be));
564
565 return (temp);
566}
567
568static uint8_t
569ohci_dump_itd(ohci_itd_t *sitd)
570{
571 uint32_t itd_flags;
572 uint16_t i;
573 uint8_t temp;
574
575 usb_pc_cpu_invalidate(sitd->page_cache);
576
577 itd_flags = le32toh(sitd->itd_flags);
578 temp = (sitd->itd_next == 0);
579
580 printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
581 "bp0=0x%08x next=0x%08x be=0x%08x\n",
582 sitd, le32toh(sitd->itd_self),
583 OHCI_ITD_GET_SF(itd_flags),
584 OHCI_ITD_GET_DI(itd_flags),
585 OHCI_ITD_GET_FC(itd_flags),
586 OHCI_ITD_GET_CC(itd_flags),
587 le32toh(sitd->itd_bp0),
588 le32toh(sitd->itd_next),
589 le32toh(sitd->itd_be));
590 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
591 printf("offs[%d]=0x%04x ", i,
592 (uint32_t)le16toh(sitd->itd_offset[i]));
593 }
594 printf("\n");
595
596 return (temp);
597}
598
599static void
600ohci_dump_itds(ohci_itd_t *sitd)
601{
602 for (; sitd; sitd = sitd->obj_next) {
603 if (ohci_dump_itd(sitd)) {
604 break;
605 }
606 }
607}
608
609static void
610ohci_dump_ed(ohci_ed_t *sed)
611{
612 uint32_t ed_flags;
613 uint32_t ed_headp;
614
615 usb_pc_cpu_invalidate(sed->page_cache);
616
617 ed_flags = le32toh(sed->ed_flags);
618 ed_headp = le32toh(sed->ed_headp);
619
620 printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
621 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
622 sed, le32toh(sed->ed_self),
623 OHCI_ED_GET_FA(ed_flags),
624 OHCI_ED_GET_EN(ed_flags),
625 OHCI_ED_GET_MAXP(ed_flags),
626 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
627 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
628 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
629 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
630 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
631 le32toh(sed->ed_tailp),
632 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
633 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
634 le32toh(sed->ed_headp),
635 le32toh(sed->ed_next));
636}
637
638#endif
639
640static void
641ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
642{
643 /* check for early completion */
644 if (ohci_check_transfer(xfer)) {
645 return;
646 }
647 /* put transfer on interrupt queue */
648 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
649
650 /* start timeout, if any */
651 if (xfer->timeout != 0) {
652 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
653 }
654}
655
656#define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
657static ohci_ed_t *
658_ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
659{
660 DPRINTFN(11, "%p to %p\n", sed, last);
661
662 if (sed->prev != NULL) {
663 /* should not happen */
664 DPRINTFN(0, "ED already linked!\n");
665 return (last);
666 }
667 /* (sc->sc_bus.bus_mtx) must be locked */
668
669 sed->next = last->next;
670 sed->ed_next = last->ed_next;
671 sed->ed_tailp = 0;
672
673 sed->prev = last;
674
675 usb_pc_cpu_flush(sed->page_cache);
676
677 /*
678 * the last->next->prev is never followed: sed->next->prev = sed;
679 */
680
681 last->next = sed;
682 last->ed_next = sed->ed_self;
683
684 usb_pc_cpu_flush(last->page_cache);
685
686 return (sed);
687}
688
689#define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
690static ohci_ed_t *
691_ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
692{
693 DPRINTFN(11, "%p from %p\n", sed, last);
694
695 /* (sc->sc_bus.bus_mtx) must be locked */
696
697 /* only remove if not removed from a queue */
698 if (sed->prev) {
699 sed->prev->next = sed->next;
700 sed->prev->ed_next = sed->ed_next;
701
702 usb_pc_cpu_flush(sed->prev->page_cache);
703
704 if (sed->next) {
705 sed->next->prev = sed->prev;
706 usb_pc_cpu_flush(sed->next->page_cache);
707 }
708 last = ((last == sed) ? sed->prev : last);
709
710 sed->prev = 0;
711
712 usb_pc_cpu_flush(sed->page_cache);
713 }
714 return (last);
715}
716
717static void
718ohci_isoc_done(struct usb_xfer *xfer)
719{
720 uint8_t nframes;
721 uint32_t *plen = xfer->frlengths;
722 volatile uint16_t *olen;
723 uint16_t len = 0;
724 ohci_itd_t *td = xfer->td_transfer_first;
725
726 while (1) {
727 if (td == NULL) {
728 panic("%s:%d: out of TD's\n",
729 __FUNCTION__, __LINE__);
730 }
731#ifdef USB_DEBUG
732 if (ohcidebug > 5) {
733 DPRINTF("isoc TD\n");
734 ohci_dump_itd(td);
735 }
736#endif
737 usb_pc_cpu_invalidate(td->page_cache);
738
739 nframes = td->frames;
740 olen = &td->itd_offset[0];
741
742 if (nframes > 8) {
743 nframes = 8;
744 }
745 while (nframes--) {
746 len = le16toh(*olen);
747
748 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
749 len = 0;
750 } else {
751 len &= ((1 << 12) - 1);
752 }
753
754 if (len > *plen) {
755 len = 0;/* invalid length */
756 }
757 *plen = len;
758 plen++;
759 olen++;
760 }
761
762 if (((void *)td) == xfer->td_transfer_last) {
763 break;
764 }
765 td = td->obj_next;
766 }
767
768 xfer->aframes = xfer->nframes;
769 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
770}
771
772#ifdef USB_DEBUG
773static const char *const
774 ohci_cc_strs[] =
775{
776 "NO_ERROR",
777 "CRC",
778 "BIT_STUFFING",
779 "DATA_TOGGLE_MISMATCH",
780
781 "STALL",
782 "DEVICE_NOT_RESPONDING",
783 "PID_CHECK_FAILURE",
784 "UNEXPECTED_PID",
785
786 "DATA_OVERRUN",
787 "DATA_UNDERRUN",
788 "BUFFER_OVERRUN",
789 "BUFFER_UNDERRUN",
790
791 "reserved",
792 "reserved",
793 "NOT_ACCESSED",
794 "NOT_ACCESSED"
795};
796
797#endif
798
799static usb_error_t
800ohci_non_isoc_done_sub(struct usb_xfer *xfer)
801{
802 ohci_td_t *td;
803 ohci_td_t *td_alt_next;
804 uint32_t temp;
805 uint32_t phy_start;
806 uint32_t phy_end;
807 uint32_t td_flags;
808 uint16_t cc;
809
810 td = xfer->td_transfer_cache;
811 td_alt_next = td->alt_next;
812 td_flags = 0;
813
814 if (xfer->aframes != xfer->nframes) {
815 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
816 }
817 while (1) {
818 usb_pc_cpu_invalidate(td->page_cache);
819 phy_start = le32toh(td->td_cbp);
820 td_flags = le32toh(td->td_flags);
821 cc = OHCI_TD_GET_CC(td_flags);
822
823 if (phy_start) {
824 /*
825 * short transfer - compute the number of remaining
826 * bytes in the hardware buffer:
827 */
828 phy_end = le32toh(td->td_be);
829 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
830 (OHCI_PAGE_SIZE + 1) : 0x0001);
831 temp += OHCI_PAGE_OFFSET(phy_end);
832 temp -= OHCI_PAGE_OFFSET(phy_start);
833
834 if (temp > td->len) {
835 /* guard against corruption */
836 cc = OHCI_CC_STALL;
837 } else if (xfer->aframes != xfer->nframes) {
838 /*
839 * Sum up total transfer length
840 * in "frlengths[]":
841 */
842 xfer->frlengths[xfer->aframes] += td->len - temp;
843 }
844 } else {
845 if (xfer->aframes != xfer->nframes) {
846 /* transfer was complete */
847 xfer->frlengths[xfer->aframes] += td->len;
848 }
849 }
850 /* Check for last transfer */
851 if (((void *)td) == xfer->td_transfer_last) {
852 td = NULL;
853 break;
854 }
855 /* Check transfer status */
856 if (cc) {
857 /* the transfer is finished */
858 td = NULL;
859 break;
860 }
861 /* Check for short transfer */
862 if (phy_start) {
863 if (xfer->flags_int.short_frames_ok) {
864 /* follow alt next */
865 td = td->alt_next;
866 } else {
867 /* the transfer is finished */
868 td = NULL;
869 }
870 break;
871 }
872 td = td->obj_next;
873
874 if (td->alt_next != td_alt_next) {
875 /* this USB frame is complete */
876 break;
877 }
878 }
879
880 /* update transfer cache */
881
882 xfer->td_transfer_cache = td;
883
884 DPRINTFN(16, "error cc=%d (%s)\n",
885 cc, ohci_cc_strs[cc]);
886
887 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
888 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
889}
890
891static void
892ohci_non_isoc_done(struct usb_xfer *xfer)
893{
894 usb_error_t err = 0;
895
896 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
897 xfer, xfer->endpoint);
898
899#ifdef USB_DEBUG
900 if (ohcidebug > 10) {
901 ohci_dump_tds(xfer->td_transfer_first);
902 }
903#endif
904
905 /* reset scanner */
906
907 xfer->td_transfer_cache = xfer->td_transfer_first;
908
909 if (xfer->flags_int.control_xfr) {
910 if (xfer->flags_int.control_hdr) {
911 err = ohci_non_isoc_done_sub(xfer);
912 }
913 xfer->aframes = 1;
914
915 if (xfer->td_transfer_cache == NULL) {
916 goto done;
917 }
918 }
919 while (xfer->aframes != xfer->nframes) {
920 err = ohci_non_isoc_done_sub(xfer);
921 xfer->aframes++;
922
923 if (xfer->td_transfer_cache == NULL) {
924 goto done;
925 }
926 }
927
928 if (xfer->flags_int.control_xfr &&
929 !xfer->flags_int.control_act) {
930 err = ohci_non_isoc_done_sub(xfer);
931 }
932done:
933 ohci_device_done(xfer, err);
934}
935
936/*------------------------------------------------------------------------*
937 * ohci_check_transfer_sub
938 *------------------------------------------------------------------------*/
939static void
940ohci_check_transfer_sub(struct usb_xfer *xfer)
941{
942 ohci_td_t *td;
943 ohci_ed_t *ed;
944 uint32_t phy_start;
945 uint32_t td_flags;
946 uint32_t td_next;
947 uint16_t cc;
948
949 td = xfer->td_transfer_cache;
950
951 while (1) {
952 usb_pc_cpu_invalidate(td->page_cache);
953 phy_start = le32toh(td->td_cbp);
954 td_flags = le32toh(td->td_flags);
955 td_next = le32toh(td->td_next);
956
957 /* Check for last transfer */
958 if (((void *)td) == xfer->td_transfer_last) {
959 /* the transfer is finished */
960 td = NULL;
961 break;
962 }
963 /* Check transfer status */
964 cc = OHCI_TD_GET_CC(td_flags);
965 if (cc) {
966 /* the transfer is finished */
967 td = NULL;
968 break;
969 }
970 /*
971 * Check if we reached the last packet
972 * or if there is a short packet:
973 */
974
975 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
976 /* follow alt next */
977 td = td->alt_next;
978 break;
979 }
980 td = td->obj_next;
981 }
982
983 /* update transfer cache */
984
985 xfer->td_transfer_cache = td;
986
987 if (td) {
988 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
989
990 ed->ed_headp = td->td_self;
991 usb_pc_cpu_flush(ed->page_cache);
992
993 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
994
995 /*
996 * Make sure that the OHCI re-scans the schedule by
997 * writing the BLF and CLF bits:
998 */
999
1000 if (xfer->xroot->udev->flags.self_suspended) {
1001 /* nothing to do */
1002 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1003 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1004
1005 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1006 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1007 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1008
1009 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1010 }
1011 }
1012}
1013
1014/*------------------------------------------------------------------------*
1015 * ohci_check_transfer
1016 *
1017 * Return values:
1018 * 0: USB transfer is not finished
1019 * Else: USB transfer is finished
1020 *------------------------------------------------------------------------*/
1021static uint8_t
1022ohci_check_transfer(struct usb_xfer *xfer)
1023{
1024 ohci_ed_t *ed;
1025 uint32_t ed_headp;
1026 uint32_t ed_tailp;
1027
1028 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1029
1030 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1031
1032 usb_pc_cpu_invalidate(ed->page_cache);
1033 ed_headp = le32toh(ed->ed_headp);
1034 ed_tailp = le32toh(ed->ed_tailp);
1035
1036 if ((ed_headp & OHCI_HALTED) ||
1037 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1038 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1039 /* isochronous transfer */
1040 ohci_isoc_done(xfer);
1041 } else {
1042 if (xfer->flags_int.short_frames_ok) {
1043 ohci_check_transfer_sub(xfer);
1044 if (xfer->td_transfer_cache) {
1045 /* not finished yet */
1046 return (0);
1047 }
1048 }
1049 /* store data-toggle */
1050 if (ed_headp & OHCI_TOGGLECARRY) {
1051 xfer->endpoint->toggle_next = 1;
1052 } else {
1053 xfer->endpoint->toggle_next = 0;
1054 }
1055
1056 /* non-isochronous transfer */
1057 ohci_non_isoc_done(xfer);
1058 }
1059 return (1);
1060 }
1061 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1062 return (0);
1063}
1064
1065static void
1066ohci_rhsc_enable(ohci_softc_t *sc)
1067{
1068 DPRINTFN(5, "\n");
1069
1070 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1071
1072 sc->sc_eintrs |= OHCI_RHSC;
1073 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1074
1075 /* acknowledge any RHSC interrupt */
1076 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1077
1078 ohci_root_intr(sc);
1079}
1080
1081static void
1082ohci_interrupt_poll(ohci_softc_t *sc)
1083{
1084 struct usb_xfer *xfer;
1085
1086repeat:
1087 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1088 /*
1089 * check if transfer is transferred
1090 */
1091 if (ohci_check_transfer(xfer)) {
1092 /* queue has been modified */
1093 goto repeat;
1094 }
1095 }
1096}
1097
1098/*------------------------------------------------------------------------*
1099 * ohci_interrupt - OHCI interrupt handler
1100 *
1101 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1102 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1103 * is present !
1104 *------------------------------------------------------------------------*/
1105void
1106ohci_interrupt(ohci_softc_t *sc)
1107{
1108 struct ohci_hcca *hcca;
1109 uint32_t status;
1110 uint32_t done;
1111
1112 USB_BUS_LOCK(&sc->sc_bus);
1113
1114 hcca = ohci_get_hcca(sc);
1115
1116 DPRINTFN(16, "real interrupt\n");
1117
1118#ifdef USB_DEBUG
1119 if (ohcidebug > 15) {
1120 ohci_dumpregs(sc);
1121 }
1122#endif
1123
1124 done = le32toh(hcca->hcca_done_head);
1125
1126 /*
1127 * The LSb of done is used to inform the HC Driver that an interrupt
1128 * condition exists for both the Done list and for another event
1129 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1130 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1131 * the interrupt was caused by other than the HccaDoneHead update
1132 * and the HcInterruptStatus register needs to be accessed to
1133 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1134 * then a Done list update interrupt is indicated and if the LSb of
1135 * done is nonzero, then an additional interrupt event is indicated
1136 * and HcInterruptStatus should be checked to determine its cause.
1137 */
1138 if (done != 0) {
1139 status = 0;
1140
1141 if (done & ~OHCI_DONE_INTRS) {
1142 status |= OHCI_WDH;
1143 }
1144 if (done & OHCI_DONE_INTRS) {
1145 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1146 }
1147 hcca->hcca_done_head = 0;
1148
1149 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1150 } else {
1151 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1152 }
1153
1154 status &= ~OHCI_MIE;
1155 if (status == 0) {
1156 /*
1157 * nothing to be done (PCI shared
1158 * interrupt)
1159 */
1160 goto done;
1161 }
1162 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1163
1164 status &= sc->sc_eintrs;
1165 if (status == 0) {
1166 goto done;
1167 }
1168 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1169#if 0
1170 if (status & OHCI_SO) {
1171 /* XXX do what */
1172 }
1173#endif
1174 if (status & OHCI_RD) {
1175 printf("%s: resume detect\n", __FUNCTION__);
1176 /* XXX process resume detect */
1177 }
1178 if (status & OHCI_UE) {
1179 printf("%s: unrecoverable error, "
1180 "controller halted\n", __FUNCTION__);
1181 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1182 /* XXX what else */
1183 }
1184 if (status & OHCI_RHSC) {
1185 /*
1186 * Disable RHSC interrupt for now, because it will be
1187 * on until the port has been reset.
1188 */
1189 sc->sc_eintrs &= ~OHCI_RHSC;
1190 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1191
1192 ohci_root_intr(sc);
1193
1194 /* do not allow RHSC interrupts > 1 per second */
1195 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1196 (void *)&ohci_rhsc_enable, sc);
1197 }
1198 }
1199 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1200 if (status != 0) {
1201 /* Block unprocessed interrupts. XXX */
1202 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1203 sc->sc_eintrs &= ~status;
1204 printf("%s: blocking intrs 0x%x\n",
1205 __FUNCTION__, status);
1206 }
1207 /* poll all the USB transfers */
1208 ohci_interrupt_poll(sc);
1209
1210done:
1211 USB_BUS_UNLOCK(&sc->sc_bus);
1212}
1213
1214/*
1215 * called when a request does not complete
1216 */
1217static void
1218ohci_timeout(void *arg)
1219{
1220 struct usb_xfer *xfer = arg;
1221
1222 DPRINTF("xfer=%p\n", xfer);
1223
1224 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1225
1226 /* transfer is transferred */
1227 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1228}
1229
1230static void
1231ohci_do_poll(struct usb_bus *bus)
1232{
1233 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1234
1235 USB_BUS_LOCK(&sc->sc_bus);
1236 ohci_interrupt_poll(sc);
1237 USB_BUS_UNLOCK(&sc->sc_bus);
1238}
1239
1240static void
1241ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1242{
1243 struct usb_page_search buf_res;
1244 ohci_td_t *td;
1245 ohci_td_t *td_next;
1246 ohci_td_t *td_alt_next;
1247 uint32_t buf_offset;
1248 uint32_t average;
1249 uint32_t len_old;
1250 uint8_t shortpkt_old;
1251 uint8_t precompute;
1252
1253 td_alt_next = NULL;
1254 buf_offset = 0;
1255 shortpkt_old = temp->shortpkt;
1256 len_old = temp->len;
1257 precompute = 1;
1258
1259 /* software is used to detect short incoming transfers */
1260
1261 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1262 temp->td_flags |= htole32(OHCI_TD_R);
1263 } else {
1264 temp->td_flags &= ~htole32(OHCI_TD_R);
1265 }
1266
1267restart:
1268
1269 td = temp->td;
1270 td_next = temp->td_next;
1271
1272 while (1) {
1273 if (temp->len == 0) {
1274 if (temp->shortpkt) {
1275 break;
1276 }
1277 /* send a Zero Length Packet, ZLP, last */
1278
1279 temp->shortpkt = 1;
1280 average = 0;
1281
1282 } else {
1283 average = temp->average;
1284
1285 if (temp->len < average) {
1286 if (temp->len % temp->max_frame_size) {
1287 temp->shortpkt = 1;
1288 }
1289 average = temp->len;
1290 }
1291 }
1292
1293 if (td_next == NULL) {
1294 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1295 }
1296 /* get next TD */
1297
1298 td = td_next;
1299 td_next = td->obj_next;
1300
1301 /* check if we are pre-computing */
1302
1303 if (precompute) {
1304 /* update remaining length */
1305
1306 temp->len -= average;
1307
1308 continue;
1309 }
1310 /* fill out current TD */
1311 td->td_flags = temp->td_flags;
1312
1313 /* the next TD uses TOGGLE_CARRY */
1314 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1315
1316 if (average == 0) {
1317 /*
1318 * The buffer start and end phys addresses should be
1319 * 0x0 for a zero length packet.
1320 */
1321 td->td_cbp = 0;
1322 td->td_be = 0;
1323 td->len = 0;
1324
1325 } else {
1326 usbd_get_page(temp->pc, buf_offset, &buf_res);
1327 td->td_cbp = htole32(buf_res.physaddr);
1328 buf_offset += (average - 1);
1329
1330 usbd_get_page(temp->pc, buf_offset, &buf_res);
1331 td->td_be = htole32(buf_res.physaddr);
1332 buf_offset++;
1333
1334 td->len = average;
1335
1336 /* update remaining length */
1337
1338 temp->len -= average;
1339 }
1340
1341 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1342 /* we need to receive these frames one by one ! */
1343 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1344 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1345 td->td_next = htole32(OHCI_TD_NEXT_END);
1346 } else {
1347 if (td_next) {
1348 /* link the current TD with the next one */
1349 td->td_next = td_next->td_self;
1350 }
1351 }
1352
1353 td->alt_next = td_alt_next;
1354
1355 usb_pc_cpu_flush(td->page_cache);
1356 }
1357
1358 if (precompute) {
1359 precompute = 0;
1360
1361 /* setup alt next pointer, if any */
1362 if (temp->last_frame) {
1363 /* no alternate next */
1364 td_alt_next = NULL;
1365 } else {
1366 /* we use this field internally */
1367 td_alt_next = td_next;
1368 }
1369
1370 /* restore */
1371 temp->shortpkt = shortpkt_old;
1372 temp->len = len_old;
1373 goto restart;
1374 }
1375 temp->td = td;
1376 temp->td_next = td_next;
1377}
1378
1379static void
1380ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1381{
1382 struct ohci_std_temp temp;
1383 const struct usb_pipe_methods *methods;
1384 ohci_ed_t *ed;
1385 ohci_td_t *td;
1386 uint32_t ed_flags;
1387 uint32_t x;
1388
1389 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1390 xfer->address, UE_GET_ADDR(xfer->endpointno),
1391 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1392
1393 temp.average = xfer->max_hc_frame_size;
1394 temp.max_frame_size = xfer->max_frame_size;
1395
1396 /* toggle the DMA set we are using */
1397 xfer->flags_int.curr_dma_set ^= 1;
1398
1399 /* get next DMA set */
1400 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1401
1402 xfer->td_transfer_first = td;
1403 xfer->td_transfer_cache = td;
1404
1405 temp.td = NULL;
1406 temp.td_next = td;
1407 temp.last_frame = 0;
1408 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1409
1410 methods = xfer->endpoint->methods;
1411
1412 /* check if we should prepend a setup message */
1413
1414 if (xfer->flags_int.control_xfr) {
1415 if (xfer->flags_int.control_hdr) {
1416 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1417 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1418
1419 temp.len = xfer->frlengths[0];
1420 temp.pc = xfer->frbuffers + 0;
1421 temp.shortpkt = temp.len ? 1 : 0;
1422 /* check for last frame */
1423 if (xfer->nframes == 1) {
1424 /* no STATUS stage yet, SETUP is last */
1425 if (xfer->flags_int.control_act) {
1426 temp.last_frame = 1;
1427 temp.setup_alt_next = 0;
1428 }
1429 }
1430 ohci_setup_standard_chain_sub(&temp);
1431
1432 /*
1433 * XXX assume that the setup message is
1434 * contained within one USB packet:
1435 */
1436 xfer->endpoint->toggle_next = 1;
1437 }
1438 x = 1;
1439 } else {
1440 x = 0;
1441 }
1442 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1443
1444 /* set data toggle */
1445
1446 if (xfer->endpoint->toggle_next) {
1447 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1448 } else {
1449 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1450 }
1451
1452 /* set endpoint direction */
1453
1454 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1455 temp.td_flags |= htole32(OHCI_TD_IN);
1456 } else {
1457 temp.td_flags |= htole32(OHCI_TD_OUT);
1458 }
1459
1460 while (x != xfer->nframes) {
1461 /* DATA0 / DATA1 message */
1462
1463 temp.len = xfer->frlengths[x];
1464 temp.pc = xfer->frbuffers + x;
1465
1466 x++;
1467
1468 if (x == xfer->nframes) {
1469 if (xfer->flags_int.control_xfr) {
1470 /* no STATUS stage yet, DATA is last */
1471 if (xfer->flags_int.control_act) {
1472 temp.last_frame = 1;
1473 temp.setup_alt_next = 0;
1474 }
1475 } else {
1476 temp.last_frame = 1;
1477 temp.setup_alt_next = 0;
1478 }
1479 }
1480 if (temp.len == 0) {
1481 /* make sure that we send an USB packet */
1482
1483 temp.shortpkt = 0;
1484
1485 } else {
1486 /* regular data transfer */
1487
1488 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1489 }
1490
1491 ohci_setup_standard_chain_sub(&temp);
1492 }
1493
1494 /* check if we should append a status stage */
1495
1496 if (xfer->flags_int.control_xfr &&
1497 !xfer->flags_int.control_act) {
1498 /*
1499 * Send a DATA1 message and invert the current endpoint
1500 * direction.
1501 */
1502
1503 /* set endpoint direction and data toggle */
1504
1505 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1506 temp.td_flags = htole32(OHCI_TD_OUT |
1507 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1508 } else {
1509 temp.td_flags = htole32(OHCI_TD_IN |
1510 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1511 }
1512
1513 temp.len = 0;
1514 temp.pc = NULL;
1515 temp.shortpkt = 0;
1516 temp.last_frame = 1;
1517 temp.setup_alt_next = 0;
1518
1519 ohci_setup_standard_chain_sub(&temp);
1520 }
1521 td = temp.td;
1522
1523 /* Ensure that last TD is terminating: */
1524 td->td_next = htole32(OHCI_TD_NEXT_END);
1525 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1526 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1527
1528 usb_pc_cpu_flush(td->page_cache);
1529
1530 /* must have at least one frame! */
1531
1532 xfer->td_transfer_last = td;
1533
1534#ifdef USB_DEBUG
1535 if (ohcidebug > 8) {
1536 DPRINTF("nexttog=%d; data before transfer:\n",
1537 xfer->endpoint->toggle_next);
1538 ohci_dump_tds(xfer->td_transfer_first);
1539 }
1540#endif
1541
1542 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1543
1544 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1545 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1546 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1547
1548 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1549
1550 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1551 ed_flags |= OHCI_ED_SPEED;
1552 }
1553 ed->ed_flags = htole32(ed_flags);
1554
1555 td = xfer->td_transfer_first;
1556
1557 ed->ed_headp = td->td_self;
1558
1559 if (xfer->xroot->udev->flags.self_suspended == 0) {
1560 /* the append function will flush the endpoint descriptor */
1561 OHCI_APPEND_QH(ed, *ed_last);
1562
1563 if (methods == &ohci_device_bulk_methods) {
1564 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1565
1566 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1567 }
1568 if (methods == &ohci_device_ctrl_methods) {
1569 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1570
1571 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1572 }
1573 } else {
1574 usb_pc_cpu_flush(ed->page_cache);
1575 }
1576}
1577
1578static void
1579ohci_root_intr(ohci_softc_t *sc)
1580{
1581 uint32_t hstatus;
1582 uint16_t i;
1583 uint16_t m;
1584
1585 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1586
1587 /* clear any old interrupt data */
1588 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1589
1590 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1591 DPRINTF("sc=%p hstatus=0x%08x\n",
1592 sc, hstatus);
1593
1594 /* set bits */
1595 m = (sc->sc_noport + 1);
1596 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1597 m = (8 * sizeof(sc->sc_hub_idata));
1598 }
1599 for (i = 1; i < m; i++) {
1600 /* pick out CHANGE bits from the status register */
1601 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1602 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1603 DPRINTF("port %d changed\n", i);
1604 }
1605 }
1606
1607 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1608 sizeof(sc->sc_hub_idata));
1609}
1610
1611/* NOTE: "done" can be run two times in a row,
1612 * from close and from interrupt
1613 */
1614static void
1615ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1616{
1617 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1618 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1619 ohci_ed_t *ed;
1620
1621 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1622
1623 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1624 xfer, xfer->endpoint, error);
1625
1626 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1627 if (ed) {
1628 usb_pc_cpu_invalidate(ed->page_cache);
1629 }
1630 if (methods == &ohci_device_bulk_methods) {
1631 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1632 }
1633 if (methods == &ohci_device_ctrl_methods) {
1634 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1635 }
1636 if (methods == &ohci_device_intr_methods) {
1637 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1638 }
1639 if (methods == &ohci_device_isoc_methods) {
1640 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1641 }
1642 xfer->td_transfer_first = NULL;
1643 xfer->td_transfer_last = NULL;
1644
1645 /* dequeue transfer and start next transfer */
1646 usbd_transfer_done(xfer, error);
1647}
1648
1649/*------------------------------------------------------------------------*
1650 * ohci bulk support
1651 *------------------------------------------------------------------------*/
1652static void
1653ohci_device_bulk_open(struct usb_xfer *xfer)
1654{
1655 return;
1656}
1657
1658static void
1659ohci_device_bulk_close(struct usb_xfer *xfer)
1660{
1661 ohci_device_done(xfer, USB_ERR_CANCELLED);
1662}
1663
1664static void
1665ohci_device_bulk_enter(struct usb_xfer *xfer)
1666{
1667 return;
1668}
1669
1670static void
1671ohci_device_bulk_start(struct usb_xfer *xfer)
1672{
1673 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1674
1675 /* setup TD's and QH */
1676 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1677
1678 /* put transfer on interrupt queue */
1679 ohci_transfer_intr_enqueue(xfer);
1680}
1681
1682static const struct usb_pipe_methods ohci_device_bulk_methods =
1683{
1684 .open = ohci_device_bulk_open,
1685 .close = ohci_device_bulk_close,
1686 .enter = ohci_device_bulk_enter,
1687 .start = ohci_device_bulk_start,
1688};
1689
1690/*------------------------------------------------------------------------*
1691 * ohci control support
1692 *------------------------------------------------------------------------*/
1693static void
1694ohci_device_ctrl_open(struct usb_xfer *xfer)
1695{
1696 return;
1697}
1698
1699static void
1700ohci_device_ctrl_close(struct usb_xfer *xfer)
1701{
1702 ohci_device_done(xfer, USB_ERR_CANCELLED);
1703}
1704
1705static void
1706ohci_device_ctrl_enter(struct usb_xfer *xfer)
1707{
1708 return;
1709}
1710
1711static void
1712ohci_device_ctrl_start(struct usb_xfer *xfer)
1713{
1714 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1715
1716 /* setup TD's and QH */
1717 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1718
1719 /* put transfer on interrupt queue */
1720 ohci_transfer_intr_enqueue(xfer);
1721}
1722
1723static const struct usb_pipe_methods ohci_device_ctrl_methods =
1724{
1725 .open = ohci_device_ctrl_open,
1726 .close = ohci_device_ctrl_close,
1727 .enter = ohci_device_ctrl_enter,
1728 .start = ohci_device_ctrl_start,
1729};
1730
1731/*------------------------------------------------------------------------*
1732 * ohci interrupt support
1733 *------------------------------------------------------------------------*/
1734static void
1735ohci_device_intr_open(struct usb_xfer *xfer)
1736{
1737 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1738 uint16_t best;
1739 uint16_t bit;
1740 uint16_t x;
1741
1742 best = 0;
1743 bit = OHCI_NO_EDS / 2;
1744 while (bit) {
1745 if (xfer->interval >= bit) {
1746 x = bit;
1747 best = bit;
1748 while (x & bit) {
1749 if (sc->sc_intr_stat[x] <
1750 sc->sc_intr_stat[best]) {
1751 best = x;
1752 }
1753 x++;
1754 }
1755 break;
1756 }
1757 bit >>= 1;
1758 }
1759
1760 sc->sc_intr_stat[best]++;
1761 xfer->qh_pos = best;
1762
1763 DPRINTFN(3, "best=%d interval=%d\n",
1764 best, xfer->interval);
1765}
1766
1767static void
1768ohci_device_intr_close(struct usb_xfer *xfer)
1769{
1770 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1771
1772 sc->sc_intr_stat[xfer->qh_pos]--;
1773
1774 ohci_device_done(xfer, USB_ERR_CANCELLED);
1775}
1776
1777static void
1778ohci_device_intr_enter(struct usb_xfer *xfer)
1779{
1780 return;
1781}
1782
1783static void
1784ohci_device_intr_start(struct usb_xfer *xfer)
1785{
1786 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1787
1788 /* setup TD's and QH */
1789 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1790
1791 /* put transfer on interrupt queue */
1792 ohci_transfer_intr_enqueue(xfer);
1793}
1794
1795static const struct usb_pipe_methods ohci_device_intr_methods =
1796{
1797 .open = ohci_device_intr_open,
1798 .close = ohci_device_intr_close,
1799 .enter = ohci_device_intr_enter,
1800 .start = ohci_device_intr_start,
1801};
1802
1803/*------------------------------------------------------------------------*
1804 * ohci isochronous support
1805 *------------------------------------------------------------------------*/
1806static void
1807ohci_device_isoc_open(struct usb_xfer *xfer)
1808{
1809 return;
1810}
1811
1812static void
1813ohci_device_isoc_close(struct usb_xfer *xfer)
1814{
1815
1816 ohci_device_done(xfer, USB_ERR_CANCELLED);
1817}
1818
1819static void
1820ohci_device_isoc_enter(struct usb_xfer *xfer)
1821{
1822 struct usb_page_search buf_res;
1823 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1824 struct ohci_hcca *hcca;
1825 uint32_t buf_offset;
1826 uint32_t nframes;
1827 uint32_t startframe;
1828 uint32_t ed_flags;
1829 uint32_t *plen;
1830 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1831 uint16_t length;
1832 uint8_t ncur;
1833 ohci_itd_t *td;
1834 ohci_itd_t *td_last = NULL;
1835 ohci_ed_t *ed;
1836
1837 hcca = ohci_get_hcca(sc);
1838
1839 nframes = le32toh(hcca->hcca_frame_number);
1840
1841 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1842 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1843
1844 if (usbd_xfer_get_isochronous_start_frame(
1845 xfer, nframes, 0, 1, 0xFFFF, &startframe))
1846 DPRINTFN(3, "start next=%d\n", startframe);
1847
1848 /* get the real number of frames */
1849
1850 nframes = xfer->nframes;
1851
1852 buf_offset = 0;
1853
1854 plen = xfer->frlengths;
1855
1856 /* toggle the DMA set we are using */
1857 xfer->flags_int.curr_dma_set ^= 1;
1858
1859 /* get next DMA set */
1860 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1861
1862 xfer->td_transfer_first = td;
1863
1864 ncur = 0;
1865 length = 0;
1866
1867 while (nframes--) {
1868 if (td == NULL) {
1869 panic("%s:%d: out of TD's\n",
1870 __FUNCTION__, __LINE__);
1871 }
1872 itd_offset[ncur] = length;
1873 buf_offset += *plen;
1874 length += *plen;
1875 plen++;
1876 ncur++;
1877
1878 if ( /* check if the ITD is full */
1879 (ncur == OHCI_ITD_NOFFSET) ||
1880 /* check if we have put more than 4K into the ITD */
1881 (length & 0xF000) ||
1882 /* check if it is the last frame */
1883 (nframes == 0)) {
1884 /* fill current ITD */
1885 td->itd_flags = htole32(
1886 OHCI_ITD_NOCC |
1887 OHCI_ITD_SET_SF(startframe) |
1888 OHCI_ITD_NOINTR |
1889 OHCI_ITD_SET_FC(ncur));
1890
1891 td->frames = ncur;
1892 startframe += ncur;
1893
1894 if (length == 0) {
1895 /* all zero */
1896 td->itd_bp0 = 0;
1897 td->itd_be = ~0;
1898
1899 while (ncur--) {
1900 td->itd_offset[ncur] =
1901 htole16(OHCI_ITD_MK_OFFS(0));
1902 }
1903 } else {
1904 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1905 length = OHCI_PAGE_MASK(buf_res.physaddr);
1906 buf_res.physaddr =
1907 OHCI_PAGE(buf_res.physaddr);
1908 td->itd_bp0 = htole32(buf_res.physaddr);
1909 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1910 td->itd_be = htole32(buf_res.physaddr);
1911
1912 while (ncur--) {
1913 itd_offset[ncur] += length;
1914 itd_offset[ncur] =
1915 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1916 td->itd_offset[ncur] =
1917 htole16(itd_offset[ncur]);
1918 }
1919 }
1920 ncur = 0;
1921 length = 0;
1922 td_last = td;
1923 td = td->obj_next;
1924
1925 if (td) {
1926 /* link the last TD with the next one */
1927 td_last->itd_next = td->itd_self;
1928 }
1929 usb_pc_cpu_flush(td_last->page_cache);
1930 }
1931 }
1932
1933 /* update the last TD */
1934 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1935 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1936 td_last->itd_next = 0;
1937
1938 usb_pc_cpu_flush(td_last->page_cache);
1939
1940 xfer->td_transfer_last = td_last;
1941
1942#ifdef USB_DEBUG
1943 if (ohcidebug > 8) {
1944 DPRINTF("data before transfer:\n");
1945 ohci_dump_itds(xfer->td_transfer_first);
1946 }
1947#endif
1948 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1949
1950 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1951 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1952 else
1953 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1954
1955 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1956 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1957 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1958
1959 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1960 ed_flags |= OHCI_ED_SPEED;
1961 }
1962 ed->ed_flags = htole32(ed_flags);
1963
1964 td = xfer->td_transfer_first;
1965
1966 ed->ed_headp = td->itd_self;
1967
1968 /* isochronous transfers are not affected by suspend / resume */
1969 /* the append function will flush the endpoint descriptor */
1970
1971 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
1972}
1973
1974static void
1975ohci_device_isoc_start(struct usb_xfer *xfer)
1976{
1977 /* put transfer on interrupt queue */
1978 ohci_transfer_intr_enqueue(xfer);
1979}
1980
1981static const struct usb_pipe_methods ohci_device_isoc_methods =
1982{
1983 .open = ohci_device_isoc_open,
1984 .close = ohci_device_isoc_close,
1985 .enter = ohci_device_isoc_enter,
1986 .start = ohci_device_isoc_start,
1987};
1988
1989/*------------------------------------------------------------------------*
1990 * ohci root control support
1991 *------------------------------------------------------------------------*
1992 * Simulate a hardware hub by handling all the necessary requests.
1993 *------------------------------------------------------------------------*/
1994
1995static const
1996struct usb_device_descriptor ohci_devd =
1997{
1998 sizeof(struct usb_device_descriptor),
1999 UDESC_DEVICE, /* type */
2000 {0x00, 0x01}, /* USB version */
2001 UDCLASS_HUB, /* class */
2002 UDSUBCLASS_HUB, /* subclass */
2003 UDPROTO_FSHUB, /* protocol */
2004 64, /* max packet */
2005 {0}, {0}, {0x00, 0x01}, /* device id */
2006 1, 2, 0, /* string indexes */
2007 1 /* # of configurations */
2008};
2009
2010static const
2011struct ohci_config_desc ohci_confd =
2012{
2013 .confd = {
2014 .bLength = sizeof(struct usb_config_descriptor),
2015 .bDescriptorType = UDESC_CONFIG,
2016 .wTotalLength[0] = sizeof(ohci_confd),
2017 .bNumInterface = 1,
2018 .bConfigurationValue = 1,
2019 .iConfiguration = 0,
2020 .bmAttributes = UC_SELF_POWERED,
2021 .bMaxPower = 0, /* max power */
2022 },
2023 .ifcd = {
2024 .bLength = sizeof(struct usb_interface_descriptor),
2025 .bDescriptorType = UDESC_INTERFACE,
2026 .bNumEndpoints = 1,
2027 .bInterfaceClass = UICLASS_HUB,
2028 .bInterfaceSubClass = UISUBCLASS_HUB,
2029 .bInterfaceProtocol = 0,
2030 },
2031 .endpd = {
2032 .bLength = sizeof(struct usb_endpoint_descriptor),
2033 .bDescriptorType = UDESC_ENDPOINT,
2034 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2035 .bmAttributes = UE_INTERRUPT,
2036 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2037 .bInterval = 255,
2038 },
2039};
2040
2041static const
2042struct usb_hub_descriptor ohci_hubd =
2043{
2044 .bDescLength = 0, /* dynamic length */
2045 .bDescriptorType = UDESC_HUB,
2046};
2047
2048static usb_error_t
2049ohci_roothub_exec(struct usb_device *udev,
2050 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2051{
2052 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2053 const void *ptr;
2054 const char *str_ptr;
2055 uint32_t port;
2056 uint32_t v;
2057 uint16_t len;
2058 uint16_t value;
2059 uint16_t index;
2060 uint8_t l;
2061 usb_error_t err;
2062
2063 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2064
2065 /* buffer reset */
2066 ptr = (const void *)&sc->sc_hub_desc.temp;
2067 len = 0;
2068 err = 0;
2069
2070 value = UGETW(req->wValue);
2071 index = UGETW(req->wIndex);
2072
2073 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2074 "wValue=0x%04x wIndex=0x%04x\n",
2075 req->bmRequestType, req->bRequest,
2076 UGETW(req->wLength), value, index);
2077
2078#define C(x,y) ((x) | ((y) << 8))
2079 switch (C(req->bRequest, req->bmRequestType)) {
2080 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2081 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2082 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2083 /*
2084 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2085 * for the integrated root hub.
2086 */
2087 break;
2088 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2089 len = 1;
2090 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2091 break;
2092 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2093 switch (value >> 8) {
2094 case UDESC_DEVICE:
2095 if ((value & 0xff) != 0) {
2096 err = USB_ERR_IOERROR;
2097 goto done;
2098 }
2099 len = sizeof(ohci_devd);
2100 ptr = (const void *)&ohci_devd;
2101 break;
2102
2103 case UDESC_CONFIG:
2104 if ((value & 0xff) != 0) {
2105 err = USB_ERR_IOERROR;
2106 goto done;
2107 }
2108 len = sizeof(ohci_confd);
2109 ptr = (const void *)&ohci_confd;
2110 break;
2111
2112 case UDESC_STRING:
2113 switch (value & 0xff) {
2114 case 0: /* Language table */
2115 str_ptr = "\001";
2116 break;
2117
2118 case 1: /* Vendor */
2119 str_ptr = sc->sc_vendor;
2120 break;
2121
2122 case 2: /* Product */
2123 str_ptr = "OHCI root HUB";
2124 break;
2125
2126 default:
2127 str_ptr = "";
2128 break;
2129 }
2130
2131 len = usb_make_str_desc(
2132 sc->sc_hub_desc.temp,
2133 sizeof(sc->sc_hub_desc.temp),
2134 str_ptr);
2135 break;
2136
2137 default:
2138 err = USB_ERR_IOERROR;
2139 goto done;
2140 }
2141 break;
2142 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2143 len = 1;
2144 sc->sc_hub_desc.temp[0] = 0;
2145 break;
2146 case C(UR_GET_STATUS, UT_READ_DEVICE):
2147 len = 2;
2148 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2149 break;
2150 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2151 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2152 len = 2;
2153 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2154 break;
2155 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2156 if (value >= OHCI_MAX_DEVICES) {
2157 err = USB_ERR_IOERROR;
2158 goto done;
2159 }
2160 sc->sc_addr = value;
2161 break;
2162 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2163 if ((value != 0) && (value != 1)) {
2164 err = USB_ERR_IOERROR;
2165 goto done;
2166 }
2167 sc->sc_conf = value;
2168 break;
2169 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2170 break;
2171 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2172 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2173 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2174 err = USB_ERR_IOERROR;
2175 goto done;
2176 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2177 break;
2178 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2179 break;
2180 /* Hub requests */
2181 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2182 break;
2183 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2184 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2185 "port=%d feature=%d\n",
2186 index, value);
2187 if ((index < 1) ||
2188 (index > sc->sc_noport)) {
2189 err = USB_ERR_IOERROR;
2190 goto done;
2191 }
2192 port = OHCI_RH_PORT_STATUS(index);
2193 switch (value) {
2194 case UHF_PORT_ENABLE:
2195 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2196 break;
2197 case UHF_PORT_SUSPEND:
2198 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2199 break;
2200 case UHF_PORT_POWER:
2201 /* Yes, writing to the LOW_SPEED bit clears power. */
2202 OWRITE4(sc, port, UPS_LOW_SPEED);
2203 break;
2204 case UHF_C_PORT_CONNECTION:
2205 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2206 break;
2207 case UHF_C_PORT_ENABLE:
2208 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2209 break;
2210 case UHF_C_PORT_SUSPEND:
2211 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2212 break;
2213 case UHF_C_PORT_OVER_CURRENT:
2214 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2215 break;
2216 case UHF_C_PORT_RESET:
2217 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2218 break;
2219 default:
2220 err = USB_ERR_IOERROR;
2221 goto done;
2222 }
2223 switch (value) {
2224 case UHF_C_PORT_CONNECTION:
2225 case UHF_C_PORT_ENABLE:
2226 case UHF_C_PORT_SUSPEND:
2227 case UHF_C_PORT_OVER_CURRENT:
2228 case UHF_C_PORT_RESET:
2229 /* enable RHSC interrupt if condition is cleared. */
2230 if ((OREAD4(sc, port) >> 16) == 0)
2231 ohci_rhsc_enable(sc);
2232 break;
2233 default:
2234 break;
2235 }
2236 break;
2237 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2238 if ((value & 0xff) != 0) {
2239 err = USB_ERR_IOERROR;
2240 goto done;
2241 }
2242 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2243
2244 sc->sc_hub_desc.hubd = ohci_hubd;
2245 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2246 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2247 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2248 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2249 /* XXX overcurrent */
2250 );
2251 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2252 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2253
2254 for (l = 0; l < sc->sc_noport; l++) {
2255 if (v & 1) {
2256 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2257 }
2258 v >>= 1;
2259 }
2260 sc->sc_hub_desc.hubd.bDescLength =
2261 8 + ((sc->sc_noport + 7) / 8);
2262 len = sc->sc_hub_desc.hubd.bDescLength;
2263 break;
2264
2265 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2266 len = 16;
2267 memset(sc->sc_hub_desc.temp, 0, 16);
2268 break;
2269 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2270 DPRINTFN(9, "get port status i=%d\n",
2271 index);
2272 if ((index < 1) ||
2273 (index > sc->sc_noport)) {
2274 err = USB_ERR_IOERROR;
2275 goto done;
2276 }
2277 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2278 DPRINTFN(9, "port status=0x%04x\n", v);
2279 v &= ~UPS_PORT_MODE_DEVICE; /* force host mode */
2280 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2281 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2282 len = sizeof(sc->sc_hub_desc.ps);
2283 break;
2284 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2285 err = USB_ERR_IOERROR;
2286 goto done;
2287 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2288 break;
2289 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2290 if ((index < 1) ||
2291 (index > sc->sc_noport)) {
2292 err = USB_ERR_IOERROR;
2293 goto done;
2294 }
2295 port = OHCI_RH_PORT_STATUS(index);
2296 switch (value) {
2297 case UHF_PORT_ENABLE:
2298 OWRITE4(sc, port, UPS_PORT_ENABLED);
2299 break;
2300 case UHF_PORT_SUSPEND:
2301 OWRITE4(sc, port, UPS_SUSPEND);
2302 break;
2303 case UHF_PORT_RESET:
2304 DPRINTFN(6, "reset port %d\n", index);
2305 OWRITE4(sc, port, UPS_RESET);
2306 for (v = 0;; v++) {
2307 if (v < 12) {
2308 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2309 USB_MS_TO_TICKS(usb_port_root_reset_delay));
2310
2311 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2312 break;
2313 }
2314 } else {
2315 err = USB_ERR_TIMEOUT;
2316 goto done;
2317 }
2318 }
2319 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2320 index, OREAD4(sc, port));
2321 break;
2322 case UHF_PORT_POWER:
2323 DPRINTFN(3, "set port power %d\n", index);
2324 OWRITE4(sc, port, UPS_PORT_POWER);
2325 break;
2326 default:
2327 err = USB_ERR_IOERROR;
2328 goto done;
2329 }
2330 break;
2331 default:
2332 err = USB_ERR_IOERROR;
2333 goto done;
2334 }
2335done:
2336 *plength = len;
2337 *pptr = ptr;
2338 return (err);
2339}
2340
2341static void
2342ohci_xfer_setup(struct usb_setup_params *parm)
2343{
2344 struct usb_page_search page_info;
2345 struct usb_page_cache *pc;
2346 struct usb_xfer *xfer;
2347 void *last_obj;
2348 uint32_t ntd;
2349 uint32_t nitd;
2350 uint32_t nqh;
2351 uint32_t n;
2352
2353 xfer = parm->curr_xfer;
2354
2355 parm->hc_max_packet_size = 0x500;
2356 parm->hc_max_packet_count = 1;
2357 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2358
2359 /*
2360 * calculate ntd and nqh
2361 */
2362 if (parm->methods == &ohci_device_ctrl_methods) {
2363 xfer->flags_int.bdma_enable = 1;
2364
2365 usbd_transfer_setup_sub(parm);
2366
2367 nitd = 0;
2368 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2369 + (xfer->max_data_length / xfer->max_hc_frame_size));
2370 nqh = 1;
2371
2372 } else if (parm->methods == &ohci_device_bulk_methods) {
2373 xfer->flags_int.bdma_enable = 1;
2374
2375 usbd_transfer_setup_sub(parm);
2376
2377 nitd = 0;
2378 ntd = ((2 * xfer->nframes)
2379 + (xfer->max_data_length / xfer->max_hc_frame_size));
2380 nqh = 1;
2381
2382 } else if (parm->methods == &ohci_device_intr_methods) {
2383 xfer->flags_int.bdma_enable = 1;
2384
2385 usbd_transfer_setup_sub(parm);
2386
2387 nitd = 0;
2388 ntd = ((2 * xfer->nframes)
2389 + (xfer->max_data_length / xfer->max_hc_frame_size));
2390 nqh = 1;
2391
2392 } else if (parm->methods == &ohci_device_isoc_methods) {
2393 xfer->flags_int.bdma_enable = 1;
2394
2395 usbd_transfer_setup_sub(parm);
2396
2397 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2398 howmany(xfer->nframes, OHCI_ITD_NOFFSET) +
2399 1 /* EXTRA */ );
2400 ntd = 0;
2401 nqh = 1;
2402
2403 } else {
2404 usbd_transfer_setup_sub(parm);
2405
2406 nitd = 0;
2407 ntd = 0;
2408 nqh = 0;
2409 }
2410
2411alloc_dma_set:
2412
2413 if (parm->err) {
2414 return;
2415 }
2416 last_obj = NULL;
2417
2418 if (usbd_transfer_setup_sub_malloc(
2419 parm, &pc, sizeof(ohci_td_t),
2420 OHCI_TD_ALIGN, ntd)) {
2421 parm->err = USB_ERR_NOMEM;
2422 return;
2423 }
2424 if (parm->buf) {
2425 for (n = 0; n != ntd; n++) {
2426 ohci_td_t *td;
2427
2428 usbd_get_page(pc + n, 0, &page_info);
2429
2430 td = page_info.buffer;
2431
2432 /* init TD */
2433 td->td_self = htole32(page_info.physaddr);
2434 td->obj_next = last_obj;
2435 td->page_cache = pc + n;
2436
2437 last_obj = td;
2438
2439 usb_pc_cpu_flush(pc + n);
2440 }
2441 }
2442 if (usbd_transfer_setup_sub_malloc(
2443 parm, &pc, sizeof(ohci_itd_t),
2444 OHCI_ITD_ALIGN, nitd)) {
2445 parm->err = USB_ERR_NOMEM;
2446 return;
2447 }
2448 if (parm->buf) {
2449 for (n = 0; n != nitd; n++) {
2450 ohci_itd_t *itd;
2451
2452 usbd_get_page(pc + n, 0, &page_info);
2453
2454 itd = page_info.buffer;
2455
2456 /* init TD */
2457 itd->itd_self = htole32(page_info.physaddr);
2458 itd->obj_next = last_obj;
2459 itd->page_cache = pc + n;
2460
2461 last_obj = itd;
2462
2463 usb_pc_cpu_flush(pc + n);
2464 }
2465 }
2466 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2467
2468 last_obj = NULL;
2469
2470 if (usbd_transfer_setup_sub_malloc(
2471 parm, &pc, sizeof(ohci_ed_t),
2472 OHCI_ED_ALIGN, nqh)) {
2473 parm->err = USB_ERR_NOMEM;
2474 return;
2475 }
2476 if (parm->buf) {
2477 for (n = 0; n != nqh; n++) {
2478 ohci_ed_t *ed;
2479
2480 usbd_get_page(pc + n, 0, &page_info);
2481
2482 ed = page_info.buffer;
2483
2484 /* init QH */
2485 ed->ed_self = htole32(page_info.physaddr);
2486 ed->obj_next = last_obj;
2487 ed->page_cache = pc + n;
2488
2489 last_obj = ed;
2490
2491 usb_pc_cpu_flush(pc + n);
2492 }
2493 }
2494 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2495
2496 if (!xfer->flags_int.curr_dma_set) {
2497 xfer->flags_int.curr_dma_set = 1;
2498 goto alloc_dma_set;
2499 }
2500}
2501
2502static void
2503ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2504 struct usb_endpoint *ep)
2505{
2506 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2507
2508 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2509 ep, udev->address,
2510 edesc->bEndpointAddress, udev->flags.usb_mode,
2511 sc->sc_addr);
2512
2513 if (udev->device_index != sc->sc_addr) {
2514 switch (edesc->bmAttributes & UE_XFERTYPE) {
2515 case UE_CONTROL:
2516 ep->methods = &ohci_device_ctrl_methods;
2517 break;
2518 case UE_INTERRUPT:
2519 ep->methods = &ohci_device_intr_methods;
2520 break;
2521 case UE_ISOCHRONOUS:
2522 if (udev->speed == USB_SPEED_FULL) {
2523 ep->methods = &ohci_device_isoc_methods;
2524 }
2525 break;
2526 case UE_BULK:
2527 ep->methods = &ohci_device_bulk_methods;
2528 break;
2529 default:
2530 /* do nothing */
2531 break;
2532 }
2533 }
2534}
2535
2536static void
2537ohci_xfer_unsetup(struct usb_xfer *xfer)
2538{
2539 return;
2540}
2541
2542static void
2543ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2544{
2545 /*
2546 * Wait until hardware has finished any possible use of the
2547 * transfer descriptor(s) and QH
2548 */
2549 *pus = (1125); /* microseconds */
2550}
2551
2552static void
2553ohci_device_resume(struct usb_device *udev)
2554{
2555 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2556 struct usb_xfer *xfer;
2557 const struct usb_pipe_methods *methods;
2558 ohci_ed_t *ed;
2559
2560 DPRINTF("\n");
2561
2562 USB_BUS_LOCK(udev->bus);
2563
2564 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2565 if (xfer->xroot->udev == udev) {
2566 methods = xfer->endpoint->methods;
2567 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2568
2569 if (methods == &ohci_device_bulk_methods) {
2570 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2571 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2572 }
2573 if (methods == &ohci_device_ctrl_methods) {
2574 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2575 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2576 }
2577 if (methods == &ohci_device_intr_methods) {
2578 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2579 }
2580 }
2581 }
2582
2583 USB_BUS_UNLOCK(udev->bus);
2584
2585 return;
2586}
2587
2588static void
2589ohci_device_suspend(struct usb_device *udev)
2590{
2591 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2592 struct usb_xfer *xfer;
2593 const struct usb_pipe_methods *methods;
2594 ohci_ed_t *ed;
2595
2596 DPRINTF("\n");
2597
2598 USB_BUS_LOCK(udev->bus);
2599
2600 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2601 if (xfer->xroot->udev == udev) {
2602 methods = xfer->endpoint->methods;
2603 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2604
2605 if (methods == &ohci_device_bulk_methods) {
2606 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2607 }
2608 if (methods == &ohci_device_ctrl_methods) {
2609 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2610 }
2611 if (methods == &ohci_device_intr_methods) {
2612 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2613 }
2614 }
2615 }
2616
2617 USB_BUS_UNLOCK(udev->bus);
2618
2619 return;
2620}
2621
2622static void
2623ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2624{
2625 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2626
2627 switch (state) {
2628 case USB_HW_POWER_SUSPEND:
2629 case USB_HW_POWER_SHUTDOWN:
2630 ohci_suspend(sc);
2631 break;
2632 case USB_HW_POWER_RESUME:
2633 ohci_resume(sc);
2634 break;
2635 default:
2636 break;
2637 }
2638}
2639
2640static void
2641ohci_set_hw_power(struct usb_bus *bus)
2642{
2643 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2644 uint32_t temp;
2645 uint32_t flags;
2646
2647 DPRINTF("\n");
2648
2649 USB_BUS_LOCK(bus);
2650
2651 flags = bus->hw_power_state;
2652
2653 temp = OREAD4(sc, OHCI_CONTROL);
2654 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2655
2656 if (flags & USB_HW_POWER_CONTROL)
2657 temp |= OHCI_CLE;
2658
2659 if (flags & USB_HW_POWER_BULK)
2660 temp |= OHCI_BLE;
2661
2662 if (flags & USB_HW_POWER_INTERRUPT)
2663 temp |= OHCI_PLE;
2664
2665 if (flags & USB_HW_POWER_ISOC)
2666 temp |= OHCI_IE | OHCI_PLE;
2667
2668 OWRITE4(sc, OHCI_CONTROL, temp);
2669
2670 USB_BUS_UNLOCK(bus);
2671
2672 return;
2673}
2674
2675static const struct usb_bus_methods ohci_bus_methods =
2676{
2677 .endpoint_init = ohci_ep_init,
2678 .xfer_setup = ohci_xfer_setup,
2679 .xfer_unsetup = ohci_xfer_unsetup,
2680 .get_dma_delay = ohci_get_dma_delay,
2681 .device_resume = ohci_device_resume,
2682 .device_suspend = ohci_device_suspend,
2683 .set_hw_power = ohci_set_hw_power,
2684 .set_hw_power_sleep = ohci_set_hw_power_sleep,
2685 .roothub_exec = ohci_roothub_exec,
2686 .xfer_poll = ohci_do_poll,
2687};
debug
static int debug
Definition: cfumass.c:73
SYSCTL_NODE
static SYSCTL_NODE(_hw_usb, OID_AUTO, dwc_otg, CTLFLAG_RW|CTLFLAG_MPSAFE, 0, "USB DWC OTG")
SYSCTL_INT
SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, phy_type, CTLFLAG_RDTUN, &dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2/3 - ULPI/HSIC/INTERNAL/UTMI+")
len
uint16_t len
Definition: ehci.h:41
n
uint8_t n
Definition: if_run.c:612
error
struct @109 error
ohci_root_intr
static void ohci_root_intr(ohci_softc_t *sc)
Definition: ohci.c:1579
ohci_controller_init
static usb_error_t ohci_controller_init(ohci_softc_t *sc, int do_suspend)
Definition: ohci.c:172
ohci_ep_init
static void ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc, struct usb_endpoint *ep)
Definition: ohci.c:2503
_ohci_remove_qh
static ohci_ed_t * _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
Definition: ohci.c:691
ohci_device_isoc_methods
static const struct usb_pipe_methods ohci_device_isoc_methods
Definition: ohci.c:119
ohci_set_hw_power_sleep
static void ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
Definition: ohci.c:2623
ohci_set_hw_power
static void ohci_set_hw_power(struct usb_bus *bus)
Definition: ohci.c:2641
ohci_check_transfer_sub
static void ohci_check_transfer_sub(struct usb_xfer *xfer)
Definition: ohci.c:940
ohci_device_intr_open
static void ohci_device_intr_open(struct usb_xfer *xfer)
Definition: ohci.c:1735
OHCI_BUS2SC
#define OHCI_BUS2SC(bus)
Definition: ohci.c:81
OWRITE4
#define OWRITE4(sc, r, x)
Definition: ohci.c:107
ohci_timeout
static void ohci_timeout(void *arg)
Definition: ohci.c:1218
ohci_device_bulk_close
static void ohci_device_bulk_close(struct usb_xfer *xfer)
Definition: ohci.c:1659
ohci_device_isoc_start
static void ohci_device_isoc_start(struct usb_xfer *xfer)
Definition: ohci.c:1975
ohci_rhsc_enable
static void ohci_rhsc_enable(ohci_softc_t *sc)
Definition: ohci.c:1066
ohci_interrupt
void ohci_interrupt(ohci_softc_t *sc)
Definition: ohci.c:1106
OHCI_REMOVE_QH
#define OHCI_REMOVE_QH(sed, last)
Definition: ohci.c:689
ohci_device_suspend
static void ohci_device_suspend(struct usb_device *udev)
Definition: ohci.c:2589
ohci_device_intr_close
static void ohci_device_intr_close(struct usb_xfer *xfer)
Definition: ohci.c:1768
ohci_device_intr_start
static void ohci_device_intr_start(struct usb_xfer *xfer)
Definition: ohci.c:1784
ohci_detach
void ohci_detach(struct ohci_softc *sc)
Definition: ohci.c:437
ohci_device_ctrl_start
static void ohci_device_ctrl_start(struct usb_xfer *xfer)
Definition: ohci.c:1712
ohci_non_isoc_done
static void ohci_non_isoc_done(struct usb_xfer *xfer)
Definition: ohci.c:892
ohci_device_isoc_open
static void ohci_device_isoc_open(struct usb_xfer *xfer)
Definition: ohci.c:1807
ohci_get_dma_delay
static void ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
Definition: ohci.c:2543
ohci_devd
static const struct usb_device_descriptor ohci_devd
Definition: ohci.c:1996
C
#define C(x, y)
ohci_device_ctrl_open
static void ohci_device_ctrl_open(struct usb_xfer *xfer)
Definition: ohci.c:1694
ohci_init_ed
static struct ohci_ed * ohci_init_ed(struct usb_page_cache *pc)
Definition: ohci.c:306
OREAD4
#define OREAD4(sc, r)
Definition: ohci.c:111
ohci_device_bulk_start
static void ohci_device_bulk_start(struct usb_xfer *xfer)
Definition: ohci.c:1671
ohci_do_poll
static void ohci_do_poll(struct usb_bus *bus)
Definition: ohci.c:1231
ohci_device_resume
static void ohci_device_resume(struct usb_device *udev)
Definition: ohci.c:2553
ohci_xfer_setup
static void ohci_xfer_setup(struct usb_setup_params *parm)
Definition: ohci.c:2342
ohci_device_ctrl_close
static void ohci_device_ctrl_close(struct usb_xfer *xfer)
Definition: ohci.c:1700
ohci_isoc_done
static void ohci_isoc_done(struct usb_xfer *xfer)
Definition: ohci.c:718
ohci_bus_methods
static const struct usb_bus_methods ohci_bus_methods
Definition: ohci.c:115
OHCI_APPEND_QH
#define OHCI_APPEND_QH(sed, last)
Definition: ohci.c:656
ohci_hubd
static const struct usb_hub_descriptor ohci_hubd
Definition: ohci.c:2042
ohci_transfer_intr_enqueue
static void ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
Definition: ohci.c:641
ohci_setup_standard_chain
static void ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
Definition: ohci.c:1380
ohci_device_intr_methods
static const struct usb_pipe_methods ohci_device_intr_methods
Definition: ohci.c:118
ohci_device_isoc_enter
static void ohci_device_isoc_enter(struct usb_xfer *xfer)
Definition: ohci.c:1820
ohci_init
usb_error_t ohci_init(ohci_softc_t *sc)
Definition: ohci.c:323
ohci_device_done
static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
Definition: ohci.c:1615
ohci_device_isoc_close
static void ohci_device_isoc_close(struct usb_xfer *xfer)
Definition: ohci.c:1813
ohci_device_intr_enter
static void ohci_device_intr_enter(struct usb_xfer *xfer)
Definition: ohci.c:1778
ohci_device_bulk_open
static void ohci_device_bulk_open(struct usb_xfer *xfer)
Definition: ohci.c:1653
OHCI_INTR_ENDPT
#define OHCI_INTR_ENDPT
Definition: ohci.c:113
ohci_device_ctrl_methods
static const struct usb_pipe_methods ohci_device_ctrl_methods
Definition: ohci.c:117
ohci_setup_standard_chain_sub
static void ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
Definition: ohci.c:1241
ohci_non_isoc_done_sub
static usb_error_t ohci_non_isoc_done_sub(struct usb_xfer *xfer)
Definition: ohci.c:800
ohci_iterate_hw_softc
void ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
Definition: ohci.c:148
ohci_device_bulk_enter
static void ohci_device_bulk_enter(struct usb_xfer *xfer)
Definition: ohci.c:1665
ohci_suspend
static void ohci_suspend(ohci_softc_t *sc)
Definition: ohci.c:455
ohci_roothub_exec
static usb_error_t ohci_roothub_exec(struct usb_device *udev, struct usb_device_request *req, const void **pptr, uint16_t *plength)
Definition: ohci.c:2049
ohci_confd
static const struct ohci_config_desc ohci_confd
Definition: ohci.c:2011
ohci_check_transfer
static uint8_t ohci_check_transfer(struct usb_xfer *xfer)
Definition: ohci.c:1022
ohci_interrupt_poll
static void ohci_interrupt_poll(ohci_softc_t *sc)
Definition: ohci.c:1082
ohci_device_ctrl_enter
static void ohci_device_ctrl_enter(struct usb_xfer *xfer)
Definition: ohci.c:1706
_ohci_append_qh
static ohci_ed_t * _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
Definition: ohci.c:658
ohci_device_bulk_methods
static const struct usb_pipe_methods ohci_device_bulk_methods
Definition: ohci.c:116
ohci_xfer_unsetup
static void ohci_xfer_unsetup(struct usb_xfer *xfer)
Definition: ohci.c:2537
ohci_resume
static void ohci_resume(ohci_softc_t *sc)
Definition: ohci.c:469
ohci_get_hcca
static struct ohci_hcca * ohci_get_hcca(ohci_softc_t *sc)
Definition: ohci.c:141
OHCI_ED_SPEED
#define OHCI_ED_SPEED
Definition: ohci.h:10
OHCI_ITD_NOFFSET
#define OHCI_ITD_NOFFSET
Definition: ohci.h:10
OHCI_TD_TOGGLE_1
#define OHCI_TD_TOGGLE_1
Definition: ohci.h:12
OHCI_TD_SET_DI
#define OHCI_TD_SET_DI(x)
Definition: ohci.h:7
OHCI_MAX_DEVICES
#define OHCI_MAX_DEVICES
Definition: ohci.h:37
OHCI_TD_NEXT_END
#define OHCI_TD_NEXT_END
Definition: ohci.h:20
OHCI_PAGE_SIZE
#define OHCI_PAGE_SIZE
Definition: ohci.h:48
OHCI_ITD_GET_CC
#define OHCI_ITD_GET_CC(x)
Definition: ohci.h:8
OHCI_ITD_SET_FC
#define OHCI_ITD_SET_FC(x)
Definition: ohci.h:7
OHCI_TD_TOGGLE_0
#define OHCI_TD_TOGGLE_0
Definition: ohci.h:11
itd_flags
volatile uint32_t itd_flags
Definition: ohci.h:0
ed_tailp
volatile uint32_t ed_tailp
Definition: ohci.h:17
OHCI_ITD_MK_OFFS
#define OHCI_ITD_MK_OFFS(len)
Definition: ohci.h:17
OHCI_TD_IN
#define OHCI_TD_IN
Definition: ohci.h:5
td_next
volatile uint32_t td_next
Definition: ohci.h:19
OHCI_PAGE_OFFSET
#define OHCI_PAGE_OFFSET(x)
Definition: ohci.h:50
OHCI_TD_GET_EC
#define OHCI_TD_GET_EC(x)
Definition: ohci.h:14
OHCI_TD_DP_MASK
#define OHCI_TD_DP_MASK
Definition: ohci.h:2
OHCI_ED_DIR_IN
#define OHCI_ED_DIR_IN
Definition: ohci.h:9
OHCI_ITD_GET_FC
#define OHCI_ITD_GET_FC(x)
Definition: ohci.h:6
OHCI_ED_FORMAT_GEN
#define OHCI_ED_FORMAT_GEN
Definition: ohci.h:12
OHCI_ED_DIR_OUT
#define OHCI_ED_DIR_OUT
Definition: ohci.h:8
OHCI_ITD_GET_DI
#define OHCI_ITD_GET_DI(x)
Definition: ohci.h:3
OHCI_TD_GET_DI
#define OHCI_TD_GET_DI(x)
Definition: ohci.h:6
ed_headp
volatile uint32_t ed_headp
Definition: ohci.h:18
OHCI_ED_ALIGN
#define OHCI_ED_ALIGN
Definition: ohci.h:44
OHCI_ITD_NOCC
#define OHCI_ITD_NOCC
Definition: ohci.h:9
ed_flags
volatile uint32_t ed_flags
Definition: ohci.h:0
OHCI_ED_DIR_TD
#define OHCI_ED_DIR_TD
Definition: ohci.h:7
OHCI_ED_GET_FA
#define OHCI_ED_GET_FA(s)
Definition: ohci.h:1
OHCI_TD_GET_CC
#define OHCI_TD_GET_CC(x)
Definition: ohci.h:15
OHCI_NO_INTRS
#define OHCI_NO_INTRS
Definition: ohci.h:39
OHCI_READ_DESC_DELAY
#define OHCI_READ_DESC_DELAY
Definition: ohci.h:194
OHCI_ITD_SET_SF
#define OHCI_ITD_SET_SF(x)
Definition: ohci.h:2
OHCI_HALTED
#define OHCI_HALTED
Definition: ohci.h:19
OHCI_ED_SET_FA
#define OHCI_ED_SET_FA(s)
Definition: ohci.h:3
OHCI_ENABLE_POWER_DELAY
#define OHCI_ENABLE_POWER_DELAY
Definition: ohci.h:193
OHCI_PAGE_MASK
#define OHCI_PAGE_MASK(x)
Definition: ohci.h:51
itd_offset
volatile uint16_t itd_offset[OHCI_ITD_NOFFSET]
Definition: ohci.h:14
ed_self
uint32_t ed_self
Definition: ohci.h:30
OHCI_ED_SET_EN
#define OHCI_ED_SET_EN(s)
Definition: ohci.h:5
OHCI_NO_EDS
#define OHCI_NO_EDS
Definition: ohci.h:196
OHCI_TD_SETUP
#define OHCI_TD_SETUP
Definition: ohci.h:3
OHCI_PAGE
#define OHCI_PAGE(x)
Definition: ohci.h:49
OHCI_TD_OUT
#define OHCI_TD_OUT
Definition: ohci.h:4
OHCI_ED_SET_MAXP
#define OHCI_ED_SET_MAXP(s)
Definition: ohci.h:15
OHCI_ED_SKIP
#define OHCI_ED_SKIP
Definition: ohci.h:11
OHCI_TD_NOINTR
#define OHCI_TD_NOINTR
Definition: ohci.h:8
OHCI_TOGGLECARRY
#define OHCI_TOGGLECARRY
Definition: ohci.h:20
OHCI_ED_GET_EN
#define OHCI_ED_GET_EN(s)
Definition: ohci.h:4
OHCI_TD_ALIGN
#define OHCI_TD_ALIGN
Definition: ohci.h:45
OHCI_ITD_ALIGN
#define OHCI_ITD_ALIGN
Definition: ohci.h:46
OHCI_DONE_INTRS
#define OHCI_DONE_INTRS
Definition: ohci.h:3
OHCI_CC_STALL
#define OHCI_CC_STALL
Definition: ohci.h:182
OHCI_TD_R
#define OHCI_TD_R
Definition: ohci.h:1
OHCI_CC_NOT_ACCESSED
#define OHCI_CC_NOT_ACCESSED
Definition: ohci.h:190
OHCI_ITD_NOINTR
#define OHCI_ITD_NOINTR
Definition: ohci.h:5
OHCI_ED_FORMAT_ISO
#define OHCI_ED_FORMAT_ISO
Definition: ohci.h:13
OHCI_HCCA_ALIGN
#define OHCI_HCCA_ALIGN
Definition: ohci.h:43
OHCI_ITD_SET_DI
#define OHCI_ITD_SET_DI(x)
Definition: ohci.h:4
OHCI_ED_GET_MAXP
#define OHCI_ED_GET_MAXP(s)
Definition: ohci.h:14
OHCI_TD_TOGGLE_MASK
#define OHCI_TD_TOGGLE_MASK
Definition: ohci.h:13
OHCI_TD_NOCC
#define OHCI_TD_NOCC
Definition: ohci.h:17
OHCI_TD_INTR_MASK
#define OHCI_TD_INTR_MASK
Definition: ohci.h:9
OHCI_ITD_GET_SF
#define OHCI_ITD_GET_SF(x)
Definition: ohci.h:1
td_flags
volatile uint32_t td_flags
Definition: ohci.h:0
OHCI_INTERRUPT_STATUS
#define OHCI_INTERRUPT_STATUS
Definition: ohcireg.h:70
OHCI_WDH
#define OHCI_WDH
Definition: ohcireg.h:72
OHCI_OCR
#define OHCI_OCR
Definition: ohcireg.h:68
OHCI_GET_NDP
#define OHCI_GET_NDP(s)
Definition: ohcireg.h:98
OHCI_NOCP
#define OHCI_NOCP
Definition: ohcireg.h:103
OHCI_UE
#define OHCI_UE
Definition: ohcireg.h:75
OHCI_HCFS_MASK
#define OHCI_HCFS_MASK
Definition: ohcireg.h:56
OHCI_REVISION
#define OHCI_REVISION
Definition: ohcireg.h:42
OHCI_ALL_INTRS
#define OHCI_ALL_INTRS
Definition: ohcireg.h:116
OHCI_RH_PORT_STATUS
#define OHCI_RH_PORT_STATUS(n)
Definition: ohcireg.h:113
OHCI_CLE
#define OHCI_CLE
Definition: ohcireg.h:54
OHCI_CONTROL_CURRENT_ED
#define OHCI_CONTROL_CURRENT_ED
Definition: ohcireg.h:85
OHCI_FM_INTERVAL
#define OHCI_FM_INTERVAL
Definition: ohcireg.h:89
OHCI_RHSC
#define OHCI_RHSC
Definition: ohcireg.h:77
OHCI_LS_THRESHOLD
#define OHCI_LS_THRESHOLD
Definition: ohcireg.h:96
OHCI_HCCA
#define OHCI_HCCA
Definition: ohcireg.h:82
OHCI_PLE
#define OHCI_PLE
Definition: ohcireg.h:52
OHCI_FSMPS
#define OHCI_FSMPS(i)
Definition: ohcireg.h:121
OHCI_BLE
#define OHCI_BLE
Definition: ohcireg.h:55
OHCI_SO
#define OHCI_SO
Definition: ohcireg.h:71
OHCI_FM_NUMBER
#define OHCI_FM_NUMBER
Definition: ohcireg.h:94
OHCI_IE
#define OHCI_IE
Definition: ohcireg.h:53
OHCI_BULK_HEAD_ED
#define OHCI_BULK_HEAD_ED
Definition: ohcireg.h:86
OHCI_RH_STATUS
#define OHCI_RH_STATUS
Definition: ohcireg.h:106
OHCI_HCR
#define OHCI_HCR
Definition: ohcireg.h:65
OHCI_CLF
#define OHCI_CLF
Definition: ohcireg.h:66
OHCI_GET_IVAL
#define OHCI_GET_IVAL(s)
Definition: ohcireg.h:90
OHCI_RH_DESCRIPTOR_B
#define OHCI_RH_DESCRIPTOR_B
Definition: ohcireg.h:105
OHCI_CBSR_MASK
#define OHCI_CBSR_MASK
Definition: ohcireg.h:47
OHCI_RH_DESCRIPTOR_A
#define OHCI_RH_DESCRIPTOR_A
Definition: ohcireg.h:97
OHCI_PERIOD_CURRENT_ED
#define OHCI_PERIOD_CURRENT_ED
Definition: ohcireg.h:83
OHCI_HCFS_RESET
#define OHCI_HCFS_RESET
Definition: ohcireg.h:57
OHCI_NORMAL_INTRS
#define OHCI_NORMAL_INTRS
Definition: ohcireg.h:119
OHCI_NPS
#define OHCI_NPS
Definition: ohcireg.h:100
OHCI_PERIODIC
#define OHCI_PERIODIC(i)
Definition: ohcireg.h:122
OHCI_LES
#define OHCI_LES
Definition: ohcireg.h:115
OHCI_HCFS_OPERATIONAL
#define OHCI_HCFS_OPERATIONAL
Definition: ohcireg.h:59
OHCI_INTERRUPT_DISABLE
#define OHCI_INTERRUPT_DISABLE
Definition: ohcireg.h:81
OHCI_MIE
#define OHCI_MIE
Definition: ohcireg.h:79
OHCI_PSM
#define OHCI_PSM
Definition: ohcireg.h:99
OHCI_RD
#define OHCI_RD
Definition: ohcireg.h:74
OHCI_FM_REMAINING
#define OHCI_FM_REMAINING
Definition: ohcireg.h:93
OHCI_INTERRUPT_ENABLE
#define OHCI_INTERRUPT_ENABLE
Definition: ohcireg.h:80
OHCI_BLF
#define OHCI_BLF
Definition: ohcireg.h:67
OHCI_CONTROL
#define OHCI_CONTROL
Definition: ohcireg.h:46
OHCI_IR
#define OHCI_IR
Definition: ohcireg.h:61
OHCI_LPSC
#define OHCI_LPSC
Definition: ohcireg.h:110
OHCI_FIT
#define OHCI_FIT
Definition: ohcireg.h:92
OHCI_BULK_CURRENT_ED
#define OHCI_BULK_CURRENT_ED
Definition: ohcireg.h:87
OHCI_COMMAND_STATUS
#define OHCI_COMMAND_STATUS
Definition: ohcireg.h:64
OHCI_HCFS_SUSPEND
#define OHCI_HCFS_SUSPEND
Definition: ohcireg.h:60
OHCI_CONTROL_HEAD_ED
#define OHCI_CONTROL_HEAD_ED
Definition: ohcireg.h:84
OHCI_DONE_HEAD
#define OHCI_DONE_HEAD
Definition: ohcireg.h:88
OHCI_GET_POTPGT
#define OHCI_GET_POTPGT(s)
Definition: ohcireg.h:104
OHCI_PERIODIC_START
#define OHCI_PERIODIC_START
Definition: ohcireg.h:95
OHCI_RATIO_1_4
#define OHCI_RATIO_1_4
Definition: ohcireg.h:51
value
uint32_t value
index
u_int index
state
int state
bus
u_int bus
ohci_config_desc
Definition: ohci.h:212
ohci_config_desc::confd
struct usb_config_descriptor confd
Definition: ohci.h:213
ohci_ed
Definition: ohci.h:75
ohci_ed::next
struct ohci_ed * next
Definition: ohci.h:102
ohci_ed::ed_flags
volatile uint32_t ed_flags
Definition: ohci.h:76
ohci_ed::page_cache
struct usb_page_cache * page_cache
Definition: ohci.h:105
ohci_ed::ed_next
volatile uint32_t ed_next
Definition: ohci.h:98
ohci_ed::obj_next
struct ohci_ed * obj_next
Definition: ohci.h:104
ohci_ed::ed_self
uint32_t ed_self
Definition: ohci.h:106
ohci_ed::prev
struct ohci_ed * prev
Definition: ohci.h:103
ohci_ed::ed_tailp
volatile uint32_t ed_tailp
Definition: ohci.h:93
ohci_ed::ed_headp
volatile uint32_t ed_headp
Definition: ohci.h:94
ohci_hcca
Definition: ohci.h:66
ohci_hcca::hcca_interrupt_table
volatile uint32_t hcca_interrupt_table[OHCI_NO_INTRS]
Definition: ohci.h:67
ohci_hcca::hcca_done_head
volatile uint32_t hcca_done_head
Definition: ohci.h:69
ohci_hcca::hcca_frame_number
volatile uint32_t hcca_frame_number
Definition: ohci.h:68
ohci_hw_softc::bulk_start_pc
struct usb_page_cache bulk_start_pc
Definition: ohci.h:201
ohci_hw_softc::hcca_pg
struct usb_page hcca_pg
Definition: ohci.h:205
ohci_hw_softc::ctrl_start_pc
struct usb_page_cache ctrl_start_pc
Definition: ohci.h:200
ohci_hw_softc::bulk_start_pg
struct usb_page bulk_start_pg
Definition: ohci.h:207
ohci_hw_softc::hcca_pc
struct usb_page_cache hcca_pc
Definition: ohci.h:199
ohci_hw_softc::intr_start_pc
struct usb_page_cache intr_start_pc[OHCI_NO_EDS]
Definition: ohci.h:203
ohci_hw_softc::isoc_start_pg
struct usb_page isoc_start_pg
Definition: ohci.h:208
ohci_hw_softc::intr_start_pg
struct usb_page intr_start_pg[OHCI_NO_EDS]
Definition: ohci.h:209
ohci_hw_softc::isoc_start_pc
struct usb_page_cache isoc_start_pc
Definition: ohci.h:202
ohci_hw_softc::ctrl_start_pg
struct usb_page ctrl_start_pg
Definition: ohci.h:206
ohci_itd
Definition: ohci.h:146
ohci_itd::itd_next
volatile uint32_t itd_next
Definition: ohci.h:159
ohci_itd::itd_self
uint32_t itd_self
Definition: ohci.h:172
ohci_itd::itd_be
volatile uint32_t itd_be
Definition: ohci.h:160
ohci_itd::obj_next
struct ohci_itd * obj_next
Definition: ohci.h:170
ohci_itd::itd_bp0
volatile uint32_t itd_bp0
Definition: ohci.h:158
ohci_itd::itd_flags
volatile uint32_t itd_flags
Definition: ohci.h:147
ohci_itd::itd_offset
volatile uint16_t itd_offset[OHCI_ITD_NOFFSET]
Definition: ohci.h:161
ohci_itd::page_cache
struct usb_page_cache * page_cache
Definition: ohci.h:171
ohci_itd::frames
uint8_t frames
Definition: ohci.h:173
ohci_softc
Definition: ohci.h:225
ohci_softc::sc_hub_idata
uint8_t sc_hub_idata[32]
Definition: ohci.h:253
ohci_softc::sc_addr
uint8_t sc_addr
Definition: ohci.h:251
ohci_softc::sc_intr_p_last
struct ohci_ed * sc_intr_p_last[OHCI_NO_EDS]
Definition: ohci.h:238
ohci_softc::sc_tmo_rhsc
struct usb_callout sc_tmo_rhsc
Definition: ohci.h:228
ohci_softc::sc_bulk_p_last
struct ohci_ed * sc_bulk_p_last
Definition: ohci.h:236
ohci_softc::sc_hw
struct ohci_hw_softc sc_hw
Definition: ohci.h:226
ohci_softc::sc_isoc_p_last
struct ohci_ed * sc_isoc_p_last
Definition: ohci.h:237
ohci_softc::sc_hub_desc
union ohci_hub_desc sc_hub_desc
Definition: ohci.h:229
ohci_softc::sc_hcca_p
struct ohci_hcca * sc_hcca_p
Definition: ohci.h:234
ohci_softc::sc_bus
struct usb_bus sc_bus
Definition: ohci.h:227
ohci_softc::sc_ctrl_p_last
struct ohci_ed * sc_ctrl_p_last
Definition: ohci.h:235
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uint16_t sc_intr_stat[OHCI_NO_EDS]
Definition: ohci.h:247
ohci_softc::sc_vendor
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Definition: ohci.h:255
ohci_softc::sc_eintrs
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ohci_std_temp::shortpkt
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ohci_td::td_be
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ohci_td::td_cbp
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ohci_td::len
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ohci_td::td_flags
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ohci_td::td_next
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ohci_td::td_self
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usb_bus_methods
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usb_bus_methods::endpoint_init
void(* endpoint_init)(struct usb_device *, struct usb_endpoint_descriptor *, struct usb_endpoint *)
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usb_bus
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usb_bus::usbrev
enum usb_revision usbrev
Definition: usb_bus.h:119
usb_bus::bdev
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usb_bus::bus_mtx
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usb_config_descriptor
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usb_config_descriptor::bDescriptorType
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Definition: usb.h:387
usb_config_descriptor::bNumInterface
uByte bNumInterface
Definition: usb.h:389
usb_config_descriptor::bmAttributes
uByte bmAttributes
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usb_config_descriptor::bLength
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usb_config_descriptor::bMaxPower
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usb_config_descriptor::iConfiguration
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usb_config_descriptor::bConfigurationValue
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usb_device_descriptor
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usb_device_flags::self_suspended
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usb_device_flags::usb_mode
enum usb_hc_mode usb_mode
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usb_device_request
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usb_device
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usb_device::speed
enum usb_dev_speed speed
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usb_device::bus
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usb_device::device_index
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usb_device::address
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usb_endpoint_descriptor
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usb_endpoint_descriptor::bEndpointAddress
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Definition: usb.h:528
usb_endpoint_descriptor::bDescriptorType
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usb_endpoint_descriptor::bmAttributes
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usb_endpoint
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usb_endpoint::toggle_next
uint8_t toggle_next
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usb_endpoint::isoc_next
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usb_endpoint::methods
const struct usb_pipe_methods * methods
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usb_hub_descriptor
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usb_hub_descriptor::wHubCharacteristics
uWord wHubCharacteristics
Definition: usb.h:606
usb_hub_descriptor::DeviceRemovable
uByte DeviceRemovable[32]
Definition: usb.h:625
usb_hub_descriptor::bNbrPorts
uByte bNbrPorts
Definition: usb.h:605
usb_hub_descriptor::bDescLength
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Definition: usb.h:603
usb_hub_descriptor::bPwrOn2PwrGood
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Definition: usb.h:622
usb_interface_descriptor
Definition: usb.h:402
usb_interface_descriptor::bDescriptorType
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Definition: usb.h:404
usb_page_cache
Definition: usb_busdma.h:89
usb_page_search
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usb_page_search::buffer
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Definition: usb_busdma.h:78
usb_pipe_methods
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usb_pipe_methods::open
void(* open)(struct usb_xfer *)
Definition: usb_controller.h:160
usb_port_status::wPortStatus
uWord wPortStatus
Definition: usb.h:704
usb_port_status::wPortChange
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Definition: usb.h:735
usb_setup_params
Definition: usb_transfer.h:97
usb_setup_params::hc_max_frame_size
uint32_t hc_max_frame_size
Definition: usb_transfer.h:115
usb_setup_params::buf
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Definition: usb_transfer.h:108
usb_setup_params::hc_max_packet_count
uint8_t hc_max_packet_count
Definition: usb_transfer.h:117
usb_setup_params::curr_xfer
struct usb_xfer * curr_xfer
Definition: usb_transfer.h:105
usb_setup_params::hc_max_packet_size
uint16_t hc_max_packet_size
Definition: usb_transfer.h:116
usb_setup_params::err
usb_error_t err
Definition: usb_transfer.h:120
usb_setup_params::methods
const struct usb_pipe_methods * methods
Definition: usb_transfer.h:107
usb_status::wStatus
uWord wStatus
Definition: usb.h:686
usb_xfer_flags_int::control_hdr
uint8_t control_hdr
Definition: usb_core.h:104
usb_xfer_flags_int::control_act
uint8_t control_act
Definition: usb_core.h:106
usb_xfer_flags_int::short_frames_ok
uint8_t short_frames_ok
Definition: usb_core.h:110
usb_xfer_flags_int::curr_dma_set
uint8_t curr_dma_set
Definition: usb_core.h:121
usb_xfer_flags_int::control_xfr
uint8_t control_xfr
Definition: usb_core.h:103
usb_xfer_flags::force_short_xfer
uint8_t force_short_xfer
Definition: usbdi.h:196
usb_xfer_root::bus
struct usb_bus * bus
Definition: usb_transfer.h:78
usb_xfer_root::udev
struct usb_device * udev
Definition: usb_transfer.h:79
usb_xfer
Definition: usb_core.h:132
usb_xfer::frlengths
usb_frlength_t * frlengths
Definition: usb_core.h:150
usb_xfer::nframes
usb_frcount_t nframes
Definition: usb_core.h:162
usb_xfer::max_data_length
usb_frlength_t max_data_length
Definition: usb_core.h:155
usb_xfer::qh_pos
uint16_t qh_pos
Definition: usb_core.h:169
usb_xfer::frbuffers
struct usb_page_cache * frbuffers
Definition: usb_core.h:151
usb_xfer::td_start
void * td_start[2]
Definition: usb_core.h:143
usb_xfer::timeout
usb_timeout_t timeout
Definition: usb_core.h:158
usb_xfer::aframes
usb_frcount_t aframes
Definition: usb_core.h:163
usb_xfer::endpoint
struct usb_endpoint * endpoint
Definition: usb_core.h:140
usb_xfer::flags_int
struct usb_xfer_flags_int flags_int
Definition: usb_core.h:182
usb_xfer::address
uint8_t address
Definition: usb_core.h:173
usb_xfer::flags
struct usb_xfer_flags flags
Definition: usb_core.h:181
usb_xfer::td_transfer_cache
void * td_transfer_cache
Definition: usb_core.h:146
usb_xfer::qh_start
void * qh_start[2]
Definition: usb_core.h:142
usb_xfer::xroot
struct usb_xfer_root * xroot
Definition: usb_core.h:141
usb_xfer::max_hc_frame_size
usb_frlength_t max_hc_frame_size
Definition: usb_core.h:154
usb_xfer::interval
usb_timeout_t interval
Definition: usb_core.h:171
usb_xfer::max_frame_size
uint16_t max_frame_size
Definition: usb_core.h:168
usb_xfer::td_transfer_last
void * td_transfer_last
Definition: usb_core.h:145
usb_xfer::td_transfer_first
void * td_transfer_first
Definition: usb_core.h:144
usb_xfer::sumlen
usb_frlength_t sumlen
Definition: usb_core.h:156
usb_xfer::endpointno
uint8_t endpointno
Definition: usb_core.h:174
DPRINTF
#define DPRINTF(...)
Definition: umass.c:179
ohci_hub_desc::stat
struct usb_status stat
Definition: ohci.h:219
ohci_hub_desc::ps
struct usb_port_status ps
Definition: ohci.h:220
ohci_hub_desc::hubd
struct usb_hub_descriptor hubd
Definition: ohci.h:221
ohci_hub_desc::temp
uint8_t temp[128]
Definition: ohci.h:222
UE_INTERRUPT
#define UE_INTERRUPT
Definition: usb.h:544
UR_SET_CONFIG
#define UR_SET_CONFIG
Definition: usb.h:219
UPS_C_PORT_RESET
#define UPS_C_PORT_RESET
Definition: usb.h:740
UHD_PWR_INDIVIDUAL
#define UHD_PWR_INDIVIDUAL
Definition: usb.h:609
UDSUBCLASS_HUB
#define UDSUBCLASS_HUB
Definition: usb.h:374
UC_SELF_POWERED
#define UC_SELF_POWERED
Definition: usb.h:395
UHD_PWR_GANGED
#define UHD_PWR_GANGED
Definition: usb.h:608
UT_WRITE_INTERFACE
#define UT_WRITE_INTERFACE
Definition: usb.h:170
UR_SET_DESCRIPTOR
#define UR_SET_DESCRIPTOR
Definition: usb.h:217
UE_BULK
#define UE_BULK
Definition: usb.h:543
UHF_PORT_POWER
#define UHF_PORT_POWER
Definition: usb.h:254
UR_GET_CONFIG
#define UR_GET_CONFIG
Definition: usb.h:218
UT_WRITE_CLASS_OTHER
#define UT_WRITE_CLASS_OTHER
Definition: usb.h:178
UISUBCLASS_HUB
#define UISUBCLASS_HUB
Definition: usb.h:480
UT_WRITE_CLASS_DEVICE
#define UT_WRITE_CLASS_DEVICE
Definition: usb.h:176
UR_SET_ADDRESS
#define UR_SET_ADDRESS
Definition: usb.h:193
UPS_C_PORT_ENABLED
#define UPS_C_PORT_ENABLED
Definition: usb.h:737
UT_WRITE_DEVICE
#define UT_WRITE_DEVICE
Definition: usb.h:169
UDESC_CONFIG
#define UDESC_CONFIG
Definition: usb.h:196
UR_GET_INTERFACE
#define UR_GET_INTERFACE
Definition: usb.h:220
UPS_C_OVERCURRENT_INDICATOR
#define UPS_C_OVERCURRENT_INDICATOR
Definition: usb.h:739
UDCLASS_HUB
#define UDCLASS_HUB
Definition: usb.h:373
UR_GET_STATUS
#define UR_GET_STATUS
Definition: usb.h:190
UHF_C_PORT_SUSPEND
#define UHF_C_PORT_SUSPEND
Definition: usb.h:259
UR_CLEAR_FEATURE
#define UR_CLEAR_FEATURE
Definition: usb.h:191
UDESC_ENDPOINT
#define UDESC_ENDPOINT
Definition: usb.h:200
UPS_LOW_SPEED
#define UPS_LOW_SPEED
Definition: usb.h:729
UE_GET_ADDR
#define UE_GET_ADDR(a)
Definition: usb.h:538
UDS_SELF_POWERED
#define UDS_SELF_POWERED
Definition: usb.h:688
UPS_PORT_POWER
#define UPS_PORT_POWER
Definition: usb.h:727
USB_BUS_RESET_DELAY
#define USB_BUS_RESET_DELAY
Definition: usb.h:129
UDESC_HUB
#define UDESC_HUB
Definition: usb.h:214
UDESC_STRING
#define UDESC_STRING
Definition: usb.h:197
UHF_C_PORT_OVER_CURRENT
#define UHF_C_PORT_OVER_CURRENT
Definition: usb.h:260
UHF_PORT_SUSPEND
#define UHF_PORT_SUSPEND
Definition: usb.h:250
UE_DIR_IN
#define UE_DIR_IN
Definition: usb.h:531
UR_SYNCH_FRAME
#define UR_SYNCH_FRAME
Definition: usb.h:222
UT_READ_DEVICE
#define UT_READ_DEVICE
Definition: usb.h:166
UE_XFERTYPE
#define UE_XFERTYPE
Definition: usb.h:540
UHF_PORT_ENABLE
#define UHF_PORT_ENABLE
Definition: usb.h:249
UICLASS_HUB
#define UICLASS_HUB
Definition: usb.h:479
UDESC_DEVICE
#define UDESC_DEVICE
Definition: usb.h:195
UDESC_INTERFACE
#define UDESC_INTERFACE
Definition: usb.h:199
USB_SPEED_LOW
@ USB_SPEED_LOW
Definition: usb.h:753
USB_SPEED_FULL
@ USB_SPEED_FULL
Definition: usb.h:754
UE_GET_DIR
#define UE_GET_DIR(a)
Definition: usb.h:529
UPS_PORT_ENABLED
#define UPS_PORT_ENABLED
Definition: usb.h:706
UT_WRITE_ENDPOINT
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Definition: usb.h:171
UT_READ_CLASS_DEVICE
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Definition: usb.h:172
UHF_PORT_RESET
#define UHF_PORT_RESET
Definition: usb.h:252
UDPROTO_FSHUB
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Definition: usb.h:375
UR_SET_INTERFACE
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Definition: usb.h:221
UT_READ_CLASS_OTHER
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Definition: usb.h:174
UE_CONTROL
#define UE_CONTROL
Definition: usb.h:541
UT_READ_ENDPOINT
#define UT_READ_ENDPOINT
Definition: usb.h:168
UHF_C_PORT_RESET
#define UHF_C_PORT_RESET
Definition: usb.h:261
USB_REV_1_0
@ USB_REV_1_0
Definition: usb.h:766
UPS_C_SUSPEND
#define UPS_C_SUSPEND
Definition: usb.h:738
UHD_PWR_NO_SWITCH
#define UHD_PWR_NO_SWITCH
Definition: usb.h:610
UPS_C_CONNECT_STATUS
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Definition: usb.h:736
UPS_CURRENT_CONNECT_STATUS
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Definition: usb.h:705
UE_ISOCHRONOUS
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Definition: usb.h:542
UHF_C_PORT_ENABLE
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Definition: usb.h:258
UR_SET_FEATURE
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Definition: usb.h:192
UPS_OVERCURRENT_INDICATOR
#define UPS_OVERCURRENT_INDICATOR
Definition: usb.h:708
UPS_SUSPEND
#define UPS_SUSPEND
Definition: usb.h:707
UT_READ_INTERFACE
#define UT_READ_INTERFACE
Definition: usb.h:167
UR_GET_DESCRIPTOR
#define UR_GET_DESCRIPTOR
Definition: usb.h:194
UHF_C_PORT_CONNECTION
#define UHF_C_PORT_CONNECTION
Definition: usb.h:257
UPS_RESET
#define UPS_RESET
Definition: usb.h:709
usb_bus.h
usbd_get_page
void usbd_get_page(struct usb_page_cache *pc, usb_frlength_t offset, struct usb_page_search *res)
Definition: usb_busdma.c:86
usb_busdma.h
usb_pc_cpu_invalidate
void usb_pc_cpu_invalidate(struct usb_page_cache *pc)
usb_pc_cpu_flush
void usb_pc_cpu_flush(struct usb_page_cache *pc)
usb_controller.h
USB_HW_POWER_RESUME
#define USB_HW_POWER_RESUME
Definition: usb_controller.h:102
usb_bus_mem_flush_all
void usb_bus_mem_flush_all(struct usb_bus *bus, usb_bus_mem_cb_t *cb)
USB_HW_POWER_BULK
#define USB_HW_POWER_BULK
Definition: usb_controller.h:79
USB_HW_POWER_CONTROL
#define USB_HW_POWER_CONTROL
Definition: usb_controller.h:74
USB_HW_POWER_SUSPEND
#define USB_HW_POWER_SUSPEND
Definition: usb_controller.h:98
USB_HW_POWER_SHUTDOWN
#define USB_HW_POWER_SHUTDOWN
Definition: usb_controller.h:106
usb_bus_mem_sub_cb_t
void() usb_bus_mem_sub_cb_t(struct usb_bus *bus, struct usb_page_cache *pc, struct usb_page *pg, usb_size_t size, usb_size_t align)
Definition: usb_controller.h:49
USB_HW_POWER_ISOC
#define USB_HW_POWER_ISOC
Definition: usb_controller.h:89
USB_HW_POWER_INTERRUPT
#define USB_HW_POWER_INTERRUPT
Definition: usb_controller.h:84
usb_core.h
USB_BUS_LOCK
#define USB_BUS_LOCK(_b)
Definition: usb_core.h:45
USB_BUS_UNLOCK
#define USB_BUS_UNLOCK(_b)
Definition: usb_core.h:46
USB_BUS_LOCK_ASSERT
#define USB_BUS_LOCK_ASSERT(_b, _t)
Definition: usb_core.h:47
usb_debug.h
usb_port_root_reset_delay
#define usb_port_root_reset_delay
Definition: usb_debug.h:77
usbd_get_speed
enum usb_dev_speed usbd_get_speed(struct usb_device *udev)
Definition: usb_device.c:2589
usb_device.h
USETW
#define USETW(w, v)
Definition: usb_endian.h:77
UGETW
#define UGETW(w)
Definition: usb_endian.h:53
uhub_root_intr
void uhub_root_intr(struct usb_bus *bus, const uint8_t *ptr, uint8_t len)
Definition: usb_hub.c:960
usb_hub.h
pptr
void ** pptr
Definition: usb_if.m:52
plen
uint16_t * plen
Definition: usb_if.m:53
req
const void * req
Definition: usb_if.m:51
usb_process.h
usbd_transfer_setup_sub
void usbd_transfer_setup_sub(struct usb_setup_params *parm)
Definition: usb_transfer.c:457
usbd_transfer_done
void usbd_transfer_done(struct usb_xfer *xfer, usb_error_t error)
Definition: usb_transfer.c:2593
usbd_xfer_set_frame_len
void usbd_xfer_set_frame_len(struct usb_xfer *xfer, usb_frcount_t frindex, usb_frlength_t len)
Definition: usb_transfer.c:2316
usbd_transfer_enqueue
void usbd_transfer_enqueue(struct usb_xfer_queue *pq, struct usb_xfer *xfer)
Definition: usb_transfer.c:2569
usbd_xfer_get_isochronous_start_frame
uint8_t usbd_xfer_get_isochronous_start_frame(struct usb_xfer *xfer, uint32_t frame_curr, uint32_t frame_min, uint32_t frame_ms, uint32_t frame_mask, uint32_t *p_frame_start)
Definition: usb_transfer.c:3692
usbd_transfer_timeout_ms
void usbd_transfer_timeout_ms(struct usb_xfer *xfer, void(*cb)(void *arg), usb_timeout_t ms)
Definition: usb_transfer.c:2934
usb_transfer.h
usbd_transfer_setup_sub_malloc
uint8_t usbd_transfer_setup_sub_malloc(struct usb_setup_params *parm, struct usb_page_cache **ppc, usb_size_t size, usb_size_t align, usb_size_t count)
usb_pause_mtx
void usb_pause_mtx(struct mtx *mtx, int timo)
Definition: usb_util.c:135
usb_make_str_desc
uint8_t usb_make_str_desc(void *ptr, uint16_t max_len, const char *s)
Definition: usb_util.c:193
usb_util.h
usb_callout_init_mtx
#define usb_callout_init_mtx(c, m, f)
Definition: usbdi.h:480
usb_callout_reset
#define usb_callout_reset(c,...)
Definition: usbdi.h:481
usb_error_t
usb_error_t
Definition: usbdi.h:45
USB_ERR_NORMAL_COMPLETION
@ USB_ERR_NORMAL_COMPLETION
Definition: usbdi.h:46
USB_ERR_STALLED
@ USB_ERR_STALLED
Definition: usbdi.h:68
USB_ERR_IOERROR
@ USB_ERR_IOERROR
Definition: usbdi.h:64
USB_ERR_NOMEM
@ USB_ERR_NOMEM
Definition: usbdi.h:50
USB_ERR_CANCELLED
@ USB_ERR_CANCELLED
Definition: usbdi.h:51
USB_ERR_INVAL
@ USB_ERR_INVAL
Definition: usbdi.h:49
USB_ERR_TIMEOUT
@ USB_ERR_TIMEOUT
Definition: usbdi.h:66
usb_callout_drain
#define usb_callout_drain(c)
Definition: usbdi.h:497
USB_MS_TO_TICKS
#define USB_MS_TO_TICKS(ms)
Definition: usbdi.h:120
usb_callout_stop
#define usb_callout_stop(c)
Definition: usbdi.h:489
status
uint8_t status
Definition: xhci.h:14