34#include "ar5212/ar5212.ini"
36#define N(a) (sizeof(a)/sizeof(a[0]))
48#define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal)
51 uint32_t numBits, uint32_t firstBit, uint32_t column);
66 if (
AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) {
90 uint32_t channelSel = 0;
91 uint32_t bModeSynth = 0;
92 uint32_t aModeRefSel = 0;
100 channelSel = freq - 2272;
113 }
else if (((freq % 5) == 2) && (freq <= 5435)) {
116 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
118 }
else if ((freq % 20) == 0 && freq >= 5120) {
120 ((freq - 4800) / 20 << 2), 8);
122 }
else if ((freq % 10) == 0) {
124 ((freq - 4800) / 10 << 1), 8);
126 }
else if ((freq % 5) == 0) {
128 (freq - 4800) / 5, 8);
136 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
155 const struct ieee80211_channel *chan,
156 uint16_t modesIndex, uint16_t *rfXpdGain)
158#define RF_BANK_SETUP(_priv, _ix, _col) do { \
160 for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \
161 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
166 uint16_t ob2GHz = 0, db2GHz = 0;
170 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
175 if (IEEE80211_IS_CHAN_B(chan)) {
206 HALASSERT(
N(ar5212Bank6_2425) ==
N(ar5212Bank6_2417));
250 uint32_t *vlo, uint32_t *vhi)
253 const uint16_t *ep = lp+listSize;
259 if (target < lp[0]) {
263 if (target >= ep[-1]) {
264 *vlo = *vhi = listSize - 1;
269 for (tp = lp; tp < ep; tp++) {
275 *vlo = *vhi = tp - (
const uint16_t *) lp;
282 if (target < tp[1]) {
283 *vlo = tp - (
const uint16_t *) lp;
295 const int16_t *pwrList,
const uint16_t *VpdList,
296 uint16_t numIntercepts,
297 uint16_t retVpdList[][64])
300 int16_t currPwr = (int16_t)(2*Pmin);
307 if (numIntercepts < 2)
310 while (ii <= (uint16_t)(Pmax - Pmin)) {
312 numIntercepts, &(idxL), &(idxR));
315 if (idxL == (uint32_t)(numIntercepts - 1))
316 idxL = numIntercepts - 2;
317 if (pwrList[idxL] == pwrList[idxR])
321 (((currPwr - pwrList[idxL])*VpdList[idxR]+
322 (pwrList[idxR] - currPwr)*VpdList[idxL])/
323 (pwrList[idxR] - pwrList[idxL]));
324 retVpdList[pdGainIdx][ii] = kk;
337 int16_t targetLeft, int16_t targetRight)
341 if (srcRight != srcLeft) {
342 rv = ((target - srcLeft)*targetRight +
343 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
357 uint16_t pdGainOverlap_t2,
358 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
359 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
365 uint32_t numPdGainsUsed = 0;
383 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
401 Pmin_t2[numPdGainsUsed] = (int16_t)
402 (Pmin_t2[numPdGainsUsed] / 2);
405 Pmax_t2[numPdGainsUsed] =
407 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
409 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
414 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
418 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
430 *pMinCalPower = Pmin_t2[0];
432 for (ii = 0; ii < numPdGainsUsed; ii++) {
433 if (ii == (numPdGainsUsed - 1))
434 pPdGainBoundaries[ii] = Pmax_t2[ii] +
437 pPdGainBoundaries[ii] = (uint16_t)
438 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
444 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
447 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
452 tmpVal = (int16_t)(
VpdTable_I[ii][0] + ss*Vpd_step);
453 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
457 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
458 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
459 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
461 while (ss < (int16_t)maxIndex)
464 Vpd_step = (uint16_t)(
VpdTable_I[ii][sizeCurrVpdTable-1] -
466 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
471 if (tgtIndex > maxIndex) {
472 while(ss < (int16_t)tgtIndex) {
475 (ss-maxIndex)*Vpd_step);
476 pPDADCValues[kk++] = (tmpVal > 127) ?
484 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
488 pPDADCValues[kk] = pPDADCValues[kk-1];
498 int16_t *minPower, int16_t *maxPower,
499 const struct ieee80211_channel *chan,
506 uint16_t pdGainOverlap_t2;
507 int16_t minCalPower2413_t2;
509 uint16_t gainBoundaries[4];
510 uint32_t i, reg32, regoffset;
513 __func__, freq, chan->ic_flags);
515 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
517 else if (IEEE80211_IS_CHAN_B(chan))
528 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries,
529 rfXpdGain, pdadcValues);
539 if (minCalPower2413_t2 != 0)
545 regoffset = 0x9800 + (672 <<2);
546 for (i = 0; i < 32; i++) {
547 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
548 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
549 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
550 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
569 uint16_t Pmin=0,numVpd;
587 uint16_t Pmax=0,numVpd;
603 const struct ieee80211_channel *chan,
604 int16_t *maxPow, int16_t *minPow)
606 uint16_t freq = chan->ic_freq;
610 uint16_t numChannels;
611 int totalD,totalF, totalMin,last, i;
615 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
617 else if (IEEE80211_IS_CHAN_B(chan))
631 if ((freq < data[0].channelValue) ||
632 (freq > data[numChannels-1].channelValue)) {
633 if (freq < data[0].channelValue) {
645 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
650 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
653 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
657 if (freq == data[i].channelValue) {
695 "%s: cannot allocate private state\n", __func__);
uint32_t ath_hal_reverseBits(uint32_t val, uint32_t n)
#define MAX_NUM_PDGAINS_PER_CHANNEL
#define PWR_TABLE_SIZE_2413
#define PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB
#define MAX_PWR_RANGE_IN_HALF_DB
#define OS_REG_SET_BIT(_a, _r, _f)
#define HAL_INI_WRITE_BANK(ah, regArray, bankData, regWr)
#define HAL_INI_WRITE_ARRAY(ah, regArray, col, regWr)
void * ath_hal_malloc(size_t)
static OS_INLINE uint16_t ath_hal_gethwchannel(struct ath_hal *ah, const struct ieee80211_channel *c)
#define OS_REG_RMW_FIELD(_a, _r, _f, _v)
#define HALDEBUG(_ah, __m,...)
void ath_hal_free(void *p)
#define OS_REG_WRITE(_ah, _reg, _val)
#define OS_MARK(_ah, _id, _v)
#define OS_REG_READ(_ah, _reg)
static void ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, int writes)
static HAL_BOOL ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status)
AH_RF(RF2425, ar2425Probe, ar2425RfAttach)
static HAL_BOOL ar2425SetPowerTable(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
static uint32_t * ar2425GetRfBank(struct ath_hal *ah, int bank)
static HAL_BOOL ar2425GetChannelMaxMinPower(struct ath_hal *ah, const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow)
void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, uint32_t numBits, uint32_t firstBit, uint32_t column)
static int16_t ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
static HAL_BOOL ar2425Probe(struct ath_hal *ah)
static void ar2425RfDetach(struct ath_hal *ah)
static HAL_BOOL ar2425SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
static HAL_BOOL ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
static void GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, uint32_t *vlo, uint32_t *vhi)
static int16_t ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
#define RF_BANK_SETUP(_priv, _ix, _col)
static HAL_BOOL ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, const int16_t *pwrList, const uint16_t *VpdList, uint16_t numIntercepts, uint16_t retVpdList[][64])
static void ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, const RAW_DATA_STRUCT_2413 *pRawDataset, uint16_t pdGainOverlap_t2, int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], uint16_t pPdGainValues[], uint16_t pPDADCValues[])
static int16_t interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, int16_t targetLeft, int16_t targetRight)
int16_t ar5212GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *)
#define AR_PHY_CCK_TX_CTRL_JAPAN
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1
#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP
#define AR_PHY_TPCRG1_NUM_PD_GAIN
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3
#define AR_PHY_CCK_TX_CTRL
#define AR_PCIE_PMC_ENA_RESET
#define AR_PCIE_PMC_ENA_L1
RAW_DATA_PER_PDGAIN_2413 pDataPerPDGain[MAX_NUM_PDGAINS_PER_CHANNEL]
int16_t pwr_t4[NUM_POINTS_LAST_PDGAIN]
uint16_t Vpd[NUM_POINTS_LAST_PDGAIN]
uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413]
RAW_DATA_PER_CHANNEL_2413 pDataPerChannel[NUM_11A_EEPROM_CHANNELS_2413]
HAL_BOOL(* getChannelMaxMinPower)(struct ath_hal *ah, const struct ieee80211_channel *, int16_t *maxPow, int16_t *minPow)
HAL_BOOL(* setRfRegs)(struct ath_hal *, const struct ieee80211_channel *, uint16_t modesIndex, uint16_t *rfXpdGain)
HAL_BOOL(* setPowerTable)(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, const struct ieee80211_channel *, uint16_t *rfXpdGain)
HAL_BOOL(* setChannel)(struct ath_hal *, const struct ieee80211_channel *)
uint32_t *(* getRfBank)(struct ath_hal *ah, int bank)
void(* writeRegs)(struct ath_hal *, u_int modeIndex, u_int freqIndex, int regWrites)
int16_t(* getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL *)
void(* rfDetach)(struct ath_hal *ah)
uint32_t Bank3Data[N(ar5212Bank3_2425)]
uint16_t pcdacTable[PWR_TABLE_SIZE_2413]
uint32_t Bank7Data[N(ar5212Bank7_2425)]
uint32_t Bank6Data[N(ar5212Bank6_2425)]
uint32_t Bank1Data[N(ar5212Bank1_2425)]
uint32_t Bank2Data[N(ar5212Bank2_2425)]
int16_t ah_txPowerIndexOffset
HAL_RFGAIN ah_rfgainState