FreeBSD kernel ATH device code
ar5413.c
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1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD$
20 */
21#include "opt_ah.h"
22
23#include "ah.h"
24#include "ah_internal.h"
25
26#include "ah_eeprom_v3.h"
27
28#include "ar5212/ar5212.h"
29#include "ar5212/ar5212reg.h"
30#include "ar5212/ar5212phy.h"
31
32#define AH_5212_5413
33#include "ar5212/ar5212.ini"
34
35#define N(a) (sizeof(a)/sizeof(a[0]))
36
38 RF_HAL_FUNCS base; /* public state, must be first */
40
41 uint32_t Bank1Data[N(ar5212Bank1_5413)];
42 uint32_t Bank2Data[N(ar5212Bank2_5413)];
43 uint32_t Bank3Data[N(ar5212Bank3_5413)];
44 uint32_t Bank6Data[N(ar5212Bank6_5413)];
45 uint32_t Bank7Data[N(ar5212Bank7_5413)];
46
47 /*
48 * Private state for reduced stack usage.
49 */
50 /* filled out Vpd table for all pdGains (chanL) */
53 /* filled out Vpd table for all pdGains (chanR) */
56 /* filled out Vpd table for all pdGains (interpolated) */
59};
60#define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal)
61
62extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
63 uint32_t numBits, uint32_t firstBit, uint32_t column);
64
65static void
66ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 int writes)
68{
69 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
70 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
71 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
72}
73
74/*
75 * Take the MHz channel value and set the Channel value
76 *
77 * ASSUMES: Writes enabled to analog bus
78 */
79static HAL_BOOL
80ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
81{
82 uint16_t freq = ath_hal_gethwchannel(ah, chan);
83 uint32_t channelSel = 0;
84 uint32_t bModeSynth = 0;
85 uint32_t aModeRefSel = 0;
86 uint32_t reg32 = 0;
87
88 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
89
90 if (freq < 4800) {
91 uint32_t txctl;
92
93 if (((freq - 2192) % 5) == 0) {
94 channelSel = ((freq - 672) * 2 - 3040)/10;
95 bModeSynth = 0;
96 } else if (((freq - 2224) % 5) == 0) {
97 channelSel = ((freq - 704) * 2 - 3040) / 10;
98 bModeSynth = 1;
99 } else {
101 "%s: invalid channel %u MHz\n",
102 __func__, freq);
103 return AH_FALSE;
104 }
105
106 channelSel = (channelSel << 2) & 0xff;
107 channelSel = ath_hal_reverseBits(channelSel, 8);
108
109 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
110 if (freq == 2484) {
111 /* Enable channel spreading for channel 14 */
114 } else {
116 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
117 }
118 } else if (((freq % 5) == 2) && (freq <= 5435)) {
119 freq = freq - 2; /* Align to even 5MHz raster */
120 channelSel = ath_hal_reverseBits(
121 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
122 aModeRefSel = ath_hal_reverseBits(0, 2);
123 } else if ((freq % 20) == 0 && freq >= 5120) {
124 channelSel = ath_hal_reverseBits(
125 ((freq - 4800) / 20 << 2), 8);
126 aModeRefSel = ath_hal_reverseBits(1, 2);
127 } else if ((freq % 10) == 0) {
128 channelSel = ath_hal_reverseBits(
129 ((freq - 4800) / 10 << 1), 8);
130 aModeRefSel = ath_hal_reverseBits(1, 2);
131 } else if ((freq % 5) == 0) {
132 channelSel = ath_hal_reverseBits(
133 (freq - 4800) / 5, 8);
134 aModeRefSel = ath_hal_reverseBits(1, 2);
135 } else {
136 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
137 __func__, freq);
138 return AH_FALSE;
139 }
140
141 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
142 (1 << 12) | 0x1;
143 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
144
145 reg32 >>= 8;
146 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
147
148 AH_PRIVATE(ah)->ah_curchan = chan;
149 return AH_TRUE;
150}
151
152/*
153 * Reads EEPROM header info from device structure and programs
154 * all rf registers
155 *
156 * REQUIRES: Access to the analog rf device
157 */
158static HAL_BOOL
160 const struct ieee80211_channel *chan,
161 uint16_t modesIndex, uint16_t *rfXpdGain)
162{
163#define RF_BANK_SETUP(_priv, _ix, _col) do { \
164 int i; \
165 for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \
166 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
167} while (0)
168 struct ath_hal_5212 *ahp = AH5212(ah);
169 uint16_t freq = ath_hal_gethwchannel(ah, chan);
170 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
171 uint16_t ob5GHz = 0, db5GHz = 0;
172 uint16_t ob2GHz = 0, db2GHz = 0;
173 struct ar5413State *priv = AR5413(ah);
174 int regWrites = 0;
175
176 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
177 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
178
179 HALASSERT(priv != AH_NULL);
180
181 /* Setup rf parameters */
182 switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
183 case IEEE80211_CHAN_A:
184 if (freq > 4000 && freq < 5260) {
185 ob5GHz = ee->ee_ob1;
186 db5GHz = ee->ee_db1;
187 } else if (freq >= 5260 && freq < 5500) {
188 ob5GHz = ee->ee_ob2;
189 db5GHz = ee->ee_db2;
190 } else if (freq >= 5500 && freq < 5725) {
191 ob5GHz = ee->ee_ob3;
192 db5GHz = ee->ee_db3;
193 } else if (freq >= 5725) {
194 ob5GHz = ee->ee_ob4;
195 db5GHz = ee->ee_db4;
196 } else {
197 /* XXX else */
198 }
199 break;
200 case IEEE80211_CHAN_B:
201 ob2GHz = ee->ee_obFor24;
202 db2GHz = ee->ee_dbFor24;
203 break;
204 case IEEE80211_CHAN_G:
205 case IEEE80211_CHAN_PUREG: /* NB: really 108G */
206 ob2GHz = ee->ee_obFor24g;
207 db2GHz = ee->ee_dbFor24g;
208 break;
209 default:
210 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
211 __func__, chan->ic_flags);
212 return AH_FALSE;
213 }
214
215 /* Bank 1 Write */
216 RF_BANK_SETUP(priv, 1, 1);
217
218 /* Bank 2 Write */
219 RF_BANK_SETUP(priv, 2, modesIndex);
220
221 /* Bank 3 Write */
222 RF_BANK_SETUP(priv, 3, modesIndex);
223
224 /* Bank 6 Write */
225 RF_BANK_SETUP(priv, 6, modesIndex);
226
227 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
228 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
229 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
230 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
231
232 /* TODO - only for Eagle 1.0 2GHz - remove for production */
233 /* XXX: but without this bit G doesn't work. */
234 ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
235
236 /* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
237 if (AH_PRIVATE(ah)->ah_ispcie) {
239 3, 131, 3);
240 }
241 } else {
242 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
243 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
244 }
245
246 /* Bank 7 Setup */
247 RF_BANK_SETUP(priv, 7, modesIndex);
248
249 /* Write Analog registers */
250 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
251 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
252 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
253 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
254 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
255
256 /* Now that we have reprogrammed rfgain value, clear the flag. */
258
259 return AH_TRUE;
260#undef RF_BANK_SETUP
261}
262
263/*
264 * Return a reference to the requested RF Bank.
265 */
266static uint32_t *
267ar5413GetRfBank(struct ath_hal *ah, int bank)
268{
269 struct ar5413State *priv = AR5413(ah);
270
271 HALASSERT(priv != AH_NULL);
272 switch (bank) {
273 case 1: return priv->Bank1Data;
274 case 2: return priv->Bank2Data;
275 case 3: return priv->Bank3Data;
276 case 6: return priv->Bank6Data;
277 case 7: return priv->Bank7Data;
278 }
279 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
280 __func__, bank);
281 return AH_NULL;
282}
283
284/*
285 * Return indices surrounding the value in sorted integer lists.
286 *
287 * NB: the input list is assumed to be sorted in ascending order
288 */
289static void
290GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
291 uint32_t *vlo, uint32_t *vhi)
292{
293 int16_t target = v;
294 const uint16_t *ep = lp+listSize;
295 const uint16_t *tp;
296
297 /*
298 * Check first and last elements for out-of-bounds conditions.
299 */
300 if (target < lp[0]) {
301 *vlo = *vhi = 0;
302 return;
303 }
304 if (target >= ep[-1]) {
305 *vlo = *vhi = listSize - 1;
306 return;
307 }
308
309 /* look for value being near or between 2 values in list */
310 for (tp = lp; tp < ep; tp++) {
311 /*
312 * If value is close to the current value of the list
313 * then target is not between values, it is one of the values
314 */
315 if (*tp == target) {
316 *vlo = *vhi = tp - (const uint16_t *) lp;
317 return;
318 }
319 /*
320 * Look for value being between current value and next value
321 * if so return these 2 values
322 */
323 if (target < tp[1]) {
324 *vlo = tp - (const uint16_t *) lp;
325 *vhi = *vlo + 1;
326 return;
327 }
328 }
329}
330
331/*
332 * Fill the Vpdlist for indices Pmax-Pmin
333 */
334static HAL_BOOL
335ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
336 const int16_t *pwrList, const uint16_t *VpdList,
337 uint16_t numIntercepts,
338 uint16_t retVpdList[][64])
339{
340 uint16_t ii, jj, kk;
341 int16_t currPwr = (int16_t)(2*Pmin);
342 /* since Pmin is pwr*2 and pwrList is 4*pwr */
343 uint32_t idxL, idxR;
344
345 ii = 0;
346 jj = 0;
347
348 if (numIntercepts < 2)
349 return AH_FALSE;
350
351 while (ii <= (uint16_t)(Pmax - Pmin)) {
352 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
353 numIntercepts, &(idxL), &(idxR));
354 if (idxR < 1)
355 idxR = 1; /* extrapolate below */
356 if (idxL == (uint32_t)(numIntercepts - 1))
357 idxL = numIntercepts - 2; /* extrapolate above */
358 if (pwrList[idxL] == pwrList[idxR])
359 kk = VpdList[idxL];
360 else
361 kk = (uint16_t)
362 (((currPwr - pwrList[idxL])*VpdList[idxR]+
363 (pwrList[idxR] - currPwr)*VpdList[idxL])/
364 (pwrList[idxR] - pwrList[idxL]));
365 retVpdList[pdGainIdx][ii] = kk;
366 ii++;
367 currPwr += 2; /* half dB steps */
368 }
369
370 return AH_TRUE;
371}
372
373/*
374 * Returns interpolated or the scaled up interpolated value
375 */
376static int16_t
377interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
378 int16_t targetLeft, int16_t targetRight)
379{
380 int16_t rv;
381
382 if (srcRight != srcLeft) {
383 rv = ((target - srcLeft)*targetRight +
384 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
385 } else {
386 rv = targetLeft;
387 }
388 return rv;
389}
390
391/*
392 * Uses the data points read from EEPROM to reconstruct the pdadc power table
393 * Called by ar5413SetPowerTable()
394 */
395static int
397 const RAW_DATA_STRUCT_2413 *pRawDataset,
398 uint16_t pdGainOverlap_t2,
399 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
400 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
401{
402 struct ar5413State *priv = AR5413(ah);
403#define VpdTable_L priv->vpdTable_L
404#define VpdTable_R priv->vpdTable_R
405#define VpdTable_I priv->vpdTable_I
406 uint32_t ii, jj, kk;
407 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
408 uint32_t idxL, idxR;
409 uint32_t numPdGainsUsed = 0;
410 /*
411 * If desired to support -ve power levels in future, just
412 * change pwr_I_0 to signed 5-bits.
413 */
414 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
415 /* to accommodate -ve power levels later on. */
416 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
417 /* to accommodate -ve power levels later on */
418 uint16_t numVpd = 0;
419 uint16_t Vpd_step;
420 int16_t tmpVal ;
421 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
422
423 /* Get upper lower index */
424 GetLowerUpperIndex(channel, pRawDataset->pChannels,
425 pRawDataset->numChannels, &(idxL), &(idxR));
426
427 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
428 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
429 /* work backwards 'cause highest pdGain for lowest power */
430 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
431 if (numVpd > 0) {
432 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
433 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
434 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
435 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
436 }
437 Pmin_t2[numPdGainsUsed] = (int16_t)
438 (Pmin_t2[numPdGainsUsed] / 2);
439 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
440 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
441 Pmax_t2[numPdGainsUsed] =
442 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
443 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
445 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
446 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
447 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
448 );
450 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
451 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
452 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
453 );
454 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
455 VpdTable_I[numPdGainsUsed][kk] =
457 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
458 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
459 }
460 /* fill VpdTable_I for this pdGain */
461 numPdGainsUsed++;
462 }
463 /* if this pdGain is used */
464 }
465
466 *pMinCalPower = Pmin_t2[0];
467 kk = 0; /* index for the final table */
468 for (ii = 0; ii < numPdGainsUsed; ii++) {
469 if (ii == (numPdGainsUsed - 1))
470 pPdGainBoundaries[ii] = Pmax_t2[ii] +
472 else
473 pPdGainBoundaries[ii] = (uint16_t)
474 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
475 if (pPdGainBoundaries[ii] > 63) {
477 "%s: clamp pPdGainBoundaries[%d] %d\n",
478 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
479 pPdGainBoundaries[ii] = 63;
480 }
481
482 /* Find starting index for this pdGain */
483 if (ii == 0)
484 ss = 0; /* for the first pdGain, start from index 0 */
485 else
486 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
487 pdGainOverlap_t2;
488 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
489 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
490 /*
491 *-ve ss indicates need to extrapolate data below for this pdGain
492 */
493 while (ss < 0) {
494 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
495 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
496 ss++;
497 }
498
499 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
500 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
501 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
502
503 while (ss < (int16_t)maxIndex)
504 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
505
506 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
507 VpdTable_I[ii][sizeCurrVpdTable-2]);
508 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
509 /*
510 * for last gain, pdGainBoundary == Pmax_t2, so will
511 * have to extrapolate
512 */
513 if (tgtIndex > maxIndex) { /* need to extrapolate above */
514 while(ss < (int16_t)tgtIndex) {
515 tmpVal = (uint16_t)
516 (VpdTable_I[ii][sizeCurrVpdTable-1] +
517 (ss-maxIndex)*Vpd_step);
518 pPDADCValues[kk++] = (tmpVal > 127) ?
519 127 : tmpVal;
520 ss++;
521 }
522 } /* extrapolated above */
523 } /* for all pdGainUsed */
524
525 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
526 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
527 ii++;
528 }
529 while (kk < 128) {
530 pPDADCValues[kk] = pPDADCValues[kk-1];
531 kk++;
532 }
533
534 return numPdGainsUsed;
535#undef VpdTable_L
536#undef VpdTable_R
537#undef VpdTable_I
538}
539
540static HAL_BOOL
542 int16_t *minPower, int16_t *maxPower,
543 const struct ieee80211_channel *chan,
544 uint16_t *rfXpdGain)
545{
546 struct ath_hal_5212 *ahp = AH5212(ah);
547 uint16_t freq = ath_hal_gethwchannel(ah, chan);
548 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
549 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
550 uint16_t pdGainOverlap_t2;
551 int16_t minCalPower5413_t2;
552 uint16_t *pdadcValues = ahp->ah_pcdacTable;
553 uint16_t gainBoundaries[4];
554 uint32_t reg32, regoffset;
555 int i, numPdGainsUsed;
556#ifndef AH_USE_INIPDGAIN
557 uint32_t tpcrg1;
558#endif
559
560 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
561 __func__, chan->ic_freq, chan->ic_flags);
562
563 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
564 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
565 else if (IEEE80211_IS_CHAN_B(chan))
566 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
567 else {
568 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
569 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
570 }
571
572 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
574
576 freq, pRawDataset, pdGainOverlap_t2,
577 &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
578 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
579
580#ifdef AH_USE_INIPDGAIN
581 /*
582 * Use pd_gains curve from eeprom; Atheros always uses
583 * the default curve from the ini file but some vendors
584 * (e.g. Zcomax) want to override this curve and not
585 * honoring their settings results in tx power 5dBm low.
586 */
588 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
589#else
590 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
591 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
592 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
593 switch (numPdGainsUsed) {
594 case 3:
595 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
596 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
597 /* fall thru... */
598 case 2:
599 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
600 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
601 /* fall thru... */
602 case 1:
603 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
604 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
605 break;
606 }
607#ifdef AH_DEBUG
608 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
609 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
610 "pd_gains (default 0x%x, calculated 0x%x)\n",
611 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
612#endif
613 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
614#endif
615
616 /*
617 * Note the pdadc table may not start at 0 dBm power, could be
618 * negative or greater than 0. Need to offset the power
619 * values by the amount of minPower for griffin
620 */
621 if (minCalPower5413_t2 != 0)
622 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
623 else
624 ahp->ah_txPowerIndexOffset = 0;
625
626 /* Finally, write the power values into the baseband power table */
627 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
628 for (i = 0; i < 32; i++) {
629 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
630 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
631 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
632 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
633 OS_REG_WRITE(ah, regoffset, reg32);
634 regoffset += 4;
635 }
636
638 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
639 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
640 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
641 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
642 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
643
644 return AH_TRUE;
645}
646
647static int16_t
649{
650 uint32_t ii,jj;
651 uint16_t Pmin=0,numVpd;
652
653 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
654 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
655 /* work backwards 'cause highest pdGain for lowest power */
656 numVpd = data->pDataPerPDGain[jj].numVpd;
657 if (numVpd > 0) {
658 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
659 return(Pmin);
660 }
661 }
662 return(Pmin);
663}
664
665static int16_t
667{
668 uint32_t ii;
669 uint16_t Pmax=0,numVpd;
670
671 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
672 /* work forwards cuase lowest pdGain for highest power */
673 numVpd = data->pDataPerPDGain[ii].numVpd;
674 if (numVpd > 0) {
675 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
676 return(Pmax);
677 }
678 }
679 return(Pmax);
680}
681
682static HAL_BOOL
684 const struct ieee80211_channel *chan,
685 int16_t *maxPow, int16_t *minPow)
686{
687 uint16_t freq = chan->ic_freq; /* NB: never mapped */
688 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
689 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
691 uint16_t numChannels;
692 int totalD,totalF, totalMin,last, i;
693
694 *maxPow = 0;
695
696 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
697 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
698 else if (IEEE80211_IS_CHAN_B(chan))
699 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
700 else {
701 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
702 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
703 }
704
705 numChannels = pRawDataset->numChannels;
706 data = pRawDataset->pDataPerChannel;
707
708 /* Make sure the channel is in the range of the TP values
709 * (freq piers)
710 */
711 if (numChannels < 1)
712 return(AH_FALSE);
713
714 if ((freq < data[0].channelValue) ||
715 (freq > data[numChannels-1].channelValue)) {
716 if (freq < data[0].channelValue) {
717 *maxPow = ar5413GetMaxPower(ah, &data[0]);
718 *minPow = ar5413GetMinPower(ah, &data[0]);
719 return(AH_TRUE);
720 } else {
721 *maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
722 *minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
723 return(AH_TRUE);
724 }
725 }
726
727 /* Linearly interpolate the power value now */
728 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
729 last = i++);
730 totalD = data[i].channelValue - data[last].channelValue;
731 if (totalD > 0) {
732 totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
733 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
734 ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
735 totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
736 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
737 ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
738 return(AH_TRUE);
739 } else {
740 if (freq == data[i].channelValue) {
741 *maxPow = ar5413GetMaxPower(ah, &data[i]);
742 *minPow = ar5413GetMinPower(ah, &data[i]);
743 return(AH_TRUE);
744 } else
745 return(AH_FALSE);
746 }
747}
748
749/*
750 * Free memory for analog bank scratch buffers
751 */
752static void
754{
755 struct ath_hal_5212 *ahp = AH5212(ah);
756
757 HALASSERT(ahp->ah_rfHal != AH_NULL);
759 ahp->ah_rfHal = AH_NULL;
760}
761
762/*
763 * Allocate memory for analog bank scratch buffers
764 * Scratch Buffer will be reinitialized every reset so no need to zero now
765 */
766static HAL_BOOL
768{
769 struct ath_hal_5212 *ahp = AH5212(ah);
770 struct ar5413State *priv;
771
773
774 HALASSERT(ahp->ah_rfHal == AH_NULL);
775 priv = ath_hal_malloc(sizeof(struct ar5413State));
776 if (priv == AH_NULL) {
778 "%s: cannot allocate private state\n", __func__);
779 *status = HAL_ENOMEM; /* XXX */
780 return AH_FALSE;
781 }
790
791 ahp->ah_pcdacTable = priv->pcdacTable;
792 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
793 ahp->ah_rfHal = &priv->base;
794
795 return AH_TRUE;
796}
797
798static HAL_BOOL
800{
801 return IS_5413(ah);
802}
uint32_t ath_hal_reverseBits(uint32_t val, uint32_t n)
Definition: ah.c:333
HAL_STATUS
Definition: ah.h:71
@ HAL_ENOMEM
Definition: ah.h:74
@ HAL_RFGAIN_INACTIVE
Definition: ah.h:623
HAL_BOOL
Definition: ah.h:93
@ AH_FALSE
Definition: ah.h:94
@ AH_TRUE
Definition: ah.h:95
@ HAL_DEBUG_ANY
Definition: ah_debug.h:62
@ HAL_DEBUG_RFPARAM
Definition: ah_debug.h:37
@ AH_MARK_SETCHANNEL
Definition: ah_decode.h:53
@ headerInfo11G
Definition: ah_eeprom_v3.h:84
@ headerInfo11A
Definition: ah_eeprom_v3.h:82
@ headerInfo11B
Definition: ah_eeprom_v3.h:83
#define MAX_NUM_PDGAINS_PER_CHANNEL
Definition: ah_eeprom_v3.h:286
#define PWR_TABLE_SIZE_2413
Definition: ah_eeprom_v3.h:283
#define PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB
Definition: ah_eeprom_v3.h:293
#define MAX_PWR_RANGE_IN_HALF_DB
Definition: ah_eeprom_v3.h:292
#define SM(_v, _f)
Definition: ah_internal.h:587
#define HAL_INI_WRITE_BANK(ah, regArray, bankData, regWr)
Definition: ah_internal.h:935
#define HAL_INI_WRITE_ARRAY(ah, regArray, col, regWr)
Definition: ah_internal.h:927
#define AH_PRIVATE(_ah)
Definition: ah_internal.h:442
void * ath_hal_malloc(size_t)
static OS_INLINE uint16_t ath_hal_gethwchannel(struct ath_hal *ah, const struct ieee80211_channel *c)
Definition: ah_internal.h:732
#define IEEE80211_CHAN_ALLFULL
Definition: ah_internal.h:216
#define OS_REG_RMW_FIELD(_a, _r, _f, _v)
Definition: ah_internal.h:591
#define AH_NULL
Definition: ah_internal.h:28
#define HALASSERT(_x)
Definition: ah_internal.h:683
#define HALDEBUG(_ah, __m,...)
Definition: ah_internal.h:658
void ath_hal_free(void *p)
Definition: ah_osdep.c:116
#define OS_REG_WRITE(_ah, _reg, _val)
Definition: ah_osdep.h:139
#define OS_MARK(_ah, _id, _v)
Definition: ah_osdep.h:148
#define OS_REG_READ(_ah, _reg)
Definition: ah_osdep.h:140
#define AR_PHY(_n)
Definition: ar5210phy.h:30
#define IS_5413(ah)
Definition: ar5212.h:374
int16_t ar5212GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *)
Definition: ar5212_misc.c:769
#define AH5212(_ah)
Definition: ar5212.h:354
#define AR5212_MAGIC
Definition: ar5212.h:26
#define AR_PHY_TPCRG1_PDGAIN_SETTING1
Definition: ar5212phy.h:342
#define AR_PHY_TPCRG1
Definition: ar5212phy.h:339
#define AR_PHY_CCK_TX_CTRL_JAPAN
Definition: ar5212phy.h:313
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4
Definition: ar5212phy.h:358
#define AR_PHY_TPCRG5
Definition: ar5212phy.h:349
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2
Definition: ar5212phy.h:354
#define AR_PHY_TPCRG1_PDGAIN_SETTING3
Definition: ar5212phy.h:346
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1
Definition: ar5212phy.h:352
#define AR_PHY_TPCRG5_PD_GAIN_OVERLAP
Definition: ar5212phy.h:350
#define AR_PHY_TPCRG1_PDGAIN_SETTING2
Definition: ar5212phy.h:344
#define AR_PHY_TPCRG1_NUM_PD_GAIN
Definition: ar5212phy.h:340
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3
Definition: ar5212phy.h:356
#define AR_PHY_CCK_TX_CTRL
Definition: ar5212phy.h:312
static int16_t ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
Definition: ar5413.c:648
static HAL_BOOL ar5413SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
Definition: ar5413.c:159
static uint32_t * ar5413GetRfBank(struct ath_hal *ah, int bank)
Definition: ar5413.c:267
AH_RF(RF5413, ar5413Probe, ar5413RfAttach)
static void ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, int writes)
Definition: ar5413.c:66
#define VpdTable_L
void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, uint32_t numBits, uint32_t firstBit, uint32_t column)
#define VpdTable_I
static HAL_BOOL ar5413SetPowerTable(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
Definition: ar5413.c:541
static HAL_BOOL ar5413Probe(struct ath_hal *ah)
Definition: ar5413.c:799
#define VpdTable_R
static int ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, const RAW_DATA_STRUCT_2413 *pRawDataset, uint16_t pdGainOverlap_t2, int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], uint16_t pPdGainValues[], uint16_t pPDADCValues[])
Definition: ar5413.c:396
#define AR5413(ah)
Definition: ar5413.c:60
static int16_t ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
Definition: ar5413.c:666
static HAL_BOOL ar5413GetChannelMaxMinPower(struct ath_hal *ah, const struct ieee80211_channel *chan, int16_t *maxPow, int16_t *minPow)
Definition: ar5413.c:683
static void GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, uint32_t *vlo, uint32_t *vhi)
Definition: ar5413.c:290
static HAL_BOOL ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
Definition: ar5413.c:80
static HAL_BOOL ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
Definition: ar5413.c:767
#define RF_BANK_SETUP(_priv, _ix, _col)
static void ar5413RfDetach(struct ath_hal *ah)
Definition: ar5413.c:753
static int16_t interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, int16_t targetLeft, int16_t targetRight)
Definition: ar5413.c:377
#define N(a)
Definition: ar5413.c:35
static HAL_BOOL ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, const int16_t *pwrList, const uint16_t *VpdList, uint16_t numIntercepts, uint16_t retVpdList[][64])
Definition: ar5413.c:335
uint16_t ee_ob2
Definition: ah_eeprom_v3.h:402
uint16_t ee_db2
Definition: ah_eeprom_v3.h:403
uint16_t ee_db1
Definition: ah_eeprom_v3.h:401
uint16_t ee_obFor24g
Definition: ah_eeprom_v3.h:412
uint16_t ee_db3
Definition: ah_eeprom_v3.h:405
uint16_t ee_ob1
Definition: ah_eeprom_v3.h:400
uint16_t ee_dbFor24
Definition: ah_eeprom_v3.h:411
uint16_t ee_db4
Definition: ah_eeprom_v3.h:407
uint16_t ee_obFor24
Definition: ah_eeprom_v3.h:410
uint16_t ee_ob4
Definition: ah_eeprom_v3.h:406
uint16_t ee_ob3
Definition: ah_eeprom_v3.h:404
uint16_t ee_dbFor24g
Definition: ah_eeprom_v3.h:413
RAW_DATA_PER_PDGAIN_2413 pDataPerPDGain[MAX_NUM_PDGAINS_PER_CHANNEL]
Definition: ah_eeprom_v3.h:306
int16_t pwr_t4[NUM_POINTS_LAST_PDGAIN]
Definition: ah_eeprom_v3.h:299
uint16_t Vpd[NUM_POINTS_LAST_PDGAIN]
Definition: ah_eeprom_v3.h:298
uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413]
Definition: ah_eeprom_v3.h:311
RAW_DATA_PER_CHANNEL_2413 pDataPerChannel[NUM_11A_EEPROM_CHANNELS_2413]
Definition: ah_eeprom_v3.h:314
HAL_BOOL(* getChannelMaxMinPower)(struct ath_hal *ah, const struct ieee80211_channel *, int16_t *maxPow, int16_t *minPow)
Definition: ar5212.h:147
HAL_BOOL(* setRfRegs)(struct ath_hal *, const struct ieee80211_channel *, uint16_t modesIndex, uint16_t *rfXpdGain)
Definition: ar5212.h:141
HAL_BOOL(* setPowerTable)(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, const struct ieee80211_channel *, uint16_t *rfXpdGain)
Definition: ar5212.h:144
HAL_BOOL(* setChannel)(struct ath_hal *, const struct ieee80211_channel *)
Definition: ar5212.h:139
uint32_t *(* getRfBank)(struct ath_hal *ah, int bank)
Definition: ar5212.h:138
void(* writeRegs)(struct ath_hal *, u_int modeIndex, u_int freqIndex, int regWrites)
Definition: ar5212.h:136
int16_t(* getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL *)
Definition: ar5212.h:150
void(* rfDetach)(struct ath_hal *ah)
Definition: ar5212.h:135
uint16_t pcdacTable[PWR_TABLE_SIZE_2413]
Definition: ar5413.c:39
uint32_t Bank3Data[N(ar5212Bank3_5413)]
Definition: ar5413.c:43
uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]
Definition: ar5413.c:55
uint32_t Bank1Data[N(ar5212Bank1_5413)]
Definition: ar5413.c:41
uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]
Definition: ar5413.c:52
uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]
Definition: ar5413.c:58
uint32_t Bank7Data[N(ar5212Bank7_5413)]
Definition: ar5413.c:45
RF_HAL_FUNCS base
Definition: ar5413.c:38
uint32_t Bank2Data[N(ar5212Bank2_5413)]
Definition: ar5413.c:42
uint32_t Bank6Data[N(ar5212Bank6_5413)]
Definition: ar5413.c:44
u_int ah_pcdacTableSize
Definition: ar5212.h:335
int16_t ah_txPowerIndexOffset
Definition: ar5212.h:301
uint16_t * ah_pcdacTable
Definition: ar5212.h:334
RF_HAL_FUNCS * ah_rfHal
Definition: ar5212.h:266
HAL_RFGAIN ah_rfgainState
Definition: ar5212.h:284
Definition: ah.h:1219
uint32_t ah_magic
Definition: ah.h:1220