FreeBSD kernel ATH device code
ar9287.c
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1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2008 Atheros Communications, Inc.
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD$
20 */
21#include "opt_ah.h"
22
23/*
24 * NB: Merlin and later have a simpler RF backend.
25 */
26#include "ah.h"
27#include "ah_internal.h"
28
29#include "ah_eeprom_v14.h"
30
31#include "ar9002/ar9287.h"
32#include "ar5416/ar5416reg.h"
33#include "ar5416/ar5416phy.h"
34
35#define N(a) (sizeof(a)/sizeof(a[0]))
36
38 RF_HAL_FUNCS base; /* public state, must be first */
39 uint16_t pcdacTable[1]; /* XXX */
40};
41#define AR9287(ah) ((struct ar9287State *) AH5212(ah)->ah_rfHal)
42
44 const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow);
45int16_t ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c);
46
47static void
48ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
49 int writes)
50{
51 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
52 freqIndex, writes);
53}
54
55/*
56 * Take the MHz channel value and set the Channel value
57 *
58 * ASSUMES: Writes enabled to analog bus
59 *
60 * Actual Expression,
61 *
62 * For 2GHz channel,
63 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
64 * (freq_ref = 40MHz)
65 *
66 * For 5GHz channel,
67 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
68 * (freq_ref = 40MHz/(24>>amodeRefSel))
69 *
70 * For 5GHz channels which are 5MHz spaced,
71 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
72 * (freq_ref = 40MHz)
73 */
74static HAL_BOOL
75ar9287SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
76{
77 uint16_t bMode, fracMode, aModeRefSel = 0;
78 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
79 CHAN_CENTERS centers;
80 uint32_t refDivA = 24;
81
82 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
83
84 ar5416GetChannelCenters(ah, chan, &centers);
85 freq = centers.synth_center;
86
88 reg32 &= 0xc0000000;
89
90 if (freq < 4800) { /* 2 GHz, fractional mode */
91 uint32_t txctl;
92 int regWrites = 0;
93
94 bMode = 1;
95 fracMode = 1;
96 aModeRefSel = 0;
97 channelSel = (freq * 0x10000)/15;
98
100 if (freq == 2484) {
102 &AH9287(ah)->ah_ini_cckFirJapan2484, 1,
103 regWrites);
104 } else {
106 &AH9287(ah)->ah_ini_cckFirNormal, 1,
107 regWrites);
108 }
109 }
110
111 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
112 if (freq == 2484) {
113 /* Enable channel spreading for channel 14 */
116 } else {
118 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
119 }
120 } else {
121 bMode = 0;
122 fracMode = 0;
123
124 if ((freq % 20) == 0) {
125 aModeRefSel = 3;
126 } else if ((freq % 10) == 0) {
127 aModeRefSel = 2;
128 } else {
129 aModeRefSel = 0;
130 /*
131 * Enable 2G (fractional) mode for channels which
132 * are 5MHz spaced
133 */
134 fracMode = 1;
135 refDivA = 1;
136 channelSel = (freq * 0x8000)/15;
137
138 /* RefDivA setting */
140 AR_AN_SYNTH9_REFDIVA, refDivA);
141 }
142 if (!fracMode) {
143 ndiv = (freq * (refDivA >> aModeRefSel))/60;
144 channelSel = ndiv & 0x1ff;
145 channelFrac = (ndiv & 0xfffffe00) * 2;
146 channelSel = (channelSel << 17) | channelFrac;
147 }
148 }
149
150 reg32 = reg32 | (bMode << 29) | (fracMode << 28) |
151 (aModeRefSel << 26) | (channelSel);
152
154
155 AH_PRIVATE(ah)->ah_curchan = chan;
156
157 return AH_TRUE;
158}
159
160/*
161 * Return a reference to the requested RF Bank.
162 */
163static uint32_t *
164ar9287GetRfBank(struct ath_hal *ah, int bank)
165{
166 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
167 __func__, bank);
168 return AH_NULL;
169}
170
171/*
172 * Reads EEPROM header info from device structure and programs
173 * all rf registers
174 */
175static HAL_BOOL
176ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
177 uint16_t modesIndex, uint16_t *rfXpdGain)
178{
179 return AH_TRUE; /* nothing to do */
180}
181
182/*
183 * Read the transmit power levels from the structures taken from EEPROM
184 * Interpolate read transmit power values for this channel
185 * Organize the transmit power values into a table for writing into the hardware
186 */
187
188static HAL_BOOL
189ar9287SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
190 const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
191{
192 return AH_TRUE;
193}
194
195#if 0
196static int16_t
197ar9287GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
198{
199 int i, minIndex;
200 int16_t minGain,minPwr,minPcdac,retVal;
201
202 /* Assume NUM_POINTS_XPD0 > 0 */
203 minGain = data->pDataPerXPD[0].xpd_gain;
204 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
205 if (data->pDataPerXPD[i].xpd_gain < minGain) {
206 minIndex = i;
207 minGain = data->pDataPerXPD[i].xpd_gain;
208 }
209 }
210 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
211 minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
212 for (i=1; i<NUM_POINTS_XPD0; i++) {
213 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
214 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
215 minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
216 }
217 }
218 retVal = minPwr - (minPcdac*2);
219 return(retVal);
220}
221#endif
222
223static HAL_BOOL
225 const struct ieee80211_channel *chan,
226 int16_t *maxPow, int16_t *minPow)
227{
228#if 0
229 struct ath_hal_5212 *ahp = AH5212(ah);
230 int numChannels=0,i,last;
231 int totalD, totalF,totalMin;
234
235 *maxPow = 0;
236 if (IS_CHAN_A(chan)) {
237 powerArray = ahp->ah_modePowerArray5112;
238 data = powerArray[headerInfo11A].pDataPerChannel;
239 numChannels = powerArray[headerInfo11A].numChannels;
240 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
241 /* XXX - is this correct? Should we also use the same power for turbo G? */
242 powerArray = ahp->ah_modePowerArray5112;
243 data = powerArray[headerInfo11G].pDataPerChannel;
244 numChannels = powerArray[headerInfo11G].numChannels;
245 } else if (IS_CHAN_B(chan)) {
246 powerArray = ahp->ah_modePowerArray5112;
247 data = powerArray[headerInfo11B].pDataPerChannel;
248 numChannels = powerArray[headerInfo11B].numChannels;
249 } else {
250 return (AH_TRUE);
251 }
252 /* Make sure the channel is in the range of the TP values
253 * (freq piers)
254 */
255 if ((numChannels < 1) ||
256 (chan->channel < data[0].channelValue) ||
257 (chan->channel > data[numChannels-1].channelValue))
258 return(AH_FALSE);
259
260 /* Linearly interpolate the power value now */
261 for (last=0,i=0;
262 (i<numChannels) && (chan->channel > data[i].channelValue);
263 last=i++);
264 totalD = data[i].channelValue - data[last].channelValue;
265 if (totalD > 0) {
266 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
267 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
268
269 totalMin = ar9287GetMinPower(ah,&data[i]) - ar9287GetMinPower(ah, &data[last]);
270 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9287GetMinPower(ah, &data[last])*totalD)/totalD);
271 return (AH_TRUE);
272 } else {
273 if (chan->channel == data[i].channelValue) {
274 *maxPow = data[i].maxPower_t4;
275 *minPow = ar9287GetMinPower(ah, &data[i]);
276 return(AH_TRUE);
277 } else
278 return(AH_FALSE);
279 }
280#else
281 *maxPow = *minPow = 0;
282 return AH_FALSE;
283#endif
284}
285
286/*
287 * The ordering of nfarray is thus:
288 *
289 * nfarray[0]: Chain 0 ctl
290 * nfarray[1]: Chain 1 ctl
291 * nfarray[2]: Chain 2 ctl
292 * nfarray[3]: Chain 0 ext
293 * nfarray[4]: Chain 1 ext
294 * nfarray[5]: Chain 2 ext
295 */
296static void
297ar9287GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
298{
299 int16_t nf;
300
302 if (nf & 0x100)
303 nf = 0 - ((nf ^ 0x1ff) + 1);
305 "NF calibrated [ctl] [chain 0] is %d\n", nf);
306 nfarray[0] = nf;
307
309 if (nf & 0x100)
310 nf = 0 - ((nf ^ 0x1ff) + 1);
312 "NF calibrated [ctl] [chain 1] is %d\n", nf);
313 nfarray[1] = nf;
314
316 if (nf & 0x100)
317 nf = 0 - ((nf ^ 0x1ff) + 1);
319 "NF calibrated [ext] [chain 0] is %d\n", nf);
320 nfarray[3] = nf;
321
323 if (nf & 0x100)
324 nf = 0 - ((nf ^ 0x1ff) + 1);
326 "NF calibrated [ext] [chain 1] is %d\n", nf);
327 nfarray[4] = nf;
328
329 /* Chain 2 - invalid */
330 nfarray[2] = 0;
331 nfarray[5] = 0;
332
333}
334
335/*
336 * Adjust NF based on statistical values for 5GHz frequencies.
337 * Stubbed:Not used by Fowl
338 */
339int16_t
341{
342 return 0;
343}
344
345/*
346 * Free memory for analog bank scratch buffers
347 */
348static void
350{
351 struct ath_hal_5212 *ahp = AH5212(ah);
352
353 HALASSERT(ahp->ah_rfHal != AH_NULL);
355 ahp->ah_rfHal = AH_NULL;
356}
357
360{
361 struct ath_hal_5212 *ahp = AH5212(ah);
362 struct ar9287State *priv;
363
364 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__);
365
366 HALASSERT(ahp->ah_rfHal == AH_NULL);
367 priv = ath_hal_malloc(sizeof(struct ar9287State));
368 if (priv == AH_NULL) {
370 "%s: cannot allocate private state\n", __func__);
371 *status = HAL_ENOMEM; /* XXX */
372 return AH_FALSE;
373 }
382
383 ahp->ah_pcdacTable = priv->pcdacTable;
384 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
385 ahp->ah_rfHal = &priv->base;
386 /*
387 * Set noise floor adjust method; we arrange a
388 * direct call instead of thunking.
389 */
390 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
391 AH_PRIVATE(ah)->ah_getNoiseFloor = ar9287GetNoiseFloor;
392
393 return AH_TRUE;
394}
395
396static HAL_BOOL
398{
399 return (AR_SREV_KIWI(ah));
400}
401
int ath_hal_ini_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia, int col, int regWr)
Definition: ah.c:1312
HAL_STATUS
Definition: ah.h:71
@ HAL_ENOMEM
Definition: ah.h:74
HAL_BOOL
Definition: ah.h:93
@ AH_FALSE
Definition: ah.h:94
@ AH_TRUE
Definition: ah.h:95
@ HAL_DEBUG_NFCAL
Definition: ah_debug.h:32
@ HAL_DEBUG_ANY
Definition: ah_debug.h:62
@ HAL_DEBUG_ATTACH
Definition: ah_debug.h:30
@ AH_MARK_SETCHANNEL
Definition: ah_decode.h:53
@ headerInfo11G
Definition: ah_eeprom_v3.h:84
@ headerInfo11A
Definition: ah_eeprom_v3.h:82
@ headerInfo11B
Definition: ah_eeprom_v3.h:83
#define NUM_XPD_PER_CHANNEL
Definition: ah_eeprom_v3.h:221
#define NUM_POINTS_XPD0
Definition: ah_eeprom_v3.h:222
#define MS(_v, _f)
Definition: ah_internal.h:588
#define AH_PRIVATE(_ah)
Definition: ah_internal.h:442
void * ath_hal_malloc(size_t)
#define AH_NULL
Definition: ah_internal.h:28
#define HALASSERT(_x)
Definition: ah_internal.h:683
#define HALDEBUG(_ah, __m,...)
Definition: ah_internal.h:658
#define OS_A_REG_RMW_FIELD(_a, _r, _f, _v)
Definition: ah_internal.h:610
void ath_hal_free(void *p)
Definition: ah_osdep.c:116
#define OS_REG_WRITE(_ah, _reg, _val)
Definition: ah_osdep.h:139
#define OS_MARK(_ah, _id, _v)
Definition: ah_osdep.h:148
#define OS_REG_READ(_ah, _reg)
Definition: ah_osdep.h:140
#define AH5212(_ah)
Definition: ar5212.h:354
#define AR_PHY_CCK_TX_CTRL_JAPAN
Definition: ar5212phy.h:313
#define AR_PHY_CCK_TX_CTRL
Definition: ar5212phy.h:312
void ar5416GetChannelCenters(struct ath_hal *, const struct ieee80211_channel *chan, CHAN_CENTERS *centers)
#define AH5416(_ah)
Definition: ar5416.h:162
#define AR9280_PHY_CH1_EXT_MINCCA_PWR
Definition: ar5416phy.h:256
#define AR_PHY_EXT_CCA
Definition: ar5416phy.h:188
#define AR9280_PHY_CH1_MINCCA_PWR
Definition: ar5416phy.h:246
#define AR_PHY_CH1_EXT_CCA
Definition: ar5416phy.h:274
#define AR_PHY_SYNTH_CONTROL
Definition: ar5416phy.h:308
#define AR_PHY_CH1_CCA
Definition: ar5416phy.h:241
#define AR9280_PHY_EXT_MINCCA_PWR
Definition: ar5416phy.h:196
#define AR_PHY_CCA
Definition: ar5416phy.h:233
#define AR9280_PHY_MINCCA_PWR
Definition: ar5416phy.h:236
#define AR_AN_SYNTH9_REFDIVA
Definition: ar5416reg.h:472
#define AR_SREV_KIWI(_ah)
Definition: ar5416reg.h:782
#define AR_AN_SYNTH9
Definition: ar5416reg.h:439
#define AR_SREV_KIWI_11_OR_LATER(_ah)
Definition: ar5416reg.h:789
static HAL_BOOL ar9287GetChannelMaxMinPower(struct ath_hal *, const struct ieee80211_channel *, int16_t *maxPow, int16_t *minPow)
Definition: ar9287.c:224
static HAL_BOOL ar9287SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
Definition: ar9287.c:189
static void ar9287RfDetach(struct ath_hal *ah)
Definition: ar9287.c:349
HAL_BOOL ar9287RfAttach(struct ath_hal *ah, HAL_STATUS *status)
Definition: ar9287.c:359
static uint32_t * ar9287GetRfBank(struct ath_hal *ah, int bank)
Definition: ar9287.c:164
static void ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, int writes)
Definition: ar9287.c:48
int16_t ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
Definition: ar9287.c:340
static HAL_BOOL ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
Definition: ar9287.c:176
static HAL_BOOL ar9287RfProbe(struct ath_hal *ah)
Definition: ar9287.c:397
AH_RF(RF9287, ar9287RfProbe, ar9287RfAttach)
static void ar9287GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
Definition: ar9287.c:297
static HAL_BOOL ar9287SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
Definition: ar9287.c:75
#define AH9287(_ah)
Definition: ar9287.h:47
uint16_t synth_center
Definition: ar5416.h:31
EXPN_DATA_PER_CHANNEL_5112 * pDataPerChannel
Definition: ah_eeprom_v3.h:251
EXPN_DATA_PER_XPD_5112 pDataPerXPD[NUM_XPD_PER_CHANNEL]
Definition: ah_eeprom_v3.h:244
int16_t pwr_t4[NUM_POINTS_XPD0]
Definition: ah_eeprom_v3.h:238
uint16_t pcdac[NUM_POINTS_XPD0]
Definition: ah_eeprom_v3.h:237
HAL_BOOL(* getChannelMaxMinPower)(struct ath_hal *ah, const struct ieee80211_channel *, int16_t *maxPow, int16_t *minPow)
Definition: ar5212.h:147
HAL_BOOL(* setRfRegs)(struct ath_hal *, const struct ieee80211_channel *, uint16_t modesIndex, uint16_t *rfXpdGain)
Definition: ar5212.h:141
HAL_BOOL(* setPowerTable)(struct ath_hal *ah, int16_t *minPower, int16_t *maxPower, const struct ieee80211_channel *, uint16_t *rfXpdGain)
Definition: ar5212.h:144
HAL_BOOL(* setChannel)(struct ath_hal *, const struct ieee80211_channel *)
Definition: ar5212.h:139
uint32_t *(* getRfBank)(struct ath_hal *ah, int bank)
Definition: ar5212.h:138
void(* writeRegs)(struct ath_hal *, u_int modeIndex, u_int freqIndex, int regWrites)
Definition: ar5212.h:136
int16_t(* getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL *)
Definition: ar5212.h:150
void(* rfDetach)(struct ath_hal *ah)
Definition: ar5212.h:135
RF_HAL_FUNCS base
Definition: ar9287.c:38
uint16_t pcdacTable[1]
Definition: ar9287.c:39
u_int ah_pcdacTableSize
Definition: ar5212.h:335
uint16_t * ah_pcdacTable
Definition: ar5212.h:334
RF_HAL_FUNCS * ah_rfHal
Definition: ar5212.h:266
Definition: ah.h:1219