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Macros
#define	IXGBE_DPMCS_MTSOS_SHIFT 16

#define	IXGBE_DPMCS_TDPAC

#define	IXGBE_DPMCS_TRM 0x00000010 /* Transmit Recycle Mode */

#define	IXGBE_DPMCS_ARBDIS 0x00000040 /* DCB arbiter disable */

#define	IXGBE_DPMCS_TSOEF 0x00080000 /* TSO Expand Factor: 0=x4, 1=x2 */

#define	IXGBE_RUPPBMR_MQA 0x80000000 /* Enable UP to queue mapping */

#define	IXGBE_RT2CR_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */

#define	IXGBE_RT2CR_LSP 0x80000000 /* LSP enable bit */

#define	IXGBE_RDRXCTL_MPBEN

#define	IXGBE_RDRXCTL_MCEN

#define	IXGBE_TDTQ2TCCR_MCL_SHIFT 12

#define	IXGBE_TDTQ2TCCR_BWG_SHIFT 9

#define	IXGBE_TDTQ2TCCR_GSP 0x40000000

#define	IXGBE_TDTQ2TCCR_LSP 0x80000000

#define	IXGBE_TDPT2TCCR_MCL_SHIFT 12

#define	IXGBE_TDPT2TCCR_BWG_SHIFT 9

#define	IXGBE_TDPT2TCCR_GSP 0x40000000

#define	IXGBE_TDPT2TCCR_LSP 0x80000000

#define	IXGBE_PDPMCS_TPPAC

#define	IXGBE_PDPMCS_ARBDIS 0x00000040 /* Arbiter disable */

#define	IXGBE_PDPMCS_TRM 0x00000100 /* Transmit Recycle Mode enable */

#define	IXGBE_DTXCTL_ENDBUBD 0x00000004 /* Enable DBU buffer division */

#define	IXGBE_TXPBSIZE_40KB 0x0000A000 /* 40KB Packet Buffer */

#define	IXGBE_RXPBSIZE_48KB 0x0000C000 /* 48KB Packet Buffer */

#define	IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */

#define	IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */

Functions
s32	ixgbe_dcb_config_pfc_82598 (struct ixgbe_hw *, u8)

s32	ixgbe_dcb_config_tc_stats_82598 (struct ixgbe_hw *)

s32	ixgbe_dcb_get_tc_stats_82598 (struct ixgbe_hw , struct ixgbe_hw_stats , u8)

s32	ixgbe_dcb_get_pfc_stats_82598 (struct ixgbe_hw , struct ixgbe_hw_stats , u8)

s32	ixgbe_dcb_config_tx_desc_arbiter_82598 (struct ixgbe_hw , u16 , u16 , u8 , u8 *)

s32	ixgbe_dcb_config_tx_data_arbiter_82598 (struct ixgbe_hw , u16 , u16 , u8 , u8 *)

s32	ixgbe_dcb_config_rx_arbiter_82598 (struct ixgbe_hw , u16 , u16 , u8 )

s32	ixgbe_dcb_hw_config_82598 (struct ixgbe_hw , int, u16 , u16 , u8 , u8 *)

Macro Definition Documentation

◆ IXGBE_DPMCS_ARBDIS

#define IXGBE_DPMCS_ARBDIS 0x00000040 /* DCB arbiter disable */

Definition at line 44 of file ixgbe_dcb_82598.h.

◆ IXGBE_DPMCS_MTSOS_SHIFT

#define IXGBE_DPMCS_MTSOS_SHIFT 16

Definition at line 41 of file ixgbe_dcb_82598.h.

◆ IXGBE_DPMCS_TDPAC

#define IXGBE_DPMCS_TDPAC

Value:

0x00000001 /* 0 Round Robin,

* 1 DFP - Deficit Fixed Priority */

Definition at line 42 of file ixgbe_dcb_82598.h.

◆ IXGBE_DPMCS_TRM

#define IXGBE_DPMCS_TRM 0x00000010 /* Transmit Recycle Mode */

Definition at line 43 of file ixgbe_dcb_82598.h.

◆ IXGBE_DPMCS_TSOEF

#define IXGBE_DPMCS_TSOEF 0x00080000 /* TSO Expand Factor: 0=x4, 1=x2 */

Definition at line 45 of file ixgbe_dcb_82598.h.

◆ IXGBE_DTXCTL_ENDBUBD

#define IXGBE_DTXCTL_ENDBUBD 0x00000004 /* Enable DBU buffer division */

Definition at line 69 of file ixgbe_dcb_82598.h.

◆ IXGBE_PDPMCS_ARBDIS

#define IXGBE_PDPMCS_ARBDIS 0x00000040 /* Arbiter disable */

Definition at line 66 of file ixgbe_dcb_82598.h.

◆ IXGBE_PDPMCS_TPPAC

#define IXGBE_PDPMCS_TPPAC

Value:

0x00000020 /* 0 Round Robin,

* 1 DFP - Deficit Fixed Priority */

Definition at line 65 of file ixgbe_dcb_82598.h.

◆ IXGBE_PDPMCS_TRM

#define IXGBE_PDPMCS_TRM 0x00000100 /* Transmit Recycle Mode enable */

Definition at line 67 of file ixgbe_dcb_82598.h.

◆ IXGBE_RDRXCTL_MCEN

#define IXGBE_RDRXCTL_MCEN

Value:

0x00000040 /* DMA config for multiple cores

* (RSS) enable */

Definition at line 53 of file ixgbe_dcb_82598.h.

◆ IXGBE_RDRXCTL_MPBEN

#define IXGBE_RDRXCTL_MPBEN

Value:

0x00000010 /* DMA config for multiple packet

* buffers enable */

Definition at line 52 of file ixgbe_dcb_82598.h.

◆ IXGBE_RT2CR_LSP

#define IXGBE_RT2CR_LSP 0x80000000 /* LSP enable bit */

Definition at line 50 of file ixgbe_dcb_82598.h.

◆ IXGBE_RT2CR_MCL_SHIFT

#define IXGBE_RT2CR_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */

Definition at line 49 of file ixgbe_dcb_82598.h.

◆ IXGBE_RUPPBMR_MQA

#define IXGBE_RUPPBMR_MQA 0x80000000 /* Enable UP to queue mapping */

Definition at line 47 of file ixgbe_dcb_82598.h.

◆ IXGBE_RXPBSIZE_48KB

#define IXGBE_RXPBSIZE_48KB 0x0000C000 /* 48KB Packet Buffer */

Definition at line 72 of file ixgbe_dcb_82598.h.

◆ IXGBE_RXPBSIZE_64KB

#define IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */

Definition at line 73 of file ixgbe_dcb_82598.h.

◆ IXGBE_RXPBSIZE_80KB

#define IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */

Definition at line 74 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDPT2TCCR_BWG_SHIFT

#define IXGBE_TDPT2TCCR_BWG_SHIFT 9

Definition at line 61 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDPT2TCCR_GSP

#define IXGBE_TDPT2TCCR_GSP 0x40000000

Definition at line 62 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDPT2TCCR_LSP

#define IXGBE_TDPT2TCCR_LSP 0x80000000

Definition at line 63 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDPT2TCCR_MCL_SHIFT

#define IXGBE_TDPT2TCCR_MCL_SHIFT 12

Definition at line 60 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDTQ2TCCR_BWG_SHIFT

#define IXGBE_TDTQ2TCCR_BWG_SHIFT 9

Definition at line 56 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDTQ2TCCR_GSP

#define IXGBE_TDTQ2TCCR_GSP 0x40000000

Definition at line 57 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDTQ2TCCR_LSP

#define IXGBE_TDTQ2TCCR_LSP 0x80000000

Definition at line 58 of file ixgbe_dcb_82598.h.

◆ IXGBE_TDTQ2TCCR_MCL_SHIFT

#define IXGBE_TDTQ2TCCR_MCL_SHIFT 12

Definition at line 55 of file ixgbe_dcb_82598.h.

◆ IXGBE_TXPBSIZE_40KB

#define IXGBE_TXPBSIZE_40KB 0x0000A000 /* 40KB Packet Buffer */

Definition at line 71 of file ixgbe_dcb_82598.h.

Function Documentation

◆ ixgbe_dcb_config_pfc_82598()

s32 ixgbe_dcb_config_pfc_82598	(	struct ixgbe_hw *	hw,
		u8	pfc_en
	)

ixgbe_dcb_config_pfc_82598 - Config priority flow control @hw: pointer to hardware structure @pfc_en: enabled pfc bitmask

Configure Priority Flow Control for each traffic class.

Definition at line 263 of file ixgbe_dcb_82598.c.

References ixgbe_hw::fc, ixgbe_fc_info::high_water, IXGBE_DCB_MAX_TRAFFIC_CLASS, IXGBE_FCRTH, IXGBE_FCRTH_FCEN, IXGBE_FCRTL, IXGBE_FCRTL_XONE, IXGBE_FCRTV, IXGBE_FCTRL, IXGBE_FCTRL_RFCE, IXGBE_FCTRL_RPFCE, IXGBE_FCTTV, IXGBE_READ_REG, IXGBE_RMCS, IXGBE_RMCS_TFCE_PRIORITY, IXGBE_SUCCESS, IXGBE_WRITE_REG, ixgbe_fc_info::low_water, and ixgbe_fc_info::pause_time.

Referenced by ixgbe_dcb_config_pfc(), and ixgbe_dcb_config_pfc_cee().

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◆ ixgbe_dcb_config_rx_arbiter_82598()

s32 ixgbe_dcb_config_rx_arbiter_82598	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	tsa
	)

ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter @hw: pointer to hardware structure @refill: refill credits index by traffic class @max: max credits index by traffic class @tsa: transmission selection algorithm indexed by traffic class

Configure Rx Data Arbiter and credits for each traffic class.

Definition at line 113 of file ixgbe_dcb_82598.c.

References IXGBE_DCB_MAX_TRAFFIC_CLASS, ixgbe_dcb_tsa_strict, IXGBE_RDRXCTL, IXGBE_RDRXCTL_MCEN, IXGBE_RDRXCTL_MPBEN, IXGBE_RDRXCTL_RDMTS_1_2, IXGBE_READ_REG, IXGBE_RMCS, IXGBE_RMCS_DFP, IXGBE_RMCS_RRM, IXGBE_RT2CR, IXGBE_RT2CR_LSP, IXGBE_RT2CR_MCL_SHIFT, IXGBE_RUPPBMR, IXGBE_RUPPBMR_MQA, IXGBE_RXCTRL, IXGBE_SUCCESS, and IXGBE_WRITE_REG.

Referenced by ixgbe_dcb_config_rx_arbiter_cee(), ixgbe_dcb_hw_config(), and ixgbe_dcb_hw_config_82598().

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◆ ixgbe_dcb_config_tc_stats_82598()

s32 ixgbe_dcb_config_tc_stats_82598 ( struct ixgbe_hw * hw )

ixgbe_dcb_config_tc_stats_82598 - Configure traffic class statistics @hw: pointer to hardware structure

Configure queue statistics registers, all queues belonging to same traffic class uses a single set of queue statistics counters.

Definition at line 315 of file ixgbe_dcb_82598.c.

References IXGBE_READ_REG, IXGBE_RQSMR, IXGBE_SUCCESS, IXGBE_TQSMR, and IXGBE_WRITE_REG.

Referenced by ixgbe_dcb_config_tc_stats(), and ixgbe_dcb_hw_config_82598().

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◆ ixgbe_dcb_config_tx_data_arbiter_82598()

s32 ixgbe_dcb_config_tx_data_arbiter_82598	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	tsa
	)

ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter @hw: pointer to hardware structure @refill: refill credits index by traffic class @max: max credits index by traffic class @bwg_id: bandwidth grouping indexed by traffic class @tsa: transmission selection algorithm indexed by traffic class

Configure Tx Data Arbiter and credits for each traffic class.

Definition at line 218 of file ixgbe_dcb_82598.c.

References IXGBE_DCB_MAX_TRAFFIC_CLASS, ixgbe_dcb_tsa_group_strict_cee, ixgbe_dcb_tsa_strict, IXGBE_DTXCTL, IXGBE_DTXCTL_ENDBUBD, IXGBE_PDPMCS, IXGBE_PDPMCS_TPPAC, IXGBE_PDPMCS_TRM, IXGBE_READ_REG, IXGBE_SUCCESS, IXGBE_TDPT2TCCR, IXGBE_TDPT2TCCR_BWG_SHIFT, IXGBE_TDPT2TCCR_GSP, IXGBE_TDPT2TCCR_LSP, IXGBE_TDPT2TCCR_MCL_SHIFT, and IXGBE_WRITE_REG.

Referenced by ixgbe_dcb_config_tx_data_arbiter_cee(), ixgbe_dcb_hw_config(), and ixgbe_dcb_hw_config_82598().

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◆ ixgbe_dcb_config_tx_desc_arbiter_82598()

s32 ixgbe_dcb_config_tx_desc_arbiter_82598	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	tsa
	)

ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter @hw: pointer to hardware structure @refill: refill credits index by traffic class @max: max credits index by traffic class @bwg_id: bandwidth grouping indexed by traffic class @tsa: transmission selection algorithm indexed by traffic class

Configure Tx Descriptor Arbiter and credits for each traffic class.

Definition at line 171 of file ixgbe_dcb_82598.c.

References IXGBE_DCB_MAX_TRAFFIC_CLASS, ixgbe_dcb_tsa_group_strict_cee, ixgbe_dcb_tsa_strict, IXGBE_DPMCS, IXGBE_DPMCS_MTSOS_SHIFT, IXGBE_DPMCS_TSOEF, IXGBE_READ_REG, IXGBE_SUCCESS, IXGBE_TDTQ2TCCR, IXGBE_TDTQ2TCCR_BWG_SHIFT, IXGBE_TDTQ2TCCR_GSP, IXGBE_TDTQ2TCCR_LSP, IXGBE_TDTQ2TCCR_MCL_SHIFT, and IXGBE_WRITE_REG.

Referenced by ixgbe_dcb_config_tx_desc_arbiter_cee(), ixgbe_dcb_hw_config(), and ixgbe_dcb_hw_config_82598().

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◆ ixgbe_dcb_get_pfc_stats_82598()

s32 ixgbe_dcb_get_pfc_stats_82598	(	struct ixgbe_hw *	hw,
		struct ixgbe_hw_stats *	stats,
		u8	tc_count
	)

ixgbe_dcb_get_pfc_stats_82598 - Returns CBFC status data @hw: pointer to hardware structure @stats: pointer to statistics structure @tc_count: Number of elements in bwg_array.

This function returns the CBFC status data for each of the Traffic Classes.

Definition at line 83 of file ixgbe_dcb_82598.c.

References DEBUGFUNC, IXGBE_DCB_MAX_TRAFFIC_CLASS, IXGBE_ERR_PARAM, IXGBE_PXOFFRXC, IXGBE_PXOFFTXC, IXGBE_READ_REG, IXGBE_SUCCESS, ixgbe_hw_stats::pxoffrxc, and ixgbe_hw_stats::pxofftxc.

Referenced by ixgbe_dcb_get_pfc_stats().

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◆ ixgbe_dcb_get_tc_stats_82598()

s32 ixgbe_dcb_get_tc_stats_82598	(	struct ixgbe_hw *	hw,
		struct ixgbe_hw_stats *	stats,
		u8	tc_count
	)

ixgbe_dcb_get_tc_stats_82598 - Return status data for each traffic class @hw: pointer to hardware structure @stats: pointer to statistics structure @tc_count: Number of elements in bwg_array.

This function returns the status data for each of the Traffic Classes in use.

Definition at line 49 of file ixgbe_dcb_82598.c.

References DEBUGFUNC, IXGBE_DCB_MAX_TRAFFIC_CLASS, IXGBE_ERR_PARAM, IXGBE_QBRC, IXGBE_QBTC, IXGBE_QPRC, IXGBE_QPTC, IXGBE_READ_REG, IXGBE_SUCCESS, ixgbe_hw_stats::qbrc, ixgbe_hw_stats::qbtc, ixgbe_hw_stats::qprc, and ixgbe_hw_stats::qptc.

Referenced by ixgbe_dcb_get_tc_stats().

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◆ ixgbe_dcb_hw_config_82598()

s32 ixgbe_dcb_hw_config_82598	(	struct ixgbe_hw *	hw,
		int	link_speed,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	tsa
	)

ixgbe_dcb_hw_config_82598 - Config and enable DCB @hw: pointer to hardware structure @link_speed: unused @refill: refill credits index by traffic class @max: max credits index by traffic class @bwg_id: bandwidth grouping indexed by traffic class @tsa: transmission selection algorithm indexed by traffic class

Configure dcb settings and enable dcb mode.

Definition at line 351 of file ixgbe_dcb_82598.c.

References ixgbe_dcb_config_rx_arbiter_82598(), ixgbe_dcb_config_tc_stats_82598(), ixgbe_dcb_config_tx_data_arbiter_82598(), ixgbe_dcb_config_tx_desc_arbiter_82598(), IXGBE_SUCCESS, and UNREFERENCED_1PARAMETER.

Referenced by ixgbe_dcb_hw_config_cee().

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Macros

Functions

Macro Definition Documentation

◆ IXGBE_DPMCS_ARBDIS

◆ IXGBE_DPMCS_MTSOS_SHIFT

◆ IXGBE_DPMCS_TDPAC

◆ IXGBE_DPMCS_TRM

◆ IXGBE_DPMCS_TSOEF

◆ IXGBE_DTXCTL_ENDBUBD

◆ IXGBE_PDPMCS_ARBDIS

◆ IXGBE_PDPMCS_TPPAC

◆ IXGBE_PDPMCS_TRM

◆ IXGBE_RDRXCTL_MCEN

◆ IXGBE_RDRXCTL_MPBEN

◆ IXGBE_RT2CR_LSP

◆ IXGBE_RT2CR_MCL_SHIFT

◆ IXGBE_RUPPBMR_MQA

◆ IXGBE_RXPBSIZE_48KB

◆ IXGBE_RXPBSIZE_64KB

◆ IXGBE_RXPBSIZE_80KB

◆ IXGBE_TDPT2TCCR_BWG_SHIFT

◆ IXGBE_TDPT2TCCR_GSP

◆ IXGBE_TDPT2TCCR_LSP

◆ IXGBE_TDPT2TCCR_MCL_SHIFT

◆ IXGBE_TDTQ2TCCR_BWG_SHIFT

◆ IXGBE_TDTQ2TCCR_GSP

◆ IXGBE_TDTQ2TCCR_LSP

◆ IXGBE_TDTQ2TCCR_MCL_SHIFT

◆ IXGBE_TXPBSIZE_40KB

Function Documentation

◆ ixgbe_dcb_config_pfc_82598()

◆ ixgbe_dcb_config_rx_arbiter_82598()

◆ ixgbe_dcb_config_tc_stats_82598()

◆ ixgbe_dcb_config_tx_data_arbiter_82598()

◆ ixgbe_dcb_config_tx_desc_arbiter_82598()

◆ ixgbe_dcb_get_pfc_stats_82598()

◆ ixgbe_dcb_get_tc_stats_82598()

◆ ixgbe_dcb_hw_config_82598()