61 for (tc = 0; tc < tc_count; tc++) {
94 for (tc = 0; tc < tc_count; tc++) {
117 u32 credit_refill = 0;
126 reg &= ~IXGBE_RMCS_ARBDIS;
136 credit_refill = refill[i];
155 reg &= ~IXGBE_RXCTRL_DMBYPS;
175 u32 reg, max_credits;
181 reg &= ~IXGBE_DPMCS_ARBDIS;
191 max_credits = max[i];
193 reg |= (
u32)(refill[i]);
227 reg &= ~IXGBE_PDPMCS_ARBDIS;
270 reg &= ~IXGBE_RMCS_TFCE_802_3X;
285 if (!(pfc_en & (1 << i))) {
322 for (i = 0, j = 0; i < 15 && j < 8; i = i + 2, j++) {
324 reg |= ((0x1010101) * j);
327 reg |= ((0x1010101) * j);
331 for (i = 0; i < 8; i++) {
333 reg |= ((0x1010101) * i);
@ ixgbe_dcb_tsa_group_strict_cee
s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *tsa)
s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, u8 tc_count)
s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw)
s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *hw, int link_speed, u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa)
s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en)
s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa)
s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa)
s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, u8 tc_count)
#define IXGBE_DTXCTL_ENDBUBD
#define IXGBE_TDPT2TCCR_LSP
#define IXGBE_TDPT2TCCR_BWG_SHIFT
#define IXGBE_PDPMCS_TPPAC
#define IXGBE_DPMCS_TSOEF
#define IXGBE_TDTQ2TCCR_GSP
#define IXGBE_TDPT2TCCR_GSP
#define IXGBE_RUPPBMR_MQA
#define IXGBE_TDTQ2TCCR_MCL_SHIFT
#define IXGBE_RDRXCTL_MPBEN
#define IXGBE_RT2CR_MCL_SHIFT
#define IXGBE_DPMCS_MTSOS_SHIFT
#define IXGBE_RDRXCTL_MCEN
#define IXGBE_TDPT2TCCR_MCL_SHIFT
#define IXGBE_TDTQ2TCCR_BWG_SHIFT
#define IXGBE_TDTQ2TCCR_LSP
#define IXGBE_READ_REG(a, reg)
#define UNREFERENCED_1PARAMETER(_p)
#define IXGBE_WRITE_REG(a, reg, val)
#define IXGBE_RMCS_TFCE_PRIORITY
#define IXGBE_PXOFFTXC(_i)
#define IXGBE_RDRXCTL_RDMTS_1_2
#define IXGBE_DCB_MAX_TRAFFIC_CLASS
#define IXGBE_FCTRL_RPFCE
#define IXGBE_PXOFFRXC(_i)
#define IXGBE_TDPT2TCCR(_i)
#define IXGBE_TDTQ2TCCR(_i)
u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]
u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]