45#define E1000_DEV_ID_82576_VF 0x10CA
46#define E1000_DEV_ID_I350_VF 0x1520
48#define E1000_VF_INIT_TIMEOUT 200
51#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000
52#define E1000_RXDCTL_QUEUE_ENABLE 0x02000000
55#define E1000_SRRCTL(_n) ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
56 (0x0C00C + ((_n) * 0x40)))
57#define E1000_SRRCTL_BSIZEPKT_SHIFT 10
58#define E1000_SRRCTL_BSIZEHDRSIZE_MASK 0x00000F00
59#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2
60#define E1000_SRRCTL_DESCTYPE_LEGACY 0x00000000
61#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000
62#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT 0x04000000
63#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000
64#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION 0x06000000
65#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION_LARGE_PKT 0x08000000
66#define E1000_SRRCTL_DESCTYPE_MASK 0x0E000000
67#define E1000_SRRCTL_DROP_EN 0x80000000
69#define E1000_SRRCTL_BSIZEPKT_MASK 0x0000007F
70#define E1000_SRRCTL_BSIZEHDR_MASK 0x00003F00
73#define E1000_EICR 0x01580
74#define E1000_EITR(_n) (0x01680 + ((_n) << 2))
75#define E1000_EICS 0x01520
76#define E1000_EIMS 0x01524
77#define E1000_EIMC 0x01528
78#define E1000_EIAC 0x0152C
79#define E1000_EIAM 0x01530
80#define E1000_IVAR0 0x01700
81#define E1000_IVAR_MISC 0x01740
82#define E1000_IVAR_VALID 0x80
117#define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0
118#define E1000_RXDADV_HDRBUFLEN_SHIFT 5
135#define E1000_ADVTXD_DTYP_CTXT 0x00200000
136#define E1000_ADVTXD_DTYP_DATA 0x00300000
137#define E1000_ADVTXD_DCMD_EOP 0x01000000
138#define E1000_ADVTXD_DCMD_IFCS 0x02000000
139#define E1000_ADVTXD_DCMD_RS 0x08000000
140#define E1000_ADVTXD_DCMD_DEXT 0x20000000
141#define E1000_ADVTXD_DCMD_VLE 0x40000000
142#define E1000_ADVTXD_DCMD_TSE 0x80000000
143#define E1000_ADVTXD_PAYLEN_SHIFT 14
153#define E1000_ADVTXD_MACLEN_SHIFT 9
154#define E1000_ADVTXD_TUCMD_IPV4 0x00000400
155#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800
156#define E1000_ADVTXD_L4LEN_SHIFT 8
157#define E1000_ADVTXD_MSS_SHIFT 16
@ e1000_num_promisc_types
@ e1000_promisc_multicast
s32 e1000_promisc_set_vf(struct e1000_hw *, enum e1000_promisc_type)
void e1000_vfta_set_vf(struct e1000_hw *, u16, bool)
void e1000_rlpml_set_vf(struct e1000_hw *, u16)
s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
union e1000_hw::@46 dev_spec
struct e1000_mac_info mac
struct e1000_mbx_info mbx
struct e1000_dev_spec_vf vf
struct e1000_mac_operations ops
u8 perm_addr[ETHER_ADDR_LEN]
s32(* get_link_up_info)(struct e1000_hw *, u16 *, u16 *)
s32(* check_for_link)(struct e1000_hw *)
void(* clear_vfta)(struct e1000_hw *)
s32(* reset_hw)(struct e1000_hw *)
s32(* read_mac_addr)(struct e1000_hw *)
void(* write_vfta)(struct e1000_hw *, u32, u32)
int(* rar_set)(struct e1000_hw *, u8 *, u32)
s32(* init_hw)(struct e1000_hw *)
s32(* setup_link)(struct e1000_hw *)
void(* update_mc_addr_list)(struct e1000_hw *, u8 *, u32)
s32(* get_bus_info)(struct e1000_hw *)
s32(* init_params)(struct e1000_hw *)
struct e1000_mbx_stats stats
struct e1000_mbx_operations ops
s32(* check_for_ack)(struct e1000_hw *, u16)
s32(* init_params)(struct e1000_hw *hw)
s32(* write_posted)(struct e1000_hw *, u32 *, u16, u16)
s32(* check_for_rst)(struct e1000_hw *, u16)
s32(* write)(struct e1000_hw *, u32 *, u16, u16)
s32(* check_for_msg)(struct e1000_hw *, u16)
s32(* read)(struct e1000_hw *, u32 *, u16, u16)
s32(* read_posted)(struct e1000_hw *, u32 *, u16, u16)
struct e1000_adv_rx_desc::@12::@14 upper
struct e1000_adv_rx_desc::@12::@13::@15::@17 hs_rss
union e1000_adv_rx_desc::@12::@13::@16 hi_dword
struct e1000_adv_rx_desc::@11 read
struct e1000_adv_rx_desc::@12::@13 lower
union e1000_adv_rx_desc::@12::@13::@15 lo_dword
struct e1000_adv_rx_desc::@12::@13::@16::@18 csum_ip
struct e1000_adv_rx_desc::@12 wb
struct e1000_adv_tx_desc::@9 wb
struct e1000_adv_tx_desc::@8 read