47 pci_write_config(((
struct e1000_osdep *)hw->
back)->dev, reg, *value, 2);
53 *value = pci_read_config(((
struct e1000_osdep *)hw->
back)->dev, reg, 2);
79 pci_find_cap(
dev, PCIY_EXPRESS, &offset);
80 *value = pci_read_config(
dev, offset + reg, 2);
93 pci_find_cap(
dev, PCIY_EXPRESS, &offset);
94 pci_write_config(
dev, offset + reg, *value, 2);
void e1000_pci_set_mwi(struct e1000_hw *hw)
int32_t e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
void e1000_pci_clear_mwi(struct e1000_hw *hw)
void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
#define CMD_MEM_WRT_INVALIDATE
struct e1000_bus_info bus