37#include <sys/kernel.h>
38#include <sys/module.h>
40#include <dev/pci/pcivar.h>
41#if defined(__i386__) || defined(__amd64__)
73 {0x4800,
"Chelsio T440-dbg VF"},
74 {0x4801,
"Chelsio T420-CR VF"},
75 {0x4802,
"Chelsio T422-CR VF"},
76 {0x4803,
"Chelsio T440-CR VF"},
77 {0x4804,
"Chelsio T420-BCH VF"},
78 {0x4805,
"Chelsio T440-BCH VF"},
79 {0x4806,
"Chelsio T440-CH VF"},
80 {0x4807,
"Chelsio T420-SO VF"},
81 {0x4808,
"Chelsio T420-CX VF"},
82 {0x4809,
"Chelsio T420-BT VF"},
83 {0x480a,
"Chelsio T404-BT VF"},
84 {0x480e,
"Chelsio T440-LP-CR VF"},
86 {0x5800,
"Chelsio T580-dbg VF"},
87 {0x5801,
"Chelsio T520-CR VF"},
88 {0x5802,
"Chelsio T522-CR VF"},
89 {0x5803,
"Chelsio T540-CR VF"},
90 {0x5807,
"Chelsio T520-SO VF"},
91 {0x5809,
"Chelsio T520-BT VF"},
92 {0x580a,
"Chelsio T504-BT VF"},
93 {0x580d,
"Chelsio T580-CR VF"},
94 {0x580e,
"Chelsio T540-LP-CR VF"},
95 {0x5810,
"Chelsio T580-LP-CR VF"},
96 {0x5811,
"Chelsio T520-LL-CR VF"},
97 {0x5812,
"Chelsio T560-CR VF"},
98 {0x5814,
"Chelsio T580-LP-SO-CR VF"},
99 {0x5815,
"Chelsio T502-BT VF"},
100 {0x5818,
"Chelsio T540-BT VF"},
101 {0x5819,
"Chelsio T540-LP-BT VF"},
102 {0x581a,
"Chelsio T540-SO-BT VF"},
103 {0x581b,
"Chelsio T540-SO-CR VF"},
105 {0x6800,
"Chelsio T6-DBG-25 VF"},
106 {0x6801,
"Chelsio T6225-CR VF"},
107 {0x6802,
"Chelsio T6225-SO-CR VF"},
108 {0x6803,
"Chelsio T6425-CR VF"},
109 {0x6804,
"Chelsio T6425-SO-CR VF"},
110 {0x6805,
"Chelsio T6225-OCP-SO VF"},
111 {0x6806,
"Chelsio T62100-OCP-SO VF"},
112 {0x6807,
"Chelsio T62100-LP-CR VF"},
113 {0x6808,
"Chelsio T62100-SO-CR VF"},
114 {0x6809,
"Chelsio T6210-BT VF"},
115 {0x680d,
"Chelsio T62100-CR VF"},
116 {0x6810,
"Chelsio T6-DBG-100 VF"},
117 {0x6811,
"Chelsio T6225-LL-CR VF"},
118 {0x6814,
"Chelsio T61100-OCP-SO VF"},
119 {0x6815,
"Chelsio T6201-BT VF"},
122 {0x6880,
"Chelsio T6225 80 VF"},
123 {0x6881,
"Chelsio T62100 81 VF"},
124 {0x6882,
"Chelsio T6225-CR 82 VF"},
125 {0x6883,
"Chelsio T62100-CR 83 VF"},
126 {0x6884,
"Chelsio T64100-CR 84 VF"},
127 {0x6885,
"Chelsio T6240-SO 85 VF"},
128 {0x6886,
"Chelsio T6225-SO-CR 86 VF"},
129 {0x6887,
"Chelsio T6225-CR 87 VF"},
135 .d_version = D_VERSION,
146 d = pci_get_device(dev);
150 return (BUS_PROBE_DEFAULT);
162 d = pci_get_device(dev);
166 return (BUS_PROBE_DEFAULT);
178 d = pci_get_device(dev);
182 return (BUS_PROBE_DEFAULT);
188#define FW_PARAM_DEV(param) \
189 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \
190 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param))
191#define FW_PARAM_PFVF(param) \
192 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \
193 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param))
199 uint32_t param[3], val[3];
206 device_printf(sc->
dev,
207 "failed to query parameters (pre_init): %d.\n", rc);
238 device_printf(sc->
dev,
239 "unable to retrieve adapter SGE parameters: %d\n", rc);
245 device_printf(sc->
dev,
246 "unable to retrieve adapter RSS parameters: %d\n", rc);
250 device_printf(sc->
dev,
251 "unable to operate with global RSS mode %d\n",
263 device_printf(sc->
dev,
264 "unable to get virtual interface resources: %d\n", rc);
272 device_printf(sc->
dev,
"no port access configured/usable!\n");
276 device_printf(sc->
dev,
277 "no virtual interfaces configured/usable!\n");
323 int nrxq, ntxq, nports;
324 int itype, iq_avail, navail, rc;
332 bzero(iaq,
sizeof(*iaq));
334 for (itype =
INTR_MSIX; itype != 0; itype >>= 1) {
339 navail = pci_msix_count(sc->
dev);
341 navail = pci_msi_count(sc->
dev);
369 if (iq_avail < nports) {
370 device_printf(sc->
dev,
371 "Not enough ingress queues (%d) for %d ports\n",
382 if (iaq->
nirq + nports <= navail) {
383 if (iq_avail > navail - iaq->
nirq)
384 iq_avail = navail - iaq->
nirq;
388 if (nrxq > iq_avail) {
392 nrxq = (iq_avail / nports) * nports;
394 KASSERT(nrxq <= iq_avail, (
"too many ingress queues"));
401 device_printf(sc->
dev,
402 "Not enough ETH queues (%d) for %d ports\n",
412 ntxq = (vfres->
nethctrl / nports) * nports;
414 KASSERT(ntxq <= vfres->
nethctrl, (
"too many ETH queues"));
419 if (vfres->
neq < nports * 2) {
420 device_printf(sc->
dev,
421 "Not enough egress queues (%d) for %d ports\n",
425 if (nrxq + ntxq > vfres->
neq) {
427 nrxq = ntxq = nports;
429 KASSERT(nrxq <= iq_avail, (
"too many ingress queues"));
430 KASSERT(ntxq <= vfres->
nethctrl, (
"too many ETH queues"));
431 KASSERT(nrxq + ntxq <= vfres->
neq, (
"too many egress queues"));
440 if (iaq->
nirq <= navail &&
444 rc = pci_alloc_msix(sc->
dev, &navail);
446 rc = pci_alloc_msi(sc->
dev, &navail);
448 device_printf(sc->
dev,
449 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
450 itype, rc, iaq->
nirq, navail);
453 if (navail == iaq->
nirq) {
456 pci_release_msi(sc->
dev);
463 rc = pci_alloc_msix(sc->
dev, &navail);
465 rc = pci_alloc_msi(sc->
dev, &navail);
467 device_printf(sc->
dev,
468 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
469 itype, rc, iaq->
nirq, navail);
473 device_printf(sc->
dev,
474 "failed to find a usable interrupt type. "
476 pci_msix_count(sc->
dev), pci_msi_count(sc->
dev));
485 int rc = 0, i, j, rqidx, tqidx, n, p, pmask;
486 struct make_dev_args mda;
490 sc = device_get_softc(dev);
492 sysctl_ctx_init(&sc->
ctx);
493 pci_enable_busmaster(dev);
494 pci_set_max_read_req(dev, 4096);
498 TUNABLE_INT_FETCH(
"hw.cxgbe.dflags", &sc->
debug_flags);
503 device_get_nameunit(dev));
507 mtx_init(&sc->
sfl_lock,
"starving freelists", 0, MTX_DEF);
508 TAILQ_INIT(&sc->sfl);
511 mtx_init(&sc->
reg_lock,
"indirect register access", 0, MTX_DEF);
522 if (sc->
names == NULL) {
535 make_dev_args_init(&mda);
537 mda.mda_uid = UID_ROOT;
538 mda.mda_gid = GID_WHEEL;
540 mda.mda_si_drv1 = sc;
541 rc = make_dev_s(&mda, &sc->
cdev,
"%s", device_get_nameunit(dev));
543 device_printf(dev,
"failed to create nexus char device: %d.\n",
547 if ((cpu_feature & CPUID_CX8) == 0) {
548 device_printf(dev,
"64 bit atomics not available.\n");
566 device_printf(dev,
"FW reset failed: %d\n", rc);
626 uint8_t mac[ETHER_ADDR_LEN];
628 pi = malloc(
sizeof(*pi), M_CXGBE, M_ZERO | M_WAITOK);
635 pi->
vi = malloc(
sizeof(
struct vi_info) * pi->
nvi, M_CXGBE,
644 device_printf(
dev,
"unable to initialize port %d: %d\n",
646 free(pi->
vi, M_CXGBE);
657 if (rc == 0 && n == 1)
664 device_get_nameunit(
dev), i);
673 if (pi->
dev == NULL) {
675 "failed to add device for port %d.\n", i);
680 device_set_softc(pi->
dev, pi);
712 sc->
irq = malloc(sc->
intr_count *
sizeof(
struct irq), M_CXGBE,
750 "failed to setup interrupt handlers: %d\n", rc);
754 rc = bus_generic_attach(
dev);
757 "failed to attach all child ports: %d\n", rc);
762 "%d ports, %d %s interrupt%s, %d eq, %d iq\n",
802 rc = priv_check(td, PRIV_DRIVER);
813 if (edata->
size == 4)
815 else if (edata->
size == 8)
828 if (edata->
size == 4) {
829 if (edata->
val & 0xffffffff00000000)
832 }
else if (edata->
size == 8)
843 if (regs->
len < reglen) {
849 buf = malloc(reglen, M_CXGBE, M_WAITOK | M_ZERO);
851 rc = copyout(buf, regs->
data, reglen);
857 u_int port_id = *(uint32_t *)
data;
879#if defined(INET) || defined(INET6)
void t4_add_adapter(struct adapter *)
unsigned int t4_qsize_txq
int t4_setup_intr_handlers(struct adapter *)
void cxgbe_media_status(struct ifnet *, struct ifmediareq *)
static uint32_t t4_read_reg(struct adapter *sc, uint32_t reg)
unsigned int t4_qsize_rxq
#define for_each_vi(_pi, _iter, _vi)
static void t4_write_reg64(struct adapter *sc, uint32_t reg, uint64_t val)
static void t4_write_reg(struct adapter *sc, uint32_t reg, uint32_t val)
int t4_create_dma_tag(struct adapter *)
device_method_t cxgbe_methods[]
void t4_init_devnames(struct adapter *)
int t4_set_sched_queue(struct adapter *, struct t4_sched_queue *)
static void t4_os_set_hw_addr(struct port_info *pi, uint8_t hw_addr[])
#define for_each_rxq(vi, iter, q)
int t4_detach_common(device_t)
int t4_map_bar_2(struct adapter *)
int t4_map_bars_0_and_4(struct adapter *)
int cxgbe_media_change(struct ifnet *)
void t4_sysctls(struct adapter *)
int t4_set_sched_class(struct adapter *, struct t4_sched_params *)
#define for_each_txq(vi, iter, q)
void t4_init_rx_buf_info(struct adapter *)
int t4_verify_chip_settings(struct adapter *)
static uint64_t t4_read_reg64(struct adapter *sc, uint32_t reg)
void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size)
int t4vf_get_vf_mac(struct adapter *adapter, unsigned int port, unsigned int *naddr, u8 *addr)
static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, const u32 *params, u32 *vals)
static int t4vf_set_params(struct adapter *adapter, unsigned int nparams, const u32 *params, const u32 *vals)
unsigned int t4_get_regs_len(struct adapter *adapter)
int t4vf_get_sge_params(struct adapter *adapter)
int t4vf_get_rss_glb_config(struct adapter *adapter)
int t4vf_get_vfres(struct adapter *adapter)
static int chip_id(struct adapter *adap)
int t4vf_prep_adapter(struct adapter *adapter)
#define for_each_port(adapter, iter)
int t4vf_fw_reset(struct adapter *adapter)
int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id)
struct vf_resources vfres
unsigned int max_pkts_per_eth_tx_pkts_wr
const struct devnames * names
uint8_t chan_map[MAX_NCHAN]
struct sysctl_ctx_list ctx
struct adapter_params params
struct port_info * port[MAX_NPORTS]
struct callout sfl_callout
const char * vf_ifnet_name
#define CHELSIO_T4_SCHED_QUEUE
#define CHELSIO_T4_REGDUMP
#define CHELSIO_T4_CLEAR_STATS
#define CHELSIO_T4_SETREG
#define CHELSIO_T4_GETREG
#define CHELSIO_T4_SCHED_CLASS
void mp_ring_reset_stats(struct mp_ring *r)
#define A_MPS_VF_STAT_TX_VF_BCAST_BYTES_L
#define A_MPS_VF_STAT_RX_VF_ERR_FRAMES_H
#define A_SGE_VF_KDOORBELL
#define VF_SGE_REG(reg_addr)
#define VF_MPS_REG(reg_addr)
MODULE_DEPEND(t4vf, t4nex, 1, 1, 1)
static void get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf)
struct @106 t6vf_pciids[]
static devclass_t ccv_devclass
static int set_params__post_init(struct adapter *sc)
static device_method_t t4vf_methods[]
static devclass_t cxlv_devclass
static driver_t cxgbev_driver
static int get_params__pre_init(struct adapter *sc)
static driver_t cxlv_driver
static int t6vf_probe(device_t dev)
static driver_t t4vf_driver
struct @106 t5vf_pciids[]
static driver_t t5vf_driver
#define FW_PARAM_DEV(param)
static int t4vf_attach(device_t dev)
static device_method_t t5vf_methods[]
static int cfg_itype_and_nqueues(struct adapter *sc, struct intrs_and_queues *iaq)
static int get_params__post_init(struct adapter *sc)
struct @106 t4vf_pciids[]
static driver_t t6vf_driver
DRIVER_MODULE(t4vf, pci, t4vf_driver, t4vf_devclass, 0, 0)
static devclass_t t5vf_devclass
static d_ioctl_t t4vf_ioctl
static driver_t ccv_driver
static devclass_t t4vf_devclass
static void t4_clr_vi_stats(struct adapter *sc)
static int t5vf_probe(device_t dev)
static devclass_t cxgbev_devclass
#define FW_PARAM_PFVF(param)
static devclass_t t6vf_devclass
static int t4vf_probe(device_t dev)
static device_method_t t6vf_methods[]
static struct cdevsw t4vf_cdevsw
#define G_FW_HDR_FW_VER_MAJOR(x)
#define G_FW_HDR_FW_VER_BUILD(x)
#define FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL
#define G_FW_HDR_FW_VER_MINOR(x)
#define G_FW_HDR_FW_VER_MICRO(x)