29 uint16_t pcdacMin, uint16_t pcdacMax, uint16_t *vp)
31 static const uint16_t intercepts3[] =
32 { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 };
33 static const uint16_t intercepts3_2[] =
34 { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 };
36 intercepts3 : intercepts3_2;
41 *vp++ = (ip[i] * pcdacMax + (100 - ip[i]) * pcdacMin) / 100;
53 (fbin > 62 ? 5100 + 10*62 + 5*(fbin-62) : 5100 + 10*fbin) :
73#define EEREAD(_off) do { \
74 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
144 const uint16_t *pChanList = pCalDataset->
pChannels;
150 roundup(
sizeof(uint16_t) * numChannels,
sizeof(uint32_t)) +
154 "%s unable to allocate raw data struct (gen3)\n", __func__);
159 roundup(
sizeof(uint16_t) * numChannels,
sizeof(uint32_t)));
162 for (i = 0; i < numChannels; i++) {
190 uint16_t xgainList[2], xpdMask;
194 xgainList[0] = 0xDEAD;
195 xgainList[1] = 0xDEAD;
200 if (((xpdMask >> jj) & 1) > 0) {
203 "%s: too many xpdGains in dataset: %u\n",
207 xgainList[kk++] = jj;
227 if (xgainList[1] == 0xDEAD) {
232 pExpnXPD->
pcdac[1] = (uint16_t)
234 pExpnXPD->
pcdac[2] = (uint16_t)
236 pExpnXPD->
pcdac[3] = (uint16_t)
253 pExpnXPD->
pcdac[1] = (uint16_t)
255 pExpnXPD->
pcdac[2] = (uint16_t)
257 pExpnXPD->
pcdac[3] = (uint16_t)
279#define EEREAD(_off) do { \
280 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
283 const uint16_t dbmmask = 0xff;
284 const uint16_t pcdac_delta_mask = 0x1f;
285 const uint16_t pcdac_mask = 0x3f;
286 const uint16_t freqmask = 0xff;
288 int i, mode, numPiers;
304 if ((eeval & freqmask) == 0)
309 if (((eeval >> 8) & freqmask) == 0)
312 (eeval>>8) & freqmask);
338 for (i = 0; i < numPiers; i++) {
344 ((eeval & dbmmask) - ((eeval >> 7) & 0x1)*256);
346 (((eeval >> 8) & dbmmask) - ((eeval >> 15) & 0x1)*256);
350 ((eeval & dbmmask) - ((eeval >> 7) & 0x1)*256);
352 (((eeval >> 8) & dbmmask) - ((eeval >> 15) & 0x1)*256);
356 (eeval & pcdac_delta_mask);
358 ((eeval >> 5) & pcdac_delta_mask);
360 ((eeval >> 10) & pcdac_delta_mask);
364 ((eeval & dbmmask) - ((eeval >> 7) & 0x1)*256);
366 (((eeval >> 8) & dbmmask) - ((eeval >> 15) & 0x1)*256);
370 ((eeval & dbmmask) - ((eeval >> 7) & 0x1)*256);
375 ((eeval >> 8) & pcdac_mask);
378 (((eeval >> 8) & dbmmask) -
379 ((eeval >> 15) & 0x1)*256);
387 "%s: did not allocate power struct\n", __func__);
392 "%s: did not expand power struct\n", __func__);
408 &ee->ee_modePowerArray5112[mode];
419 uint16_t myNumRawChannels, uint16_t *pMyRawChanList)
421 uint16_t i, channelValue;
423 uint16_t numPdGainsUsed;
425 pEEPROMDataset2413->
numChannels = myNumRawChannels;
427 xpd_mask = pEEPROMDataset2413->
xpd_mask;
429 if ((xpd_mask >> 0) & 0x1) numPdGainsUsed++;
430 if ((xpd_mask >> 1) & 0x1) numPdGainsUsed++;
431 if ((xpd_mask >> 2) & 0x1) numPdGainsUsed++;
432 if ((xpd_mask >> 3) & 0x1) numPdGainsUsed++;
434 for (i = 0; i < myNumRawChannels; i++) {
435 channelValue = pMyRawChanList[i];
436 pEEPROMDataset2413->
pChannels[i] = channelValue;
445 uint32_t start_offset, uint32_t maxPiers, uint8_t mode)
447#define EEREAD(_off) do { \
448 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
451 const uint16_t dbm_I_mask = 0x1F;
452 const uint16_t dbm_delta_mask = 0xF;
453 const uint16_t Vpd_I_mask = 0x7F;
454 const uint16_t Vpd_delta_mask = 0x3F;
455 const uint16_t freqmask = 0xff;
458 uint16_t idx, numPiers;
462 for (numPiers = 0; numPiers < maxPiers;) {
464 if ((eeval & freqmask) == 0)
467 freq[numPiers++] =
fbin2freq(ee, (eeval & freqmask));
471 if (((eeval >> 8) & freqmask) == 0)
474 freq[numPiers++] =
fbin2freq(ee, (eeval >> 8) & freqmask);
476 freq[numPiers++] =
fbin2freq_2p4(ee, (eeval >> 8) & freqmask);
480 idx = start_offset + (maxPiers / 2);
481 for (ii = 0; ii < pCalDataset->
numChannels; ii++) {
491 currCh->
pwr_I[0] = eeval & dbm_I_mask;
492 currCh->
Vpd_I[0] = (eeval >> 5) & Vpd_I_mask;
494 (eeval >> 12) & dbm_delta_mask;
497 currCh->
Vpd_delta[0][0] = eeval & Vpd_delta_mask;
499 (eeval >> 6) & dbm_delta_mask;
501 (eeval >> 10) & Vpd_delta_mask;
505 currCh->
Vpd_delta[2][0] = (eeval >> 4) & Vpd_delta_mask;
513 currCh->
pwr_I[1] = (eeval >> 10) & dbm_I_mask;
514 currCh->
Vpd_I[1] = (eeval >> 15) & 0x1;
518 currCh->
Vpd_I[1] |= (eeval & 0x3F) << 1;
520 (eeval >> 6) & dbm_delta_mask;
522 (eeval >> 10) & Vpd_delta_mask;
526 currCh->
Vpd_delta[1][1] = (eeval >> 4) & Vpd_delta_mask;
528 (eeval >> 10) & dbm_delta_mask;
529 currCh->
Vpd_delta[2][1] = (eeval >> 14) & 0x3;
533 currCh->
Vpd_delta[2][1] |= (eeval & 0xF) << 2;
539 (eeval >> 10) & dbm_delta_mask;
540 currCh->
Vpd_delta[3][0] = (eeval >> 14) & 0x3;
544 currCh->
Vpd_delta[3][0] |= (eeval & 0xF) << 2;
554 currCh->
pwr_I[2] = (eeval >> 4) & dbm_I_mask;
555 currCh->
Vpd_I[2] = (eeval >> 9) & Vpd_I_mask;
559 (eeval >> 0) & dbm_delta_mask;
560 currCh->
Vpd_delta[0][2] = (eeval >> 4) & Vpd_delta_mask;
562 (eeval >> 10) & dbm_delta_mask;
563 currCh->
Vpd_delta[1][2] = (eeval >> 14) & 0x3;
567 currCh->
Vpd_delta[1][2] |= (eeval & 0xF) << 2;
569 (eeval >> 4) & dbm_delta_mask;
570 currCh->
Vpd_delta[2][2] = (eeval >> 8) & Vpd_delta_mask;
576 (eeval >> 4) & dbm_delta_mask;
577 currCh->
Vpd_delta[3][1] = (eeval >> 8) & Vpd_delta_mask;
587 currCh->
pwr_I[3] = (eeval >> 14) & 0x3;
591 currCh->
pwr_I[3] |= ((eeval >> 0) & 0x7) << 2;
592 currCh->
Vpd_I[3] = (eeval >> 3) & Vpd_I_mask;
594 (eeval >> 10) & dbm_delta_mask;
595 currCh->
Vpd_delta[0][3] = (eeval >> 14) & 0x3;
599 currCh->
Vpd_delta[0][3] |= (eeval & 0xF) << 2;
601 (eeval >> 4) & dbm_delta_mask;
602 currCh->
Vpd_delta[1][3] = (eeval >> 8) & Vpd_delta_mask;
607 currCh->
pwr_delta_t2[2][3] |= ((eeval >> 0) & 0x3) << 2;
608 currCh->
Vpd_delta[2][3] = (eeval >> 2) & Vpd_delta_mask;
610 (eeval >> 8) & dbm_delta_mask;
611 currCh->
Vpd_delta[3][3] = (eeval >> 12) & 0xF;
615 currCh->
Vpd_delta[3][3] |= ((eeval >> 0) & 0x3) << 4;
624 currCh->
pwr_delta_t2[3][2] |= ((eeval >> 0) & 0x3) << 2;
625 currCh->
Vpd_delta[3][2] = (eeval >> 2) & Vpd_delta_mask;
637 uint16_t i, j, kk, channelValue;
639 uint16_t numPdGainsUsed;
645 if ((xpd_mask >> 0) & 0x1) numPdGainsUsed++;
646 if ((xpd_mask >> 1) & 0x1) numPdGainsUsed++;
647 if ((xpd_mask >> 2) & 0x1) numPdGainsUsed++;
648 if ((xpd_mask >> 3) & 0x1) numPdGainsUsed++;
661 if ((xpd_mask >> j) & 0x1) {
683 uint16_t ii, jj, kk, ss;
689 uint32_t numPdGainsUsed;
693 xgain_list[0] = 0xDEAD;
694 xgain_list[1] = 0xDEAD;
695 xgain_list[2] = 0xDEAD;
696 xgain_list[3] = 0xDEAD;
711 for (jj = 0; jj < numPdGainsUsed; jj++) {
717 pRawXPD->
pwr_t4[0] = (uint16_t)(4*pCalCh->
pwr_I[jj]);
718 pRawXPD->
Vpd[0] = pCalCh->
Vpd_I[jj];
720 for (kk = 1; kk < pRawXPD->
numVpd; kk++) {
722 pRawXPD->
Vpd[kk] = (uint16_t)(pRawXPD->
Vpd[kk-1] + pCalCh->
Vpd_delta[kk-1][jj]);
736 static const uint16_t wordsForPdgains[] = { 4, 6, 9, 12 };
739 int numEEPROMWordsPerChannel;
765 numEEPROMWordsPerChannel = wordsForPdgains[
767 off += pCal->
numChannels * numEEPROMWordsPerChannel + 5;
783 numEEPROMWordsPerChannel = wordsForPdgains[
785 off += pCal->
numChannels * numEEPROMWordsPerChannel + 2;
815#define EEREAD(_off) do { \
816 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
819 uint16_t eeval, nchan;
869 for (i = 0; i < nchan; i++) {
878 pChannelData->
PwrValues[0] |= (uint16_t)((eeval >> 14) & 0x3);
884 pChannelData->
PwrValues[3] |= (uint16_t)((eeval >> 12) & 0xf);
894 pChannelData->
PwrValues[8] |= (uint16_t)((eeval >> 14) & 0x3);
921#define EEREAD(_off) do { \
922 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
925 uint16_t eeval, enable24;
932 uint16_t *pNumTrgtChannels;
942 pPowerInfo = ee->ee_trgtPwr_11a;
943 pNumTrgtChannels = &ee->ee_numTargetPwr_11a;
950 pPowerInfo = ee->ee_trgtPwr_11b;
951 pNumTrgtChannels = &ee->ee_numTargetPwr_11b;
958 pPowerInfo = ee->ee_trgtPwr_11g;
959 pNumTrgtChannels = &ee->ee_numTargetPwr_11g;
966 *pNumTrgtChannels = 0;
967 for (i = 0; i < nchan; i++) {
993 pPowerInfo->
twicePwr36 |= (eeval >> 12) & 0xf;
997 pPowerInfo->
twicePwr36 |= (eeval >> 13) & 0x7;
1001 (*pNumTrgtChannels)++;
1017#define EEREAD(_off) do { \
1018 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
1034 if (ee->
ee_ctl[i] == 0) {
1050 rep[j].
flag = (eeval >> 14) & 1;
1052 rep[j+1].
flag = (eeval >> 6) & 1;
1061 rep[2].
rdEdge |= (eeval >> 11) & 0x1f;
1066 rep[4].
rdEdge |= (eeval >> 13) & 0x7;
1071 rep[6].
rdEdge |= (eeval >> 15) & 0x1;
1093 if (rep[j].rdEdge != 0 || rep[j].twice_rdEdgePower != 0) {
1114#define EEREAD(_off) do { \
1115 if (!ath_hal_eepromRead(ah, _off, &eeval)) \
1118 static const uint32_t headerOffset3_0[] = {
1126 static const uint32_t headerOffset3_3[] = {
1135 static const uint32_t regCapOffsetPre4_0 = 0x00CF;
1136 static const uint32_t regCapOffsetPost4_0 = 0x00CA;
1138 const uint32_t *header;
1148 header = headerOffset3_3;
1151 header = headerOffset3_0;
1165 ee->
ee_Gmode = (eeval >> 2) & 0x01;
1166 ee->
ee_Bmode = (eeval >> 1) & 0x01;
1195 off = header[2 + i];
1227 ee->
ee_ob4 = (eeval >> 5) & 0x07;
1228 ee->
ee_db4 = (eeval >> 2) & 0x07;
1229 ee->
ee_ob3 = (eeval << 1) & 0x07;
1243 ee->
ee_ob3 |= (eeval >> 15) & 0x01;
1244 ee->
ee_db3 = (eeval >> 12) & 0x07;
1245 ee->
ee_ob2 = (eeval >> 9) & 0x07;
1246 ee->
ee_db2 = (eeval >> 6) & 0x07;
1247 ee->
ee_ob1 = (eeval >> 3) & 0x07;
1248 ee->
ee_db1 = eeval & 0x07;
1269 ee->
ee_xgain[i] = (eeval >> 1) & 0x0f;
1270 ee->
ee_xpd[i] = eeval & 0x01;
1300 ee->
ee_gainI[i] = (eeval >> 13) & 0x07;
1303 ee->
ee_gainI[i] |= (eeval << 3) & 0x38;
1308 (eeval >> 11) & 0x1f;
1312 ee->
ee_iqCalI[0] = (eeval >> 8 ) & 0x3f;
1313 ee->
ee_iqCalQ[0] = (eeval >> 3 ) & 0x1f;
1332 (eeval >> 8) & 0x3f;
1350 (eeval >> 8) & 0x3f;
1359 (uint8_t)(eeval & 0xFF);
1362 (eeval >> 8) & 0x7f;
1364 (eeval >> 15) & 0x1;
1367 (eeval & 0x1F) << 1;
1369 (eeval >> 5) & 0x3F;
1371 (eeval >> 11) & 0x1F;
1376 (eeval >> 3) & 0xFF;
1387 (eeval >> 6) & 0x7f;
1389 (eeval >> 13) & 0x7;
1394 (eeval >> 3) & 0x3F;
1396 (eeval >> 9) & 0x7F;
1401 (eeval >> 1) & 0xFF;
1433 ee->
ee_ctl[i] = (eeval >> 8) & 0xff;
1434 ee->
ee_ctl[i+1] = eeval & 0xff;
1469 EEREAD(regCapOffsetPost4_0);
1471 EEREAD(regCapOffsetPre4_0);
1511 "%s: 5112 devices must have EEPROM 4.0 with the "
1512 "EEP_MAP set\n", __func__);
1577 *(uint16_t *) val = eeval;
1582 for (i = 0; i < 3; i++) {
1585 "%s: cannot read EEPROM location %u\n",
1590 macaddr[2*i] = eeval >> 8;
1591 macaddr[2*i + 1] = eeval & 0xff;
1593 if (sum == 0 || sum == 0xffff*3) {
1595 "%s: mac address read failed: %s\n", __func__,
1693 ee->
ee_opCap &= ~AR_EEPROM_EEPCAP_COMPRESS_DIS;
1699 ee->
ee_opCap &= ~AR_EEPROM_EEPCAP_FASTFRAME_DIS;
1705 ee->
ee_opCap &= ~AR_EEPROM_EEPCAP_AES_DIS;
1711 ee->
ee_opCap &= ~AR_EEPROM_EEPCAP_BURST_DIS;
1721 const void *args, uint32_t argsize,
void **result, uint32_t *resultsize)
1729 *resultsize =
sizeof(*ee);
1734 pe = &ee->ee_modePowerArray5112[
1737 *resultsize = (*result ==
AH_NULL) ? 0 :
1780 uint32_t sum, eepMax;
1781 uint16_t eeversion, eeprotect, eeval;
1788 "%s: unable to read EEPROM version\n", __func__);
1793 "%u (0x%x) found\n", __func__, eeversion, eeversion);
1799 "bits; read locked?\n", __func__);
1810 "%s: cannot read EEPROM upper size\n" , __func__);
1818 "%s: cannot read EEPROM lower size\n" , __func__);
1825 for (i = 0; i < eepMax; i++) {
1831 if (sum != 0xffff) {
@ HAL_DIAG_EEPROM_EXP_11G
@ HAL_DIAG_EEPROM_EXP_11B
@ HAL_DIAG_EEPROM_EXP_11A
#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A
#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0
#define AR_EEPROM_REG_DOMAIN
#define AR_EEPROM_VERSION
#define AR_EEPROM_ATHEROS(n)
#define AR_EEPROM_PROTECT
#define AR_EEPROM_ATHEROS_BASE
#define AR_EEPROM_ATHEROS_MAX
static void freeEepromRawPowerCalInfo5112(struct ath_hal *ah, HAL_EEPROM *ee)
static void ar2413SetupEEPROMDataset(EEPROM_DATA_STRUCT_2413 *pEEPROMDataset2413, uint16_t myNumRawChannels, uint16_t *pMyRawChanList)
static HAL_BOOL readEepromFreqPierInfo(struct ath_hal *ah, HAL_EEPROM *ee)
static HAL_STATUS legacyEepromSet(struct ath_hal *ah, int param, int v)
static HAL_STATUS legacyEepromGet(struct ath_hal *ah, int param, void *val)
static void ar2413SetupRawDataset(RAW_DATA_STRUCT_2413 *pRaw, EEPROM_DATA_STRUCT_2413 *pCal)
static const uint16_t channels11g[]
static HAL_BOOL readEepromCTLInfo(struct ath_hal *ah, HAL_EEPROM *ee)
static uint16_t fbin2freq(HAL_EEPROM *ee, uint16_t fbin)
static void legacyEepromDetach(struct ath_hal *ah)
static HAL_BOOL legacyEepromReadContents(struct ath_hal *ah, HAL_EEPROM *ee)
static HAL_BOOL readEepromTargetPowerCalInfo(struct ath_hal *ah, HAL_EEPROM *ee)
static uint16_t fbin2freq_2p4(HAL_EEPROM *ee, uint16_t fbin)
static HAL_BOOL readEepromRawPowerCalInfo5112(struct ath_hal *ah, HAL_EEPROM *ee)
static HAL_BOOL eepromAllocExpnPower5112(struct ath_hal *ah, const EEPROM_POWER_5112 *pCalDataset, EEPROM_POWER_EXPN_5112 *pPowerExpn)
HAL_STATUS ath_hal_legacyEepromAttach(struct ath_hal *ah)
static HAL_BOOL ar2413EepromToRawDataset(struct ath_hal *ah, EEPROM_DATA_STRUCT_2413 *pCal, RAW_DATA_STRUCT_2413 *pRaw)
static HAL_BOOL legacyEepromDiag(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
static HAL_BOOL readHeaderInfo(struct ath_hal *ah, HAL_EEPROM *ee)
static uint16_t legacyEepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
static HAL_BOOL readEepromRawPowerCalInfo2413(struct ath_hal *ah, HAL_EEPROM *ee)
static const uint16_t channels11b[]
static HAL_BOOL readEepromRawPowerCalInfo(struct ath_hal *ah, HAL_EEPROM *ee)
static void getPcdacInterceptsFromPcdacMinMax(HAL_EEPROM *ee, uint16_t pcdacMin, uint16_t pcdacMax, uint16_t *vp)
static HAL_BOOL eepromExpandPower5112(struct ath_hal *ah, const EEPROM_POWER_5112 *pCalDataset, EEPROM_POWER_EXPN_5112 *pPowerExpn)
static HAL_BOOL ar2413ReadCalDataset(struct ath_hal *ah, HAL_EEPROM *ee, EEPROM_DATA_STRUCT_2413 *pCalDataset, uint32_t start_offset, uint32_t maxPiers, uint8_t mode)
#define MAX_NUM_PDGAINS_PER_CHANNEL
#define NUM_XPD_PER_CHANNEL
#define CCK_OFDM_GAIN_DELTA
#define NUM_POINTS_LAST_PDGAIN
#define AR_EEPROM_EEPCAP_BURST_DIS
#define AR_EEPROM_CAPABILITIES_OFFSET
#define AR_EEPROM_SIZE_LOWER
#define AR_EEPROM_EEPCAP_KC_ENTRIES
#define AR_EEPROM_EEPCAP_MAXQCU
#define TENX_OFDM_CCK_DELTA_INIT
#define AR_EEPROM_EEPCAP_FASTFRAME_DIS
#define AR_EEPROM_PROTECT_WP_128_191
#define AR_EEPROM_MODAL_SPURS
#define NUM_2_4_EEPROM_CHANNELS
#define AR_EEPROM_SIZE_ENDLOC_SHIFT
#define TENX_CH14_FILTER_CCK_DELTA_INIT
#define NUM_POINTS_OTHER_PDGAINS
#define NUM_11A_EEPROM_CHANNELS_2413
#define AR_EEPROM_RFSILENT
#define AR_EEPROM_SIZE_UPPER_MASK
#define AR_EEPROM_EEPCAP_COMPRESS_DIS
#define NUM_2_4_EEPROM_CHANNELS_2413
#define AR_EEPROM_SIZE_UPPER
#define NUM_11A_EEPROM_CHANNELS
#define AR_EEPROM_EEPCAP_AES_DIS
#define NUM_TEST_FREQUENCIES
void * ath_hal_malloc(size_t)
#define HALDEBUG(_ah, __m,...)
#define ath_hal_eepromRead(_ah, _off, _data)
void ath_hal_free(void *p)
const char * ath_hal_ether_sprintf(const u_int8_t *mac)
#define OS_MEMZERO(_a, _n)
int16_t pwr_delta_t2[NUM_POINTS_LAST_PDGAIN][MAX_NUM_PDGAINS_PER_CHANNEL]
int16_t pwr_I[MAX_NUM_PDGAINS_PER_CHANNEL]
uint16_t Vpd_delta[NUM_POINTS_LAST_PDGAIN][MAX_NUM_PDGAINS_PER_CHANNEL]
uint16_t Vpd_I[MAX_NUM_PDGAINS_PER_CHANNEL]
uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413]
EEPROM_DATA_PER_CHANNEL_2413 pDataPerChannel[NUM_11A_EEPROM_CHANNELS_2413]
uint16_t pChannels[NUM_11A_EEPROM_CHANNELS]
EEPROM_DATA_PER_CHANNEL_5112 pDataPerChannel[NUM_11A_EEPROM_CHANNELS]
EXPN_DATA_PER_CHANNEL_5112 * pDataPerChannel
EXPN_DATA_PER_XPD_5112 pDataPerXPD[NUM_XPD_PER_CHANNEL]
int16_t pwr_t4[NUM_POINTS_XPD0]
uint16_t pcdac[NUM_POINTS_XPD0]
uint16_t ee_rxtxMarginTurbo[2]
uint8_t ee_cckOfdmPwrDelta
uint16_t ee_channels11a[NUM_11A_EEPROM_CHANNELS]
RD_EDGES_POWER ee_rdEdgesPower[NUM_EDGES *NUM_CTLS_MAX]
uint16_t ee_turbo5Disable
uint16_t ee_calPier11b[NUM_2_4_EEPROM_CHANNELS]
uint16_t ee_eepMap2PowerCalStart
uint16_t ee_calPier11g[NUM_2_4_EEPROM_CHANNELS]
int8_t ee_pgaDesiredSize[3]
DATA_PER_CHANNEL ee_dataPerChannel11a[NUM_11A_EEPROM_CHANNELS]
uint16_t ee_antennaControl[11][3]
uint16_t ee_rxtxMargin[3]
CORNER_CAL_INFO ee_cornerCal
uint16_t ee_txFrameToXPAOn[3]
int8_t ee_antennaGainMax[2]
uint16_t ee_xrTargetPower5
uint16_t ee_switchSettling[3]
uint16_t ee_channels11b[NUM_2_4_EEPROM_CHANNELS]
int16_t ee_noiseFloorThresh[3]
uint16_t ee_turbo2Disable
uint16_t ee_switchSettlingTurbo[2]
uint16_t ee_scaledCh14FilterCckDelta
uint16_t ee_spurChans[AR_EEPROM_MODAL_SPURS][2]
uint16_t ee_turbo2WMaxPower5
DATA_PER_CHANNEL ee_dataPerChannel11b[NUM_2_4_EEPROM_CHANNELS]
uint16_t ee_turbo2WMaxPower2
uint16_t ee_numChannels11a
uint8_t ee_exist32kHzCrystal
uint16_t ee_cckOfdmGainDelta
uint16_t ee_numChannels2_4
uint16_t ee_targetPowersStart
uint16_t ee_txEndToXLNAOn[3]
uint16_t ee_xrTargetPower2
uint16_t ee_txrxAttenTurbo[2]
int8_t ee_adcDesiredSize[3]
DATA_PER_CHANNEL ee_dataPerChannel11g[NUM_2_4_EEPROM_CHANNELS]
uint16_t ee_txEndToXPAOff[3]
uint16_t ee_falseDetectBackoff[3]
uint16_t ee_channels11g[NUM_2_4_EEPROM_CHANNELS]
int8_t ee_adcDesiredSizeTurbo[2]
uint16_t ee_ctl[NUM_CTLS_MAX]
int8_t ee_pgaDesiredSizeTurbo[2]
RAW_DATA_PER_PDGAIN_2413 pDataPerPDGain[MAX_NUM_PDGAINS_PER_CHANNEL]
int16_t pwr_t4[NUM_POINTS_LAST_PDGAIN]
uint16_t Vpd[NUM_POINTS_LAST_PDGAIN]
uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413]
RAW_DATA_PER_CHANNEL_2413 pDataPerChannel[NUM_11A_EEPROM_CHANNELS_2413]
uint16_t twice_rdEdgePower
int16_t PwrValues[NUM_PCDAC_VALUES]
uint16_t PcdacValues[NUM_PCDAC_VALUES]