FreeBSD kernel ATH device code
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#include "ah_eeprom.h"
Go to the source code of this file.
Data Structures | |
struct | tpcMap |
struct | HAL_EEPROM_v1 |
Macros | |
#define | AR_EEPROM_MAC(i) (0x1f-(i))/* MAC address word */ |
#define | AR_EEPROM_MAGIC 0x3d /* magic number */ |
#define | AR_EEPROM_PROTECT 0x3f /* Atheros segment protect register */ |
#define | AR_EEPROM_PROTOTECT_WP_128_191 0x80 |
#define | AR_EEPROM_REG_DOMAIN 0xbf /* Current regulatory domain register */ |
#define | AR_EEPROM_ATHEROS_BASE 0xc0 /* Base of Atheros-specific data */ |
#define | AR_EEPROM_ATHEROS_MAX 64 /* 64x2=128 bytes of EEPROM settings */ |
#define | AR_EEPROM_ATHEROS(n) (AR_EEPROM_ATHEROS_BASE+(n)) |
#define | AR_EEPROM_VERSION AR_EEPROM_ATHEROS(1) |
#define | AR_EEPROM_ATHEROS_TP_SETTINGS 0x09 /* Transmit power settings */ |
#define | AR_REG_DOMAINS_MAX 4 /* # of Regulatory Domains */ |
#define | AR_CHANNELS_MAX 5 /* # of Channel calibration groups */ |
#define | AR_TP_SETTINGS_SIZE 11 /* # locations/Channel group */ |
#define | AR_TP_SCALING_ENTRIES 11 /* # entries in transmit power dBm->pcdac */ |
#define | AR_EEPROM_RFSILENT_GPIO_SEL 0x001c |
#define | AR_EEPROM_RFSILENT_GPIO_SEL_S 2 |
#define | AR_EEPROM_RFSILENT_POLARITY 0x0002 |
#define | AR_EEPROM_RFSILENT_POLARITY_S 1 |
#define | AR_I2DBM(x) ((uint8_t)((x * 2) + 3)) |
#define AR_CHANNELS_MAX 5 /* # of Channel calibration groups */ |
Definition at line 55 of file ah_eeprom_v1.h.
#define AR_EEPROM_ATHEROS | ( | n | ) | (AR_EEPROM_ATHEROS_BASE+(n)) |
Definition at line 51 of file ah_eeprom_v1.h.
#define AR_EEPROM_ATHEROS_BASE 0xc0 /* Base of Atheros-specific data */ |
Definition at line 49 of file ah_eeprom_v1.h.
#define AR_EEPROM_ATHEROS_MAX 64 /* 64x2=128 bytes of EEPROM settings */ |
Definition at line 50 of file ah_eeprom_v1.h.
#define AR_EEPROM_ATHEROS_TP_SETTINGS 0x09 /* Transmit power settings */ |
Definition at line 53 of file ah_eeprom_v1.h.
#define AR_EEPROM_MAC | ( | i | ) | (0x1f-(i))/* MAC address word */ |
Definition at line 44 of file ah_eeprom_v1.h.
#define AR_EEPROM_MAGIC 0x3d /* magic number */ |
Definition at line 45 of file ah_eeprom_v1.h.
#define AR_EEPROM_PROTECT 0x3f /* Atheros segment protect register */ |
Definition at line 46 of file ah_eeprom_v1.h.
#define AR_EEPROM_PROTOTECT_WP_128_191 0x80 |
Definition at line 47 of file ah_eeprom_v1.h.
#define AR_EEPROM_REG_DOMAIN 0xbf /* Current regulatory domain register */ |
Definition at line 48 of file ah_eeprom_v1.h.
#define AR_EEPROM_RFSILENT_GPIO_SEL 0x001c |
Definition at line 64 of file ah_eeprom_v1.h.
#define AR_EEPROM_RFSILENT_GPIO_SEL_S 2 |
Definition at line 65 of file ah_eeprom_v1.h.
#define AR_EEPROM_RFSILENT_POLARITY 0x0002 |
Definition at line 66 of file ah_eeprom_v1.h.
#define AR_EEPROM_RFSILENT_POLARITY_S 1 |
Definition at line 67 of file ah_eeprom_v1.h.
#define AR_EEPROM_VERSION AR_EEPROM_ATHEROS(1) |
Definition at line 52 of file ah_eeprom_v1.h.
#define AR_I2DBM | ( | x | ) | ((uint8_t)((x * 2) + 3)) |
Definition at line 69 of file ah_eeprom_v1.h.
#define AR_REG_DOMAINS_MAX 4 /* # of Regulatory Domains */ |
Definition at line 54 of file ah_eeprom_v1.h.
#define AR_TP_SCALING_ENTRIES 11 /* # entries in transmit power dBm->pcdac */ |
Definition at line 57 of file ah_eeprom_v1.h.
#define AR_TP_SETTINGS_SIZE 11 /* # locations/Channel group */ |
Definition at line 56 of file ah_eeprom_v1.h.