FreeBSD kernel pms device code
saproto.h
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2*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
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29/******************************************************************************/
30
31#ifndef __SAPROTO_H__
32
33#define __SAPROTO_H__
34
35/* function declaration */
36/*** SATIMER.C ***/
38 agsaRoot_t *agRoot,
39 bit32 timeout,
40 agsaCallback_t pfnTimeout,
41 bit32 Event,
42 void * pParm
43 );
44
46 agsaRoot_t *agRoot,
47 agsaTimerDesc_t *pTimer
48 );
49
51
52/*** SAINIT.C ***/
54 mpiConfig_t *mpiConfig,
55 agsaHwConfig_t *hwConfig,
56 agsaSwConfig_t *swConfig
57 );
58
60 mpiMemReq_t *memoryAllocated,
61 mpiConfig_t *config
62 );
63
66 );
67
70 bit32 QueueTableOffset,
71 bit8 pcibar
72 );
73
76 bit32 QueueTableOffset,
77 bit8 pcibar
78 );
80 bit32 FerrTableOffset,
81 bit32 lowerBaseAddress,
82 bit32 upperBaseAddress,
83 bit32 length,
84 bit8 pcibar);
85
87 bit32 pciBar
88 );
89
91
93 spc_GSTableDescriptor_t *mpiGSTable);
94
96 agsaMemoryRequirement_t *memoryAllocated,
97 agsaHwConfig_t *hwConfig,
98 agsaSwConfig_t *swConfig,
99 bit32 usecsPerTick);
100
102 spc_SPASTable_t *mpiCALTable,
103 bit32 index);
104
106 spc_SPASTable_t *mpiCALTable,
107 bit32 index);
108
109GLOBAL void mpiWriteCALAll(agsaRoot_t *agRoot,
110 agsaPhyAnalogSetupTable_t *mpiCALTable);
111
113 mpiConfig_t* config
114 );
115
117 mpiConfig_t *config
118 );
119
120
122 sasPhyAttribute_t *phyAttrib
123 );
124
125/*** SAPHY.C ***/
127 agsaRoot_t *agRoot,
128 bit32 phyId,
130 agsaContext_t *agContext,
131 bit32 portId,
132 bit32 npipps
133 );
134
135/*** SAPORT.C ***/
137 agsaRoot_t *agRoot,
138 agsaPort_t *pPort
139 );
140
142 agsaRoot_t *agRoot,
143 agsaPort_t *pPort,
144 agsaSASIdentify_t sasIdentify,
145 bit32 sasInitiator,
146 bit32 smpTimeout,
147 bit32 itNexusTimeout,
148 bit32 firstBurstSize,
149 bit8 dTypeSRate,
150 bit32 flag
151 );
152
154 agsaRoot_t *agRoot,
155 agsaPort_t *pPort,
156 agsaDeviceDesc_t *pDevice,
157 bit32 unmap
158 );
159
161 agsaRoot_t *agRoot,
162 agsaPort_t *pPort,
163 agsaDeviceDesc_t *pSTPBridge,
164 bit8 *pSignature,
165 bit8 pm,
166 bit8 pmField,
167 bit32 smpReqTimeout,
168 bit32 itNexusTimeout,
169 bit32 firstBurstSize,
170 bit8 dTypeSRate,
171 bit32 flag
172 );
173
175 agsaRoot_t *agRoot,
176 agsaPort_t *pPort,
177 agsaDeviceDesc_t *pDevice
178 );
179
180/*** SASATA.C ***/
182 bit8 *pDstSignature,
183 bit8 *pSrcSignature
184 );
185
186/*** SASSP.C ***/
187
188/*** SAHW.C ***/
189#ifdef SA_ENABLE_HDA_FUNCTIONS
190GLOBAL bit32 siHDAMode(
191 agsaRoot_t *agRoot,
192 bit32 HDAMode,
193 agsaFwImg_t *userFwImg
194 );
195
196GLOBAL bit32 siHDAMode_V(
197 agsaRoot_t *agRoot,
198 bit32 HDAMode,
199 agsaFwImg_t *userFwImg
200 );
201
202#endif
203
205 agsaRoot_t *agRoot,
206 bit32 shiftValue
207 );
208
209
211 agsaRoot_t *agRoot,
212 bit32 signature
213 );
214
216 agsaRoot_t *agRoot,
217 bit32 signature
218 );
219
221 agsaRoot_t *agRoot
222 );
223
224
226 agsaRoot_t *agRoot,
227 bit32 signature
228 );
229
231 agsaRoot_t *agRoot
232 );
233
234
235/*** SAUTIL.C ***/
237 bit32 debugLevel,
238 siPrintType type,
239 char *header,
240 void *a,
241 bit32 length
242 );
243int siIsHexDigit(char a);
244GLOBAL FORCEINLINE void* si_memcpy(void *dst, void *src, bit32 count);
245GLOBAL FORCEINLINE void* si_memset(void *s, int c, bit32 n);
246
248 agsaRoot_t *agRoot,
249 bit32 count);
250
251
253
256
257
258
259/*** SAINT.C ***/
261 agsaRoot_t *agRoot,
262 bit32 phyId,
263 agsaSASIdentify_t *agSASIdentify,
264 bit32 portId,
265 bit32 npipps,
266 bit8 linkRate
267 );
268
270 agsaRoot_t *agRoot,
271 bit32 phyId,
272 void *pMsg,
273 bit32 portId,
274 bit32 npipps,
275 bit8 linkRate
276 );
277
279 agsaRoot_t *agRoot,
280 agsaIORequestDesc_t *pRequest,
282 bit32 sspTag
283 );
284
285GLOBAL void siAbnormal(
286 agsaRoot_t *agRoot,
287 agsaIORequestDesc_t *pRequest,
289 bit32 param,
290 bit32 sspTag
291 );
292
294 agsaRoot_t *agRoot,
295 agsaIORequestDesc_t *pRequest,
297 bit32 param,
298 bit32 sspTag,
299 bit32 *pMsg1
300 );
301
303 agsaRoot_t *agRoot,
304 agsaIORequestDesc_t *pRequest,
306 bit32 param,
307 bit32 sspTag
308 );
309
311 agsaRoot_t *agRoot,
313 bit32 payloadSize,
314 bit32 tag
315 );
316
318 agsaRoot_t *agRoot,
319 agsaIORequestDesc_t *pRequest,
320 bit32 *agFirstDword,
321 bit32 *pResp,
322 bit32 lengthResp
323 );
324
325/*** SADISC.C ***/
327 agsaRoot_t *agRoot,
328 agsaDevHandle_t *agDevHandle
329 );
330
331/*** SAMPIRSP.C ***/
333 agsaRoot_t *agRoot,
334 bit32 *pMsg1,
335 mpiMsgCategory_t category,
336 bit16 opcode
337 );
338
340 agsaRoot_t *agRoot,
341 agsaEchoRsp_t *pIomb
342 );
343
345 agsaRoot_t *agRoot,
347 );
348
350 agsaRoot_t *agRoot,
352 );
353
355 agsaRoot_t *agRoot,
357 );
358
360 agsaRoot_t *agRoot,
362 );
363
365 agsaRoot_t *agRoot,
367 );
368
370 agsaRoot_t *agRoot,
372 );
373
375 agsaRoot_t *agRoot,
377 );
378
380 agsaRoot_t *agRoot,
382 );
383
385 agsaRoot_t *agRoot,
387 );
388
390 agsaRoot_t *agRoot,
392 );
393
395 agsaRoot_t *agRoot,
397 );
398
400 agsaRoot_t *agRoot,
402 );
403
405 agsaRoot_t *agRoot,
407 );
408
410 agsaRoot_t *agRoot,
411 bit32 *pIomb
412 );
413
415 agsaRoot_t *agRoot,
416 bit32 *pIomb
417 );
418
420 agsaRoot_t *agRoot,
421 agsaSSPEventRsp_t *pIomb
422 );
423
425 agsaRoot_t *agRoot,
426 agsaSATAEventRsp_t *pIomb
427 );
428
430 agsaRoot_t *agRoot,
432 );
433
434
436 agsaRoot_t *agRoot,
437 agsaFwFlashOpExtRsp_t *payload
438 );
439
440#ifdef SPC_ENABLE_PROFILE
441GLOBAL bit32 mpiFwProfileRsp(
442 agsaRoot_t *agRoot,
443 agsaFwProfileRsp_t *payload
444 );
445#endif
447 agsaRoot_t *agRoot,
449 );
450
452 agsaRoot_t *agRoot,
453 agsaSSPAbortRsp_t *pIomb
454 );
455
457 agsaRoot_t *agRoot,
458 agsaSATAAbortRsp_t *pIomb
459 );
460
462 agsaRoot_t *agRoot,
463 agsaGPIORsp_t *pIomb
464 );
465
467 agsaRoot_t *agRoot,
468 agsaGPIOEvent_t *pIomb
469 );
470
472 agsaRoot_t *agRoot,
474 );
475
477 agsaRoot_t *agRoot,
479 );
480
482 agsaRoot_t *agRoot,
484 );
485
487 agsaRoot_t *agRoot,
489 );
490
492 agsaRoot_t *agRoot,
494 );
495
497 agsaRoot_t *agRoot,
499 );
500
502 agsaRoot_t *agRoot,
504 );
505
507 agsaRoot_t *agRoot,
509 );
510
512 agsaRoot_t *agRoot,
514 );
515
517 agsaRoot_t *agRoot,
519 );
520
522 agsaRoot_t *agRoot,
524 );
525
527 agsaRoot_t *agRoot,
529 );
530
532 agsaRoot_t *agRoot,
534 );
535
537 agsaRoot_t *agRoot,
539 );
540
542 agsaRoot_t *agRoot,
544 );
545
547 agsaRoot_t *agRoot,
549 );
550
552 agsaRoot_t *agRoot,
554 );
555
557 agsaRoot_t *agRoot,
559 );
560
562 agsaRoot_t *agRoot,
564 );
565
567 agsaRoot_t *agRoot,
569 );
570
572 agsaRoot_t *agRoot,
574 );
575
576
577/*** SAMPICMD.C ***/
579 agsaRoot_t *agRoot,
580 bit32 *payload,
581 mpiMsgCategory_t category,
582 bit16 opcode,
583 bit16 size,
584 bit32 queueNum
585 );
586
587
589 agsaRoot_t *agRoot,
590 agsaContext_t *agContext,
591 bit32 queueNum,
592 bit32 Channel,
593 bit32 NumBitLo,
594 bit32 NumBitHi,
595 bit32 PcieAddrLo,
596 bit32 PcieAddrHi,
597 bit32 ByteCount );
598
600 agsaRoot_t *agRoot,
601 bit32 queueNum,
602 agsaContext_t *agContext,
603 void *echoPayload
604 );
605
607 agsaRoot_t *agRoot,
608 agsaContext_t *agContext,
609 bit32 Operation,
610 bit32 PhyId,
611 void *agCB
612 );
613
615 agsaRoot_t *agRoot,
616 agsaContext_t *agContext,
617 bit32 Operation,
618 bit32 PhyId,
619 bit32 length,
620 void * buffer
621 );
622
624 agsaRoot_t *agRoot,
625 bit32 tag,
626 bit32 phyId,
627 agsaPhyConfig_t *agPhyConfig,
628 agsaSASIdentify_t *agSASIdentify,
629 bit32 queueNum
630 );
631
633 agsaRoot_t *agRoot,
634 bit32 tag,
635 bit32 phyId,
636 bit32 queueNum
637 );
638
640 agsaRoot_t *agRoot,
641 void *pIomb,
642 bit16 opcode,
643 agsaSMPCmd_t *payload,
644 bit8 inq,
645 bit8 outq
646 );
647
649 agsaRoot_t *agRoot,
650 agsaContext_t *agContext,
651 agsaDeviceDesc_t *pDevice,
652 bit32 deviceId,
653 bit32 portId,
654 bit32 queueNum
655 );
656
658 agsaRoot_t *agRoot,
659 agsaContext_t *agContext,
660 bit32 portId,
661 bit32 flags,
662 bit32 maxDevs,
663 bit32 queueNum,
664 bit32 skipCount
665 );
666
668 agsaRoot_t *agRoot,
669 bit32 tag,
670 bit32 phyId,
671 bit32 operation,
672 bit32 queueNum
673 );
674
676 agsaRoot_t *agRoot,
677 agsaContext_t *agContext,
678 bit32 deviceid,
679 bit32 option,
680 bit32 queueNum
681 );
682
684 agsaRoot_t *agRoot,
685 agsaContext_t *agContext,
686 bit32 ctag,
687 bit32 deviceId,
688 bit32 action,
689 bit32 flag,
690 bit32 itlnx,
691 bit32 queueNum
692 );
693
695 agsaRoot_t *agRoot,
697 );
698
700 agsaRoot_t *agRoot,
701 agsaSMPAbortRsp_t *pIomb
702 );
703
705 agsaRoot_t *agRoot,
706 void *destinationAddress,
707 bit32 regDumpNum,
708 bit32 regDumpOffset,
709 bit32 len
710 );
711
713 agsaRoot_t *agRoot,
714 agsaContext_t *agContext,
715 bit32 queueNum,
716 bit32 cpuId,
717 bit32 cOffset,
718 bit32 addrHi,
719 bit32 addrLo,
720 bit32 len
721 );
722
724 agsaRoot_t *agRoot,
726
728 agsaRoot_t *agRoot,
729 agsaContext_t *agContext,
730 agsaNVMDData_t *NVMDInfo,
731 bit32 queueNum
732 );
733
735 agsaRoot_t *agRoot,
736 agsaContext_t *agContext,
737 agsaNVMDData_t *NVMDInfo,
738 bit32 queueNum
739 );
740
742 agsaRoot_t *agRoot,
743 agsaContext_t *agContext,
744 bit32 deviceid,
745 bit32 option,
746 bit32 queueNum,
747 bit32 param,
749 );
750
752 agsaRoot_t *agRoot,
753 agsaContext_t *agContext,
754 bit32 deviceId,
755 bit32 nds,
756 bit32 queueNum
757 );
758
760 agsaRoot_t *agRoot,
761 agsaContext_t *agContext,
762 bit32 deviceId,
763 bit32 queueNum
764 );
765
767 agsaRoot_t *agRoot,
768 agsaContext_t *agContext,
769 agsaSASReconfig_t *agSASConfig,
770 bit32 queueNum
771 );
772
774 agsaRoot_t *agRoot,
775 agsaSGpioRsp_t *pInIomb
776 );
777
779 agsaRoot_t *agRoot,
780 void *pInIomb
781 );
782
784 agsaRoot_t *agRoot,
785 void *pInIomb
786 );
787
789 agsaRoot_t *agRoot,
790 void *pIomb
791 );
792
794 agsaRoot_t *agRoot,
795 agsaContext_t *agContext,
796 agsaSetControllerConfigCmd_t *agControllerConfig,
797 bit32 queueNum,
798 bit8 modePageContext
799 );
800
802 agsaRoot_t *agRoot,
803 agsaContext_t *agContext,
804 agsaGetControllerConfigCmd_t *agControllerConfig,
805 bit32 queueNum
806 );
807
809 agsaRoot_t *agRoot,
810 agsaContext_t *agContext,
811 agsaKekManagementCmd_t *agKekMgmt,
812 bit32 queueNum
813 );
814
816 agsaRoot_t *agRoot,
817 agsaContext_t *agContext,
818 agsaDekManagementCmd_t *agDekMgmt,
819 bit32 queueNum
820 );
821
823 agsaRoot_t *agRoot,
824 bit32 queueNum,
825 agsaContext_t *agContext,
826 agsaOperatorMangmentCmd_t *operatorcode );
827
829 agsaRoot_t *agRoot,
830 bit32 queueNum,
831 agsaContext_t *agContext,
832 agsaEncryptBist_t *bist );
833
835 agsaRoot_t *agRoot,
836 bit32 queueNum,
837 agsaContext_t *agContext,
838 agsaSetOperatorCmd_t *operatorcode
839 );
840
842 agsaRoot_t *agRoot,
843 bit32 queueNum,
844 agsaContext_t *agContext,
845 agsaGetOperatorCmd_t *operatorcode
846 );
847
849 agsaRoot_t *agRoot,
850 agsaContext_t *agContext,
851 bit32 queueNum,
852 bit32 op,
853 agsaDifEncPayload_t *agDifEncOffload,
855 );
856
857bit32 siOurMSIXInterrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
858void siDisableMSIXInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
859void siReenableMSIXInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
860
861bit32 siOurMSIInterrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
862void siDisableMSIInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
863void siReenableMSIInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
864
865
866bit32 siOurLegacyInterrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
867void siDisableLegacyInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
868void siReenableLegacyInterrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
869
870bit32 siOurMSIX_V_Interrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
871bit32 siOurMSI_V_Interrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
872bit32 siOurLegacy_V_Interrupt(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
873
874void siDisableMSIX_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
875void siDisableMSI_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
876void siDisableLegacy_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
877
878void siReenableMSIX_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
879void siReenableMSI_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
880void siReenableLegacy_V_Interrupts(agsaRoot_t *agRoot,bit32 interruptVectorIndex);
881
882
883GLOBAL void siUpdateBarOffsetTable(agsaRoot_t *agRoot, bit32 Spc_Type);
884
885GLOBAL void siPciCpyMem(agsaRoot_t *agRoot,
886 bit32 soffset,
887 const void *dst,
888 bit32 DWcount,
889 bit32 busBaseNumber
890 );
891
893 agsaRoot_t *agRoot,
894 bit32 generic,
895 bit32 regOffset,
896 bit32 regValue
897 );
898
900 bit32 generic,
901 bit32 regOffset
902 );
903
904#ifdef SA_FW_TIMER_READS_STATUS
905bit32 siReadControllerStatus(
906 agsaRoot_t *agRoot,
907 bit32 Event,
908 void * pParm
909 );
910#endif /* SA_FW_TIMER_READS_STATUS */
911
912
913#if defined(SALLSDK_DEBUG)
914void sidump_hwConfig(agsaHwConfig_t *hwConfig);
915void sidump_swConfig(agsaSwConfig_t *swConfig);
916void sidump_Q_config( agsaQueueConfig_t *queueConfig );
917#endif
919 agsaRoot_t *agRoot,
920 bit32 TableOffsetInTable
921 );
922
924 agsaRoot_t *agRoot
925 );
926
928
929void si_macro_check(agsaRoot_t *agRoot);
930
933
934GLOBAL void siPCITriger(agsaRoot_t *agRoot);
935
936GLOBAL void siCheckQs(agsaRoot_t *agRoot);
937
938
947#endif /*__SAPROTO_H__ */
bit32 device
Definition: encrypt_ioctl.h:2
bit32 index
Definition: encrypt_ioctl.h:0
bit32 flags
Definition: encrypt_ioctl.h:2
bit32 status
Definition: encrypt_ioctl.h:12
enum mpiMsgCategory_e mpiMsgCategory_t
Definition: mpi.h:84
unsigned short bit16
Definition: ostypes.h:98
#define GLOBAL
Definition: ostypes.h:131
unsigned int bit32
Definition: ostypes.h:99
#define FORCEINLINE
Definition: ostypes.h:86
unsigned char bit8
Definition: ostypes.h:97
void(* ossaDIFEncryptionOffloadStartCB_t)(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 status, agsaOffloadDifDetails_t *agsaOffloadDifDetails)
Definition: sa.h:3590
void(* ossaSetDeviceInfoCB_t)(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaDevHandle_t *agDevHandle, bit32 status, bit32 option, bit32 param)
Callback definition for.
Definition: sa.h:3555
enum siPrintType_e siPrintType
bit32 siOurMSIInterrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process MSI interrupts.
Definition: saint.c:672
GLOBAL bit32 mpiDekManagementCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaDekManagementCmd_t *agDekMgmt, bit32 queueNum)
SAS Encryption DEK management command.
Definition: sampicmd.c:2372
GLOBAL void mpiWrPhyAttrbTable(agsaRoot_t *agRoot, sasPhyAttribute_t *phyAttrib)
Definition: sainit.c:4310
GLOBAL void siPrintBuffer(bit32 debugLevel, siPrintType type, char *header, void *a, bit32 length)
GLOBAL bit32 mpiDeviceHandleArrived(agsaRoot_t *agRoot, agsaDeviceHandleArrivedNotify_t *pMsg1)
SPC MPI Device Handle Arrived Event (target mode)
Definition: sampirsp.c:5355
bit32 siOurLegacy_V_Interrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process Legacy V interrupts.
Definition: saint.c:744
GLOBAL void siAbnormal(agsaRoot_t *agRoot, agsaIORequestDesc_t *pRequest, bit32 status, bit32 param, bit32 sspTag)
Routine to handle abnormal completed IO/SMP event.
Definition: saint.c:1678
GLOBAL void siPortDeviceListRemove(agsaRoot_t *agRoot, agsaPort_t *pPort, agsaDeviceDesc_t *pDevice)
The function to remove a device descriptor.
Definition: saport.c:370
GLOBAL bit32 smIsCfg_V_ANY(agsaRoot_t *agRoot)
Definition: sautil.c:412
GLOBAL void siCountActiveIORequestsOnDevice(agsaRoot_t *agRoot, bit32 device)
siCountActiveIORequestsOnDevice count all active IO's
Definition: sautil.c:315
GLOBAL bit32 mpiHWevent(agsaRoot_t *agRoot, agsaHWEvent_SPC_OUB_t *pIomb)
Hardware Event Response from SPC.
Definition: sampirsp.c:1160
GLOBAL bit32 siRemoveDevHandle(agsaRoot_t *agRoot, agsaDevHandle_t *agDevHandle)
Function for target to remove stale initiator device handle.
Definition: sadisc.c:158
GLOBAL FORCEINLINE void * si_memcpy(void *dst, void *src, bit32 count)
memcopy
Definition: sautil.c:76
GLOBAL bit32 mpiGetDevHandleRsp(agsaRoot_t *agRoot, agsaGetDevHandleRsp_t *pIomb)
SPC MPI Get Device Handle Command Response.
Definition: sampirsp.c:2015
GLOBAL void siChipResetSpc(agsaRoot_t *agRoot)
Function to Reset the SPC Hardware.
Definition: sahw.c:835
GLOBAL bit32 mpiGetNVMDataRsp(agsaRoot_t *agRoot, agsaGetNVMDataRsp_t *pIomb)
Get NVM Data Response.
Definition: sampirsp.c:746
GLOBAL bit32 mpiGetOperatorCmd(agsaRoot_t *agRoot, bit32 queueNum, agsaContext_t *agContext, agsaGetOperatorCmd_t *operatorcode)
This command sends get operator command.
Definition: sampicmd.c:2722
GLOBAL bit32 siGetTableOffset(agsaRoot_t *agRoot, bit32 TableOffsetInTable)
Definition: sahw.c:2929
GLOBAL bit32 siPhyStopCB(agsaRoot_t *agRoot, bit32 phyId, bit32 status, agsaContext_t *agContext, bit32 portId, bit32 npipps)
CallBack Routine to stop a Phy.
Definition: saphy.c:314
GLOBAL void mpiWrIntVecTable(agsaRoot_t *agRoot, mpiConfig_t *config)
Definition: sainit.c:4246
GLOBAL bit32 mpiSSPAbortRsp(agsaRoot_t *agRoot, agsaSSPAbortRsp_t *pIomb)
SPC MPI SSP ABORT Response.
Definition: sampirsp.c:4437
GLOBAL bit32 mpiGetDevInfoRspSpc(agsaRoot_t *agRoot, agsaGetDevInfoRsp_t *pIomb)
Get Device Information Response.
Definition: sampirsp.c:3320
GLOBAL bit32 mpiEncryptBistCmd(agsaRoot_t *agRoot, bit32 queueNum, agsaContext_t *agContext, agsaEncryptBist_t *bist)
This command sends encrypt self test command.
Definition: sampicmd.c:2545
GLOBAL void mpiUpdateOBQueueCfgTable(agsaRoot_t *agRoot, spc_outboundQueueDescriptor_t *outQueueCfg, bit32 QueueTableOffset, bit8 pcibar)
Writing to the inbound queue of the Configuration Table.
Definition: sainit.c:3587
GLOBAL bit32 mpiSetControllerConfigRsp(agsaRoot_t *agRoot, agsaSetControllerConfigRsp_t *pIomb)
SAS Set Controller Config Response.
Definition: sampirsp.c:6718
GLOBAL bit32 mpiSetDeviceStateCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 deviceId, bit32 nds, bit32 queueNum)
Set Device State command.
Definition: sampicmd.c:1800
GLOBAL bit32 mpiGetTimeStampRsp(agsaRoot_t *agRoot, agsaGetTimeStampRsp_t *pIomb)
Get Time Stamp Response.
Definition: sampirsp.c:5586
void siDisableMSIInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to disable MSI interrupts.
Definition: saint.c:531
GLOBAL bit32 mpiPortControlRsp(agsaRoot_t *agRoot, agsaPortControlRsp_t *pIomb)
Port Control Response.
Definition: sampirsp.c:5751
GLOBAL void siClearActiveIORequests(agsaRoot_t *agRoot)
saCountActiveIORequests
Definition: sautil.c:214
GLOBAL void siTimerRemoveAll(agsaRoot_t *agRoot)
remove all valid timer
Definition: satimer.c:373
GLOBAL bit32 mpiEchoRsp(agsaRoot_t *agRoot, agsaEchoRsp_t *pIomb)
Process Outbound IOMB Message.
Definition: sampirsp.c:678
GLOBAL bit32 mpiSASHwEventAckRsp(agsaRoot_t *agRoot, agsaSASHwEventAckRsp_t *pIomb)
SAS HW Event Ack Response.
Definition: sampirsp.c:5657
GLOBAL void siHalRegWriteExt(agsaRoot_t *agRoot, bit32 generic, bit32 regOffset, bit32 regValue)
Definition: sahw.c:2858
GLOBAL bit32 smIS_SPC(agsaRoot_t *agRoot)
Definition: sautil.c:437
GLOBAL void siSATASignatureCpy(bit8 *pDstSignature, bit8 *pSrcSignature)
copy a SATA signature to another
Definition: sasata.c:920
GLOBAL bit32 mpiDevHandleAcceptCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 ctag, bit32 deviceId, bit32 action, bit32 flag, bit32 itlnx, bit32 queueNum)
Device Handle Accept Command.
Definition: sampicmd.c:1222
GLOBAL bit32 mpiSetPhyProfileRsp(agsaRoot_t *agRoot, agsaSetPhyProfileRspV_t *pIomb)
Definition: sampirsp.c:2930
GLOBAL void siPortDeviceRemove(agsaRoot_t *agRoot, agsaPort_t *pPort, agsaDeviceDesc_t *pDevice, bit32 unmap)
The function to remove a device descriptor.
Definition: saport.c:169
GLOBAL bit32 mpiSetNVMDataRsp(agsaRoot_t *agRoot, agsaSetNVMDataRsp_t *pIomb)
Set NVM Data Response.
Definition: sampirsp.c:4364
GLOBAL bit32 mpiSetOperatorCmd(agsaRoot_t *agRoot, bit32 queueNum, agsaContext_t *agContext, agsaSetOperatorCmd_t *operatorcode)
This command sends set operator command.
Definition: sampicmd.c:2637
GLOBAL agsaDeviceDesc_t * siPortSATADeviceAdd(agsaRoot_t *agRoot, agsaPort_t *pPort, agsaDeviceDesc_t *pSTPBridge, bit8 *pSignature, bit8 pm, bit8 pmField, bit32 smpReqTimeout, bit32 itNexusTimeout, bit32 firstBurstSize, bit8 dTypeSRate, bit32 flag)
Add a SATA device to the discovery list of the port.
Definition: saport.c:238
GLOBAL bit32 mpiSMPCompletion(agsaRoot_t *agRoot, agsaSMPCompletionRsp_t *pIomb)
SPC MPI SMP Completion.
Definition: sampirsp.c:1748
GLOBAL bit32 siGetPciBar(agsaRoot_t *agRoot)
Definition: sahw.c:2915
void siReenableMSIInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable MSI interrupts.
Definition: saint.c:1008
GLOBAL bit32 siChipResetV(agsaRoot_t *agRoot, bit32 signature)
Function to Reset the SPC V Hardware.
Definition: sahw.c:569
GLOBAL bit32 mpiGetVHistRsp(agsaRoot_t *agRoot, agsaGetVHistCapRsp_t *pIomb)
Definition: sampirsp.c:7637
GLOBAL bit32 mpiOperatorManagementCmd(agsaRoot_t *agRoot, bit32 queueNum, agsaContext_t *agContext, agsaOperatorMangmentCmd_t *operatorcode)
This command sends operator management command.
Definition: sampicmd.c:2462
GLOBAL bit32 smIS_SPC12V(agsaRoot_t *agRoot)
Definition: sautil.c:470
GLOBAL FORCEINLINE void * si_memset(void *s, int c, bit32 n)
memset
Definition: sautil.c:104
void siReenableMSIX_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable MSIX interrupts.
Definition: saint.c:967
GLOBAL void mpiReadCALTable(agsaRoot_t *agRoot, spc_SPASTable_t *mpiCALTable, bit32 index)
Reading the Phy Analog Setup Register Table.
Definition: sainit.c:4065
GLOBAL bit32 mpiInitialize(agsaRoot_t *agRoot, mpiMemReq_t *memoryAllocated, mpiConfig_t *config)
Definition: sainit.c:1839
int siIsHexDigit(char a)
Check for Hex digit.
Definition: sautil.c:56
bit32 siOurMSI_V_Interrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process MSI V interrupts.
Definition: saint.c:691
GLOBAL bit32 mpiSetControllerConfigCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaSetControllerConfigCmd_t *agControllerConfig, bit32 queueNum, bit8 modePageContext)
SAS Set Controller Configuration Command.
Definition: sampicmd.c:2099
GLOBAL bit32 mpiDIFEncryptionOffloadCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 queueNum, bit32 op, agsaDifEncPayload_t *agDifEncOffload, ossaDIFEncryptionOffloadStartCB_t agCB)
Definition: sampicmd.c:2790
GLOBAL bit32 mpiGetDeviceStateRsp(agsaRoot_t *agRoot, agsaGetDeviceStateRsp_t *pIomb)
Get Device State Response.
Definition: sampirsp.c:6202
GLOBAL bit32 mpiDeviceRegRsp(agsaRoot_t *agRoot, agsaDeviceRegistrationRsp_t *pIomb)
SPC MPI Device Register Command Response.
Definition: sampirsp.c:2188
GLOBAL bit32 mpiDekManagementRsp(agsaRoot_t *agRoot, agsaDekManagementRsp_t *pIomb)
DEK Management Response.
Definition: sampirsp.c:7187
GLOBAL void siClearActiveIORequestsOnDevice(agsaRoot_t *agRoot, bit32 device)
siCountActiveIORequestsOnDevice count all active IO's
Definition: sautil.c:264
GLOBAL bit32 mpiLocalPhyControlCmd(agsaRoot_t *agRoot, bit32 tag, bit32 phyId, bit32 operation, bit32 queueNum)
SPC MPI LOCAL PHY CONTROL Command.
Definition: sampicmd.c:1173
GLOBAL bit32 smIS_SPC6V(agsaRoot_t *agRoot)
Definition: sautil.c:459
GLOBAL void siEventSATASignatureRcvd(agsaRoot_t *agRoot, bit32 phyId, void *pMsg, bit32 portId, bit32 npipps, bit8 linkRate)
Routine to handle for received SATA signature event.
Definition: saint.c:2200
GLOBAL bit32 mpiPhyStopCmd(agsaRoot_t *agRoot, bit32 tag, bit32 phyId, bit32 queueNum)
SPC MPI Phy Stop Command.
Definition: sampicmd.c:854
GLOBAL bit32 siConfiguration(agsaRoot_t *agRoot, mpiConfig_t *mpiConfig, agsaHwConfig_t *hwConfig, agsaSwConfig_t *swConfig)
Routine to do SPC configuration with default or specified values.
Definition: sainit.c:1556
GLOBAL agsaDeviceDesc_t * siPortSASDeviceAdd(agsaRoot_t *agRoot, agsaPort_t *pPort, agsaSASIdentify_t sasIdentify, bit32 sasInitiator, bit32 smpTimeout, bit32 itNexusTimeout, bit32 firstBurstSize, bit8 dTypeSRate, bit32 flag)
Add a SAS device to the discovery list of the port.
Definition: saport.c:60
GLOBAL bit32 mpiGetOperatorRsp(agsaRoot_t *agRoot, agsaGetOperatorRsp_t *pIomb)
Get Operator Response.
Definition: sampirsp.c:7543
void siReenableMSIXInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable MSIX interrupts.
Definition: saint.c:935
void siDisableLegacy_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process Legacy V interrupts.
Definition: saint.c:603
void siReenableLegacy_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable Legacy V interrupts.
Definition: saint.c:1079
GLOBAL bit32 mpiGetPhyProfileCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 Operation, bit32 PhyId, void *agCB)
Get Phy Profile Command SPCv.
Definition: sampicmd.c:283
GLOBAL void siEventSATAResponseWtDataRcvd(agsaRoot_t *agRoot, agsaIORequestDesc_t *pRequest, bit32 *agFirstDword, bit32 *pResp, bit32 lengthResp)
Routine to handle for received SATA with data payload event.
Definition: sasata.c:859
GLOBAL bit32 mpiGetNVMDCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaNVMDData_t *NVMDInfo, bit32 queueNum)
Get NVM Data command.
Definition: sampicmd.c:1462
void siDisableMSIX_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to disable MSIX V interrupts.
Definition: saint.c:503
void siReenableLegacyInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable Legacy interrupts.
Definition: saint.c:1055
GLOBAL bit32 mpiEchoCmd(agsaRoot_t *agRoot, bit32 queueNum, agsaContext_t *agContext, void *echoPayload)
SPC MPI ECHO Command.
Definition: sampicmd.c:189
GLOBAL void mpiWriteCALTable(agsaRoot_t *agRoot, spc_SPASTable_t *mpiCALTable, bit32 index)
Definition: sainit.c:4121
GLOBAL bit32 mpiGetDevInfoRsp(agsaRoot_t *agRoot, agsaGetDevInfoRspV_t *pIomb)
Get Device Information Response.
Definition: sampirsp.c:3088
GLOBAL bit32 mpiSATAEvent(agsaRoot_t *agRoot, agsaSATAEventRsp_t *pIomb)
SPC MPI SATA Event.
Definition: sampirsp.c:4086
GLOBAL void mpiUpdateIBQueueCfgTable(agsaRoot_t *agRoot, spc_inboundQueueDescriptor_t *inQueueCfg, bit32 QueueTableOffset, bit8 pcibar)
Writing to the inbound queue of the Configuration Table.
Definition: sainit.c:3545
void siReenableMSI_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to reenable MSI V interrupts.
Definition: saint.c:1033
GLOBAL bit32 mpiSetDevInfoRsp(agsaRoot_t *agRoot, agsaSetDeviceInfoRsp_t *pIomb)
Set Device Information Response.
Definition: sampirsp.c:3539
GLOBAL bit32 mpiOperatorManagementRsp(agsaRoot_t *agRoot, agsaOperatorMangmenRsp_t *pIomb)
Operator Management Response.
Definition: sampirsp.c:7286
bit32 siOurLegacyInterrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process Legacy interrupts.
Definition: saint.c:711
GLOBAL bit32 siHalRegReadExt(agsaRoot_t *agRoot, bit32 generic, bit32 regOffset)
Definition: sahw.c:2818
GLOBAL bit32 mpiVHistCapCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 queueNum, bit32 Channel, bit32 NumBitLo, bit32 NumBitHi, bit32 PcieAddrLo, bit32 PcieAddrHi, bit32 ByteCount)
Definition: sampicmd.c:358
GLOBAL bit32 mpiSASDiagStartEndRsp(agsaRoot_t *agRoot, agsaSASDiagStartEndRsp_t *pIomb)
SAS Diagnostic Start/End Response.
Definition: sampirsp.c:4735
GLOBAL bit32 siSpcSoftReset(agsaRoot_t *agRoot, bit32 signature)
Function to soft/FW reset the SPC.
Definition: sahw.c:926
GLOBAL bit32 mpiGPIOEventRsp(agsaRoot_t *agRoot, agsaGPIOEvent_t *pIomb)
Set GPIO Event Response.
Definition: sampirsp.c:4704
GLOBAL bit32 mpiFwExtFlashUpdateRsp(agsaRoot_t *agRoot, agsaFwFlashOpExtRsp_t *payload)
Definition: saioctlcmd.c:641
GLOBAL void siSMPRespRcvd(agsaRoot_t *agRoot, agsaSMPCompletionRsp_t *pIomb, bit32 payloadSize, bit32 tag)
Routine to handle for received SMP response event.
Definition: saint.c:1961
void siDisableMSIXInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to disable MSIX interrupts.
Definition: saint.c:473
GLOBAL bit32 smIS_ENCRYPT(agsaRoot_t *agRoot)
Definition: sautil.c:510
GLOBAL bit32 mpiKekManagementRsp(agsaRoot_t *agRoot, agsaKekManagementRsp_t *pIomb)
KEK Management Response.
Definition: sampirsp.c:7044
GLOBAL bit32 mpiPhyStartCmd(agsaRoot_t *agRoot, bit32 tag, bit32 phyId, agsaPhyConfig_t *agPhyConfig, agsaSASIdentify_t *agSASIdentify, bit32 queueNum)
SPC MPI Phy Start Command.
Definition: sampicmd.c:755
GLOBAL void siPCITriger(agsaRoot_t *agRoot)
Definition: sahw.c:2907
GLOBAL bit32 mpiSMPAbortRsp(agsaRoot_t *agRoot, agsaSMPAbortRsp_t *pIomb)
SPC MPI SMP ABORT Response.
Definition: sampirsp.c:5888
GLOBAL void siPortInvalid(agsaRoot_t *agRoot, agsaPort_t *pPort)
Invalid a port.
Definition: saport.c:331
GLOBAL bit32 mpiKekManagementCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaKekManagementCmd_t *agKekMgmt, bit32 queueNum)
SAS Encryption KEK command.
Definition: sampicmd.c:2289
GLOBAL bit32 mpiSGpioRsp(agsaRoot_t *agRoot, agsaSGpioRsp_t *pInIomb)
serial GPIO Response
Definition: sampirsp.c:6402
GLOBAL bit32 mpiGetDeviceInfoCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 deviceid, bit32 option, bit32 queueNum)
Get Device Information Command.
Definition: sampicmd.c:541
GLOBAL bit32 mpiSetOperatorRsp(agsaRoot_t *agRoot, agsaSetOperatorRsp_t *pIomb)
Set Operator Response.
Definition: sampirsp.c:7470
GLOBAL bit32 mpiGetDFEDataRsp(agsaRoot_t *agRoot, void *pInIomb)
Get DFE Data command Response.
Definition: sampirsp.c:6607
GLOBAL bit32 smIS_SPCV_2_IOP(agsaRoot_t *agRoot)
Definition: sautil.c:486
GLOBAL bit32 mpiSASDiagExecuteRsp(agsaRoot_t *agRoot, agsaSASDiagExecuteRsp_t *pIomb)
SAS Diagnostic Execute Response.
Definition: sampirsp.c:4831
GLOBAL agsaTimerDesc_t * siTimerAdd(agsaRoot_t *agRoot, bit32 timeout, agsaCallback_t pfnTimeout, bit32 Event, void *pParm)
add a timer
Definition: satimer.c:230
GLOBAL bit32 mpiSSPEvent(agsaRoot_t *agRoot, agsaSSPEventRsp_t *pIomb)
SPC MPI SSP Event.
Definition: sampirsp.c:3706
GLOBAL bit32 mpiSATAAbortRsp(agsaRoot_t *agRoot, agsaSATAAbortRsp_t *pIomb)
SPC MPI SATA ABORT Response.
Definition: sampirsp.c:4533
GLOBAL bit32 mpiGPIORsp(agsaRoot_t *agRoot, agsaGPIORsp_t *pIomb)
Set GPIO Response.
Definition: sampirsp.c:4615
GLOBAL bit32 mpiSetPhyProfileCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 Operation, bit32 PhyId, bit32 length, void *buffer)
Definition: sampicmd.c:440
GLOBAL bit32 siBar4Shift(agsaRoot_t *agRoot, bit32 shiftValue)
Function to do BAR shifting.
Definition: sahw.c:1333
GLOBAL bit32 si_check_V_HDA(agsaRoot_t *agRoot)
Definition: sainit.c:4486
GLOBAL bit32 mpiGetControllerConfigCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaGetControllerConfigCmd_t *agControllerConfig, bit32 queueNum)
SAS Get Controller Configuration Command.
Definition: sampicmd.c:2198
bit32 siOurMSIX_V_Interrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process MSIX V interrupts.
Definition: saint.c:654
GLOBAL void siInitResources(agsaRoot_t *agRoot, agsaMemoryRequirement_t *memoryAllocated, agsaHwConfig_t *hwConfig, agsaSwConfig_t *swConfig, bit32 usecsPerTick)
Definition: sainit.c:3796
GLOBAL void siUpdateBarOffsetTable(agsaRoot_t *agRoot, bit32 Spc_Type)
Definition: sahw.c:2768
GLOBAL bit32 mpiGeneralEventRsp(agsaRoot_t *agRoot, agsaGeneralEventRsp_t *pIomb)
SAS General Event Notification Response.
Definition: sampirsp.c:4936
GLOBAL void siDifAbnormal(agsaRoot_t *agRoot, agsaIORequestDesc_t *pRequest, bit32 status, bit32 param, bit32 sspTag, bit32 *pMsg1)
Routine to handle abnormal DIF completed IO/SMP event.
Definition: saint.c:1845
GLOBAL bit32 mpiGetPhyProfileRsp(agsaRoot_t *agRoot, agsaGetPhyProfileRspV_t *pIomb)
Get Phy Profile Response SPCv.
Definition: sampirsp.c:2686
GLOBAL bit32 siGetRegisterDumpGSM(agsaRoot_t *agRoot, void *destinationAddress, bit32 regDumpNum, bit32 regDumpOffset, bit32 len)
Initiate a GET REGISTER DUMP from GSM command.
Definition: saioctlcmd.c:3213
GLOBAL bit32 mpiGetDeviceHandleCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 portId, bit32 flags, bit32 maxDevs, bit32 queueNum, bit32 skipCount)
SPC MPI Get Device Handle Command.
Definition: sampicmd.c:1058
GLOBAL bit32 mpiGetControllerConfigRsp(agsaRoot_t *agRoot, agsaGetControllerConfigRsp_t *pIomb)
SAS Get Controller Config Response.
Definition: sampirsp.c:6907
GLOBAL bit32 mpiPhyStartEvent(agsaRoot_t *agRoot, agsaHWEvent_Phy_OUB_t *pIomb)
Phy Event Response from SPCv.
Definition: sampirsp.c:898
bit32 siOurMSIXInterrupt(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process MSIX interrupts.
Definition: saint.c:635
GLOBAL void siEventPhyUpRcvd(agsaRoot_t *agRoot, bit32 phyId, agsaSASIdentify_t *agSASIdentify, bit32 portId, bit32 npipps, bit8 linkRate)
Routine to handle for received Phy Up event.
Definition: saint.c:2069
GLOBAL bit32 mpiUnInitConfigTable(agsaRoot_t *agRoot)
Definition: sainit.c:3434
GLOBAL bit32 mpiGetPCIBarIndex(agsaRoot_t *agRoot, bit32 pciBar)
Definition: sainit.c:3663
GLOBAL bit32 mpiSetDeviceStateRsp(agsaRoot_t *agRoot, agsaSetDeviceStateRsp_t *pIomb)
Set Device State Response.
Definition: sampirsp.c:6084
GLOBAL bit32 mpiDeregDevHandleRsp(agsaRoot_t *agRoot, agsaDeregDevHandleRsp_t *pIomb)
SPC MPI Deregister Device Command Response.
Definition: sampirsp.c:2512
GLOBAL FORCEINLINE void siIODone(agsaRoot_t *agRoot, agsaIORequestDesc_t *pRequest, bit32 status, bit32 sspTag)
Routine to handle successfully completed IO event.
Definition: saint.c:1549
GLOBAL FORCEINLINE bit32 mpiParseOBIomb(agsaRoot_t *agRoot, bit32 *pMsg1, mpiMsgCategory_t category, bit16 opcode)
Process Outbound IOMB Message.
Definition: saint.c:2356
GLOBAL bit32 mpiDeviceHandleRemoval(agsaRoot_t *agRoot, agsaDeviceHandleRemoval_t *pMsg1)
SPC MPI Device Handle Arrived Event (target mode)
Definition: sampirsp.c:5982
GLOBAL bit32 siScratchDump(agsaRoot_t *agRoot)
Definition: sainit.c:4574
GLOBAL void mpiWriteCALAll(agsaRoot_t *agRoot, agsaPhyAnalogSetupTable_t *mpiCALTable)
Writing the Phy Analog Setup Register Table.
Definition: sainit.c:4175
GLOBAL bit32 smIS_SPCV(agsaRoot_t *agRoot)
Definition: sautil.c:502
void si_macro_check(agsaRoot_t *agRoot)
Definition: sainit.c:4633
GLOBAL bit32 mpiPhyStopEvent(agsaRoot_t *agRoot, agsaHWEvent_Phy_OUB_t *pIomb)
Definition: sampirsp.c:998
GLOBAL bit32 mpiSetDeviceInfoCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 deviceid, bit32 option, bit32 queueNum, bit32 param, ossaSetDeviceInfoCB_t agCB)
Set Device Information Command.
Definition: sampicmd.c:642
GLOBAL bit32 mpiSasReInitializeRsp(agsaRoot_t *agRoot, agsaSasReInitializeRsp_t *pIomb)
SAS ReInitialize Response.
Definition: sampirsp.c:6321
GLOBAL void mpiReadGSTable(agsaRoot_t *agRoot, spc_GSTableDescriptor_t *mpiGSTable)
Definition: sainit.c:3700
GLOBAL bit32 mpiBistRsp(agsaRoot_t *agRoot, agsaEncryptBistRsp_t *pIomb)
Definition: sampirsp.c:7359
GLOBAL bit32 mpiWaitForConfigTable(agsaRoot_t *agRoot, spc_configMainDescriptor_t *config)
Reading and Writing the Configuration Table.
Definition: sainit.c:2904
GLOBAL bit32 mpiGetDeviceStateCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 deviceId, bit32 queueNum)
Get Device State command.
Definition: sampicmd.c:1890
GLOBAL void siPciCpyMem(agsaRoot_t *agRoot, bit32 soffset, const void *dst, bit32 DWcount, bit32 busBaseNumber)
Definition: sahw.c:2991
GLOBAL bit32 mpiGetVisDataRsp(agsaRoot_t *agRoot, void *pIomb)
GLOBAL void siEventSSPResponseWtDataRcvd(agsaRoot_t *agRoot, agsaIORequestDesc_t *pRequest, agsaSSPResponseInfoUnit_t *pRespIU, bit32 param, bit32 sspTag)
Routine to handle for received SAS with data payload event.
Definition: saint.c:1467
void siDisableLegacyInterrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to process Legacy interrupts.
Definition: saint.c:580
GLOBAL void siChipReset(agsaRoot_t *agRoot)
Generic Reset.
Definition: sahw.c:528
GLOBAL bit32 mpiPCIeDiagExecuteRsp(agsaRoot_t *agRoot, void *pInIomb)
PCIE Diagnostics Response.
Definition: sampirsp.c:6467
GLOBAL FORCEINLINE bit32 mpiSATACompletion(agsaRoot_t *agRoot, bit32 *pIomb)
SPC MPI SATA Completion.
Definition: saint.c:2963
GLOBAL void siDumpActiveIORequests(agsaRoot_t *agRoot, bit32 count)
siDumpActiveIORequests
Definition: sautil.c:130
GLOBAL bit32 mpiDeregDevHandleCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaDeviceDesc_t *pDevice, bit32 deviceId, bit32 portId, bit32 queueNum)
SPC MPI Deregister Device Handle Command.
Definition: sampicmd.c:965
GLOBAL bit32 mpiSasReinitializeCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaSASReconfig_t *agSASConfig, bit32 queueNum)
SAS ReInitialize command.
Definition: sampicmd.c:2003
void siDisableMSI_V_Interrupts(agsaRoot_t *agRoot, bit32 interruptVectorIndex)
Function to disable MSI V interrupts.
Definition: saint.c:559
GLOBAL bit32 siSoftReset(agsaRoot_t *agRoot, bit32 signature)
Definition: sahw.c:872
GLOBAL void mpiUpdateFatalErrorTable(agsaRoot_t *agRoot, bit32 FerrTableOffset, bit32 lowerBaseAddress, bit32 upperBaseAddress, bit32 length, bit8 pcibar)
Definition: sainit.c:3627
GLOBAL bit32 mpiNVMReadRegDumpCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 queueNum, bit32 cpuId, bit32 cOffset, bit32 addrHi, bit32 addrLo, bit32 len)
SPC READ REGISTER DUMP Command.
Definition: sampicmd.c:1350
GLOBAL void siCheckQs(agsaRoot_t *agRoot)
Definition: sahw.c:2952
GLOBAL bit32 mpiDifEncOffloadRsp(agsaRoot_t *agRoot, agsaDifEncOffloadRspV_t *pIomb)
DifEncOffload Response.
Definition: sampirsp.c:7767
GLOBAL bit32 mpiPhyCntrlRsp(agsaRoot_t *agRoot, agsaLocalPhyCntrlRsp_t *pIomb)
SPC MPI Phy Control Command Response.
Definition: sampirsp.c:2107
GLOBAL FORCEINLINE bit32 mpiSSPCompletion(agsaRoot_t *agRoot, bit32 *pIomb)
SPC MPI SSP Completion.
Definition: saint.c:3383
GLOBAL bit32 smIS_HIL(agsaRoot_t *agRoot)
Definition: sautil.c:446
GLOBAL bit32 mpiBuildCmd(agsaRoot_t *agRoot, bit32 *payload, mpiMsgCategory_t category, bit16 opcode, bit16 size, bit32 queueNum)
Build a IOMB command and send to SPC.
Definition: sampicmd.c:94
GLOBAL bit32 mpiSSPReqReceivedNotify(agsaRoot_t *agRoot, agsaSSPReqReceivedNotify_t *pMsg1)
SPC MPI SSP Request Received Event (target mode)
Definition: sampirsp.c:5291
GLOBAL bit32 mpiSMPCmd(agsaRoot_t *agRoot, void *pIomb, bit16 opcode, agsaSMPCmd_t *payload, bit8 inq, bit8 outq)
SPC MPI SMP Request Command.
Definition: sampicmd.c:901
GLOBAL void mpiWrAnalogSetupTable(agsaRoot_t *agRoot, mpiConfig_t *config)
Definition: sainit.c:4194
GLOBAL bit32 mpiSetNVMDCmd(agsaRoot_t *agRoot, agsaContext_t *agContext, agsaNVMDData_t *NVMDInfo, bit32 queueNum)
Set NVM Data Command.
Definition: sampicmd.c:1639
GLOBAL void siTimerRemove(agsaRoot_t *agRoot, agsaTimerDesc_t *pTimer)
remove a valid timer
Definition: satimer.c:335
GLOBAL bit32 mpiFwFlashUpdateRsp(agsaRoot_t *agRoot, agsaFwFlashUpdateRsp_t *payload)
SPC FW_FLASH_UPDATE Respond.
Definition: saioctlcmd.c:591
GLOBAL bit32 si_check_V_Ready(agsaRoot_t *agRoot)
Definition: sainit.c:4505
bit32(* agsaCallback_t)(agsaRoot_t *agRoot, bit32 Event, void *Parm)
the callback function of an timer
Definition: satypes.h:39
data structure stores OS specific and LL specific context
Definition: sa.h:1658
the data structure of Deregister Device Response
Definition: sampidefs.h:1067
the LL defined device descriptor
Definition: satypes.h:112
the data structure of Device Handle Arrived Notification
Definition: sampidefs.h:1459
the data structure of Device Handle Removal
Definition: sampidefs.h:1568
the data structure of DEVICE_REGISTRATION Response
Definition: sampidefs.h:1108
the data structure of Echo Response
Definition: sampidefs.h:954
the data structure EXT Flash Op
Definition: sampidefs.h:559
the data structure of FW_FLASH_UPDATE Response
Definition: sampidefs.h:1312
the data structure of GPIO Event
Definition: sampidefs.h:1347
the data structure of GPIO Response
Definition: sampidefs.h:1330
the data structure of General Event Notification Response
Definition: sampidefs.h:1415
the data structure of Get Device Handle Response
Definition: sampidefs.h:1079
the data structure of Get Device Info Response
Definition: sampidefs.h:1198
the data structure of Get Device Info Response V
Definition: sampidefs.h:1221
the data structure of Get Device State Response
Definition: sampidefs.h:1595
the data structure of Get NVMD Data Response
Definition: sampidefs.h:1544
the data structure of Get Operator Command
Definition: sampidefs.h:1868
the data structure of Get Phy Profile Response IOMB V
Definition: sampidefs.h:1253
the data structure of Get Time Stamp Response
Definition: sampidefs.h:1496
the data structure of GET Vis Data Response
Definition: sampidefs.h:1700
the data structure of HW Event from Outbound
Definition: sampidefs.h:964
structure describe hardware configuration
Definition: sa.h:2301
the LL defined IO request descriptor
Definition: satypes.h:132
the data structure of Local Phy Control Response
Definition: sampidefs.h:1093
specify the memory allocation requirement for the SAS/SATA LL Layer
Definition: sa.h:2534
describe a NVMData for a Controller in the SAS/SATA hardware
Definition: sa.h:1936
the data structure of Operator Mangement Command
Definition: sampidefs.h:1815
describe a configuration for a PHY in the SAS/SATA hardware
Definition: sa.h:2204
the data structure of Port Control Response
Definition: sampidefs.h:1519
the port
Definition: satypes.h:64
the data structure of SAS Diagnostic Execute Response
Definition: sampidefs.h:1402
the data structure of SAS Diagnostic Start/End Response
Definition: sampidefs.h:1391
the data structure of SAS HW Event Ack Response
Definition: sampidefs.h:1508
describe SAS IDENTIFY address frame
Definition: sa_spec.h:448
describe a SAS ReCofiguration structure in the SAS/SATA hardware
Definition: sa.h:1726
the data structure of SATA_ABORT Response
Definition: sampidefs.h:1379
the data structure of SATA Event Response
Definition: sampidefs.h:1159
the data structure of SGPIO Response
Definition: sampidefs.h:1637
the data structure of SMP Abort Response
Definition: sampidefs.h:1532
the data structure of SMP Request Command
Definition: sampidefs.h:376
the data structure of SMP Completion Response
Definition: sampidefs.h:1055
the data structure of SSP_ABORT Response
Definition: sampidefs.h:1367
the data structure of SSP Event Response
Definition: sampidefs.h:1172
the data structure of SSP Request Received Notification
Definition: sampidefs.h:1441
structure describes an SSP Response INFORMATION UNIT
Definition: sa_spec.h:818
the data structure of SAS Re_Initialize Response
Definition: sampidefs.h:1622
the data structure of Set Device Info Response
Definition: sampidefs.h:1608
the data structure of Set Device State Response
Definition: sampidefs.h:1579
the data structure of Set NVMD Data Response
Definition: sampidefs.h:1556
the data structure of Set Operator Command
Definition: sampidefs.h:1844
the data structure of Set Phy Profile Response IOMB V
Definition: sampidefs.h:1288
structure describe software configuration
Definition: sa.h:2319
the data structure of a timer
Definition: satypes.h:49
MPI layer configuration parameters.
Definition: mpi.h:413
Describes MPI memory requirements.
Definition: mpi.h:136
This structure is used for SPC MPI General Status Table.
Definition: spcdefs.h:387
SAS Phy Analog Setup Table.
Definition: spcdefs.h:422
This structure is used to configure inbound queues.
Definition: spcdefs.h:444
This structure is used to configure outbound queues.
Definition: spcdefs.h:469