mpi.h

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/*******************************************************************************
*Copyright (c) 2014 PMC-Sierra, Inc.  All rights reserved. 
*
*Redistribution and use in source and binary forms, with or without modification, are permitted provided 
*that the following conditions are met: 
*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
*following disclaimer. 
*2. Redistributions in binary form must reproduce the above copyright notice, 
*this list of conditions and the following disclaimer in the documentation and/or other materials provided
*with the distribution. 
*
*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 
*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 
*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 
*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
* $FreeBSD$
*
********************************************************************************/
 
/*******************************************************************************/
/*******************************************************************************/
 
#ifndef __MPI_H__
#define __MPI_H__
 
/*******************************************************************************/
 
/*******************************************************************************/
/* CONSTANTS                                                                   */
/*******************************************************************************/
/*******************************************************************************/
#define MPI_QUEUE_PRIORITY_HIGHEST      0xFF  
#define MPI_QUEUE_PRIORITY_LOWEST       0x00  
#define MPI_MAX_INBOUND_QUEUES          64     
#define MPI_MAX_OUTBOUND_QUEUES         64     
#define MPI_MAX_MEM_REGIONS             (MPI_MAX_INBOUND_QUEUES + MPI_MAX_OUTBOUND_QUEUES) + 4
#define MPI_LOGSIZE                     4096  
#define MPI_IB_NUM_MASK                 0x0000FFFF 
#define MPI_OB_NUM_MASK                 0xFFFF0000 
#define MPI_OB_SHIFT                    16         
#define BAR0                            0x10
#define BAR1                            0x14
#define BAR2                            0x18
#define BAR3                            0x1C
#define BAR4                            0x20
#define BAR5                            0x24
 
/*******************************************************************************/
/*******************************************************************************/
/* ENUMERATIONS                                                                */
/*******************************************************************************/
 
/*******************************************************************************/
/*******************************************************************************/
/*******************************************************************************/
enum mpiMsgCategory_e
{
  MPI_CATEGORY_ETHERNET = 0,
  MPI_CATEGORY_FC,
  MPI_CATEGORY_SAS_SATA,
  MPI_CATEGORY_SCSI
};
 
typedef enum mpiMsgCategory_e mpiMsgCategory_t;
 
/*******************************************************************************/
/*******************************************************************************/
/* TYPES                                                                       */
/*******************************************************************************/
/*******************************************************************************/
 
 
/*******************************************************************************/
/*******************************************************************************/
/* DATA STRUCTURES                                                             */
/*******************************************************************************/
/*******************************************************************************/
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiMem_s
{
  void*        virtPtr;       
  void*        appHandle;     
  bit32        physAddrUpper; 
  bit32        physAddrLower; 
  bit32        totalLength;   
  bit32        numElements;   
  bit32        elementSize;   
  bit32        alignment;     
  bit32        type;          
  bit32        reserved;      
};
 
typedef struct mpiMem_s mpiMem_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiMemReq_s
{
  bit32     count;                        
  mpiMem_t  region[MPI_MAX_MEM_REGIONS];  
};
 
typedef struct mpiMemReq_s mpiMemReq_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiOCQueue_s
{
  bit32                     qNumber;      
  bit32                     numElements;  
  bit32                     elementSize;  
  bit32                     priority;     
  bit32                     CIPCIBar;     
  bit32                     CIPCIOffset;  
  bit32                     DIntTOffset;  
  void*                     piPointer;    
  mpiMem_t                  memoryRegion; 
  bit32                     producerIdx;  
  bit32                     consumerIdx;  
  bit32                     pcibar;       
  agsaRoot_t                *agRoot;      
};
 
typedef struct mpiOCQueue_s mpiOCQueue_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiICQueue_s
{
  bit32                     qNumber;      
  bit32                     numElements;  
  bit32                     elementSize;  
  bit32                     priority;     
  bit32                     PIPCIBar;     
  bit32                     PIPCIOffset;  
  void*                     ciPointer;    
  mpiMem_t                  memoryRegion; 
  bit32                     producerIdx;  
  bit32                     consumerIdx;  
#ifdef SA_FW_TEST_BUNCH_STARTS
  bit32                     BunchStarts_QPending;     // un-started bunched IOs on queue
  bit32                     BunchStarts_QPendingTick; // tick value when 1st IO is bunched 
#endif /* SA_FW_TEST_BUNCH_STARTS */
  agsaRoot_t                *agRoot;      
};
 
typedef struct mpiICQueue_s mpiICQueue_t;
 
struct mpiHostLLConfigDescriptor_s
{
  bit32 regDumpPCIBAR;
  bit32 iQNPPD_HPPD_GEvent;                 
        /* bit0-7   inbound normal priority process depth */
        /* bit8-15  inbound high priority process depth */
        /* bit16-23 OQ number to receive GENERAL_EVENT Notification */
        /* bit24-31 reserved */
  bit32 outboundHWEventPID0_3;              
        /* bit0-7   outbound queue number of SAS_HW event for PortId 0 */
        /* bit8-15  outbound queue number of SAS_HW event for PortId 1 */
        /* bit16-23 outbound queue number of SAS_HW event for PortId 2 */
        /* bit24-31 outbound queue number of SAS_HW event for PortId 3 */
  bit32 outboundHWEventPID4_7;              
        /* bit0-7   outbound queue number of SAS_HW event for PortId 4 */
        /* bit8-15  outbound queue number of SAS_HW event for PortId 5 */
        /* bit16-23 outbound queue number of SAS_HW event for PortId 6 */
        /* bit24-31 outbound queue number of SAS_HW event for PortId 7 */
  bit32 outboundNCQEventPID0_3;             
        /* bit0-7   outbound queue number of SATA_NCQ event for PortId 0 */
        /* bit8-15  outbound queue number of SATA_NCQ event for PortId 1 */
        /* bit16-23 outbound queue number of SATA_NCQ event for PortId 2 */
        /* bit24-31 outbound queue number of SATA_NCQ event for PortId 3 */
  bit32 outboundNCQEventPID4_7;             
        /* bit0-7   outbound queue number of SATA_NCQ event for PortId 4 */
        /* bit8-15  outbound queue number of SATA_NCQ event for PortId 5 */
        /* bit16-23 outbound queue number of SATA_NCQ event for PortId 6 */
        /* bit24-31 outbound queue number of SATA_NCQ event for PortId 7 */
  bit32 outboundTargetITNexusEventPID0_3;   
        /* bit0-7   outbound queue number of ITNexus event for PortId 0 */
        /* bit8-15  outbound queue number of ITNexus event for PortId 1 */
        /* bit16-23 outbound queue number of ITNexus event for PortId 2 */
        /* bit24-31 outbound queue number of ITNexus event for PortId 3 */
  bit32 outboundTargetITNexusEventPID4_7;   
        /* bit0-7   outbound queue number of ITNexus event for PortId 4 */
        /* bit8-15  outbound queue number of ITNexus event for PortId 5 */
        /* bit16-23 outbound queue number of ITNexus event for PortId 6 */
        /* bit24-31 outbound queue number of ITNexus event for PortId 7 */
  bit32 outboundTargetSSPEventPID0_3;       
        /* bit0-7   outbound queue number of SSP event for PortId 0 */
        /* bit8-15  outbound queue number of SSP event for PortId 1 */
        /* bit16-23 outbound queue number of SSP event for PortId 2 */
        /* bit24-31 outbound queue number of SSP event for PortId 3 */
  bit32 outboundTargetSSPEventPID4_7;       
        /* bit0-7   outbound queue number of SSP event for PortId 4 */
        /* bit8-15  outbound queue number of SSP event for PortId 5 */
        /* bit16-23 outbound queue number of SSP event for PortId 6 */
        /* bit24-31 outbound queue number of SSP event for PortId 7 */
  bit32 ioAbortDelay;   /* was reserved */                 
  bit32 custset;                          
  bit32 upperEventLogAddress;               
  bit32 lowerEventLogAddress;               
  bit32 eventLogSize;                       
  bit32 eventLogOption;                     
        /* bit3-0 log severity, 0x0 Disable Logging */
        /*                      0x1 Critical Error */
        /*                      0x2 Minor Error    */
        /*                      0x3 Warning        */
        /*                      0x4 Information    */
        /*                      0x5 Debugging      */
        /*                      0x6 - 0xF Reserved */
  bit32 upperIOPeventLogAddress;           
  bit32 lowerIOPeventLogAddress;           
  bit32 IOPeventLogSize;                   
  bit32 IOPeventLogOption;                 
        /* bit3-0 log severity, 0x0 Disable Logging */
        /*                      0x1 Critical Error */
        /*                      0x2 Minor Error    */
        /*                      0x3 Warning        */
        /*                      0x4 Information    */
        /*                      0x5 Debugging      */
        /*                      0x6 - 0xF Reserved */
  bit32 FatalErrorInterrupt;               
        /* bit0     Fatal Error Interrupt Enable   */
        /* bit1     PI/CI Address                  */
        /* bit5     enable or disable outbound coalesce   */
        /* bit7-6  reserved */
        /* bit15-8  Fatal Error Interrupt Vector   */
        /* bit31-16 Reserved                       */
  bit32 FatalErrorDumpOffset0;             
  bit32 FatalErrorDumpLength0;             
  bit32 FatalErrorDumpOffset1;             
  bit32 FatalErrorDumpLength1;             
  bit32 HDAModeFlags;                      
        /* bit1-0   Bootstrap pins */
        /* bit2     Force HDA Mode bit */
        /* bit3     HDA Firmware load method */
  bit32 analogSetupTblOffset;              
        /* bit23-0  phy calib table offset */
        /* bit31-24 entry size */
  bit32 InterruptVecTblOffset;             
        /* bit23-0  interrupt vector table offset */
        /* bit31-24 entry size */
  bit32 phyAttributeTblOffset;             
        /* bit23-0  phy attribute table offset */
        /* bit31-24 entry size */
  bit32 PortRecoveryTimerPortResetTimer;  
  bit32 InterruptReassertionDelay;        
};
 
typedef struct mpiHostLLConfigDescriptor_s mpiHostLLConfigDescriptor_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiInboundQueueDescriptor_s
{
  bit32                     numElements;     
  bit32                     elementSize;     
  bit32                     priority;        
  bit32                     PIPCIBar;        
  bit32                     PIOffset;        
  void*                     ciPointer;       
};
 
typedef struct mpiInboundQueueDescriptor_s mpiInboundQueueDescriptor_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiOutboundQueueDescriptor_s
{
  bit32                     numElements;        
  bit32                     elementSize;        
  bit32                     interruptDelay;     
  bit32                     interruptThreshold; 
  bit32                     interruptVector;    
  bit32                     CIPCIBar;           
  bit32                     CIOffset;           
  bit32                     DIntTOffset;        
  bit32                     interruptEnable;    
  void*                     piPointer;          
};
 
typedef struct mpiOutboundQueueDescriptor_s mpiOutboundQueueDescriptor_t;
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiPhyCalibration_s
{
  bit32   spaReg0;            /* transmitter per port configuration 1 SAS_SATA G1 */
  bit32   spaReg1;            /* transmitter per port configuration 2 SAS_SATA G1*/
  bit32   spaReg2;            /* transmitter per port configuration 3 SAS_SATA G1*/
  bit32   spaReg3;            /* transmitter configuration 1 */
  bit32   spaReg4;            /* reveiver per port configuration 1 SAS_SATA G1G2 */
  bit32   spaReg5;            /* reveiver per port configuration 2 SAS_SATA G3 */
  bit32   spaReg6;            /* reveiver per configuration 1 */
  bit32   spaReg7;            /* reveiver per configuration 2 */
  bit32   reserved[2];        /* reserved */
};
 
typedef struct mpiPhyCalibration_s mpiPhyCalibration_t;
 
#define ANALOG_SETUP_ENTRY_NO              10
#define ANALOG_SETUP_ENTRY_SIZE            10
 
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiVConfig_s
{
  mpiHostLLConfigDescriptor_t  mainConfig;                              
  mpiInboundQueueDescriptor_t  inboundQueues[MPI_MAX_INBOUND_QUEUES];   
  mpiOutboundQueueDescriptor_t outboundQueues[MPI_MAX_OUTBOUND_QUEUES]; 
  agsaPhyAnalogSetupTable_t    phyAnalogConfig;
  mpiInterruptVT_t             interruptVTable;
  sasPhyAttribute_t            phyAttributeTable;
  bit16   numInboundQueues;
  bit16   numOutboundQueues;
  bit16   maxNumInboundQueues;
  bit16   maxNumOutboundQueues;
  bit32   queueOption;
};
 
/*******************************************************************************/
/*******************************************************************************/
struct mpiConfig_s
{
  mpiHostLLConfigDescriptor_t  mainConfig;                              
  mpiInboundQueueDescriptor_t  inboundQueues[MPI_MAX_INBOUND_QUEUES];   
  mpiOutboundQueueDescriptor_t outboundQueues[MPI_MAX_OUTBOUND_QUEUES]; 
  agsaPhyAnalogSetupTable_t    phyAnalogConfig;
  bit16   numInboundQueues;
  bit16   numOutboundQueues;
  bit16   maxNumInboundQueues;
  bit16   maxNumOutboundQueues;
  bit32   queueOption;
};
 
typedef struct mpiConfig_s  mpiConfig_t;
 
#define TX_PORT_CFG1_OFFSET                0x00
#define TX_PORT_CFG2_OFFSET                0x04
#define TX_PORT_CFG3_OFFSET                0x08
#define TX_CFG_OFFSET                      0x0c
#define RV_PORT_CFG1_OFFSET                0x10
#define RV_PORT_CFG2_OFFSET                0x14
#define RV_CFG1_OFFSET                     0x18
#define RV_CFG2_OFFSET                     0x1c
 
/*******************************************************************************/
/*******************************************************************************/
/* FUNCTIONS                                                                   */
/*******************************************************************************/
/*******************************************************************************/
/*******************************************************************************/
void      mpiRequirementsGet(mpiConfig_t *config, mpiMemReq_t *memoryRequirement);
FORCEINLINE bit32 mpiMsgFreeGet(mpiICQueue_t *circularQ, bit16 messageSize, void** messagePtr);
FORCEINLINE bit32 mpiMsgProduce(mpiICQueue_t *circularQ, void* messagePtr,
                        mpiMsgCategory_t category, bit16 opCode,
                        bit8 responseQueue, bit8 hiPriority);
#ifdef LOOPBACK_MPI
GLOBAL bit32 mpiMsgProduceOQ(mpiOCQueue_t *circularQ, void *messagePtr,
                             mpiMsgCategory_t category, bit16 opCode,
                             bit8 responseQueue, bit8 hiPriority);
GLOBAL bit32 mpiMsgFreeGetOQ(mpiOCQueue_t *circularQ, bit16 messageSize,
                             void** messagePtr);
#endif
 
#ifdef FAST_IO_TEST
bit32     mpiMsgPrepare(mpiICQueue_t *circularQ, void* messagePtr,
                        mpiMsgCategory_t category, bit16 opCode,
                        bit8 responseQueue, bit8 hiPriority);
 
bit32     mpiMsgProduceSend(mpiICQueue_t *circularQ, void* messagePtr,
                        mpiMsgCategory_t category, bit16 opCode,
                        bit8 responseQueue, bit8 hiPriority, int sendFl);
GLOBAL void mpiIBQMsgSend(mpiICQueue_t *circularQ);
#define INQ(queueNum) (bit8)(queueNum & MPI_IB_NUM_MASK)
#define OUQ(queueNum) (bit8)((queueNum & MPI_OB_NUM_MASK) >> MPI_OB_SHIFT)
#endif
 
FORCEINLINE bit32 mpiMsgConsume(mpiOCQueue_t *circularQ, void** messagePtr1, mpiMsgCategory_t *pCategory, bit16* pOpCode, bit8 *pBC);
FORCEINLINE bit32 mpiMsgFreeSet(mpiOCQueue_t *circularQ, void* messagePtr1, bit8 bc);
 
#endif /* __MPI_H__ */