33#include <sys/kernel.h>
34#include <sys/module.h>
36#include <dev/pci/pcivar.h>
40#include <sys/iov_schema.h>
41#include <dev/pci/pci_iov.h>
56 bus_space_handle_t
bh;
64 {0x4000,
"Chelsio T440-dbg"},
65 {0x4001,
"Chelsio T420-CR"},
66 {0x4002,
"Chelsio T422-CR"},
67 {0x4003,
"Chelsio T440-CR"},
68 {0x4004,
"Chelsio T420-BCH"},
69 {0x4005,
"Chelsio T440-BCH"},
70 {0x4006,
"Chelsio T440-CH"},
71 {0x4007,
"Chelsio T420-SO"},
72 {0x4008,
"Chelsio T420-CX"},
73 {0x4009,
"Chelsio T420-BT"},
74 {0x400a,
"Chelsio T404-BT"},
75 {0x400e,
"Chelsio T440-LP-CR"},
77 {0x5000,
"Chelsio T580-dbg"},
78 {0x5001,
"Chelsio T520-CR"},
79 {0x5002,
"Chelsio T522-CR"},
80 {0x5003,
"Chelsio T540-CR"},
81 {0x5007,
"Chelsio T520-SO"},
82 {0x5009,
"Chelsio T520-BT"},
83 {0x500a,
"Chelsio T504-BT"},
84 {0x500d,
"Chelsio T580-CR"},
85 {0x500e,
"Chelsio T540-LP-CR"},
86 {0x5010,
"Chelsio T580-LP-CR"},
87 {0x5011,
"Chelsio T520-LL-CR"},
88 {0x5012,
"Chelsio T560-CR"},
89 {0x5014,
"Chelsio T580-LP-SO-CR"},
90 {0x5015,
"Chelsio T502-BT"},
91 {0x5018,
"Chelsio T540-BT"},
92 {0x5019,
"Chelsio T540-LP-BT"},
93 {0x501a,
"Chelsio T540-SO-BT"},
94 {0x501b,
"Chelsio T540-SO-CR"},
96 {0x6000,
"Chelsio T6-DBG-25"},
97 {0x6001,
"Chelsio T6225-CR"},
98 {0x6002,
"Chelsio T6225-SO-CR"},
99 {0x6003,
"Chelsio T6425-CR"},
100 {0x6004,
"Chelsio T6425-SO-CR"},
101 {0x6005,
"Chelsio T6225-OCP-SO"},
102 {0x6006,
"Chelsio T62100-OCP-SO"},
103 {0x6007,
"Chelsio T62100-LP-CR"},
104 {0x6008,
"Chelsio T62100-SO-CR"},
105 {0x6009,
"Chelsio T6210-BT"},
106 {0x600d,
"Chelsio T62100-CR"},
107 {0x6010,
"Chelsio T6-DBG-100"},
108 {0x6011,
"Chelsio T6225-LL-CR"},
109 {0x6014,
"Chelsio T61100-OCP-SO"},
110 {0x6015,
"Chelsio T6201-BT"},
113 {0x6080,
"Chelsio T6225 80"},
114 {0x6081,
"Chelsio T62100 81"},
115 {0x6082,
"Chelsio T6225-CR 82"},
116 {0x6083,
"Chelsio T62100-CR 83"},
117 {0x6084,
"Chelsio T64100-CR 84"},
118 {0x6085,
"Chelsio T6240-SO 85"},
119 {0x6086,
"Chelsio T6225-SO-CR 86"},
120 {0x6087,
"Chelsio T6225-CR 87"},
123static inline uint32_t
127 return bus_space_read_4(sc->
bt, sc->
bh, reg);
141 d = pci_get_device(dev);
146 return (BUS_PROBE_DEFAULT);
161 d = pci_get_device(dev);
166 return (BUS_PROBE_DEFAULT);
181 d = pci_get_device(dev);
186 return (BUS_PROBE_DEFAULT);
196 uint32_t pl_rev, whoami;
198 sc = device_get_softc(dev);
202 sc->
regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
205 device_printf(dev,
"cannot map registers.\n");
218 sc->
sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
219 pci_get_slot(dev), 4);
222 if (T4_IS_MAIN_READY(sc->
sc_main) == 0)
232 nvlist_t *pf_schema, *vf_schema;
237 sc = device_get_softc(dev);
246 error = T4_READ_PORT_DEVICE(sc->
sc_main, pci_get_function(dev), &pdev);
251 pf_schema = pci_iov_schema_alloc_node();
252 vf_schema = pci_iov_schema_alloc_node();
253 pci_iov_schema_add_unicast_mac(vf_schema,
"mac-addr", 0, NULL);
254 error = pci_iov_attach_name(dev, pf_schema, vf_schema,
"%s",
255 device_get_nameunit(pdev));
257 device_printf(dev,
"Failed to initialize SR-IOV: %d\n", error);
274 sc = device_get_softc(dev);
279 error = pci_iov_detach(dev);
281 device_printf(dev,
"Failed to disable SR-IOV\n");
296 sc = device_get_softc(dev);
303 bus_release_resource(dev, SYS_RES_MEMORY, sc->
regs_rid,
311t4iov_iov_init(device_t dev, uint16_t num_vfs,
const struct nvlist *config)
319t4iov_iov_uninit(device_t dev)
324t4iov_add_vf(device_t dev, uint16_t vfnum,
const struct nvlist *config)
329 uint8_t ma[ETHER_ADDR_LEN];
333 if (nvlist_exists_binary(config,
"mac-addr")) {
334 mac = nvlist_get_binary(config,
"mac-addr", &size);
335 bcopy(mac, ma, ETHER_ADDR_LEN);
337 sc = device_get_softc(
dev);
340 adap = device_get_softc(sc->
sc_main);
348 "Failed to set VF%d MAC address to "
349 "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
350 ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
365 DEVMETHOD(pci_iov_init, t4iov_iov_init),
366 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
367 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
388 DEVMETHOD(pci_iov_init, t4iov_iov_init),
389 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
390 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
411 DEVMETHOD(pci_iov_init, t4iov_iov_init),
412 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
413 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
int begin_synchronized_op(struct adapter *, struct vi_info *, int, char *)
void end_synchronized_op(struct adapter *, int)
#define PCI_VENDOR_ID_CHELSIO
int t4_set_vf_mac(struct adapter *adapter, unsigned int pf, unsigned int vf, unsigned int naddr, u8 *addr)
struct resource * regs_res
static devclass_t t5iov_devclass
static int t6iov_probe(device_t dev)
struct @96 t4iov_pciids[]
static int t4iov_attach_child(device_t dev)
static uint32_t t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
static int t5iov_probe(device_t dev)
static int t4iov_attach(device_t dev)
static driver_t t4iov_driver
static device_method_t t6iov_methods[]
static int t4iov_probe(device_t dev)
static devclass_t t4iov_devclass
static int t4iov_detach_child(device_t dev)
struct @96 t5iov_pciids[]
struct @96 t6iov_pciids[]
static int t4iov_detach(device_t dev)
static device_method_t t4iov_methods[]
static driver_t t6iov_driver
static devclass_t t6iov_devclass
static device_method_t t5iov_methods[]
DRIVER_MODULE(t4iov, pci, t4iov_driver, t4iov_devclass, 0, 0)
static driver_t t5iov_driver