FreeBSD kernel usb device Code
ehci.c
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1/* $FreeBSD$ */
2/*-
3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 *
5 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
6 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
7 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
8 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32/*
33 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
34 *
35 * The EHCI 0.96 spec can be found at
36 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
37 * The EHCI 1.0 spec can be found at
38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
39 * and the USB 2.0 spec at
40 * http://www.usb.org/developers/docs/usb_20.zip
41 *
42 */
43
44/*
45 * TODO:
46 * 1) command failures are not recovered correctly
47 */
48
49#ifdef USB_GLOBAL_INCLUDE_FILE
50#include USB_GLOBAL_INCLUDE_FILE
51#else
52#include <sys/stdint.h>
53#include <sys/stddef.h>
54#include <sys/param.h>
55#include <sys/queue.h>
56#include <sys/types.h>
57#include <sys/systm.h>
58#include <sys/kernel.h>
59#include <sys/bus.h>
60#include <sys/module.h>
61#include <sys/lock.h>
62#include <sys/mutex.h>
63#include <sys/condvar.h>
64#include <sys/sysctl.h>
65#include <sys/sx.h>
66#include <sys/unistd.h>
67#include <sys/callout.h>
68#include <sys/malloc.h>
69#include <sys/priv.h>
70
71#include <dev/usb/usb.h>
72#include <dev/usb/usbdi.h>
73
74#define USB_DEBUG_VAR ehcidebug
75
76#include <dev/usb/usb_core.h>
77#include <dev/usb/usb_debug.h>
78#include <dev/usb/usb_busdma.h>
79#include <dev/usb/usb_process.h>
80#include <dev/usb/usb_transfer.h>
81#include <dev/usb/usb_device.h>
82#include <dev/usb/usb_hub.h>
83#include <dev/usb/usb_util.h>
84
85#include <dev/usb/usb_controller.h>
86#include <dev/usb/usb_bus.h>
87#endif /* USB_GLOBAL_INCLUDE_FILE */
88
89#include <dev/usb/controller/ehci.h>
90#include <dev/usb/controller/ehcireg.h>
91
92#define EHCI_BUS2SC(bus) \
93 __containerof(bus, ehci_softc_t, sc_bus)
94
95#ifdef USB_DEBUG
96static int ehcidebug = 0;
97static int ehcinohighspeed = 0;
98static int ehciiaadbug = 0;
99static int ehcilostintrbug = 0;
100
101static SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
102 "USB ehci");
103SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RWTUN,
104 &ehcidebug, 0, "Debug level");
105SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RWTUN,
106 &ehcinohighspeed, 0, "Disable High Speed USB");
107SYSCTL_INT(_hw_usb_ehci, OID_AUTO, iaadbug, CTLFLAG_RWTUN,
108 &ehciiaadbug, 0, "Enable doorbell bug workaround");
109SYSCTL_INT(_hw_usb_ehci, OID_AUTO, lostintrbug, CTLFLAG_RWTUN,
110 &ehcilostintrbug, 0, "Enable lost interrupt bug workaround");
111
112static void ehci_dump_regs(ehci_softc_t *sc);
113static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
114
115#endif
116
117#define EHCI_INTR_ENDPT 1
118
119static const struct usb_bus_methods ehci_bus_methods;
120static const struct usb_pipe_methods ehci_device_bulk_methods;
121static const struct usb_pipe_methods ehci_device_ctrl_methods;
122static const struct usb_pipe_methods ehci_device_intr_methods;
123static const struct usb_pipe_methods ehci_device_isoc_fs_methods;
124static const struct usb_pipe_methods ehci_device_isoc_hs_methods;
125
126static void ehci_do_poll(struct usb_bus *);
127static void ehci_device_done(struct usb_xfer *, usb_error_t);
128static uint8_t ehci_check_transfer(struct usb_xfer *);
129static void ehci_timeout(void *);
130static void ehci_poll_timeout(void *);
131
132static void ehci_root_intr(ehci_softc_t *sc);
133
134struct ehci_std_temp {
135 ehci_softc_t *sc;
136 struct usb_page_cache *pc;
137 ehci_qtd_t *td;
138 ehci_qtd_t *td_next;
139 uint32_t average;
140 uint32_t qtd_status;
141 uint32_t len;
142 uint16_t max_frame_size;
143 uint8_t shortpkt;
144 uint8_t auto_data_toggle;
145 uint8_t setup_alt_next;
146 uint8_t last_frame;
147};
148
149void
150ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
151{
152 ehci_softc_t *sc = EHCI_BUS2SC(bus);
153 uint32_t i;
154
155 cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
156 sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
157
158 cb(bus, &sc->sc_hw.terminate_pc, &sc->sc_hw.terminate_pg,
159 sizeof(struct ehci_qh_sub), EHCI_QH_ALIGN);
160
161 cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
162 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
163
164 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
165 cb(bus, sc->sc_hw.intr_start_pc + i,
166 sc->sc_hw.intr_start_pg + i,
167 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
168 }
169
170 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
171 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
172 sc->sc_hw.isoc_hs_start_pg + i,
173 sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
174 }
175
176 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
177 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
178 sc->sc_hw.isoc_fs_start_pg + i,
179 sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
180 }
181}
182
183usb_error_t
184ehci_reset(ehci_softc_t *sc)
185{
186 uint32_t hcr;
187 int i;
188
189 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
190 for (i = 0; i < 100; i++) {
191 usb_pause_mtx(NULL, hz / 128);
192 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
193 if (!hcr) {
194 if (sc->sc_vendor_post_reset != NULL)
195 sc->sc_vendor_post_reset(sc);
196 return (0);
197 }
198 }
199 device_printf(sc->sc_bus.bdev, "reset timeout\n");
200 return (USB_ERR_IOERROR);
201}
202
203static usb_error_t
204ehci_hcreset(ehci_softc_t *sc)
205{
206 uint32_t hcr;
207 int i;
208
209 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
210 for (i = 0; i < 100; i++) {
211 usb_pause_mtx(NULL, hz / 128);
212 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
213 if (hcr)
214 break;
215 }
216 if (!hcr)
217 /*
218 * Fall through and try reset anyway even though
219 * Table 2-9 in the EHCI spec says this will result
220 * in undefined behavior.
221 */
222 device_printf(sc->sc_bus.bdev, "stop timeout\n");
223
224 return (ehci_reset(sc));
225}
226
227static int
228ehci_init_sub(struct ehci_softc *sc)
229{
230 struct usb_page_search buf_res;
231 uint32_t cparams;
232 uint32_t hcr;
233 uint8_t i;
234
235 cparams = EREAD4(sc, EHCI_HCCPARAMS);
236
237 DPRINTF("cparams=0x%x\n", cparams);
238
239 if (EHCI_HCC_64BIT(cparams)) {
240 DPRINTF("HCC uses 64-bit structures\n");
241
242 /* MUST clear segment register if 64 bit capable */
243 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
244 }
245
246 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
247 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
248
249 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
250 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
251
252 /* enable interrupts */
253 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
254
255 /* turn on controller */
256 EOWRITE4(sc, EHCI_USBCMD,
257 EHCI_CMD_ITC_1 | /* 1 microframes interrupt delay */
258 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
259 EHCI_CMD_ASE |
260 EHCI_CMD_PSE |
261 EHCI_CMD_RS);
262
263 /* Take over port ownership */
264 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
265
266 for (i = 0; i < 100; i++) {
267 usb_pause_mtx(NULL, hz / 128);
268 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
269 if (!hcr) {
270 break;
271 }
272 }
273 if (hcr) {
274 device_printf(sc->sc_bus.bdev, "run timeout\n");
275 return (USB_ERR_IOERROR);
276 }
277 return (USB_ERR_NORMAL_COMPLETION);
278}
279
280usb_error_t
281ehci_init(ehci_softc_t *sc)
282{
283 struct usb_page_search buf_res;
284 uint32_t version;
285 uint32_t sparams;
286 uint16_t i;
287 uint16_t x;
288 uint16_t y;
289 uint16_t bit;
290 usb_error_t err = 0;
291
292 DPRINTF("start\n");
293
294 usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
295 usb_callout_init_mtx(&sc->sc_tmo_poll, &sc->sc_bus.bus_mtx, 0);
296
297 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
298
299#ifdef USB_DEBUG
300 if (ehciiaadbug)
301 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
302 if (ehcilostintrbug)
303 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
304 if (ehcidebug > 2) {
305 ehci_dump_regs(sc);
306 }
307#endif
308
309 version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
310 device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
311 version >> 8, version & 0xff);
312
313 sparams = EREAD4(sc, EHCI_HCSPARAMS);
314 DPRINTF("sparams=0x%x\n", sparams);
315
316 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
317 sc->sc_bus.usbrev = USB_REV_2_0;
318
319 if (!(sc->sc_flags & EHCI_SCFLG_DONTRESET)) {
320 /* Reset the controller */
321 DPRINTF("%s: resetting\n",
322 device_get_nameunit(sc->sc_bus.bdev));
323
324 err = ehci_hcreset(sc);
325 if (err) {
326 device_printf(sc->sc_bus.bdev, "reset timeout\n");
327 return (err);
328 }
329 }
330
331 /*
332 * use current frame-list-size selection 0: 1024*4 bytes 1: 512*4
333 * bytes 2: 256*4 bytes 3: unknown
334 */
335 if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
336 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
337 return (USB_ERR_IOERROR);
338 }
339 /* set up the bus struct */
340 sc->sc_bus.methods = &ehci_bus_methods;
341
342 sc->sc_eintrs = EHCI_NORMAL_INTRS;
343
344 if (1) {
345 struct ehci_qh_sub *qh;
346
347 usbd_get_page(&sc->sc_hw.terminate_pc, 0, &buf_res);
348
349 qh = buf_res.buffer;
350
351 sc->sc_terminate_self = htohc32(sc, buf_res.physaddr);
352
353 /* init terminate TD */
354 qh->qtd_next =
355 htohc32(sc, EHCI_LINK_TERMINATE);
356 qh->qtd_altnext =
357 htohc32(sc, EHCI_LINK_TERMINATE);
358 qh->qtd_status =
359 htohc32(sc, EHCI_QTD_HALTED);
360 }
361
362 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
363 ehci_qh_t *qh;
364
365 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
366
367 qh = buf_res.buffer;
368
369 /* initialize page cache pointer */
370
371 qh->page_cache = sc->sc_hw.intr_start_pc + i;
372
373 /* store a pointer to queue head */
374
375 sc->sc_intr_p_last[i] = qh;
376
377 qh->qh_self =
378 htohc32(sc, buf_res.physaddr) |
379 htohc32(sc, EHCI_LINK_QH);
380
381 qh->qh_endp =
382 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
383 qh->qh_endphub =
384 htohc32(sc, EHCI_QH_SET_MULT(1));
385 qh->qh_curqtd = 0;
386
387 qh->qh_qtd.qtd_next =
388 htohc32(sc, EHCI_LINK_TERMINATE);
389 qh->qh_qtd.qtd_altnext =
390 htohc32(sc, EHCI_LINK_TERMINATE);
391 qh->qh_qtd.qtd_status =
392 htohc32(sc, EHCI_QTD_HALTED);
393 }
394
395 /*
396 * the QHs are arranged to give poll intervals that are
397 * powers of 2 times 1ms
398 */
399 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
400 while (bit) {
401 x = bit;
402 while (x & bit) {
403 ehci_qh_t *qh_x;
404 ehci_qh_t *qh_y;
405
406 y = (x ^ bit) | (bit / 2);
407
408 qh_x = sc->sc_intr_p_last[x];
409 qh_y = sc->sc_intr_p_last[y];
410
411 /*
412 * the next QH has half the poll interval
413 */
414 qh_x->qh_link = qh_y->qh_self;
415
416 x++;
417 }
418 bit >>= 1;
419 }
420
421 if (1) {
422 ehci_qh_t *qh;
423
424 qh = sc->sc_intr_p_last[0];
425
426 /* the last (1ms) QH terminates */
427 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
428 }
429 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
430 ehci_sitd_t *sitd;
431 ehci_itd_t *itd;
432
433 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
434
435 sitd = buf_res.buffer;
436
437 /* initialize page cache pointer */
438
439 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
440
441 /* store a pointer to the transfer descriptor */
442
443 sc->sc_isoc_fs_p_last[i] = sitd;
444
445 /* initialize full speed isochronous */
446
447 sitd->sitd_self =
448 htohc32(sc, buf_res.physaddr) |
449 htohc32(sc, EHCI_LINK_SITD);
450
451 sitd->sitd_back =
452 htohc32(sc, EHCI_LINK_TERMINATE);
453
454 sitd->sitd_next =
455 sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
456
457 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
458
459 itd = buf_res.buffer;
460
461 /* initialize page cache pointer */
462
463 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
464
465 /* store a pointer to the transfer descriptor */
466
467 sc->sc_isoc_hs_p_last[i] = itd;
468
469 /* initialize high speed isochronous */
470
471 itd->itd_self =
472 htohc32(sc, buf_res.physaddr) |
473 htohc32(sc, EHCI_LINK_ITD);
474
475 itd->itd_next =
476 sitd->sitd_self;
477 }
478
479 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
480
481 if (1) {
482 uint32_t *pframes;
483
484 pframes = buf_res.buffer;
485
486 /*
487 * execution order:
488 * pframes -> high speed isochronous ->
489 * full speed isochronous -> interrupt QH's
490 */
491 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
492 pframes[i] = sc->sc_isoc_hs_p_last
493 [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
494 }
495 }
496 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
497
498 if (1) {
499 ehci_qh_t *qh;
500
501 qh = buf_res.buffer;
502
503 /* initialize page cache pointer */
504
505 qh->page_cache = &sc->sc_hw.async_start_pc;
506
507 /* store a pointer to the queue head */
508
509 sc->sc_async_p_last = qh;
510
511 /* init dummy QH that starts the async list */
512
513 qh->qh_self =
514 htohc32(sc, buf_res.physaddr) |
515 htohc32(sc, EHCI_LINK_QH);
516
517 /* fill the QH */
518 qh->qh_endp =
519 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
520 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
521 qh->qh_link = qh->qh_self;
522 qh->qh_curqtd = 0;
523
524 /* fill the overlay qTD */
525 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
526 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
527 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
528 }
529 /* flush all cache into memory */
530
531 usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
532
533#ifdef USB_DEBUG
534 if (ehcidebug) {
535 ehci_dump_sqh(sc, sc->sc_async_p_last);
536 }
537#endif
538
539 /* finial setup */
540 err = ehci_init_sub(sc);
541
542 if (!err) {
543 /* catch any lost interrupts */
544 ehci_do_poll(&sc->sc_bus);
545 }
546 return (err);
547}
548
549/*
550 * shut down the controller when the system is going down
551 */
552void
553ehci_detach(ehci_softc_t *sc)
554{
555 USB_BUS_LOCK(&sc->sc_bus);
556
557 usb_callout_stop(&sc->sc_tmo_pcd);
558 usb_callout_stop(&sc->sc_tmo_poll);
559
560 EOWRITE4(sc, EHCI_USBINTR, 0);
561 USB_BUS_UNLOCK(&sc->sc_bus);
562
563 if (ehci_hcreset(sc)) {
564 DPRINTF("reset failed!\n");
565 }
566
567 /* XXX let stray task complete */
568 usb_pause_mtx(NULL, hz / 20);
569
570 usb_callout_drain(&sc->sc_tmo_pcd);
571 usb_callout_drain(&sc->sc_tmo_poll);
572}
573
574static void
575ehci_suspend(ehci_softc_t *sc)
576{
577 DPRINTF("stopping the HC\n");
578
579 /* reset HC */
580 ehci_hcreset(sc);
581}
582
583static void
584ehci_resume(ehci_softc_t *sc)
585{
586 /* reset HC */
587 ehci_hcreset(sc);
588
589 /* setup HC */
590 ehci_init_sub(sc);
591
592 /* catch any lost interrupts */
593 ehci_do_poll(&sc->sc_bus);
594}
595
596#ifdef USB_DEBUG
597static void
598ehci_dump_regs(ehci_softc_t *sc)
599{
600 uint32_t i;
601
602 i = EOREAD4(sc, EHCI_USBCMD);
603 printf("cmd=0x%08x\n", i);
604
605 if (i & EHCI_CMD_ITC_1)
606 printf(" EHCI_CMD_ITC_1\n");
607 if (i & EHCI_CMD_ITC_2)
608 printf(" EHCI_CMD_ITC_2\n");
609 if (i & EHCI_CMD_ITC_4)
610 printf(" EHCI_CMD_ITC_4\n");
611 if (i & EHCI_CMD_ITC_8)
612 printf(" EHCI_CMD_ITC_8\n");
613 if (i & EHCI_CMD_ITC_16)
614 printf(" EHCI_CMD_ITC_16\n");
615 if (i & EHCI_CMD_ITC_32)
616 printf(" EHCI_CMD_ITC_32\n");
617 if (i & EHCI_CMD_ITC_64)
618 printf(" EHCI_CMD_ITC_64\n");
619 if (i & EHCI_CMD_ASPME)
620 printf(" EHCI_CMD_ASPME\n");
621 if (i & EHCI_CMD_ASPMC)
622 printf(" EHCI_CMD_ASPMC\n");
623 if (i & EHCI_CMD_LHCR)
624 printf(" EHCI_CMD_LHCR\n");
625 if (i & EHCI_CMD_IAAD)
626 printf(" EHCI_CMD_IAAD\n");
627 if (i & EHCI_CMD_ASE)
628 printf(" EHCI_CMD_ASE\n");
629 if (i & EHCI_CMD_PSE)
630 printf(" EHCI_CMD_PSE\n");
631 if (i & EHCI_CMD_FLS_M)
632 printf(" EHCI_CMD_FLS_M\n");
633 if (i & EHCI_CMD_HCRESET)
634 printf(" EHCI_CMD_HCRESET\n");
635 if (i & EHCI_CMD_RS)
636 printf(" EHCI_CMD_RS\n");
637
638 i = EOREAD4(sc, EHCI_USBSTS);
639
640 printf("sts=0x%08x\n", i);
641
642 if (i & EHCI_STS_ASS)
643 printf(" EHCI_STS_ASS\n");
644 if (i & EHCI_STS_PSS)
645 printf(" EHCI_STS_PSS\n");
646 if (i & EHCI_STS_REC)
647 printf(" EHCI_STS_REC\n");
648 if (i & EHCI_STS_HCH)
649 printf(" EHCI_STS_HCH\n");
650 if (i & EHCI_STS_IAA)
651 printf(" EHCI_STS_IAA\n");
652 if (i & EHCI_STS_HSE)
653 printf(" EHCI_STS_HSE\n");
654 if (i & EHCI_STS_FLR)
655 printf(" EHCI_STS_FLR\n");
656 if (i & EHCI_STS_PCD)
657 printf(" EHCI_STS_PCD\n");
658 if (i & EHCI_STS_ERRINT)
659 printf(" EHCI_STS_ERRINT\n");
660 if (i & EHCI_STS_INT)
661 printf(" EHCI_STS_INT\n");
662
663 printf("ien=0x%08x\n",
664 EOREAD4(sc, EHCI_USBINTR));
665 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
666 EOREAD4(sc, EHCI_FRINDEX),
667 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
668 EOREAD4(sc, EHCI_PERIODICLISTBASE),
669 EOREAD4(sc, EHCI_ASYNCLISTADDR));
670 for (i = 1; i <= sc->sc_noport; i++) {
671 printf("port %d status=0x%08x\n", i,
672 EOREAD4(sc, EHCI_PORTSC(i)));
673 }
674}
675
676static void
677ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
678{
679 link = hc32toh(sc, link);
680 printf("0x%08x", link);
681 if (link & EHCI_LINK_TERMINATE)
682 printf("<T>");
683 else {
684 printf("<");
685 if (type) {
686 switch (EHCI_LINK_TYPE(link)) {
687 case EHCI_LINK_ITD:
688 printf("ITD");
689 break;
690 case EHCI_LINK_QH:
691 printf("QH");
692 break;
693 case EHCI_LINK_SITD:
694 printf("SITD");
695 break;
696 case EHCI_LINK_FSTN:
697 printf("FSTN");
698 break;
699 }
700 }
701 printf(">");
702 }
703}
704
705static void
706ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
707{
708 uint32_t s;
709
710 printf(" next=");
711 ehci_dump_link(sc, qtd->qtd_next, 0);
712 printf(" altnext=");
713 ehci_dump_link(sc, qtd->qtd_altnext, 0);
714 printf("\n");
715 s = hc32toh(sc, qtd->qtd_status);
716 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
717 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
718 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
719 printf(" cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
720 EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
721 (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
722 (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
723 (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
724 (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
725 (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
726 (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
727 (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
728 (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
729
730 for (s = 0; s < 5; s++) {
731 printf(" buffer[%d]=0x%08x\n", s,
732 hc32toh(sc, qtd->qtd_buffer[s]));
733 }
734 for (s = 0; s < 5; s++) {
735 printf(" buffer_hi[%d]=0x%08x\n", s,
736 hc32toh(sc, qtd->qtd_buffer_hi[s]));
737 }
738}
739
740static uint8_t
741ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
742{
743 uint8_t temp;
744
745 usb_pc_cpu_invalidate(sqtd->page_cache);
746 printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
747 ehci_dump_qtd(sc, sqtd);
748 temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
749 return (temp);
750}
751
752static void
753ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
754{
755 uint16_t i;
756 uint8_t stop;
757
758 stop = 0;
759 for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
760 stop = ehci_dump_sqtd(sc, sqtd);
761 }
762 if (sqtd) {
763 printf("dump aborted, too many TDs\n");
764 }
765}
766
767static void
768ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
769{
770 uint32_t endp;
771 uint32_t endphub;
772
773 usb_pc_cpu_invalidate(qh->page_cache);
774 printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
775 printf(" link=");
776 ehci_dump_link(sc, qh->qh_link, 1);
777 printf("\n");
778 endp = hc32toh(sc, qh->qh_endp);
779 printf(" endp=0x%08x\n", endp);
780 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
781 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
782 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
783 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
784 printf(" mpl=0x%x ctl=%d nrl=%d\n",
785 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
786 EHCI_QH_GET_NRL(endp));
787 endphub = hc32toh(sc, qh->qh_endphub);
788 printf(" endphub=0x%08x\n", endphub);
789 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
790 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
791 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
792 EHCI_QH_GET_MULT(endphub));
793 printf(" curqtd=");
794 ehci_dump_link(sc, qh->qh_curqtd, 0);
795 printf("\n");
796 printf("Overlay qTD:\n");
797 ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
798}
799
800static void
801ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
802{
803 usb_pc_cpu_invalidate(sitd->page_cache);
804 printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
805 printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
806 printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
807 hc32toh(sc, sitd->sitd_portaddr),
808 (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
809 ? "in" : "out",
810 EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
811 EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
812 EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
813 EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
814 printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
815 printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
816 (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
817 EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
818 printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
819 hc32toh(sc, sitd->sitd_back),
820 hc32toh(sc, sitd->sitd_bp[0]),
821 hc32toh(sc, sitd->sitd_bp[1]),
822 hc32toh(sc, sitd->sitd_bp_hi[0]),
823 hc32toh(sc, sitd->sitd_bp_hi[1]));
824}
825
826static void
827ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
828{
829 usb_pc_cpu_invalidate(itd->page_cache);
830 printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
831 printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
832 printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
833 (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
834 printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
835 (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
836 printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
837 (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
838 printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
839 (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
840 printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
841 (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
842 printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
843 (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
844 printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
845 (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
846 printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
847 (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
848 printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
849 printf(" addr=0x%02x; endpt=0x%01x\n",
850 EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
851 EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
852 printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
853 printf(" dir=%s; mpl=0x%02x\n",
854 (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
855 EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
856 printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
857 hc32toh(sc, itd->itd_bp[2]),
858 hc32toh(sc, itd->itd_bp[3]),
859 hc32toh(sc, itd->itd_bp[4]),
860 hc32toh(sc, itd->itd_bp[5]),
861 hc32toh(sc, itd->itd_bp[6]));
862 printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
863 " 0x%08x,0x%08x,0x%08x\n",
864 hc32toh(sc, itd->itd_bp_hi[0]),
865 hc32toh(sc, itd->itd_bp_hi[1]),
866 hc32toh(sc, itd->itd_bp_hi[2]),
867 hc32toh(sc, itd->itd_bp_hi[3]),
868 hc32toh(sc, itd->itd_bp_hi[4]),
869 hc32toh(sc, itd->itd_bp_hi[5]),
870 hc32toh(sc, itd->itd_bp_hi[6]));
871}
872
873static void
874ehci_dump_isoc(ehci_softc_t *sc)
875{
876 ehci_itd_t *itd;
877 ehci_sitd_t *sitd;
878 uint16_t max = 1000;
879 uint16_t pos;
880
881 pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
882 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
883
884 printf("%s: isochronous dump from frame 0x%03x:\n",
885 __FUNCTION__, pos);
886
887 itd = sc->sc_isoc_hs_p_last[pos];
888 sitd = sc->sc_isoc_fs_p_last[pos];
889
890 while (itd && max && max--) {
891 ehci_dump_itd(sc, itd);
892 itd = itd->prev;
893 }
894
895 while (sitd && max && max--) {
896 ehci_dump_sitd(sc, sitd);
897 sitd = sitd->prev;
898 }
899}
900
901#endif
902
903static void
904ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
905{
906 /* check for early completion */
907 if (ehci_check_transfer(xfer)) {
908 return;
909 }
910 /* put transfer on interrupt queue */
911 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
912
913 /* start timeout, if any */
914 if (xfer->timeout != 0) {
915 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
916 }
917}
918
919#define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
920static ehci_sitd_t *
921_ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
922{
923 DPRINTFN(11, "%p to %p\n", std, last);
924
925 /* (sc->sc_bus.mtx) must be locked */
926
927 std->next = last->next;
928 std->sitd_next = last->sitd_next;
929
930 std->prev = last;
931
932 usb_pc_cpu_flush(std->page_cache);
933
934 /*
935 * the last->next->prev is never followed: std->next->prev = std;
936 */
937 last->next = std;
938 last->sitd_next = std->sitd_self;
939
940 usb_pc_cpu_flush(last->page_cache);
941
942 return (std);
943}
944
945#define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
946static ehci_itd_t *
947_ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
948{
949 DPRINTFN(11, "%p to %p\n", std, last);
950
951 /* (sc->sc_bus.mtx) must be locked */
952
953 std->next = last->next;
954 std->itd_next = last->itd_next;
955
956 std->prev = last;
957
958 usb_pc_cpu_flush(std->page_cache);
959
960 /*
961 * the last->next->prev is never followed: std->next->prev = std;
962 */
963 last->next = std;
964 last->itd_next = std->itd_self;
965
966 usb_pc_cpu_flush(last->page_cache);
967
968 return (std);
969}
970
971#define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
972static ehci_qh_t *
973_ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
974{
975 DPRINTFN(11, "%p to %p\n", sqh, last);
976
977 if (sqh->prev != NULL) {
978 /* should not happen */
979 DPRINTFN(0, "QH already linked!\n");
980 return (last);
981 }
982 /* (sc->sc_bus.mtx) must be locked */
983
984 sqh->next = last->next;
985 sqh->qh_link = last->qh_link;
986
987 sqh->prev = last;
988
989 usb_pc_cpu_flush(sqh->page_cache);
990
991 /*
992 * the last->next->prev is never followed: sqh->next->prev = sqh;
993 */
994
995 last->next = sqh;
996 last->qh_link = sqh->qh_self;
997
998 usb_pc_cpu_flush(last->page_cache);
999
1000 return (sqh);
1001}
1002
1003#define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1004static ehci_sitd_t *
1005_ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1006{
1007 DPRINTFN(11, "%p from %p\n", std, last);
1008
1009 /* (sc->sc_bus.mtx) must be locked */
1010
1011 std->prev->next = std->next;
1012 std->prev->sitd_next = std->sitd_next;
1013
1014 usb_pc_cpu_flush(std->prev->page_cache);
1015
1016 if (std->next) {
1017 std->next->prev = std->prev;
1018 usb_pc_cpu_flush(std->next->page_cache);
1019 }
1020 return ((last == std) ? std->prev : last);
1021}
1022
1023#define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1024static ehci_itd_t *
1025_ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1026{
1027 DPRINTFN(11, "%p from %p\n", std, last);
1028
1029 /* (sc->sc_bus.mtx) must be locked */
1030
1031 std->prev->next = std->next;
1032 std->prev->itd_next = std->itd_next;
1033
1034 usb_pc_cpu_flush(std->prev->page_cache);
1035
1036 if (std->next) {
1037 std->next->prev = std->prev;
1038 usb_pc_cpu_flush(std->next->page_cache);
1039 }
1040 return ((last == std) ? std->prev : last);
1041}
1042
1043#define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1044static ehci_qh_t *
1045_ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1046{
1047 DPRINTFN(11, "%p from %p\n", sqh, last);
1048
1049 /* (sc->sc_bus.mtx) must be locked */
1050
1051 /* only remove if not removed from a queue */
1052 if (sqh->prev) {
1053 sqh->prev->next = sqh->next;
1054 sqh->prev->qh_link = sqh->qh_link;
1055
1056 usb_pc_cpu_flush(sqh->prev->page_cache);
1057
1058 if (sqh->next) {
1059 sqh->next->prev = sqh->prev;
1060 usb_pc_cpu_flush(sqh->next->page_cache);
1061 }
1062 last = ((last == sqh) ? sqh->prev : last);
1063
1064 sqh->prev = 0;
1065
1066 usb_pc_cpu_flush(sqh->page_cache);
1067 }
1068 return (last);
1069}
1070
1071static void
1072ehci_data_toggle_update(struct usb_xfer *xfer, uint16_t actlen, uint16_t xlen)
1073{
1074 uint16_t rem;
1075 uint8_t dt;
1076
1077 /* count number of full packets */
1078 dt = (actlen / xfer->max_packet_size) & 1;
1079
1080 /* compute remainder */
1081 rem = actlen % xfer->max_packet_size;
1082
1083 if (rem > 0)
1084 dt ^= 1; /* short packet at the end */
1085 else if (actlen != xlen)
1086 dt ^= 1; /* zero length packet at the end */
1087 else if (xlen == 0)
1088 dt ^= 1; /* zero length transfer */
1089
1090 xfer->endpoint->toggle_next ^= dt;
1091}
1092
1093static usb_error_t
1094ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1095{
1096 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1097 ehci_qtd_t *td;
1098 ehci_qtd_t *td_alt_next;
1099 uint32_t status;
1100 uint16_t len;
1101
1102 td = xfer->td_transfer_cache;
1103 td_alt_next = td->alt_next;
1104
1105 if (xfer->aframes != xfer->nframes) {
1106 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1107 }
1108 while (1) {
1109 usb_pc_cpu_invalidate(td->page_cache);
1110 status = hc32toh(sc, td->qtd_status);
1111
1112 len = EHCI_QTD_GET_BYTES(status);
1113
1114 /*
1115 * Verify the status length and
1116 * add the length to "frlengths[]":
1117 */
1118 if (len > td->len) {
1119 /* should not happen */
1120 DPRINTF("Invalid status length, "
1121 "0x%04x/0x%04x bytes\n", len, td->len);
1122 status |= EHCI_QTD_HALTED;
1123 } else if (xfer->aframes != xfer->nframes) {
1124 xfer->frlengths[xfer->aframes] += td->len - len;
1125 /* manually update data toggle */
1126 ehci_data_toggle_update(xfer, td->len - len, td->len);
1127 }
1128
1129 /* Check for last transfer */
1130 if (((void *)td) == xfer->td_transfer_last) {
1131 td = NULL;
1132 break;
1133 }
1134 /* Check for transfer error */
1135 if (status & EHCI_QTD_HALTED) {
1136 /* the transfer is finished */
1137 td = NULL;
1138 break;
1139 }
1140 /* Check for short transfer */
1141 if (len > 0) {
1142 if (xfer->flags_int.short_frames_ok) {
1143 /* follow alt next */
1144 td = td->alt_next;
1145 } else {
1146 /* the transfer is finished */
1147 td = NULL;
1148 }
1149 break;
1150 }
1151 td = td->obj_next;
1152
1153 if (td->alt_next != td_alt_next) {
1154 /* this USB frame is complete */
1155 break;
1156 }
1157 }
1158
1159 /* update transfer cache */
1160
1161 xfer->td_transfer_cache = td;
1162
1163#ifdef USB_DEBUG
1164 if (status & EHCI_QTD_STATERRS) {
1165 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1166 "status=%s%s%s%s%s%s%s%s\n",
1167 xfer->address, xfer->endpointno, xfer->aframes,
1168 (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1169 (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1170 (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1171 (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1172 (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1173 (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1174 (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1175 (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1176 }
1177#endif
1178 if (status & EHCI_QTD_HALTED) {
1179 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1180 (xfer->xroot->udev->address != 0)) {
1181 /* try to separate I/O errors from STALL */
1182 if (EHCI_QTD_GET_CERR(status) == 0)
1183 return (USB_ERR_IOERROR);
1184 }
1185 return (USB_ERR_STALLED);
1186 }
1187 return (USB_ERR_NORMAL_COMPLETION);
1188}
1189
1190static void
1191ehci_non_isoc_done(struct usb_xfer *xfer)
1192{
1193 ehci_qh_t *qh;
1194 usb_error_t err = 0;
1195
1196 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1197 xfer, xfer->endpoint);
1198
1199#ifdef USB_DEBUG
1200 if (ehcidebug > 10) {
1201 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1202
1203 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1204 }
1205#endif
1206
1207 /* extract data toggle directly from the QH's overlay area */
1208
1209 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1210
1211 usb_pc_cpu_invalidate(qh->page_cache);
1212
1213 /* reset scanner */
1214
1215 xfer->td_transfer_cache = xfer->td_transfer_first;
1216
1217 if (xfer->flags_int.control_xfr) {
1218 if (xfer->flags_int.control_hdr) {
1219 err = ehci_non_isoc_done_sub(xfer);
1220 }
1221 xfer->aframes = 1;
1222
1223 if (xfer->td_transfer_cache == NULL) {
1224 goto done;
1225 }
1226 }
1227 while (xfer->aframes != xfer->nframes) {
1228 err = ehci_non_isoc_done_sub(xfer);
1229 xfer->aframes++;
1230
1231 if (xfer->td_transfer_cache == NULL) {
1232 goto done;
1233 }
1234 }
1235
1236 if (xfer->flags_int.control_xfr &&
1237 !xfer->flags_int.control_act) {
1238 err = ehci_non_isoc_done_sub(xfer);
1239 }
1240done:
1241 ehci_device_done(xfer, err);
1242}
1243
1244/*------------------------------------------------------------------------*
1245 * ehci_check_transfer
1246 *
1247 * Return values:
1248 * 0: USB transfer is not finished
1249 * Else: USB transfer is finished
1250 *------------------------------------------------------------------------*/
1251static uint8_t
1252ehci_check_transfer(struct usb_xfer *xfer)
1253{
1254 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1255 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1256
1257 uint32_t status;
1258
1259 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1260
1261 if (methods == &ehci_device_isoc_fs_methods) {
1262 ehci_sitd_t *td;
1263
1264 /* isochronous full speed transfer */
1265
1266 td = xfer->td_transfer_last;
1267 usb_pc_cpu_invalidate(td->page_cache);
1268 status = hc32toh(sc, td->sitd_status);
1269
1270 /* also check if first is complete */
1271
1272 td = xfer->td_transfer_first;
1273 usb_pc_cpu_invalidate(td->page_cache);
1274 status |= hc32toh(sc, td->sitd_status);
1275
1276 if (!(status & EHCI_SITD_ACTIVE)) {
1277 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1278 goto transferred;
1279 }
1280 } else if (methods == &ehci_device_isoc_hs_methods) {
1281 ehci_itd_t *td;
1282
1283 /* isochronous high speed transfer */
1284
1285 /* check last transfer */
1286 td = xfer->td_transfer_last;
1287 usb_pc_cpu_invalidate(td->page_cache);
1288 status = td->itd_status[0];
1289 status |= td->itd_status[1];
1290 status |= td->itd_status[2];
1291 status |= td->itd_status[3];
1292 status |= td->itd_status[4];
1293 status |= td->itd_status[5];
1294 status |= td->itd_status[6];
1295 status |= td->itd_status[7];
1296
1297 /* also check first transfer */
1298 td = xfer->td_transfer_first;
1299 usb_pc_cpu_invalidate(td->page_cache);
1300 status |= td->itd_status[0];
1301 status |= td->itd_status[1];
1302 status |= td->itd_status[2];
1303 status |= td->itd_status[3];
1304 status |= td->itd_status[4];
1305 status |= td->itd_status[5];
1306 status |= td->itd_status[6];
1307 status |= td->itd_status[7];
1308
1309 /* if no transactions are active we continue */
1310 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1311 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1312 goto transferred;
1313 }
1314 } else {
1315 ehci_qtd_t *td;
1316 ehci_qh_t *qh;
1317
1318 /* non-isochronous transfer */
1319
1320 /*
1321 * check whether there is an error somewhere in the middle,
1322 * or whether there was a short packet (SPD and not ACTIVE)
1323 */
1324 td = xfer->td_transfer_cache;
1325
1326 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1327
1328 usb_pc_cpu_invalidate(qh->page_cache);
1329
1330 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1331 if (status & EHCI_QTD_ACTIVE) {
1332 /* transfer is pending */
1333 goto done;
1334 }
1335
1336 while (1) {
1337 usb_pc_cpu_invalidate(td->page_cache);
1338 status = hc32toh(sc, td->qtd_status);
1339
1340 /*
1341 * Check if there is an active TD which
1342 * indicates that the transfer isn't done.
1343 */
1344 if (status & EHCI_QTD_ACTIVE) {
1345 /* update cache */
1346 xfer->td_transfer_cache = td;
1347 goto done;
1348 }
1349 /*
1350 * last transfer descriptor makes the transfer done
1351 */
1352 if (((void *)td) == xfer->td_transfer_last) {
1353 break;
1354 }
1355 /*
1356 * any kind of error makes the transfer done
1357 */
1358 if (status & EHCI_QTD_HALTED) {
1359 break;
1360 }
1361 /*
1362 * if there is no alternate next transfer, a short
1363 * packet also makes the transfer done
1364 */
1365 if (EHCI_QTD_GET_BYTES(status)) {
1366 if (xfer->flags_int.short_frames_ok) {
1367 /* follow alt next */
1368 if (td->alt_next) {
1369 td = td->alt_next;
1370 continue;
1371 }
1372 }
1373 /* transfer is done */
1374 break;
1375 }
1376 td = td->obj_next;
1377 }
1378 ehci_non_isoc_done(xfer);
1379 goto transferred;
1380 }
1381
1382done:
1383 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1384 return (0);
1385
1386transferred:
1387 return (1);
1388}
1389
1390static void
1391ehci_pcd_enable(ehci_softc_t *sc)
1392{
1393 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1394
1395 sc->sc_eintrs |= EHCI_STS_PCD;
1396 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1397
1398 /* acknowledge any PCD interrupt */
1399 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1400
1401 ehci_root_intr(sc);
1402}
1403
1404static void
1405ehci_interrupt_poll(ehci_softc_t *sc)
1406{
1407 struct usb_xfer *xfer;
1408
1409repeat:
1410 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1411 /*
1412 * check if transfer is transferred
1413 */
1414 if (ehci_check_transfer(xfer)) {
1415 /* queue has been modified */
1416 goto repeat;
1417 }
1418 }
1419}
1420
1421/*
1422 * Some EHCI chips from VIA / ATI seem to trigger interrupts before
1423 * writing back the qTD status, or miss signalling occasionally under
1424 * heavy load. If the host machine is too fast, we can miss
1425 * transaction completion - when we scan the active list the
1426 * transaction still seems to be active. This generally exhibits
1427 * itself as a umass stall that never recovers.
1428 *
1429 * We work around this behaviour by setting up this callback after any
1430 * softintr that completes with transactions still pending, giving us
1431 * another chance to check for completion after the writeback has
1432 * taken place.
1433 */
1434static void
1435ehci_poll_timeout(void *arg)
1436{
1437 ehci_softc_t *sc = arg;
1438
1439 DPRINTFN(3, "\n");
1440 ehci_interrupt_poll(sc);
1441}
1442
1443/*------------------------------------------------------------------------*
1444 * ehci_interrupt - EHCI interrupt handler
1445 *
1446 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1447 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1448 * is present !
1449 *------------------------------------------------------------------------*/
1450void
1451ehci_interrupt(ehci_softc_t *sc)
1452{
1453 uint32_t status;
1454
1455 USB_BUS_LOCK(&sc->sc_bus);
1456
1457 DPRINTFN(16, "real interrupt\n");
1458
1459#ifdef USB_DEBUG
1460 if (ehcidebug > 15) {
1461 ehci_dump_regs(sc);
1462 }
1463#endif
1464
1465 status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1466 if (status == 0) {
1467 /* the interrupt was not for us */
1468 goto done;
1469 }
1470 if (!(status & sc->sc_eintrs)) {
1471 goto done;
1472 }
1473 EOWRITE4(sc, EHCI_USBSTS, status); /* acknowledge */
1474
1475 status &= sc->sc_eintrs;
1476
1477 if (status & EHCI_STS_HSE) {
1478 printf("%s: unrecoverable error, "
1479 "controller halted\n", __FUNCTION__);
1480#ifdef USB_DEBUG
1481 ehci_dump_regs(sc);
1482 ehci_dump_isoc(sc);
1483#endif
1484 }
1485 if (status & EHCI_STS_PCD) {
1486 /*
1487 * Disable PCD interrupt for now, because it will be
1488 * on until the port has been reset.
1489 */
1490 sc->sc_eintrs &= ~EHCI_STS_PCD;
1491 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1492
1493 ehci_root_intr(sc);
1494
1495 /* do not allow RHSC interrupts > 1 per second */
1496 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1497 (void *)&ehci_pcd_enable, sc);
1498 }
1499 status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1500
1501 if (status != 0) {
1502 /* block unprocessed interrupts */
1503 sc->sc_eintrs &= ~status;
1504 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1505 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1506 }
1507 /* poll all the USB transfers */
1508 ehci_interrupt_poll(sc);
1509
1510 if (sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) {
1511 usb_callout_reset(&sc->sc_tmo_poll, hz / 128,
1512 (void *)&ehci_poll_timeout, sc);
1513 }
1514
1515done:
1516 USB_BUS_UNLOCK(&sc->sc_bus);
1517}
1518
1519/*
1520 * called when a request does not complete
1521 */
1522static void
1523ehci_timeout(void *arg)
1524{
1525 struct usb_xfer *xfer = arg;
1526
1527 DPRINTF("xfer=%p\n", xfer);
1528
1529 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1530
1531 /* transfer is transferred */
1532 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1533}
1534
1535static void
1536ehci_do_poll(struct usb_bus *bus)
1537{
1538 ehci_softc_t *sc = EHCI_BUS2SC(bus);
1539
1540 USB_BUS_LOCK(&sc->sc_bus);
1541 ehci_interrupt_poll(sc);
1542 USB_BUS_UNLOCK(&sc->sc_bus);
1543}
1544
1545static void
1546ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1547{
1548 struct usb_page_search buf_res;
1549 ehci_qtd_t *td;
1550 ehci_qtd_t *td_next;
1551 ehci_qtd_t *td_alt_next;
1552 uint32_t buf_offset;
1553 uint32_t average;
1554 uint32_t len_old;
1555 uint32_t terminate;
1556 uint32_t qtd_altnext;
1557 uint8_t shortpkt_old;
1558 uint8_t precompute;
1559
1560 terminate = temp->sc->sc_terminate_self;
1561 qtd_altnext = temp->sc->sc_terminate_self;
1562 td_alt_next = NULL;
1563 buf_offset = 0;
1564 shortpkt_old = temp->shortpkt;
1565 len_old = temp->len;
1566 precompute = 1;
1567
1568restart:
1569
1570 td = temp->td;
1571 td_next = temp->td_next;
1572
1573 while (1) {
1574 if (temp->len == 0) {
1575 if (temp->shortpkt) {
1576 break;
1577 }
1578 /* send a Zero Length Packet, ZLP, last */
1579
1580 temp->shortpkt = 1;
1581 average = 0;
1582
1583 } else {
1584 average = temp->average;
1585
1586 if (temp->len < average) {
1587 if (temp->len % temp->max_frame_size) {
1588 temp->shortpkt = 1;
1589 }
1590 average = temp->len;
1591 }
1592 }
1593
1594 if (td_next == NULL) {
1595 panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1596 }
1597 /* get next TD */
1598
1599 td = td_next;
1600 td_next = td->obj_next;
1601
1602 /* check if we are pre-computing */
1603
1604 if (precompute) {
1605 /* update remaining length */
1606
1607 temp->len -= average;
1608
1609 continue;
1610 }
1611 /* fill out current TD */
1612
1613 td->qtd_status =
1614 temp->qtd_status |
1615 htohc32(temp->sc, EHCI_QTD_IOC |
1616 EHCI_QTD_SET_BYTES(average));
1617
1618 if (average == 0) {
1619 if (temp->auto_data_toggle == 0) {
1620 /* update data toggle, ZLP case */
1621
1622 temp->qtd_status ^=
1623 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1624 }
1625 td->len = 0;
1626
1627 /* properly reset reserved fields */
1628 td->qtd_buffer[0] = 0;
1629 td->qtd_buffer[1] = 0;
1630 td->qtd_buffer[2] = 0;
1631 td->qtd_buffer[3] = 0;
1632 td->qtd_buffer[4] = 0;
1633 td->qtd_buffer_hi[0] = 0;
1634 td->qtd_buffer_hi[1] = 0;
1635 td->qtd_buffer_hi[2] = 0;
1636 td->qtd_buffer_hi[3] = 0;
1637 td->qtd_buffer_hi[4] = 0;
1638 } else {
1639 uint8_t x;
1640
1641 if (temp->auto_data_toggle == 0) {
1642 /* update data toggle */
1643
1644 if (howmany(average, temp->max_frame_size) & 1) {
1645 temp->qtd_status ^=
1646 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1647 }
1648 }
1649 td->len = average;
1650
1651 /* update remaining length */
1652
1653 temp->len -= average;
1654
1655 /* fill out buffer pointers */
1656
1657 usbd_get_page(temp->pc, buf_offset, &buf_res);
1658 td->qtd_buffer[0] =
1659 htohc32(temp->sc, buf_res.physaddr);
1660 td->qtd_buffer_hi[0] = 0;
1661
1662 x = 1;
1663
1664 while (average > EHCI_PAGE_SIZE) {
1665 average -= EHCI_PAGE_SIZE;
1666 buf_offset += EHCI_PAGE_SIZE;
1667 usbd_get_page(temp->pc, buf_offset, &buf_res);
1668 td->qtd_buffer[x] =
1669 htohc32(temp->sc,
1670 buf_res.physaddr & (~0xFFF));
1671 td->qtd_buffer_hi[x] = 0;
1672 x++;
1673 }
1674
1675 /*
1676 * NOTE: The "average" variable is never zero after
1677 * exiting the loop above !
1678 *
1679 * NOTE: We have to subtract one from the offset to
1680 * ensure that we are computing the physical address
1681 * of a valid page !
1682 */
1683 buf_offset += average;
1684 usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1685 td->qtd_buffer[x] =
1686 htohc32(temp->sc,
1687 buf_res.physaddr & (~0xFFF));
1688 td->qtd_buffer_hi[x] = 0;
1689
1690 /* properly reset reserved fields */
1691 while (++x < EHCI_QTD_NBUFFERS) {
1692 td->qtd_buffer[x] = 0;
1693 td->qtd_buffer_hi[x] = 0;
1694 }
1695 }
1696
1697 if (td_next) {
1698 /* link the current TD with the next one */
1699 td->qtd_next = td_next->qtd_self;
1700 }
1701 td->qtd_altnext = qtd_altnext;
1702 td->alt_next = td_alt_next;
1703
1704 usb_pc_cpu_flush(td->page_cache);
1705 }
1706
1707 if (precompute) {
1708 precompute = 0;
1709
1710 /* setup alt next pointer, if any */
1711 if (temp->last_frame) {
1712 td_alt_next = NULL;
1713 qtd_altnext = terminate;
1714 } else {
1715 /* we use this field internally */
1716 td_alt_next = td_next;
1717 if (temp->setup_alt_next) {
1718 qtd_altnext = td_next->qtd_self;
1719 } else {
1720 qtd_altnext = terminate;
1721 }
1722 }
1723
1724 /* restore */
1725 temp->shortpkt = shortpkt_old;
1726 temp->len = len_old;
1727 goto restart;
1728 }
1729 temp->td = td;
1730 temp->td_next = td_next;
1731}
1732
1733static void
1734ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1735{
1736 struct ehci_std_temp temp;
1737 const struct usb_pipe_methods *methods;
1738 ehci_qh_t *qh;
1739 ehci_qtd_t *td;
1740 uint32_t qh_endp;
1741 uint32_t qh_endphub;
1742 uint32_t x;
1743
1744 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1745 xfer->address, UE_GET_ADDR(xfer->endpointno),
1746 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1747
1748 temp.average = xfer->max_hc_frame_size;
1749 temp.max_frame_size = xfer->max_frame_size;
1750 temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1751
1752 /* toggle the DMA set we are using */
1753 xfer->flags_int.curr_dma_set ^= 1;
1754
1755 /* get next DMA set */
1756 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1757
1758 xfer->td_transfer_first = td;
1759 xfer->td_transfer_cache = td;
1760
1761 temp.td = NULL;
1762 temp.td_next = td;
1763 temp.qtd_status = 0;
1764 temp.last_frame = 0;
1765 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1766
1767 if (xfer->flags_int.control_xfr) {
1768 if (xfer->endpoint->toggle_next) {
1769 /* DATA1 is next */
1770 temp.qtd_status |=
1771 htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1772 }
1773 temp.auto_data_toggle = 0;
1774 } else {
1775 temp.auto_data_toggle = 1;
1776 }
1777
1778 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1779 (xfer->xroot->udev->address != 0)) {
1780 /* max 3 retries */
1781 temp.qtd_status |=
1782 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1783 }
1784 /* check if we should prepend a setup message */
1785
1786 if (xfer->flags_int.control_xfr) {
1787 if (xfer->flags_int.control_hdr) {
1788 xfer->endpoint->toggle_next = 0;
1789
1790 temp.qtd_status &=
1791 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1792 temp.qtd_status |= htohc32(temp.sc,
1793 EHCI_QTD_ACTIVE |
1794 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1795 EHCI_QTD_SET_TOGGLE(0));
1796
1797 temp.len = xfer->frlengths[0];
1798 temp.pc = xfer->frbuffers + 0;
1799 temp.shortpkt = temp.len ? 1 : 0;
1800 /* check for last frame */
1801 if (xfer->nframes == 1) {
1802 /* no STATUS stage yet, SETUP is last */
1803 if (xfer->flags_int.control_act) {
1804 temp.last_frame = 1;
1805 temp.setup_alt_next = 0;
1806 }
1807 }
1808 ehci_setup_standard_chain_sub(&temp);
1809 }
1810 x = 1;
1811 } else {
1812 x = 0;
1813 }
1814
1815 while (x != xfer->nframes) {
1816 /* DATA0 / DATA1 message */
1817
1818 temp.len = xfer->frlengths[x];
1819 temp.pc = xfer->frbuffers + x;
1820
1821 x++;
1822
1823 if (x == xfer->nframes) {
1824 if (xfer->flags_int.control_xfr) {
1825 /* no STATUS stage yet, DATA is last */
1826 if (xfer->flags_int.control_act) {
1827 temp.last_frame = 1;
1828 temp.setup_alt_next = 0;
1829 }
1830 } else {
1831 temp.last_frame = 1;
1832 temp.setup_alt_next = 0;
1833 }
1834 }
1835 /* keep previous data toggle and error count */
1836
1837 temp.qtd_status &=
1838 htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1839 EHCI_QTD_SET_TOGGLE(1));
1840
1841 if (temp.len == 0) {
1842 /* make sure that we send an USB packet */
1843
1844 temp.shortpkt = 0;
1845
1846 } else {
1847 /* regular data transfer */
1848
1849 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1850 }
1851
1852 /* set endpoint direction */
1853
1854 temp.qtd_status |=
1855 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1856 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1857 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1858 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1859 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1860
1861 ehci_setup_standard_chain_sub(&temp);
1862 }
1863
1864 /* check if we should append a status stage */
1865
1866 if (xfer->flags_int.control_xfr &&
1867 !xfer->flags_int.control_act) {
1868 /*
1869 * Send a DATA1 message and invert the current endpoint
1870 * direction.
1871 */
1872
1873 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1874 EHCI_QTD_SET_TOGGLE(1));
1875 temp.qtd_status |=
1876 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1877 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1878 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1879 EHCI_QTD_SET_TOGGLE(1)) :
1880 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1881 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1882 EHCI_QTD_SET_TOGGLE(1));
1883
1884 temp.len = 0;
1885 temp.pc = NULL;
1886 temp.shortpkt = 0;
1887 temp.last_frame = 1;
1888 temp.setup_alt_next = 0;
1889
1890 ehci_setup_standard_chain_sub(&temp);
1891 }
1892 td = temp.td;
1893
1894 /* the last TD terminates the transfer: */
1895 td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1896 td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1897
1898 usb_pc_cpu_flush(td->page_cache);
1899
1900 /* must have at least one frame! */
1901
1902 xfer->td_transfer_last = td;
1903
1904#ifdef USB_DEBUG
1905 if (ehcidebug > 8) {
1906 DPRINTF("nexttog=%d; data before transfer:\n",
1907 xfer->endpoint->toggle_next);
1908 ehci_dump_sqtds(temp.sc,
1909 xfer->td_transfer_first);
1910 }
1911#endif
1912
1913 methods = xfer->endpoint->methods;
1914
1915 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1916
1917 /* the "qh_link" field is filled when the QH is added */
1918
1919 qh_endp =
1920 (EHCI_QH_SET_ADDR(xfer->address) |
1921 EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1922 EHCI_QH_SET_MPL(xfer->max_packet_size));
1923
1924 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1925 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
1926 if (methods != &ehci_device_intr_methods)
1927 qh_endp |= EHCI_QH_SET_NRL(8);
1928 } else {
1929 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1930 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
1931 } else {
1932 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
1933 }
1934
1935 if (methods == &ehci_device_ctrl_methods) {
1936 qh_endp |= EHCI_QH_CTL;
1937 }
1938 if (methods != &ehci_device_intr_methods) {
1939 /* Only try one time per microframe! */
1940 qh_endp |= EHCI_QH_SET_NRL(1);
1941 }
1942 }
1943
1944 if (temp.auto_data_toggle == 0) {
1945 /* software computes the data toggle */
1946 qh_endp |= EHCI_QH_DTC;
1947 }
1948
1949 qh->qh_endp = htohc32(temp.sc, qh_endp);
1950
1951 qh_endphub =
1952 (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1953 EHCI_QH_SET_CMASK(xfer->endpoint->usb_cmask) |
1954 EHCI_QH_SET_SMASK(xfer->endpoint->usb_smask) |
1955 EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1956 EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1957
1958 qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1959 qh->qh_curqtd = 0;
1960
1961 /* fill the overlay qTD */
1962
1963 if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
1964 /* DATA1 is next */
1965 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1966 } else {
1967 qh->qh_qtd.qtd_status = 0;
1968 }
1969
1970 td = xfer->td_transfer_first;
1971
1972 qh->qh_qtd.qtd_next = td->qtd_self;
1973 qh->qh_qtd.qtd_altnext =
1974 htohc32(temp.sc, EHCI_LINK_TERMINATE);
1975
1976 /* properly reset reserved fields */
1977 qh->qh_qtd.qtd_buffer[0] = 0;
1978 qh->qh_qtd.qtd_buffer[1] = 0;
1979 qh->qh_qtd.qtd_buffer[2] = 0;
1980 qh->qh_qtd.qtd_buffer[3] = 0;
1981 qh->qh_qtd.qtd_buffer[4] = 0;
1982 qh->qh_qtd.qtd_buffer_hi[0] = 0;
1983 qh->qh_qtd.qtd_buffer_hi[1] = 0;
1984 qh->qh_qtd.qtd_buffer_hi[2] = 0;
1985 qh->qh_qtd.qtd_buffer_hi[3] = 0;
1986 qh->qh_qtd.qtd_buffer_hi[4] = 0;
1987
1988 usb_pc_cpu_flush(qh->page_cache);
1989
1990 if (xfer->xroot->udev->flags.self_suspended == 0) {
1991 EHCI_APPEND_QH(qh, *qh_last);
1992 }
1993}
1994
1995static void
1996ehci_root_intr(ehci_softc_t *sc)
1997{
1998 uint16_t i;
1999 uint16_t m;
2000
2001 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2002
2003 /* clear any old interrupt data */
2004 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2005
2006 /* set bits */
2007 m = (sc->sc_noport + 1);
2008 if (m > (8 * sizeof(sc->sc_hub_idata))) {
2009 m = (8 * sizeof(sc->sc_hub_idata));
2010 }
2011 for (i = 1; i < m; i++) {
2012 /* pick out CHANGE bits from the status register */
2013 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2014 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2015 DPRINTF("port %d changed\n", i);
2016 }
2017 }
2018 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2019 sizeof(sc->sc_hub_idata));
2020}
2021
2022static void
2023ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2024{
2025 uint32_t nframes = xfer->nframes;
2026 uint32_t status;
2027 uint32_t *plen = xfer->frlengths;
2028 uint16_t len = 0;
2029 ehci_sitd_t *td = xfer->td_transfer_first;
2030 ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2031
2032 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2033 xfer, xfer->endpoint);
2034
2035 while (nframes--) {
2036 if (td == NULL) {
2037 panic("%s:%d: out of TD's\n",
2038 __FUNCTION__, __LINE__);
2039 }
2040 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2041 pp_last = &sc->sc_isoc_fs_p_last[0];
2042 }
2043#ifdef USB_DEBUG
2044 if (ehcidebug > 15) {
2045 DPRINTF("isoc FS-TD\n");
2046 ehci_dump_sitd(sc, td);
2047 }
2048#endif
2049 usb_pc_cpu_invalidate(td->page_cache);
2050 status = hc32toh(sc, td->sitd_status);
2051
2052 len = EHCI_SITD_GET_LEN(status);
2053
2054 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2055
2056 if (*plen >= len) {
2057 len = *plen - len;
2058 } else {
2059 len = 0;
2060 }
2061
2062 *plen = len;
2063
2064 /* remove FS-TD from schedule */
2065 EHCI_REMOVE_FS_TD(td, *pp_last);
2066
2067 pp_last++;
2068 plen++;
2069 td = td->obj_next;
2070 }
2071
2072 xfer->aframes = xfer->nframes;
2073}
2074
2075static void
2076ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2077{
2078 uint32_t nframes = xfer->nframes;
2079 uint32_t status;
2080 uint32_t *plen = xfer->frlengths;
2081 uint16_t len = 0;
2082 uint8_t td_no = 0;
2083 ehci_itd_t *td = xfer->td_transfer_first;
2084 ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2085
2086 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2087 xfer, xfer->endpoint);
2088
2089 while (nframes) {
2090 if (td == NULL) {
2091 panic("%s:%d: out of TD's\n",
2092 __FUNCTION__, __LINE__);
2093 }
2094 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2095 pp_last = &sc->sc_isoc_hs_p_last[0];
2096 }
2097#ifdef USB_DEBUG
2098 if (ehcidebug > 15) {
2099 DPRINTF("isoc HS-TD\n");
2100 ehci_dump_itd(sc, td);
2101 }
2102#endif
2103
2104 usb_pc_cpu_invalidate(td->page_cache);
2105 status = hc32toh(sc, td->itd_status[td_no]);
2106
2107 len = EHCI_ITD_GET_LEN(status);
2108
2109 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2110
2111 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2112 if (*plen >= len) {
2113 /*
2114 * The length is valid. NOTE: The
2115 * complete length is written back
2116 * into the status field, and not the
2117 * remainder like with other transfer
2118 * descriptor types.
2119 */
2120 } else {
2121 /* Invalid length - truncate */
2122 len = 0;
2123 }
2124
2125 *plen = len;
2126 plen++;
2127 nframes--;
2128 }
2129
2130 td_no++;
2131
2132 if ((td_no == 8) || (nframes == 0)) {
2133 /* remove HS-TD from schedule */
2134 EHCI_REMOVE_HS_TD(td, *pp_last);
2135 pp_last++;
2136
2137 td_no = 0;
2138 td = td->obj_next;
2139 }
2140 }
2141 xfer->aframes = xfer->nframes;
2142}
2143
2144/* NOTE: "done" can be run two times in a row,
2145 * from close and from interrupt
2146 */
2147static void
2148ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2149{
2150 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
2151 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2152
2153 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2154
2155 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2156 xfer, xfer->endpoint, error);
2157
2158 if ((methods == &ehci_device_bulk_methods) ||
2159 (methods == &ehci_device_ctrl_methods)) {
2160#ifdef USB_DEBUG
2161 if (ehcidebug > 8) {
2162 DPRINTF("nexttog=%d; data after transfer:\n",
2163 xfer->endpoint->toggle_next);
2164 ehci_dump_sqtds(sc,
2165 xfer->td_transfer_first);
2166 }
2167#endif
2168
2169 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2170 sc->sc_async_p_last);
2171 }
2172 if (methods == &ehci_device_intr_methods) {
2173 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2174 sc->sc_intr_p_last[xfer->qh_pos]);
2175 }
2176 /*
2177 * Only finish isochronous transfers once which will update
2178 * "xfer->frlengths".
2179 */
2180 if (xfer->td_transfer_first &&
2181 xfer->td_transfer_last) {
2182 if (methods == &ehci_device_isoc_fs_methods) {
2183 ehci_isoc_fs_done(sc, xfer);
2184 }
2185 if (methods == &ehci_device_isoc_hs_methods) {
2186 ehci_isoc_hs_done(sc, xfer);
2187 }
2188 xfer->td_transfer_first = NULL;
2189 xfer->td_transfer_last = NULL;
2190 }
2191 /* dequeue transfer and start next transfer */
2192 usbd_transfer_done(xfer, error);
2193}
2194
2195/*------------------------------------------------------------------------*
2196 * ehci bulk support
2197 *------------------------------------------------------------------------*/
2198static void
2199ehci_device_bulk_open(struct usb_xfer *xfer)
2200{
2201 return;
2202}
2203
2204static void
2205ehci_device_bulk_close(struct usb_xfer *xfer)
2206{
2207 ehci_device_done(xfer, USB_ERR_CANCELLED);
2208}
2209
2210static void
2211ehci_device_bulk_enter(struct usb_xfer *xfer)
2212{
2213 return;
2214}
2215
2216static void
2217ehci_doorbell_async(struct ehci_softc *sc)
2218{
2219 uint32_t temp;
2220
2221 /*
2222 * XXX Performance quirk: Some Host Controllers have a too low
2223 * interrupt rate. Issue an IAAD to stimulate the Host
2224 * Controller after queueing the BULK transfer.
2225 *
2226 * XXX Force the host controller to refresh any QH caches.
2227 */
2228 temp = EOREAD4(sc, EHCI_USBCMD);
2229 if (!(temp & EHCI_CMD_IAAD))
2230 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2231}
2232
2233static void
2234ehci_device_bulk_start(struct usb_xfer *xfer)
2235{
2236 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2237
2238 /* setup TD's and QH */
2239 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2240
2241 /* put transfer on interrupt queue */
2242 ehci_transfer_intr_enqueue(xfer);
2243
2244 /*
2245 * XXX Certain nVidia chipsets choke when using the IAAD
2246 * feature too frequently.
2247 */
2248 if (sc->sc_flags & EHCI_SCFLG_IAADBUG)
2249 return;
2250
2251 ehci_doorbell_async(sc);
2252}
2253
2254static const struct usb_pipe_methods ehci_device_bulk_methods =
2255{
2256 .open = ehci_device_bulk_open,
2257 .close = ehci_device_bulk_close,
2258 .enter = ehci_device_bulk_enter,
2259 .start = ehci_device_bulk_start,
2260};
2261
2262/*------------------------------------------------------------------------*
2263 * ehci control support
2264 *------------------------------------------------------------------------*/
2265static void
2266ehci_device_ctrl_open(struct usb_xfer *xfer)
2267{
2268 return;
2269}
2270
2271static void
2272ehci_device_ctrl_close(struct usb_xfer *xfer)
2273{
2274 ehci_device_done(xfer, USB_ERR_CANCELLED);
2275}
2276
2277static void
2278ehci_device_ctrl_enter(struct usb_xfer *xfer)
2279{
2280 return;
2281}
2282
2283static void
2284ehci_device_ctrl_start(struct usb_xfer *xfer)
2285{
2286 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2287
2288 /* setup TD's and QH */
2289 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2290
2291 /* put transfer on interrupt queue */
2292 ehci_transfer_intr_enqueue(xfer);
2293}
2294
2295static const struct usb_pipe_methods ehci_device_ctrl_methods =
2296{
2297 .open = ehci_device_ctrl_open,
2298 .close = ehci_device_ctrl_close,
2299 .enter = ehci_device_ctrl_enter,
2300 .start = ehci_device_ctrl_start,
2301};
2302
2303/*------------------------------------------------------------------------*
2304 * ehci interrupt support
2305 *------------------------------------------------------------------------*/
2306static void
2307ehci_device_intr_open(struct usb_xfer *xfer)
2308{
2309 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2310 uint16_t best;
2311 uint16_t bit;
2312 uint16_t x;
2313
2314 usb_hs_bandwidth_alloc(xfer);
2315
2316 /*
2317 * Find the best QH position corresponding to the given interval:
2318 */
2319
2320 best = 0;
2321 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2322 while (bit) {
2323 if (xfer->interval >= bit) {
2324 x = bit;
2325 best = bit;
2326 while (x & bit) {
2327 if (sc->sc_intr_stat[x] <
2328 sc->sc_intr_stat[best]) {
2329 best = x;
2330 }
2331 x++;
2332 }
2333 break;
2334 }
2335 bit >>= 1;
2336 }
2337
2338 sc->sc_intr_stat[best]++;
2339 xfer->qh_pos = best;
2340
2341 DPRINTFN(3, "best=%d interval=%d\n",
2342 best, xfer->interval);
2343}
2344
2345static void
2346ehci_device_intr_close(struct usb_xfer *xfer)
2347{
2348 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2349
2350 sc->sc_intr_stat[xfer->qh_pos]--;
2351
2352 ehci_device_done(xfer, USB_ERR_CANCELLED);
2353
2354 /* bandwidth must be freed after device done */
2355 usb_hs_bandwidth_free(xfer);
2356}
2357
2358static void
2359ehci_device_intr_enter(struct usb_xfer *xfer)
2360{
2361 return;
2362}
2363
2364static void
2365ehci_device_intr_start(struct usb_xfer *xfer)
2366{
2367 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2368
2369 /* setup TD's and QH */
2370 ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2371
2372 /* put transfer on interrupt queue */
2373 ehci_transfer_intr_enqueue(xfer);
2374}
2375
2376static const struct usb_pipe_methods ehci_device_intr_methods =
2377{
2378 .open = ehci_device_intr_open,
2379 .close = ehci_device_intr_close,
2380 .enter = ehci_device_intr_enter,
2381 .start = ehci_device_intr_start,
2382};
2383
2384/*------------------------------------------------------------------------*
2385 * ehci full speed isochronous support
2386 *------------------------------------------------------------------------*/
2387static void
2388ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2389{
2390 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2391 ehci_sitd_t *td;
2392 uint32_t sitd_portaddr;
2393 uint8_t ds;
2394
2395 sitd_portaddr =
2396 EHCI_SITD_SET_ADDR(xfer->address) |
2397 EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2398 EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2399 EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2400
2401 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2402 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2403
2404 sitd_portaddr = htohc32(sc, sitd_portaddr);
2405
2406 /* initialize all TD's */
2407
2408 for (ds = 0; ds != 2; ds++) {
2409 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2410 td->sitd_portaddr = sitd_portaddr;
2411
2412 /*
2413 * TODO: make some kind of automatic
2414 * SMASK/CMASK selection based on micro-frame
2415 * usage
2416 *
2417 * micro-frame usage (8 microframes per 1ms)
2418 */
2419 td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2420
2421 usb_pc_cpu_flush(td->page_cache);
2422 }
2423 }
2424}
2425
2426static void
2427ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2428{
2429 ehci_device_done(xfer, USB_ERR_CANCELLED);
2430}
2431
2432static void
2433ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2434{
2435 struct usb_page_search buf_res;
2436 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2437 ehci_sitd_t *td;
2438 ehci_sitd_t *td_last = NULL;
2439 ehci_sitd_t **pp_last;
2440 uint32_t *plen;
2441 uint32_t buf_offset;
2442 uint32_t nframes;
2443 uint32_t startframe;
2444 uint32_t temp;
2445 uint32_t sitd_mask;
2446 uint16_t tlen;
2447 uint8_t sa;
2448 uint8_t sb;
2449
2450#ifdef USB_DEBUG
2451 uint8_t once = 1;
2452
2453#endif
2454
2455 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2456 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2457
2458 /* get the current frame index */
2459
2460 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2461
2462 if (usbd_xfer_get_isochronous_start_frame(
2463 xfer, nframes, 0, 1, EHCI_VIRTUAL_FRAMELIST_COUNT - 1, &startframe))
2464 DPRINTFN(3, "start next=%d\n", startframe);
2465
2466 /* get the real number of frames */
2467
2468 nframes = xfer->nframes;
2469
2470 buf_offset = 0;
2471
2472 plen = xfer->frlengths;
2473
2474 /* toggle the DMA set we are using */
2475 xfer->flags_int.curr_dma_set ^= 1;
2476
2477 /* get next DMA set */
2478 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2479 xfer->td_transfer_first = td;
2480
2481 pp_last = &sc->sc_isoc_fs_p_last[startframe];
2482
2483 /* store starting position */
2484
2485 xfer->qh_pos = startframe;
2486
2487 while (nframes--) {
2488 if (td == NULL) {
2489 panic("%s:%d: out of TD's\n",
2490 __FUNCTION__, __LINE__);
2491 }
2492 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT])
2493 pp_last = &sc->sc_isoc_fs_p_last[0];
2494
2495 /* reuse sitd_portaddr and sitd_back from last transfer */
2496
2497 if (*plen > xfer->max_frame_size) {
2498#ifdef USB_DEBUG
2499 if (once) {
2500 once = 0;
2501 printf("%s: frame length(%d) exceeds %d "
2502 "bytes (frame truncated)\n",
2503 __FUNCTION__, *plen,
2504 xfer->max_frame_size);
2505 }
2506#endif
2507 *plen = xfer->max_frame_size;
2508 }
2509
2510 /* allocate a slot */
2511
2512 sa = usbd_fs_isoc_schedule_alloc_slot(xfer,
2513 xfer->isoc_time_complete - nframes - 1);
2514
2515 if (sa == 255) {
2516 /*
2517 * Schedule is FULL, set length to zero:
2518 */
2519
2520 *plen = 0;
2521 sa = USB_FS_ISOC_UFRAME_MAX - 1;
2522 }
2523 if (*plen) {
2524 /*
2525 * only call "usbd_get_page()" when we have a
2526 * non-zero length
2527 */
2528 usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2529 td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2530 buf_offset += *plen;
2531 /*
2532 * NOTE: We need to subtract one from the offset so
2533 * that we are on a valid page!
2534 */
2535 usbd_get_page(xfer->frbuffers, buf_offset - 1,
2536 &buf_res);
2537 temp = buf_res.physaddr & ~0xFFF;
2538 } else {
2539 td->sitd_bp[0] = 0;
2540 temp = 0;
2541 }
2542
2543 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2544 tlen = *plen;
2545 if (tlen <= 188) {
2546 temp |= 1; /* T-count = 1, TP = ALL */
2547 tlen = 1;
2548 } else {
2549 tlen += 187;
2550 tlen /= 188;
2551 temp |= tlen; /* T-count = [1..6] */
2552 temp |= 8; /* TP = Begin */
2553 }
2554
2555 tlen += sa;
2556
2557 if (tlen >= 8) {
2558 sb = 0;
2559 } else {
2560 sb = (1 << tlen);
2561 }
2562
2563 sa = (1 << sa);
2564 sa = (sb - sa) & 0x3F;
2565 sb = 0;
2566 } else {
2567 sb = (-(4 << sa)) & 0xFE;
2568 sa = (1 << sa) & 0x3F;
2569 }
2570
2571 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2572 EHCI_SITD_SET_CMASK(sb));
2573
2574 td->sitd_bp[1] = htohc32(sc, temp);
2575
2576 td->sitd_mask = htohc32(sc, sitd_mask);
2577
2578 if (nframes == 0) {
2579 td->sitd_status = htohc32(sc,
2580 EHCI_SITD_IOC |
2581 EHCI_SITD_ACTIVE |
2582 EHCI_SITD_SET_LEN(*plen));
2583 } else {
2584 td->sitd_status = htohc32(sc,
2585 EHCI_SITD_ACTIVE |
2586 EHCI_SITD_SET_LEN(*plen));
2587 }
2588 usb_pc_cpu_flush(td->page_cache);
2589
2590#ifdef USB_DEBUG
2591 if (ehcidebug > 15) {
2592 DPRINTF("FS-TD %d\n", nframes);
2593 ehci_dump_sitd(sc, td);
2594 }
2595#endif
2596 /* insert TD into schedule */
2597 EHCI_APPEND_FS_TD(td, *pp_last);
2598 pp_last++;
2599
2600 plen++;
2601 td_last = td;
2602 td = td->obj_next;
2603 }
2604
2605 xfer->td_transfer_last = td_last;
2606
2607 /*
2608 * We don't allow cancelling of the SPLIT transaction USB FULL
2609 * speed transfer, because it disturbs the bandwidth
2610 * computation algorithm.
2611 */
2612 xfer->flags_int.can_cancel_immed = 0;
2613}
2614
2615static void
2616ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2617{
2618 /*
2619 * We don't allow cancelling of the SPLIT transaction USB FULL
2620 * speed transfer, because it disturbs the bandwidth
2621 * computation algorithm.
2622 */
2623 xfer->flags_int.can_cancel_immed = 0;
2624
2625 /* set a default timeout */
2626 if (xfer->timeout == 0)
2627 xfer->timeout = 500; /* ms */
2628
2629 /* put transfer on interrupt queue */
2630 ehci_transfer_intr_enqueue(xfer);
2631}
2632
2633static const struct usb_pipe_methods ehci_device_isoc_fs_methods =
2634{
2635 .open = ehci_device_isoc_fs_open,
2636 .close = ehci_device_isoc_fs_close,
2637 .enter = ehci_device_isoc_fs_enter,
2638 .start = ehci_device_isoc_fs_start,
2639};
2640
2641/*------------------------------------------------------------------------*
2642 * ehci high speed isochronous support
2643 *------------------------------------------------------------------------*/
2644static void
2645ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2646{
2647 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2648 ehci_itd_t *td;
2649 uint32_t temp;
2650 uint8_t ds;
2651
2652 usb_hs_bandwidth_alloc(xfer);
2653
2654 /* initialize all TD's */
2655
2656 for (ds = 0; ds != 2; ds++) {
2657 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2658 /* set TD inactive */
2659 td->itd_status[0] = 0;
2660 td->itd_status[1] = 0;
2661 td->itd_status[2] = 0;
2662 td->itd_status[3] = 0;
2663 td->itd_status[4] = 0;
2664 td->itd_status[5] = 0;
2665 td->itd_status[6] = 0;
2666 td->itd_status[7] = 0;
2667
2668 /* set endpoint and address */
2669 td->itd_bp[0] = htohc32(sc,
2670 EHCI_ITD_SET_ADDR(xfer->address) |
2671 EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2672
2673 temp =
2674 EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2675
2676 /* set direction */
2677 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2678 temp |= EHCI_ITD_SET_DIR_IN;
2679 }
2680 /* set maximum packet size */
2681 td->itd_bp[1] = htohc32(sc, temp);
2682
2683 /* set transfer multiplier */
2684 td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2685
2686 usb_pc_cpu_flush(td->page_cache);
2687 }
2688 }
2689}
2690
2691static void
2692ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2693{
2694 ehci_device_done(xfer, USB_ERR_CANCELLED);
2695
2696 /* bandwidth must be freed after device done */
2697 usb_hs_bandwidth_free(xfer);
2698}
2699
2700static void
2701ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2702{
2703 struct usb_page_search buf_res;
2704 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2705 ehci_itd_t *td;
2706 ehci_itd_t *td_last = NULL;
2707 ehci_itd_t **pp_last;
2708 bus_size_t page_addr;
2709 uint32_t *plen;
2710 uint32_t status;
2711 uint32_t buf_offset;
2712 uint32_t nframes;
2713 uint32_t startframe;
2714 uint32_t itd_offset[8 + 1];
2715 uint8_t x;
2716 uint8_t td_no;
2717 uint8_t page_no;
2718
2719#ifdef USB_DEBUG
2720 uint8_t once = 1;
2721
2722#endif
2723
2724 DPRINTFN(6, "xfer=%p next=%d nframes=%d shift=%d\n",
2725 xfer, xfer->endpoint->isoc_next, xfer->nframes,
2726 usbd_xfer_get_fps_shift(xfer));
2727
2728 /* get the current frame index */
2729
2730 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2731
2732 if (usbd_xfer_get_isochronous_start_frame(
2733 xfer, nframes, 0, 1, EHCI_VIRTUAL_FRAMELIST_COUNT - 1, &startframe))
2734 DPRINTFN(3, "start next=%d\n", startframe);
2735
2736 nframes = xfer->nframes;
2737
2738 buf_offset = 0;
2739 td_no = 0;
2740
2741 plen = xfer->frlengths;
2742
2743 /* toggle the DMA set we are using */
2744 xfer->flags_int.curr_dma_set ^= 1;
2745
2746 /* get next DMA set */
2747 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2748 xfer->td_transfer_first = td;
2749
2750 pp_last = &sc->sc_isoc_hs_p_last[startframe];
2751
2752 /* store starting position */
2753
2754 xfer->qh_pos = startframe;
2755
2756 while (nframes) {
2757 if (td == NULL) {
2758 panic("%s:%d: out of TD's\n",
2759 __FUNCTION__, __LINE__);
2760 }
2761 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2762 pp_last = &sc->sc_isoc_hs_p_last[0];
2763 }
2764 /* range check */
2765 if (*plen > xfer->max_frame_size) {
2766#ifdef USB_DEBUG
2767 if (once) {
2768 once = 0;
2769 printf("%s: frame length(%d) exceeds %d bytes "
2770 "(frame truncated)\n",
2771 __FUNCTION__, *plen, xfer->max_frame_size);
2772 }
2773#endif
2774 *plen = xfer->max_frame_size;
2775 }
2776
2777 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2778 status = (EHCI_ITD_SET_LEN(*plen) |
2779 EHCI_ITD_ACTIVE |
2780 EHCI_ITD_SET_PG(0));
2781 td->itd_status[td_no] = htohc32(sc, status);
2782 itd_offset[td_no] = buf_offset;
2783 buf_offset += *plen;
2784 plen++;
2785 nframes --;
2786 } else {
2787 td->itd_status[td_no] = 0; /* not active */
2788 itd_offset[td_no] = buf_offset;
2789 }
2790
2791 td_no++;
2792
2793 if ((td_no == 8) || (nframes == 0)) {
2794 /* the rest of the transfers are not active, if any */
2795 for (x = td_no; x != 8; x++) {
2796 td->itd_status[x] = 0; /* not active */
2797 }
2798
2799 /* check if there is any data to be transferred */
2800 if (itd_offset[0] != buf_offset) {
2801 page_no = 0;
2802 itd_offset[td_no] = buf_offset;
2803
2804 /* get first page offset */
2805 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2806 /* get page address */
2807 page_addr = buf_res.physaddr & ~0xFFF;
2808 /* update page address */
2809 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2810 td->itd_bp[0] |= htohc32(sc, page_addr);
2811
2812 for (x = 0; x != td_no; x++) {
2813 /* set page number and page offset */
2814 status = (EHCI_ITD_SET_PG(page_no) |
2815 (buf_res.physaddr & 0xFFF));
2816 td->itd_status[x] |= htohc32(sc, status);
2817
2818 /* get next page offset */
2819 if (itd_offset[x + 1] == buf_offset) {
2820 /*
2821 * We subtract one so that
2822 * we don't go off the last
2823 * page!
2824 */
2825 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2826 } else {
2827 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2828 }
2829
2830 /* check if we need a new page */
2831 if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2832 /* new page needed */
2833 page_addr = buf_res.physaddr & ~0xFFF;
2834 if (page_no == 6) {
2835 panic("%s: too many pages\n", __FUNCTION__);
2836 }
2837 page_no++;
2838 /* update page address */
2839 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2840 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2841 }
2842 }
2843 }
2844 /* set IOC bit if we are complete */
2845 if (nframes == 0) {
2846 td->itd_status[td_no - 1] |= htohc32(sc, EHCI_ITD_IOC);
2847 }
2848 usb_pc_cpu_flush(td->page_cache);
2849#ifdef USB_DEBUG
2850 if (ehcidebug > 15) {
2851 DPRINTF("HS-TD %d\n", nframes);
2852 ehci_dump_itd(sc, td);
2853 }
2854#endif
2855 /* insert TD into schedule */
2856 EHCI_APPEND_HS_TD(td, *pp_last);
2857 pp_last++;
2858
2859 td_no = 0;
2860 td_last = td;
2861 td = td->obj_next;
2862 }
2863 }
2864
2865 xfer->td_transfer_last = td_last;
2866}
2867
2868static void
2869ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2870{
2871 /* put transfer on interrupt queue */
2872 ehci_transfer_intr_enqueue(xfer);
2873}
2874
2875static const struct usb_pipe_methods ehci_device_isoc_hs_methods =
2876{
2877 .open = ehci_device_isoc_hs_open,
2878 .close = ehci_device_isoc_hs_close,
2879 .enter = ehci_device_isoc_hs_enter,
2880 .start = ehci_device_isoc_hs_start,
2881};
2882
2883/*------------------------------------------------------------------------*
2884 * ehci root control support
2885 *------------------------------------------------------------------------*
2886 * Simulate a hardware hub by handling all the necessary requests.
2887 *------------------------------------------------------------------------*/
2888
2889static const
2890struct usb_device_descriptor ehci_devd =
2891{
2892 sizeof(struct usb_device_descriptor),
2893 UDESC_DEVICE, /* type */
2894 {0x00, 0x02}, /* USB version */
2895 UDCLASS_HUB, /* class */
2896 UDSUBCLASS_HUB, /* subclass */
2897 UDPROTO_HSHUBSTT, /* protocol */
2898 64, /* max packet */
2899 {0}, {0}, {0x00, 0x01}, /* device id */
2900 1, 2, 0, /* string indexes */
2901 1 /* # of configurations */
2902};
2903
2904static const
2905struct usb_device_qualifier ehci_odevd =
2906{
2907 sizeof(struct usb_device_qualifier),
2908 UDESC_DEVICE_QUALIFIER, /* type */
2909 {0x00, 0x02}, /* USB version */
2910 UDCLASS_HUB, /* class */
2911 UDSUBCLASS_HUB, /* subclass */
2912 UDPROTO_FSHUB, /* protocol */
2913 0, /* max packet */
2914 0, /* # of configurations */
2915 0
2916};
2917
2918static const struct ehci_config_desc ehci_confd = {
2919 .confd = {
2920 .bLength = sizeof(struct usb_config_descriptor),
2921 .bDescriptorType = UDESC_CONFIG,
2922 .wTotalLength[0] = sizeof(ehci_confd),
2923 .bNumInterface = 1,
2924 .bConfigurationValue = 1,
2925 .iConfiguration = 0,
2926 .bmAttributes = UC_SELF_POWERED,
2927 .bMaxPower = 0 /* max power */
2928 },
2929 .ifcd = {
2930 .bLength = sizeof(struct usb_interface_descriptor),
2931 .bDescriptorType = UDESC_INTERFACE,
2932 .bNumEndpoints = 1,
2933 .bInterfaceClass = UICLASS_HUB,
2934 .bInterfaceSubClass = UISUBCLASS_HUB,
2935 .bInterfaceProtocol = 0,
2936 },
2937 .endpd = {
2938 .bLength = sizeof(struct usb_endpoint_descriptor),
2939 .bDescriptorType = UDESC_ENDPOINT,
2940 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
2941 .bmAttributes = UE_INTERRUPT,
2942 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
2943 .bInterval = 255,
2944 },
2945};
2946
2947static const
2948struct usb_hub_descriptor ehci_hubd =
2949{
2950 .bDescLength = 0, /* dynamic length */
2951 .bDescriptorType = UDESC_HUB,
2952};
2953
2954uint16_t
2955ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index)
2956{
2957 uint32_t v;
2958
2959 v = EOREAD4(sc, EHCI_PORTSC(index));
2960 v = (v >> EHCI_PORTSC_PSPD_SHIFT) & EHCI_PORTSC_PSPD_MASK;
2961
2962 if (v == EHCI_PORT_SPEED_HIGH)
2963 return (UPS_HIGH_SPEED);
2964 if (v == EHCI_PORT_SPEED_LOW)
2965 return (UPS_LOW_SPEED);
2966 return (0);
2967}
2968
2969uint16_t
2970ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index)
2971{
2972 uint32_t v;
2973
2974 v = EOREAD4(sc, EHCI_HOSTC(index));
2975 v = (v >> EHCI_HOSTC_PSPD_SHIFT) & EHCI_HOSTC_PSPD_MASK;
2976
2977 if (v == EHCI_PORT_SPEED_HIGH)
2978 return (UPS_HIGH_SPEED);
2979 if (v == EHCI_PORT_SPEED_LOW)
2980 return (UPS_LOW_SPEED);
2981 return (0);
2982}
2983
2984static void
2985ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
2986{
2987 uint32_t port;
2988 uint32_t v;
2989
2990 DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
2991
2992 port = EHCI_PORTSC(index);
2993 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
2994 EOWRITE4(sc, port, v | EHCI_PS_PO);
2995}
2996
2997static usb_error_t
2998ehci_roothub_exec(struct usb_device *udev,
2999 struct usb_device_request *req, const void **pptr, uint16_t *plength)
3000{
3001 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3002 const char *str_ptr;
3003 const void *ptr;
3004 uint32_t port;
3005 uint32_t v;
3006 uint16_t len;
3007 uint16_t i;
3008 uint16_t value;
3009 uint16_t index;
3010 usb_error_t err;
3011
3012 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3013
3014 /* buffer reset */
3015 ptr = (const void *)&sc->sc_hub_desc;
3016 len = 0;
3017 err = 0;
3018
3019 value = UGETW(req->wValue);
3020 index = UGETW(req->wIndex);
3021
3022 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3023 "wValue=0x%04x wIndex=0x%04x\n",
3024 req->bmRequestType, req->bRequest,
3025 UGETW(req->wLength), value, index);
3026
3027#define C(x,y) ((x) | ((y) << 8))
3028 switch (C(req->bRequest, req->bmRequestType)) {
3029 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3030 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3031 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3032 /*
3033 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3034 * for the integrated root hub.
3035 */
3036 break;
3037 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3038 len = 1;
3039 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3040 break;
3041 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3042 switch (value >> 8) {
3043 case UDESC_DEVICE:
3044 if ((value & 0xff) != 0) {
3045 err = USB_ERR_IOERROR;
3046 goto done;
3047 }
3048 len = sizeof(ehci_devd);
3049 ptr = (const void *)&ehci_devd;
3050 break;
3051 /*
3052 * We can't really operate at another speed,
3053 * but the specification says we need this
3054 * descriptor:
3055 */
3056 case UDESC_DEVICE_QUALIFIER:
3057 if ((value & 0xff) != 0) {
3058 err = USB_ERR_IOERROR;
3059 goto done;
3060 }
3061 len = sizeof(ehci_odevd);
3062 ptr = (const void *)&ehci_odevd;
3063 break;
3064
3065 case UDESC_CONFIG:
3066 if ((value & 0xff) != 0) {
3067 err = USB_ERR_IOERROR;
3068 goto done;
3069 }
3070 len = sizeof(ehci_confd);
3071 ptr = (const void *)&ehci_confd;
3072 break;
3073
3074 case UDESC_STRING:
3075 switch (value & 0xff) {
3076 case 0: /* Language table */
3077 str_ptr = "\001";
3078 break;
3079
3080 case 1: /* Vendor */
3081 str_ptr = sc->sc_vendor;
3082 break;
3083
3084 case 2: /* Product */
3085 str_ptr = "EHCI root HUB";
3086 break;
3087
3088 default:
3089 str_ptr = "";
3090 break;
3091 }
3092
3093 len = usb_make_str_desc(
3094 sc->sc_hub_desc.temp,
3095 sizeof(sc->sc_hub_desc.temp),
3096 str_ptr);
3097 break;
3098 default:
3099 err = USB_ERR_IOERROR;
3100 goto done;
3101 }
3102 break;
3103 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3104 len = 1;
3105 sc->sc_hub_desc.temp[0] = 0;
3106 break;
3107 case C(UR_GET_STATUS, UT_READ_DEVICE):
3108 len = 2;
3109 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3110 break;
3111 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3112 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3113 len = 2;
3114 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3115 break;
3116 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3117 if (value >= EHCI_MAX_DEVICES) {
3118 err = USB_ERR_IOERROR;
3119 goto done;
3120 }
3121 sc->sc_addr = value;
3122 break;
3123 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3124 if ((value != 0) && (value != 1)) {
3125 err = USB_ERR_IOERROR;
3126 goto done;
3127 }
3128 sc->sc_conf = value;
3129 break;
3130 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3131 break;
3132 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3133 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3134 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3135 err = USB_ERR_IOERROR;
3136 goto done;
3137 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3138 break;
3139 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3140 break;
3141 /* Hub requests */
3142 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3143 break;
3144 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3145 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3146
3147 if ((index < 1) ||
3148 (index > sc->sc_noport)) {
3149 err = USB_ERR_IOERROR;
3150 goto done;
3151 }
3152 port = EHCI_PORTSC(index);
3153 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3154 switch (value) {
3155 case UHF_PORT_ENABLE:
3156 EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3157 break;
3158 case UHF_PORT_SUSPEND:
3159 if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3160 /*
3161 * waking up a High Speed device is rather
3162 * complicated if
3163 */
3164 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3165 }
3166 /* wait 20ms for resume sequence to complete */
3167 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3168
3169 EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3170 EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3171
3172 /* 4ms settle time */
3173 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3174 break;
3175 case UHF_PORT_POWER:
3176 EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3177 break;
3178 case UHF_PORT_TEST:
3179 DPRINTFN(3, "clear port test "
3180 "%d\n", index);
3181 break;
3182 case UHF_PORT_INDICATOR:
3183 DPRINTFN(3, "clear port ind "
3184 "%d\n", index);
3185 EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3186 break;
3187 case UHF_C_PORT_CONNECTION:
3188 EOWRITE4(sc, port, v | EHCI_PS_CSC);
3189 break;
3190 case UHF_C_PORT_ENABLE:
3191 EOWRITE4(sc, port, v | EHCI_PS_PEC);
3192 break;
3193 case UHF_C_PORT_SUSPEND:
3194 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3195 break;
3196 case UHF_C_PORT_OVER_CURRENT:
3197 EOWRITE4(sc, port, v | EHCI_PS_OCC);
3198 break;
3199 case UHF_C_PORT_RESET:
3200 sc->sc_isreset = 0;
3201 break;
3202 default:
3203 err = USB_ERR_IOERROR;
3204 goto done;
3205 }
3206 break;
3207 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3208 if ((value & 0xff) != 0) {
3209 err = USB_ERR_IOERROR;
3210 goto done;
3211 }
3212 v = EREAD4(sc, EHCI_HCSPARAMS);
3213
3214 sc->sc_hub_desc.hubd = ehci_hubd;
3215 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3216
3217 if (EHCI_HCS_PPC(v))
3218 i = UHD_PWR_INDIVIDUAL;
3219 else
3220 i = UHD_PWR_NO_SWITCH;
3221
3222 if (EHCI_HCS_P_INDICATOR(v))
3223 i |= UHD_PORT_IND;
3224
3225 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics, i);
3226 /* XXX can't find out? */
3227 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3228 /* XXX don't know if ports are removable or not */
3229 sc->sc_hub_desc.hubd.bDescLength =
3230 8 + ((sc->sc_noport + 7) / 8);
3231 len = sc->sc_hub_desc.hubd.bDescLength;
3232 break;
3233 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3234 len = 16;
3235 memset(sc->sc_hub_desc.temp, 0, 16);
3236 break;
3237 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3238 DPRINTFN(9, "get port status i=%d\n",
3239 index);
3240 if ((index < 1) ||
3241 (index > sc->sc_noport)) {
3242 err = USB_ERR_IOERROR;
3243 goto done;
3244 }
3245 v = EOREAD4(sc, EHCI_PORTSC(index));
3246 DPRINTFN(9, "port status=0x%04x\n", v);
3247 if (sc->sc_flags & EHCI_SCFLG_TT) {
3248 if (sc->sc_vendor_get_port_speed != NULL) {
3249 i = sc->sc_vendor_get_port_speed(sc, index);
3250 } else {
3251 device_printf(sc->sc_bus.bdev,
3252 "EHCI_SCFLG_TT quirk is set but "
3253 "sc_vendor_get_hub_speed() is NULL\n");
3254 i = UPS_HIGH_SPEED;
3255 }
3256 } else {
3257 i = UPS_HIGH_SPEED;
3258 }
3259 if (v & EHCI_PS_CS)
3260 i |= UPS_CURRENT_CONNECT_STATUS;
3261 if (v & EHCI_PS_PE)
3262 i |= UPS_PORT_ENABLED;
3263 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3264 i |= UPS_SUSPEND;
3265 if (v & EHCI_PS_OCA)
3266 i |= UPS_OVERCURRENT_INDICATOR;
3267 if (v & EHCI_PS_PR)
3268 i |= UPS_RESET;
3269 if (v & EHCI_PS_PP)
3270 i |= UPS_PORT_POWER;
3271 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3272 i = 0;
3273 if (v & EHCI_PS_CSC)
3274 i |= UPS_C_CONNECT_STATUS;
3275 if (v & EHCI_PS_PEC)
3276 i |= UPS_C_PORT_ENABLED;
3277 if (v & EHCI_PS_OCC)
3278 i |= UPS_C_OVERCURRENT_INDICATOR;
3279 if (v & EHCI_PS_FPR)
3280 i |= UPS_C_SUSPEND;
3281 if (sc->sc_isreset)
3282 i |= UPS_C_PORT_RESET;
3283 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3284 len = sizeof(sc->sc_hub_desc.ps);
3285 break;
3286 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3287 err = USB_ERR_IOERROR;
3288 goto done;
3289 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3290 break;
3291 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3292 if ((index < 1) ||
3293 (index > sc->sc_noport)) {
3294 err = USB_ERR_IOERROR;
3295 goto done;
3296 }
3297 port = EHCI_PORTSC(index);
3298 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3299 switch (value) {
3300 case UHF_PORT_ENABLE:
3301 EOWRITE4(sc, port, v | EHCI_PS_PE);
3302 break;
3303 case UHF_PORT_SUSPEND:
3304 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3305 break;
3306 case UHF_PORT_RESET:
3307 DPRINTFN(6, "reset port %d\n", index);
3308#ifdef USB_DEBUG
3309 if (ehcinohighspeed) {
3310 /*
3311 * Connect USB device to companion
3312 * controller.
3313 */
3314 ehci_disown(sc, index, 1);
3315 break;
3316 }
3317#endif
3318 if (EHCI_PS_IS_LOWSPEED(v) &&
3319 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3320 /* Low speed device, give up ownership. */
3321 ehci_disown(sc, index, 1);
3322 break;
3323 }
3324 /* Start reset sequence. */
3325 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3326 EOWRITE4(sc, port, v | EHCI_PS_PR);
3327
3328 /* Wait for reset to complete. */
3329 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3330 USB_MS_TO_TICKS(usb_port_root_reset_delay));
3331
3332 /* Terminate reset sequence. */
3333 if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3334 EOWRITE4(sc, port, v);
3335
3336 /* Wait for HC to complete reset. */
3337 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3338 USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3339
3340 v = EOREAD4(sc, port);
3341 DPRINTF("ehci after reset, status=0x%08x\n", v);
3342 if (v & EHCI_PS_PR) {
3343 device_printf(sc->sc_bus.bdev,
3344 "port reset timeout\n");
3345 err = USB_ERR_TIMEOUT;
3346 goto done;
3347 }
3348 if (!(v & EHCI_PS_PE) &&
3349 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3350 /* Not a high speed device, give up ownership.*/
3351 ehci_disown(sc, index, 0);
3352 break;
3353 }
3354 sc->sc_isreset = 1;
3355 DPRINTF("ehci port %d reset, status = 0x%08x\n",
3356 index, v);
3357 break;
3358
3359 case UHF_PORT_POWER:
3360 DPRINTFN(3, "set port power %d\n", index);
3361 EOWRITE4(sc, port, v | EHCI_PS_PP);
3362 break;
3363
3364 case UHF_PORT_TEST:
3365 DPRINTFN(3, "set port test %d\n", index);
3366 break;
3367
3368 case UHF_PORT_INDICATOR:
3369 DPRINTFN(3, "set port ind %d\n", index);
3370 EOWRITE4(sc, port, v | EHCI_PS_PIC);
3371 break;
3372
3373 default:
3374 err = USB_ERR_IOERROR;
3375 goto done;
3376 }
3377 break;
3378 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3379 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3380 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3381 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3382 break;
3383 default:
3384 err = USB_ERR_IOERROR;
3385 goto done;
3386 }
3387done:
3388 *plength = len;
3389 *pptr = ptr;
3390 return (err);
3391}
3392
3393static void
3394ehci_xfer_setup(struct usb_setup_params *parm)
3395{
3396 struct usb_page_search page_info;
3397 struct usb_page_cache *pc;
3398 ehci_softc_t *sc;
3399 struct usb_xfer *xfer;
3400 void *last_obj;
3401 uint32_t nqtd;
3402 uint32_t nqh;
3403 uint32_t nsitd;
3404 uint32_t nitd;
3405 uint32_t n;
3406
3407 sc = EHCI_BUS2SC(parm->udev->bus);
3408 xfer = parm->curr_xfer;
3409
3410 nqtd = 0;
3411 nqh = 0;
3412 nsitd = 0;
3413 nitd = 0;
3414
3415 /*
3416 * compute maximum number of some structures
3417 */
3418 if (parm->methods == &ehci_device_ctrl_methods) {
3419 /*
3420 * The proof for the "nqtd" formula is illustrated like
3421 * this:
3422 *
3423 * +------------------------------------+
3424 * | |
3425 * | |remainder -> |
3426 * | +-----+---+ |
3427 * | | xxx | x | frm 0 |
3428 * | +-----+---++ |
3429 * | | xxx | xx | frm 1 |
3430 * | +-----+----+ |
3431 * | ... |
3432 * +------------------------------------+
3433 *
3434 * "xxx" means a completely full USB transfer descriptor
3435 *
3436 * "x" and "xx" means a short USB packet
3437 *
3438 * For the remainder of an USB transfer modulo
3439 * "max_data_length" we need two USB transfer descriptors.
3440 * One to transfer the remaining data and one to finalise
3441 * with a zero length packet in case the "force_short_xfer"
3442 * flag is set. We only need two USB transfer descriptors in
3443 * the case where the transfer length of the first one is a
3444 * factor of "max_frame_size". The rest of the needed USB
3445 * transfer descriptors is given by the buffer size divided
3446 * by the maximum data payload.
3447 */
3448 parm->hc_max_packet_size = 0x400;
3449 parm->hc_max_packet_count = 1;
3450 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3451 xfer->flags_int.bdma_enable = 1;
3452
3453 usbd_transfer_setup_sub(parm);
3454
3455 nqh = 1;
3456 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3457 + (xfer->max_data_length / xfer->max_hc_frame_size));
3458
3459 } else if (parm->methods == &ehci_device_bulk_methods) {
3460 parm->hc_max_packet_size = 0x400;
3461 parm->hc_max_packet_count = 1;
3462 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3463 xfer->flags_int.bdma_enable = 1;
3464
3465 usbd_transfer_setup_sub(parm);
3466
3467 nqh = 1;
3468 nqtd = ((2 * xfer->nframes)
3469 + (xfer->max_data_length / xfer->max_hc_frame_size));
3470
3471 } else if (parm->methods == &ehci_device_intr_methods) {
3472 if (parm->speed == USB_SPEED_HIGH) {
3473 parm->hc_max_packet_size = 0x400;
3474 parm->hc_max_packet_count = 3;
3475 } else if (parm->speed == USB_SPEED_FULL) {
3476 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3477 parm->hc_max_packet_count = 1;
3478 } else {
3479 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3480 parm->hc_max_packet_count = 1;
3481 }
3482
3483 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3484 xfer->flags_int.bdma_enable = 1;
3485
3486 usbd_transfer_setup_sub(parm);
3487
3488 nqh = 1;
3489 nqtd = ((2 * xfer->nframes)
3490 + (xfer->max_data_length / xfer->max_hc_frame_size));
3491
3492 } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3493 parm->hc_max_packet_size = 0x3FF;
3494 parm->hc_max_packet_count = 1;
3495 parm->hc_max_frame_size = 0x3FF;
3496 xfer->flags_int.bdma_enable = 1;
3497
3498 usbd_transfer_setup_sub(parm);
3499
3500 nsitd = xfer->nframes;
3501
3502 } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3503 parm->hc_max_packet_size = 0x400;
3504 parm->hc_max_packet_count = 3;
3505 parm->hc_max_frame_size = 0xC00;
3506 xfer->flags_int.bdma_enable = 1;
3507
3508 usbd_transfer_setup_sub(parm);
3509
3510 nitd = ((xfer->nframes + 7) / 8) <<
3511 usbd_xfer_get_fps_shift(xfer);
3512
3513 } else {
3514 parm->hc_max_packet_size = 0x400;
3515 parm->hc_max_packet_count = 1;
3516 parm->hc_max_frame_size = 0x400;
3517
3518 usbd_transfer_setup_sub(parm);
3519 }
3520
3521alloc_dma_set:
3522
3523 if (parm->err) {
3524 return;
3525 }
3526 /*
3527 * Allocate queue heads and transfer descriptors
3528 */
3529 last_obj = NULL;
3530
3531 if (usbd_transfer_setup_sub_malloc(
3532 parm, &pc, sizeof(ehci_itd_t),
3533 EHCI_ITD_ALIGN, nitd)) {
3534 parm->err = USB_ERR_NOMEM;
3535 return;
3536 }
3537 if (parm->buf) {
3538 for (n = 0; n != nitd; n++) {
3539 ehci_itd_t *td;
3540
3541 usbd_get_page(pc + n, 0, &page_info);
3542
3543 td = page_info.buffer;
3544
3545 /* init TD */
3546 td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3547 td->obj_next = last_obj;
3548 td->page_cache = pc + n;
3549
3550 last_obj = td;
3551
3552 usb_pc_cpu_flush(pc + n);
3553 }
3554 }
3555 if (usbd_transfer_setup_sub_malloc(
3556 parm, &pc, sizeof(ehci_sitd_t),
3557 EHCI_SITD_ALIGN, nsitd)) {
3558 parm->err = USB_ERR_NOMEM;
3559 return;
3560 }
3561 if (parm->buf) {
3562 for (n = 0; n != nsitd; n++) {
3563 ehci_sitd_t *td;
3564
3565 usbd_get_page(pc + n, 0, &page_info);
3566
3567 td = page_info.buffer;
3568
3569 /* init TD */
3570 td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3571 td->obj_next = last_obj;
3572 td->page_cache = pc + n;
3573
3574 last_obj = td;
3575
3576 usb_pc_cpu_flush(pc + n);
3577 }
3578 }
3579 if (usbd_transfer_setup_sub_malloc(
3580 parm, &pc, sizeof(ehci_qtd_t),
3581 EHCI_QTD_ALIGN, nqtd)) {
3582 parm->err = USB_ERR_NOMEM;
3583 return;
3584 }
3585 if (parm->buf) {
3586 for (n = 0; n != nqtd; n++) {
3587 ehci_qtd_t *qtd;
3588
3589 usbd_get_page(pc + n, 0, &page_info);
3590
3591 qtd = page_info.buffer;
3592
3593 /* init TD */
3594 qtd->qtd_self = htohc32(sc, page_info.physaddr);
3595 qtd->obj_next = last_obj;
3596 qtd->page_cache = pc + n;
3597
3598 last_obj = qtd;
3599
3600 usb_pc_cpu_flush(pc + n);
3601 }
3602 }
3603 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3604
3605 last_obj = NULL;
3606
3607 if (usbd_transfer_setup_sub_malloc(
3608 parm, &pc, sizeof(ehci_qh_t),
3609 EHCI_QH_ALIGN, nqh)) {
3610 parm->err = USB_ERR_NOMEM;
3611 return;
3612 }
3613 if (parm->buf) {
3614 for (n = 0; n != nqh; n++) {
3615 ehci_qh_t *qh;
3616
3617 usbd_get_page(pc + n, 0, &page_info);
3618
3619 qh = page_info.buffer;
3620
3621 /* init QH */
3622 qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3623 qh->obj_next = last_obj;
3624 qh->page_cache = pc + n;
3625
3626 last_obj = qh;
3627
3628 usb_pc_cpu_flush(pc + n);
3629 }
3630 }
3631 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3632
3633 if (!xfer->flags_int.curr_dma_set) {
3634 xfer->flags_int.curr_dma_set = 1;
3635 goto alloc_dma_set;
3636 }
3637}
3638
3639static void
3640ehci_xfer_unsetup(struct usb_xfer *xfer)
3641{
3642 return;
3643}
3644
3645static void
3646ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3647 struct usb_endpoint *ep)
3648{
3649 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3650
3651 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3652 ep, udev->address,
3653 edesc->bEndpointAddress, udev->flags.usb_mode,
3654 sc->sc_addr);
3655
3656 if (udev->device_index != sc->sc_addr) {
3657 if ((udev->speed != USB_SPEED_HIGH) &&
3658 ((udev->hs_hub_addr == 0) ||
3659 (udev->hs_port_no == 0) ||
3660 (udev->parent_hs_hub == NULL) ||
3661 (udev->parent_hs_hub->hub == NULL))) {
3662 /* We need a transaction translator */
3663 goto done;
3664 }
3665 switch (edesc->bmAttributes & UE_XFERTYPE) {
3666 case UE_CONTROL:
3667 ep->methods = &ehci_device_ctrl_methods;
3668 break;
3669 case UE_INTERRUPT:
3670 ep->methods = &ehci_device_intr_methods;
3671 break;
3672 case UE_ISOCHRONOUS:
3673 if (udev->speed == USB_SPEED_HIGH) {
3674 ep->methods = &ehci_device_isoc_hs_methods;
3675 } else if (udev->speed == USB_SPEED_FULL) {
3676 ep->methods = &ehci_device_isoc_fs_methods;
3677 }
3678 break;
3679 case UE_BULK:
3680 ep->methods = &ehci_device_bulk_methods;
3681 break;
3682 default:
3683 /* do nothing */
3684 break;
3685 }
3686 }
3687done:
3688 return;
3689}
3690
3691static void
3692ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3693{
3694 /*
3695 * Wait until the hardware has finished any possible use of
3696 * the transfer descriptor(s) and QH
3697 */
3698 *pus = (1125); /* microseconds */
3699}
3700
3701static void
3702ehci_device_resume(struct usb_device *udev)
3703{
3704 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3705 struct usb_xfer *xfer;
3706 const struct usb_pipe_methods *methods;
3707
3708 DPRINTF("\n");
3709
3710 USB_BUS_LOCK(udev->bus);
3711
3712 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3713 if (xfer->xroot->udev == udev) {
3714 methods = xfer->endpoint->methods;
3715
3716 if ((methods == &ehci_device_bulk_methods) ||
3717 (methods == &ehci_device_ctrl_methods)) {
3718 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3719 sc->sc_async_p_last);
3720 }
3721 if (methods == &ehci_device_intr_methods) {
3722 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3723 sc->sc_intr_p_last[xfer->qh_pos]);
3724 }
3725 }
3726 }
3727
3728 USB_BUS_UNLOCK(udev->bus);
3729
3730 return;
3731}
3732
3733static void
3734ehci_device_suspend(struct usb_device *udev)
3735{
3736 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3737 struct usb_xfer *xfer;
3738 const struct usb_pipe_methods *methods;
3739
3740 DPRINTF("\n");
3741
3742 USB_BUS_LOCK(udev->bus);
3743
3744 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3745 if (xfer->xroot->udev == udev) {
3746 methods = xfer->endpoint->methods;
3747
3748 if ((methods == &ehci_device_bulk_methods) ||
3749 (methods == &ehci_device_ctrl_methods)) {
3750 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3751 sc->sc_async_p_last);
3752 }
3753 if (methods == &ehci_device_intr_methods) {
3754 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3755 sc->sc_intr_p_last[xfer->qh_pos]);
3756 }
3757 }
3758 }
3759
3760 USB_BUS_UNLOCK(udev->bus);
3761}
3762
3763static void
3764ehci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
3765{
3766 struct ehci_softc *sc = EHCI_BUS2SC(bus);
3767
3768 switch (state) {
3769 case USB_HW_POWER_SUSPEND:
3770 case USB_HW_POWER_SHUTDOWN:
3771 ehci_suspend(sc);
3772 break;
3773 case USB_HW_POWER_RESUME:
3774 ehci_resume(sc);
3775 break;
3776 default:
3777 break;
3778 }
3779}
3780
3781static void
3782ehci_set_hw_power(struct usb_bus *bus)
3783{
3784 ehci_softc_t *sc = EHCI_BUS2SC(bus);
3785 uint32_t temp;
3786 uint32_t flags;
3787
3788 DPRINTF("\n");
3789
3790 USB_BUS_LOCK(bus);
3791
3792 flags = bus->hw_power_state;
3793
3794 temp = EOREAD4(sc, EHCI_USBCMD);
3795
3796 temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3797
3798 if (flags & (USB_HW_POWER_CONTROL |
3799 USB_HW_POWER_BULK)) {
3800 DPRINTF("Async is active\n");
3801 temp |= EHCI_CMD_ASE;
3802 }
3803 if (flags & (USB_HW_POWER_INTERRUPT |
3804 USB_HW_POWER_ISOC)) {
3805 DPRINTF("Periodic is active\n");
3806 temp |= EHCI_CMD_PSE;
3807 }
3808 EOWRITE4(sc, EHCI_USBCMD, temp);
3809
3810 USB_BUS_UNLOCK(bus);
3811
3812 return;
3813}
3814
3815static void
3816ehci_start_dma_delay_second(struct usb_xfer *xfer)
3817{
3818 struct ehci_softc *sc = EHCI_BUS2SC(xfer->xroot->bus);
3819
3820 DPRINTF("\n");
3821
3822 /* trigger doorbell */
3823 ehci_doorbell_async(sc);
3824
3825 /* give the doorbell 4ms */
3826 usbd_transfer_timeout_ms(xfer,
3827 (void (*)(void *))&usb_dma_delay_done_cb, 4);
3828}
3829
3830/*
3831 * Ring the doorbell twice before freeing any DMA descriptors. Some host
3832 * controllers apparently cache the QH descriptors and need a message
3833 * that the cache needs to be discarded.
3834 */
3835static void
3836ehci_start_dma_delay(struct usb_xfer *xfer)
3837{
3838 struct ehci_softc *sc = EHCI_BUS2SC(xfer->xroot->bus);
3839
3840 DPRINTF("\n");
3841
3842 /* trigger doorbell */
3843 ehci_doorbell_async(sc);
3844
3845 /* give the doorbell 4ms */
3846 usbd_transfer_timeout_ms(xfer,
3847 (void (*)(void *))&ehci_start_dma_delay_second, 4);
3848}
3849
3850static const struct usb_bus_methods ehci_bus_methods =
3851{
3852 .endpoint_init = ehci_ep_init,
3853 .xfer_setup = ehci_xfer_setup,
3854 .xfer_unsetup = ehci_xfer_unsetup,
3855 .get_dma_delay = ehci_get_dma_delay,
3856 .device_resume = ehci_device_resume,
3857 .device_suspend = ehci_device_suspend,
3858 .set_hw_power = ehci_set_hw_power,
3859 .set_hw_power_sleep = ehci_set_hw_power_sleep,
3860 .roothub_exec = ehci_roothub_exec,
3861 .xfer_poll = ehci_do_poll,
3862 .start_dma_delay = ehci_start_dma_delay,
3863};
debug
static int debug
Definition: cfumass.c:73
SYSCTL_NODE
static SYSCTL_NODE(_hw_usb, OID_AUTO, dwc_otg, CTLFLAG_RW|CTLFLAG_MPSAFE, 0, "USB DWC OTG")
SYSCTL_INT
SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, phy_type, CTLFLAG_RDTUN, &dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2/3 - ULPI/HSIC/INTERNAL/UTMI+")
EHCI_APPEND_HS_TD
#define EHCI_APPEND_HS_TD(std, last)
Definition: ehci.c:945
ehci_device_isoc_fs_enter
static void ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
Definition: ehci.c:2433
ehci_setup_standard_chain_sub
static void ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
Definition: ehci.c:1546
ehci_device_bulk_enter
static void ehci_device_bulk_enter(struct usb_xfer *xfer)
Definition: ehci.c:2211
EHCI_REMOVE_QH
#define EHCI_REMOVE_QH(sqh, last)
Definition: ehci.c:1043
ehci_device_bulk_start
static void ehci_device_bulk_start(struct usb_xfer *xfer)
Definition: ehci.c:2234
ehci_device_bulk_methods
static const struct usb_pipe_methods ehci_device_bulk_methods
Definition: ehci.c:120
_ehci_remove_fs_td
static ehci_sitd_t * _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
Definition: ehci.c:1005
ehci_device_ctrl_open
static void ehci_device_ctrl_open(struct usb_xfer *xfer)
Definition: ehci.c:2266
ehci_check_transfer
static uint8_t ehci_check_transfer(struct usb_xfer *)
Definition: ehci.c:1252
EHCI_APPEND_QH
#define EHCI_APPEND_QH(sqh, last)
Definition: ehci.c:971
ehci_hcreset
static usb_error_t ehci_hcreset(ehci_softc_t *sc)
Definition: ehci.c:204
ehci_confd
static const struct ehci_config_desc ehci_confd
Definition: ehci.c:2918
ehci_doorbell_async
static void ehci_doorbell_async(struct ehci_softc *sc)
Definition: ehci.c:2217
ehci_interrupt
void ehci_interrupt(ehci_softc_t *sc)
Definition: ehci.c:1451
_ehci_remove_qh
static ehci_qh_t * _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
Definition: ehci.c:1045
ehci_device_isoc_fs_open
static void ehci_device_isoc_fs_open(struct usb_xfer *xfer)
Definition: ehci.c:2388
ehci_bus_methods
static const struct usb_bus_methods ehci_bus_methods
Definition: ehci.c:119
_ehci_append_hs_td
static ehci_itd_t * _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
Definition: ehci.c:947
ehci_init_sub
static int ehci_init_sub(struct ehci_softc *sc)
Definition: ehci.c:228
ehci_root_intr
static void ehci_root_intr(ehci_softc_t *sc)
Definition: ehci.c:1996
ehci_get_port_speed_hostc
uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index)
Definition: ehci.c:2970
_ehci_remove_hs_td
static ehci_itd_t * _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
Definition: ehci.c:1025
ehci_disown
static void ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
Definition: ehci.c:2985
ehci_roothub_exec
static usb_error_t ehci_roothub_exec(struct usb_device *udev, struct usb_device_request *req, const void **pptr, uint16_t *plength)
Definition: ehci.c:2998
ehci_detach
void ehci_detach(ehci_softc_t *sc)
Definition: ehci.c:553
EHCI_BUS2SC
#define EHCI_BUS2SC(bus)
Definition: ehci.c:92
ehci_non_isoc_done
static void ehci_non_isoc_done(struct usb_xfer *xfer)
Definition: ehci.c:1191
ehci_device_done
static void ehci_device_done(struct usb_xfer *, usb_error_t)
Definition: ehci.c:2148
C
#define C(x, y)
ehci_xfer_setup
static void ehci_xfer_setup(struct usb_setup_params *parm)
Definition: ehci.c:3394
ehci_device_isoc_fs_start
static void ehci_device_isoc_fs_start(struct usb_xfer *xfer)
Definition: ehci.c:2616
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static const struct usb_pipe_methods ehci_device_isoc_fs_methods
Definition: ehci.c:123
ehci_device_resume
static void ehci_device_resume(struct usb_device *udev)
Definition: ehci.c:3702
ehci_device_intr_open
static void ehci_device_intr_open(struct usb_xfer *xfer)
Definition: ehci.c:2307
ehci_device_suspend
static void ehci_device_suspend(struct usb_device *udev)
Definition: ehci.c:3734
ehci_device_isoc_fs_close
static void ehci_device_isoc_fs_close(struct usb_xfer *xfer)
Definition: ehci.c:2427
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static const struct usb_device_qualifier ehci_odevd
Definition: ehci.c:2905
ehci_device_isoc_hs_close
static void ehci_device_isoc_hs_close(struct usb_xfer *xfer)
Definition: ehci.c:2692
ehci_hubd
static const struct usb_hub_descriptor ehci_hubd
Definition: ehci.c:2948
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void ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
Definition: ehci.c:150
ehci_timeout
static void ehci_timeout(void *)
Definition: ehci.c:1523
ehci_set_hw_power
static void ehci_set_hw_power(struct usb_bus *bus)
Definition: ehci.c:3782
ehci_ep_init
static void ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc, struct usb_endpoint *ep)
Definition: ehci.c:3646
ehci_get_dma_delay
static void ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
Definition: ehci.c:3692
ehci_start_dma_delay
static void ehci_start_dma_delay(struct usb_xfer *xfer)
Definition: ehci.c:3836
ehci_device_intr_methods
static const struct usb_pipe_methods ehci_device_intr_methods
Definition: ehci.c:122
ehci_isoc_fs_done
static void ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
Definition: ehci.c:2023
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static const struct usb_pipe_methods ehci_device_isoc_hs_methods
Definition: ehci.c:124
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static void ehci_device_ctrl_enter(struct usb_xfer *xfer)
Definition: ehci.c:2278
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static usb_error_t ehci_non_isoc_done_sub(struct usb_xfer *xfer)
Definition: ehci.c:1094
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static void ehci_pcd_enable(ehci_softc_t *sc)
Definition: ehci.c:1391
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static void ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
Definition: ehci.c:2076
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static void ehci_do_poll(struct usb_bus *)
Definition: ehci.c:1536
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static const struct usb_device_descriptor ehci_devd
Definition: ehci.c:2890
ehci_device_bulk_open
static void ehci_device_bulk_open(struct usb_xfer *xfer)
Definition: ehci.c:2199
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static void ehci_data_toggle_update(struct usb_xfer *xfer, uint16_t actlen, uint16_t xlen)
Definition: ehci.c:1072
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static void ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
Definition: ehci.c:2701
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usb_error_t ehci_reset(ehci_softc_t *sc)
Definition: ehci.c:184
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static void ehci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
Definition: ehci.c:3764
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#define EHCI_REMOVE_HS_TD(std, last)
Definition: ehci.c:1023
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static const struct usb_pipe_methods ehci_device_ctrl_methods
Definition: ehci.c:121
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static void ehci_device_intr_start(struct usb_xfer *xfer)
Definition: ehci.c:2365
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static void ehci_interrupt_poll(ehci_softc_t *sc)
Definition: ehci.c:1405
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static void ehci_device_intr_enter(struct usb_xfer *xfer)
Definition: ehci.c:2359
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static void ehci_device_isoc_hs_start(struct usb_xfer *xfer)
Definition: ehci.c:2869
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#define EHCI_APPEND_FS_TD(std, last)
Definition: ehci.c:919
_ehci_append_fs_td
static ehci_sitd_t * _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
Definition: ehci.c:921
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static void ehci_device_ctrl_close(struct usb_xfer *xfer)
Definition: ehci.c:2272
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static void ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
Definition: ehci.c:904
EHCI_INTR_ENDPT
#define EHCI_INTR_ENDPT
Definition: ehci.c:117
_ehci_append_qh
static ehci_qh_t * _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
Definition: ehci.c:973
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static void ehci_device_intr_close(struct usb_xfer *xfer)
Definition: ehci.c:2346
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static void ehci_device_ctrl_start(struct usb_xfer *xfer)
Definition: ehci.c:2284
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Definition: ehci.c:2645
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#define EHCI_REMOVE_FS_TD(std, last)
Definition: ehci.c:1003
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static void ehci_xfer_unsetup(struct usb_xfer *xfer)
Definition: ehci.c:3640
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usb_error_t ehci_init(ehci_softc_t *sc)
Definition: ehci.c:281
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static void ehci_start_dma_delay_second(struct usb_xfer *xfer)
Definition: ehci.c:3816
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uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index)
Definition: ehci.c:2955
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static void ehci_suspend(ehci_softc_t *sc)
Definition: ehci.c:575
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static void ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
Definition: ehci.c:1734
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static void ehci_resume(ehci_softc_t *sc)
Definition: ehci.c:584
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static void ehci_poll_timeout(void *)
Definition: ehci.c:1435
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static void ehci_device_bulk_close(struct usb_xfer *xfer)
Definition: ehci.c:2205
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#define EHCI_QTD_BUFERR
Definition: ehci.h:7
EHCI_QTD_GET_CERR
#define EHCI_QTD_GET_CERR(x)
Definition: ehci.h:19
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#define EHCI_FRAMELIST_COUNT
Definition: ehci.h:43
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volatile uint32_t qh_endphub
Definition: ehci.h:25
EHCI_QTD_GET_C_PAGE
#define EHCI_QTD_GET_C_PAGE(x)
Definition: ehci.h:21
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#define EHCI_QTD_HALTED
Definition: ehci.h:6
EHCI_QTD_PID_IN
#define EHCI_QTD_PID_IN
Definition: ehci.h:17
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#define EHCI_SITD_ACTIVE
Definition: ehci.h:24
EHCI_QH_SET_HUBA
#define EHCI_QH_SET_HUBA(x)
Definition: ehci.h:31
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#define EHCI_QH_DTC
Definition: ehci.h:15
EHCI_QTD_SPLITXSTATE
#define EHCI_QTD_SPLITXSTATE
Definition: ehci.h:11
EHCI_QH_GET_DTC
#define EHCI_QH_GET_DTC(x)
Definition: ehci.h:14
EHCI_SITD_GET_ADDR
#define EHCI_SITD_GET_ADDR(x)
Definition: ehci.h:5
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#define EHCI_QH_HRECL
Definition: ehci.h:17
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#define EHCI_SITD_GET_PORT(x)
Definition: ehci.h:10
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#define EHCI_QH_SPEED_LOW
Definition: ehci.h:12
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#define EHCI_QH_SPEED_HIGH
Definition: ehci.h:13
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#define EHCI_QH_CTL
Definition: ehci.h:22
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#define EHCI_ITD_GET_ENDPT(x)
Definition: ehci.h:18
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#define EHCI_SITD_SET_DIR_IN
Definition: ehci.h:3
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#define EHCI_ITD_GET_LEN(x)
Definition: ehci.h:3
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#define EHCI_SITD_SET_CMASK(x)
Definition: ehci.h:15
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#define EHCI_QH_GET_EPS(x)
Definition: ehci.h:9
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#define EHCI_QTD_SET_BYTES(x)
Definition: ehci.h:26
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#define EHCI_QTD_SET_CERR(x)
Definition: ehci.h:20
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#define EHCI_SITD_SET_ADDR(x)
Definition: ehci.h:4
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#define EHCI_ITD_SET_MPL(x)
Definition: ehci.h:22
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#define EHCI_QTD_BABBLE
Definition: ehci.h:8
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#define EHCI_QH_GET_MPL(x)
Definition: ehci.h:18
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#define EHCI_QH_SET_PORT(x)
Definition: ehci.h:33
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#define EHCI_QTD_IOC
Definition: ehci.h:24
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#define EHCI_SITD_SET_SMASK(x)
Definition: ehci.h:14
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#define EHCI_SITD_SET_PORT(x)
Definition: ehci.h:9
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#define EHCI_QH_GET_PORT(x)
Definition: ehci.h:32
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#define EHCI_QH_SET_SMASK(x)
Definition: ehci.h:27
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Definition: ehci.h:28
EHCI_SITD_GET_ENDPT
#define EHCI_SITD_GET_ENDPT(x)
Definition: ehci.h:7
EHCI_SITD_SET_HUBA
#define EHCI_SITD_SET_HUBA(x)
Definition: ehci.h:11
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#define EHCI_SITD_ALIGN
Definition: ehci.h:65
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#define EHCI_QH_GET_ENDPT(x)
Definition: ehci.h:7
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#define EHCI_QTD_GET_IOC(x)
Definition: ehci.h:23
EHCI_ITD_IOC
#define EHCI_ITD_IOC
Definition: ehci.h:4
EHCI_SITD_GET_LEN
#define EHCI_SITD_GET_LEN(x)
Definition: ehci.h:27
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#define EHCI_QTD_GET_TOGGLE(x)
Definition: ehci.h:27
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volatile uint32_t qtd_altnext
Definition: ehci.h:1
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Definition: ehci.h:45
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#define EHCI_QH_SET_CMASK(x)
Definition: ehci.h:29
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#define EHCI_QH_SPEED_FULL
Definition: ehci.h:11
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#define EHCI_QH_GET_HUBA(x)
Definition: ehci.h:30
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#define EHCI_ITD_ACTIVE
Definition: ehci.h:9
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#define EHCI_LINK_TERMINATE
Definition: ehci.h:55
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#define EHCI_SCFLG_DONTRESET
Definition: ehci.h:346
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#define EHCI_QTD_ACTIVE
Definition: ehci.h:5
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#define EHCI_SITD_SET_LEN(len)
Definition: ehci.h:26
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#define EHCI_QH_ALIGN
Definition: ehci.h:67
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#define EHCI_SCFLG_NORESTERM
Definition: ehci.h:341
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#define EHCI_SCFLG_IAADBUG
Definition: ehci.h:345
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#define EHCI_ITD_SET_ADDR(x)
Definition: ehci.h:15
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#define EHCI_QH_SET_EPS(x)
Definition: ehci.h:10
len
uint16_t len
Definition: ehci.h:41
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#define EHCI_QTD_TOGGLE_MASK
Definition: ehci.h:29
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#define EHCI_QTD_XACTERR
Definition: ehci.h:9
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#define EHCI_QH_GET_NRL(x)
Definition: ehci.h:23
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#define EOREAD4(sc, a)
Definition: ehci.h:378
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#define EHCI_SITD_IOC
Definition: ehci.h:25
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#define EHCI_QH_GET_SMASK(x)
Definition: ehci.h:26
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#define EHCI_LINK_FSTN
Definition: ehci.h:60
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Definition: ehci.h:14
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static __inline uint32_t hc32toh(const struct ehci_softc *sc, const uint32_t v)
Definition: ehci.h:433
EHCI_ITD_ALIGN
#define EHCI_ITD_ALIGN
Definition: ehci.h:64
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#define EHCI_QH_SET_ENDPT(x)
Definition: ehci.h:8
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#define EHCI_QTD_SET_TOGGLE(x)
Definition: ehci.h:28
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#define EHCI_QTD_STATERRS
Definition: ehci.h:13
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#define EHCI_QH_SET_ADDR(x)
Definition: ehci.h:3
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#define EHCI_ITD_SET_ENDPT(x)
Definition: ehci.h:17
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#define EHCI_ITD_SET_LEN(x)
Definition: ehci.h:2
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#define EHCI_VIRTUAL_FRAMELIST_COUNT
Definition: ehci.h:44
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#define EHCI_QH_GET_HRECL(x)
Definition: ehci.h:16
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#define EOWRITE4(sc, a, x)
Definition: ehci.h:384
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Definition: ehci.h:1
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static __inline uint32_t htohc32(const struct ehci_softc *sc, const uint32_t v)
Definition: ehci.h:421
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#define EHCI_LINK_TYPE(x)
Definition: ehci.h:56
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#define EHCI_QTD_PID_OUT
Definition: ehci.h:16
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Definition: ehci.h:58
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#define EHCI_QH_SET_MPL(x)
Definition: ehci.h:19
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#define EHCI_LINK_SITD
Definition: ehci.h:59
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#define EHCI_QH_SET_NRL(x)
Definition: ehci.h:24
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#define EHCI_SCFLG_TT
Definition: ehci.h:343
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#define EHCI_QTD_PID_SETUP
Definition: ehci.h:18
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#define EHCI_ITD_SET_DIR_IN
Definition: ehci.h:20
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#define EHCI_QTD_NBUFFERS
Definition: ehci.h:30
EREAD4
#define EREAD4(sc, a)
Definition: ehci.h:367
EHCI_QH_GET_MULT
#define EHCI_QH_GET_MULT(x)
Definition: ehci.h:34
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#define EHCI_MAX_DEVICES
Definition: ehci.h:36
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#define EHCI_QTD_ALIGN
Definition: ehci.h:66
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#define EHCI_ITD_GET_ADDR(x)
Definition: ehci.h:16
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#define EHCI_PAGE_SIZE
Definition: ehci.h:70
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#define EHCI_SITD_SET_ENDPT(x)
Definition: ehci.h:6
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#define EHCI_QH_GET_INACT(x)
Definition: ehci.h:5
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#define EHCI_FRAMELIST_ALIGN
Definition: ehci.h:42
EHCI_QTD_MISSEDMICRO
#define EHCI_QTD_MISSEDMICRO
Definition: ehci.h:10
EHCI_SITD_GET_HUBA
#define EHCI_SITD_GET_HUBA(x)
Definition: ehci.h:12
EHCI_QTD_SET_PID
#define EHCI_QTD_SET_PID(x)
Definition: ehci.h:15
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volatile uint32_t sitd_portaddr
Definition: ehci.h:1
EHCI_QTD_PAYLOAD_MAX
#define EHCI_QTD_PAYLOAD_MAX
Definition: ehci.h:31
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Definition: ehci.h:57
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#define EHCI_QTD_PINGSTATE
Definition: ehci.h:12
EHCI_SCFLG_LOSTINTRBUG
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Definition: ehci.h:344
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Definition: ehci.h:13
EHCI_ITD_SET_PG
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Definition: ehci.h:5
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Definition: ehci.h:35
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Definition: ehci.h:25
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Definition: ehci.h:23
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#define EHCI_QH_GET_ADDR(x)
Definition: ehci.h:2
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Definition: ehci.h:21
EHCI_QH_GET_CMASK
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Definition: ehci.h:28
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#define EHCI_HCCPARAMS
Definition: ehcireg.h:69
EHCI_HCSPARAMS
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Definition: ehcireg.h:62
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Definition: ehcireg.h:107
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Definition: ehcireg.h:60
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Definition: ehcireg.h:146
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#define EHCI_PORT_SPEED_HIGH
Definition: ehcireg.h:188
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Definition: ehcireg.h:95
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#define EHCI_PORTSC_PSPD_MASK
Definition: ehcireg.h:184
EHCI_HOSTC_PSPD_MASK
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Definition: ehcireg.h:181
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Definition: ehcireg.h:141
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Definition: ehcireg.h:89
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Definition: ehcireg.h:127
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Definition: ehcireg.h:94
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Definition: ehcireg.h:97
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Definition: ehcireg.h:108
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#define EHCI_HOSTC(n)
Definition: ehcireg.h:179
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Definition: ehcireg.h:88
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Definition: ehcireg.h:61
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Definition: ehcireg.h:100
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Definition: ehcireg.h:148
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Definition: ehcireg.h:85
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#define EHCI_CMD_ITC_1
Definition: ehcireg.h:80
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Definition: ehcireg.h:87
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Definition: ehcireg.h:150
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Definition: ehcireg.h:102
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Definition: ehcireg.h:125
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Definition: ehcireg.h:96
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#define EHCI_PORTSC_PSPD_SHIFT
Definition: ehcireg.h:183
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#define EHCI_PS_CS
Definition: ehcireg.h:153
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Definition: ehcireg.h:68
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Definition: ehcireg.h:81
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Definition: ehcireg.h:145
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Definition: ehcireg.h:99
EHCI_PORT_RESET_COMPLETE
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Definition: ehcireg.h:156
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#define EHCI_PORTSC(n)
Definition: ehcireg.h:135
EHCI_CMD_ITC_8
#define EHCI_CMD_ITC_8
Definition: ehcireg.h:83
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#define EHCI_PS_CSC
Definition: ehcireg.h:152
EHCI_STS_FLR
#define EHCI_STS_FLR
Definition: ehcireg.h:104
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#define EHCI_CMD_PSE
Definition: ehcireg.h:92
EHCI_HCC_64BIT
#define EHCI_HCC_64BIT(x)
Definition: ehcireg.h:74
EHCI_CMD_IAAD
#define EHCI_CMD_IAAD
Definition: ehcireg.h:90
EHCI_PS_CLEAR
#define EHCI_PS_CLEAR
Definition: ehcireg.h:154
EHCI_HOSTC_PSPD_SHIFT
#define EHCI_HOSTC_PSPD_SHIFT
Definition: ehcireg.h:180
EHCI_PS_PIC
#define EHCI_PS_PIC
Definition: ehcireg.h:140
EHCI_HCS_PPC
#define EHCI_HCS_PPC(x)
Definition: ehcireg.h:67
EHCI_CMD_ASE
#define EHCI_CMD_ASE
Definition: ehcireg.h:91
EHCI_STS_HCH
#define EHCI_STS_HCH
Definition: ehcireg.h:101
EHCI_PS_FPR
#define EHCI_PS_FPR
Definition: ehcireg.h:147
EHCI_PS_OCA
#define EHCI_PS_OCA
Definition: ehcireg.h:149
EHCI_USBINTR
#define EHCI_USBINTR
Definition: ehcireg.h:117
EHCI_CONFIGFLAG
#define EHCI_CONFIGFLAG
Definition: ehcireg.h:132
EHCI_CAPLEN_HCIVERSION
#define EHCI_CAPLEN_HCIVERSION
Definition: ehcireg.h:59
EHCI_PS_IS_LOWSPEED
#define EHCI_PS_IS_LOWSPEED(x)
Definition: ehcireg.h:144
EHCI_STS_HSE
#define EHCI_STS_HSE
Definition: ehcireg.h:103
EHCI_USBCMD
#define EHCI_USBCMD
Definition: ehcireg.h:78
EHCI_CMD_ITC_4
#define EHCI_CMD_ITC_4
Definition: ehcireg.h:82
EHCI_CMD_ITC_16
#define EHCI_CMD_ITC_16
Definition: ehcireg.h:84
EHCI_PS_PP
#define EHCI_PS_PP
Definition: ehcireg.h:142
EHCI_HCS_P_INDICATOR
#define EHCI_HCS_P_INDICATOR(x)
Definition: ehcireg.h:64
EHCI_STS_ERRINT
#define EHCI_STS_ERRINT
Definition: ehcireg.h:106
EHCI_STS_PCD
#define EHCI_STS_PCD
Definition: ehcireg.h:105
EHCI_STS_ASS
#define EHCI_STS_ASS
Definition: ehcireg.h:98
EHCI_PORT_SPEED_LOW
#define EHCI_PORT_SPEED_LOW
Definition: ehcireg.h:187
EHCI_PERIODICLISTBASE
#define EHCI_PERIODICLISTBASE
Definition: ehcireg.h:129
EHCI_CMD_ITC_64
#define EHCI_CMD_ITC_64
Definition: ehcireg.h:86
EHCI_CMD_FLS_M
#define EHCI_CMD_FLS_M
Definition: ehcireg.h:93
EHCI_NORMAL_INTRS
#define EHCI_NORMAL_INTRS
Definition: ehcireg.h:114
EHCI_CONF_CF
#define EHCI_CONF_CF
Definition: ehcireg.h:133
EHCI_ASYNCLISTADDR
#define EHCI_ASYNCLISTADDR
Definition: ehcireg.h:130
EHCI_PS_PE
#define EHCI_PS_PE
Definition: ehcireg.h:151
n
uint8_t n
Definition: if_run.c:612
error
struct @109 error
td_next
volatile uint32_t td_next
Definition: ohci.h:19
itd_offset
volatile uint16_t itd_offset[OHCI_ITD_NOFFSET]
Definition: ohci.h:14
value
uint32_t value
index
u_int index
state
int state
bus
u_int bus
ehci_config_desc
Definition: ehci.h:303
ehci_config_desc::confd
struct usb_config_descriptor confd
Definition: ehci.h:304
ehci_hw_softc::terminate_pc
struct usb_page_cache terminate_pc
Definition: ehci.h:289
ehci_hw_softc::async_start_pg
struct usb_page async_start_pg
Definition: ehci.h:297
ehci_hw_softc::isoc_hs_start_pg
struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:299
ehci_hw_softc::isoc_fs_start_pg
struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:300
ehci_hw_softc::pframes_pc
struct usb_page_cache pframes_pc
Definition: ehci.h:288
ehci_hw_softc::pframes_pg
struct usb_page pframes_pg
Definition: ehci.h:295
ehci_hw_softc::intr_start_pg
struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:298
ehci_hw_softc::async_start_pc
struct usb_page_cache async_start_pc
Definition: ehci.h:290
ehci_hw_softc::isoc_fs_start_pc
struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:293
ehci_hw_softc::isoc_hs_start_pc
struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:292
ehci_hw_softc::terminate_pg
struct usb_page terminate_pg
Definition: ehci.h:296
ehci_hw_softc::intr_start_pc
struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:291
ehci_itd
Definition: ehci.h:84
ehci_itd::itd_self
uint32_t itd_self
Definition: ehci.h:113
ehci_itd::obj_next
struct ehci_itd * obj_next
Definition: ehci.h:116
ehci_itd::itd_bp_hi
volatile uint32_t itd_bp_hi[7]
Definition: ehci.h:109
ehci_itd::prev
struct ehci_itd * prev
Definition: ehci.h:115
ehci_itd::itd_next
volatile uint32_t itd_next
Definition: ehci.h:85
ehci_itd::next
struct ehci_itd * next
Definition: ehci.h:114
ehci_itd::itd_status
volatile uint32_t itd_status[8]
Definition: ehci.h:86
ehci_itd::page_cache
struct usb_page_cache * page_cache
Definition: ehci.h:117
ehci_itd::itd_bp
volatile uint32_t itd_bp[7]
Definition: ehci.h:98
ehci_qh_sub
Definition: ehci.h:219
ehci_qh_sub::qtd_status
volatile uint32_t qtd_status
Definition: ehci.h:222
ehci_qh_sub::qtd_buffer
volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]
Definition: ehci.h:223
ehci_qh_sub::qtd_altnext
volatile uint32_t qtd_altnext
Definition: ehci.h:221
ehci_qh_sub::qtd_buffer_hi
volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]
Definition: ehci.h:224
ehci_qh_sub::qtd_next
volatile uint32_t qtd_next
Definition: ehci.h:220
ehci_qh
Definition: ehci.h:228
ehci_qh::qh_self
uint32_t qh_self
Definition: ehci.h:274
ehci_qh::page_cache
struct usb_page_cache * page_cache
Definition: ehci.h:273
ehci_qh::qh_link
volatile uint32_t qh_link
Definition: ehci.h:229
ehci_qh::qh_qtd
struct ehci_qh_sub qh_qtd
Definition: ehci.h:266
ehci_qh::qh_endp
volatile uint32_t qh_endp
Definition: ehci.h:230
ehci_qh::next
struct ehci_qh * next
Definition: ehci.h:270
ehci_qh::prev
struct ehci_qh * prev
Definition: ehci.h:271
ehci_qh::obj_next
struct ehci_qh * obj_next
Definition: ehci.h:272
ehci_qh::qh_curqtd
volatile uint32_t qh_curqtd
Definition: ehci.h:265
ehci_qh::qh_endphub
volatile uint32_t qh_endphub
Definition: ehci.h:254
ehci_qtd
Definition: ehci.h:171
ehci_qtd::qtd_buffer_hi
volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]
Definition: ehci.h:205
ehci_qtd::page_cache
struct usb_page_cache * page_cache
Definition: ehci.h:211
ehci_qtd::qtd_status
volatile uint32_t qtd_status
Definition: ehci.h:174
ehci_qtd::qtd_altnext
volatile uint32_t qtd_altnext
Definition: ehci.h:173
ehci_qtd::qtd_buffer
volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]
Definition: ehci.h:204
ehci_qtd::alt_next
struct ehci_qtd * alt_next
Definition: ehci.h:209
ehci_qtd::obj_next
struct ehci_qtd * obj_next
Definition: ehci.h:210
ehci_qtd::qtd_self
uint32_t qtd_self
Definition: ehci.h:212
ehci_qtd::qtd_next
volatile uint32_t qtd_next
Definition: ehci.h:172
ehci_qtd::len
uint16_t len
Definition: ehci.h:213
ehci_sitd
Definition: ehci.h:126
ehci_sitd::obj_next
struct ehci_sitd * obj_next
Definition: ehci.h:164
ehci_sitd::prev
struct ehci_sitd * prev
Definition: ehci.h:163
ehci_sitd::sitd_back
volatile uint32_t sitd_back
Definition: ehci.h:156
ehci_sitd::sitd_bp_hi
volatile uint32_t sitd_bp_hi[2]
Definition: ehci.h:157
ehci_sitd::next
struct ehci_sitd * next
Definition: ehci.h:162
ehci_sitd::sitd_bp
volatile uint32_t sitd_bp[2]
Definition: ehci.h:155
ehci_sitd::sitd_portaddr
volatile uint32_t sitd_portaddr
Definition: ehci.h:128
ehci_sitd::sitd_next
volatile uint32_t sitd_next
Definition: ehci.h:127
ehci_sitd::sitd_mask
volatile uint32_t sitd_mask
Definition: ehci.h:140
ehci_sitd::sitd_self
uint32_t sitd_self
Definition: ehci.h:161
ehci_sitd::page_cache
struct usb_page_cache * page_cache
Definition: ehci.h:165
ehci_sitd::sitd_status
volatile uint32_t sitd_status
Definition: ehci.h:143
ehci_softc
Definition: ehci.h:316
ehci_softc::sc_vendor
char sc_vendor[16]
Definition: ehci.h:357
ehci_softc::sc_tmo_pcd
struct usb_callout sc_tmo_pcd
Definition: ehci.h:319
ehci_softc::sc_intr_p_last
struct ehci_qh * sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:327
ehci_softc::sc_tmo_poll
struct usb_callout sc_tmo_poll
Definition: ehci.h:320
ehci_softc::sc_async_p_last
struct ehci_qh * sc_async_p_last
Definition: ehci.h:326
ehci_softc::sc_intr_stat
uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:338
ehci_softc::sc_noport
uint8_t sc_noport
Definition: ehci.h:351
ehci_softc::sc_hub_idata
uint8_t sc_hub_idata[8]
Definition: ehci.h:355
ehci_softc::sc_vendor_post_reset
void(* sc_vendor_post_reset)(struct ehci_softc *sc)
Definition: ehci.h:359
ehci_softc::sc_conf
uint8_t sc_conf
Definition: ehci.h:353
ehci_softc::sc_terminate_self
uint32_t sc_terminate_self
Definition: ehci.h:335
ehci_softc::sc_eintrs
uint32_t sc_eintrs
Definition: ehci.h:336
ehci_softc::sc_hw
struct ehci_hw_softc sc_hw
Definition: ehci.h:317
ehci_softc::sc_isoc_hs_p_last
struct ehci_itd * sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:329
ehci_softc::sc_isoc_fs_p_last
struct ehci_sitd * sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]
Definition: ehci.h:328
ehci_softc::sc_flags
uint16_t sc_flags
Definition: ehci.h:340
ehci_softc::sc_offs
uint8_t sc_offs
Definition: ehci.h:349
ehci_softc::sc_bus
struct usb_bus sc_bus
Definition: ehci.h:318
ehci_softc::sc_hub_desc
union ehci_hub_desc sc_hub_desc
Definition: ehci.h:321
ehci_softc::sc_isreset
uint8_t sc_isreset
Definition: ehci.h:354
ehci_softc::sc_vendor_get_port_speed
uint16_t(* sc_vendor_get_port_speed)(struct ehci_softc *sc, uint16_t index)
Definition: ehci.h:360
ehci_softc::sc_addr
uint8_t sc_addr
Definition: ehci.h:352
ehci_std_temp
Definition: ehci.c:134
ehci_std_temp::max_frame_size
uint16_t max_frame_size
Definition: ehci.c:142
ehci_std_temp::auto_data_toggle
uint8_t auto_data_toggle
Definition: ehci.c:144
ehci_std_temp::sc
ehci_softc_t * sc
Definition: ehci.c:135
ehci_std_temp::td_next
ehci_qtd_t * td_next
Definition: ehci.c:138
ehci_std_temp::td
ehci_qtd_t * td
Definition: ehci.c:137
ehci_std_temp::shortpkt
uint8_t shortpkt
Definition: ehci.c:143
ehci_std_temp::pc
struct usb_page_cache * pc
Definition: ehci.c:136
ehci_std_temp::setup_alt_next
uint8_t setup_alt_next
Definition: ehci.c:145
ehci_std_temp::last_frame
uint8_t last_frame
Definition: ehci.c:146
ehci_std_temp::len
uint32_t len
Definition: ehci.c:141
ehci_std_temp::qtd_status
uint32_t qtd_status
Definition: ehci.c:140
ehci_std_temp::average
uint32_t average
Definition: ehci.c:139
usb_bus_methods
Definition: usb_controller.h:56
usb_bus_methods::endpoint_init
void(* endpoint_init)(struct usb_device *, struct usb_endpoint_descriptor *, struct usb_endpoint *)
Definition: usb_controller.h:61
usb_bus
Definition: usb_bus.h:48
usb_bus::usbrev
enum usb_revision usbrev
Definition: usb_bus.h:119
usb_bus::bdev
device_t bdev
Definition: usb_bus.h:101
usb_bus::bus_mtx
struct mtx bus_mtx
Definition: usb_bus.h:95
usb_bus::methods
const struct usb_bus_methods * methods
Definition: usb_bus.h:107
usb_bus::intr_q
struct usb_xfer_queue intr_q
Definition: usb_bus.h:97
usb_config_descriptor
Definition: usb.h:385
usb_config_descriptor::bDescriptorType
uByte bDescriptorType
Definition: usb.h:387
usb_config_descriptor::bNumInterface
uByte bNumInterface
Definition: usb.h:389
usb_config_descriptor::bmAttributes
uByte bmAttributes
Definition: usb.h:393
usb_config_descriptor::bLength
uByte bLength
Definition: usb.h:386
usb_config_descriptor::bMaxPower
uByte bMaxPower
Definition: usb.h:397
usb_config_descriptor::iConfiguration
uByte iConfiguration
Definition: usb.h:392
usb_config_descriptor::bConfigurationValue
uByte bConfigurationValue
Definition: usb.h:390
usb_device_descriptor
Definition: usb.h:288
usb_device_flags::self_suspended
uint8_t self_suspended
Definition: usb_device.h:107
usb_device_flags::usb_mode
enum usb_hc_mode usb_mode
Definition: usb_device.h:94
usb_device_qualifier
Definition: usb.h:658
usb_device_request
Definition: usb.h:147
usb_device
Definition: usb_device.h:190
usb_device::parent_hs_hub
struct usb_device * parent_hs_hub
Definition: usb_device.h:219
usb_device::speed
enum usb_dev_speed speed
Definition: usb_device.h:235
usb_device::hs_port_no
uint8_t hs_port_no
Definition: usb_device.h:253
usb_device::hub
struct usb_hub * hub
Definition: usb_device.h:221
usb_device::bus
struct usb_bus * bus
Definition: usb_device.h:216
usb_device::device_index
uint8_t device_index
Definition: usb_device.h:244
usb_device::address
uint8_t address
Definition: usb_device.h:243
usb_device::hs_hub_addr
uint8_t hs_hub_addr
Definition: usb_device.h:252
usb_device::flags
struct usb_device_flags flags
Definition: usb_device.h:266
usb_endpoint_descriptor
Definition: usb.h:525
usb_endpoint_descriptor::bEndpointAddress
uByte bEndpointAddress
Definition: usb.h:528
usb_endpoint_descriptor::bDescriptorType
uByte bDescriptorType
Definition: usb.h:527
usb_endpoint_descriptor::bmAttributes
uByte bmAttributes
Definition: usb.h:539
usb_endpoint
Definition: usbdi.h:140
usb_endpoint::usb_smask
uint8_t usb_smask
Definition: usbdi.h:162
usb_endpoint::toggle_next
uint8_t toggle_next
Definition: usbdi.h:150
usb_endpoint::isoc_next
uint16_t isoc_next
Definition: usbdi.h:148
usb_endpoint::methods
const struct usb_pipe_methods * methods
Definition: usbdi.h:146
usb_endpoint::usb_cmask
uint8_t usb_cmask
Definition: usbdi.h:163
usb_hub_descriptor
Definition: usb.h:602
usb_hub_descriptor::wHubCharacteristics
uWord wHubCharacteristics
Definition: usb.h:606
usb_hub_descriptor::bNbrPorts
uByte bNbrPorts
Definition: usb.h:605
usb_hub_descriptor::bDescLength
uByte bDescLength
Definition: usb.h:603
usb_hub_descriptor::bPwrOn2PwrGood
uByte bPwrOn2PwrGood
Definition: usb.h:622
usb_interface_descriptor
Definition: usb.h:402
usb_interface_descriptor::bDescriptorType
uByte bDescriptorType
Definition: usb.h:404
usb_page_cache
Definition: usb_busdma.h:89
usb_page_search
Definition: usb_busdma.h:77
usb_page_search::buffer
void * buffer
Definition: usb_busdma.h:78
usb_pipe_methods
Definition: usb_controller.h:157
usb_pipe_methods::open
void(* open)(struct usb_xfer *)
Definition: usb_controller.h:160
usb_port_status::wPortStatus
uWord wPortStatus
Definition: usb.h:704
usb_port_status::wPortChange
uWord wPortChange
Definition: usb.h:735
usb_setup_params
Definition: usb_transfer.h:97
usb_setup_params::hc_max_frame_size
uint32_t hc_max_frame_size
Definition: usb_transfer.h:115
usb_setup_params::buf
void * buf
Definition: usb_transfer.h:108
usb_setup_params::hc_max_packet_count
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Definition: usb_core.h:140
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Definition: usb_core.h:174
DPRINTF
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Definition: ehci.h:310
ehci_hub_desc::temp
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ehci_hub_desc::hubd
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ehci_hub_desc::ps
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Definition: ehci.h:311
UE_INTERRUPT
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Definition: usb.h:544
UR_SET_CONFIG
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Definition: usb.h:219
UPS_C_PORT_RESET
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Definition: usb.h:740
UHD_PWR_INDIVIDUAL
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Definition: usb.h:609
UDSUBCLASS_HUB
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Definition: usb.h:374
UC_SELF_POWERED
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Definition: usb.h:395
UT_WRITE_INTERFACE
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Definition: usb.h:170
UR_SET_DESCRIPTOR
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Definition: usb.h:217
UE_BULK
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UHF_PORT_POWER
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Definition: usb.h:254
UR_GET_CONFIG
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Definition: usb.h:218
UT_WRITE_CLASS_OTHER
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Definition: usb.h:178
UISUBCLASS_HUB
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Definition: usb.h:480
UT_WRITE_CLASS_DEVICE
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Definition: usb.h:176
UR_SET_ADDRESS
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Definition: usb.h:193
UPS_C_PORT_ENABLED
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Definition: usb.h:737
UT_WRITE_DEVICE
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Definition: usb.h:169
UDESC_CONFIG
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Definition: usb.h:196
UR_GET_INTERFACE
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Definition: usb.h:220
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Definition: usb.h:739
UDCLASS_HUB
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Definition: usb.h:373
UR_CLEAR_TT_BUFFER
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UR_GET_STATUS
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Definition: usb.h:190
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Definition: usb.h:259
UR_CLEAR_FEATURE
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Definition: usb.h:191
UDESC_ENDPOINT
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Definition: usb.h:200
UPS_LOW_SPEED
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Definition: usb.h:729
UDESC_DEVICE_QUALIFIER
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Definition: usb.h:201
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Definition: usb.h:538
UDS_SELF_POWERED
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Definition: usb.h:688
UHF_PORT_TEST
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Definition: usb.h:262
UPS_PORT_POWER
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Definition: usb.h:727
UDESC_HUB
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Definition: usb.h:214
UDESC_STRING
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Definition: usb.h:197
UHF_C_PORT_OVER_CURRENT
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Definition: usb.h:260
UHF_PORT_SUSPEND
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Definition: usb.h:250
UR_STOP_TT
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Definition: usb.h:231
UE_DIR_IN
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Definition: usb.h:531
UR_SYNCH_FRAME
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Definition: usb.h:222
UT_READ_DEVICE
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Definition: usb.h:166
UDPROTO_HSHUBSTT
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Definition: usb.h:376
UR_GET_TT_STATE
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Definition: usb.h:230
UE_XFERTYPE
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Definition: usb.h:540
UHF_PORT_ENABLE
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Definition: usb.h:249
UICLASS_HUB
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Definition: usb.h:479
UDESC_DEVICE
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Definition: usb.h:195
UDESC_INTERFACE
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Definition: usb.h:199
UPS_HIGH_SPEED
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Definition: usb.h:730
USB_SPEED_FULL
@ USB_SPEED_FULL
Definition: usb.h:754
USB_SPEED_HIGH
@ USB_SPEED_HIGH
Definition: usb.h:755
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Definition: usb.h:229
UE_DIR_OUT
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Definition: usb.h:532
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Definition: usb.h:529
UPS_PORT_ENABLED
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Definition: usb.h:706
UT_WRITE_ENDPOINT
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Definition: usb.h:171
UT_READ_CLASS_DEVICE
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Definition: usb.h:172
UHF_PORT_RESET
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Definition: usb.h:252
UDPROTO_FSHUB
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Definition: usb.h:375
UR_SET_INTERFACE
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Definition: usb.h:221
UT_READ_CLASS_OTHER
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Definition: usb.h:174
UE_CONTROL
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Definition: usb.h:541
UHF_PORT_INDICATOR
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Definition: usb.h:263
UT_READ_ENDPOINT
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Definition: usb.h:168
UHF_C_PORT_RESET
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Definition: usb.h:261
USB_REV_2_0
@ USB_REV_2_0
Definition: usb.h:768
USB_FS_BYTES_PER_HS_UFRAME
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UPS_C_SUSPEND
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Definition: usb.h:738
UHD_PWR_NO_SWITCH
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Definition: usb.h:610
UHD_PORT_IND
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Definition: usb.h:621
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Definition: usb.h:736
UPS_CURRENT_CONNECT_STATUS
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Definition: usb.h:705
UE_ISOCHRONOUS
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Definition: usb.h:542
UHF_C_PORT_ENABLE
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Definition: usb.h:258
UR_SET_FEATURE
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Definition: usb.h:192
UPS_OVERCURRENT_INDICATOR
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Definition: usb.h:708
UPS_SUSPEND
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Definition: usb.h:707
UT_READ_INTERFACE
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Definition: usb.h:167
UR_GET_DESCRIPTOR
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Definition: usb.h:194
UHF_C_PORT_CONNECTION
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Definition: usb.h:257
UPS_RESET
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Definition: usb.h:709
usb_bus.h
usbd_get_page
void usbd_get_page(struct usb_page_cache *pc, usb_frlength_t offset, struct usb_page_search *res)
Definition: usb_busdma.c:86
usb_busdma.h
usb_pc_cpu_invalidate
void usb_pc_cpu_invalidate(struct usb_page_cache *pc)
usb_pc_cpu_flush
void usb_pc_cpu_flush(struct usb_page_cache *pc)
usb_controller.h
USB_HW_POWER_RESUME
#define USB_HW_POWER_RESUME
Definition: usb_controller.h:102
usb_bus_mem_flush_all
void usb_bus_mem_flush_all(struct usb_bus *bus, usb_bus_mem_cb_t *cb)
USB_HW_POWER_BULK
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Definition: usb_controller.h:79
USB_HW_POWER_CONTROL
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Definition: usb_controller.h:74
USB_HW_POWER_SUSPEND
#define USB_HW_POWER_SUSPEND
Definition: usb_controller.h:98
USB_HW_POWER_SHUTDOWN
#define USB_HW_POWER_SHUTDOWN
Definition: usb_controller.h:106
usb_bus_mem_sub_cb_t
void() usb_bus_mem_sub_cb_t(struct usb_bus *bus, struct usb_page_cache *pc, struct usb_page *pg, usb_size_t size, usb_size_t align)
Definition: usb_controller.h:49
USB_HW_POWER_ISOC
#define USB_HW_POWER_ISOC
Definition: usb_controller.h:89
USB_HW_POWER_INTERRUPT
#define USB_HW_POWER_INTERRUPT
Definition: usb_controller.h:84
usb_core.h
USB_BUS_LOCK
#define USB_BUS_LOCK(_b)
Definition: usb_core.h:45
USB_BUS_UNLOCK
#define USB_BUS_UNLOCK(_b)
Definition: usb_core.h:46
USB_BUS_LOCK_ASSERT
#define USB_BUS_LOCK_ASSERT(_b, _t)
Definition: usb_core.h:47
usb_debug.h
usb_port_root_reset_delay
#define usb_port_root_reset_delay
Definition: usb_debug.h:77
usbd_get_speed
enum usb_dev_speed usbd_get_speed(struct usb_device *udev)
Definition: usb_device.c:2589
usb_device.h
USETW
#define USETW(w, v)
Definition: usb_endian.h:77
UGETW
#define UGETW(w)
Definition: usb_endian.h:53
USB_FS_ISOC_UFRAME_MAX
#define USB_FS_ISOC_UFRAME_MAX
Definition: usb_freebsd.h:77
uhub_root_intr
void uhub_root_intr(struct usb_bus *bus, const uint8_t *ptr, uint8_t len)
Definition: usb_hub.c:960
usb_hs_bandwidth_alloc
void usb_hs_bandwidth_alloc(struct usb_xfer *xfer)
Definition: usb_hub.c:1908
usb_hs_bandwidth_free
void usb_hs_bandwidth_free(struct usb_xfer *xfer)
Definition: usb_hub.c:1989
usb_hub.h
pptr
void ** pptr
Definition: usb_if.m:52
plen
uint16_t * plen
Definition: usb_if.m:53
req
const void * req
Definition: usb_if.m:51
usb_process.h
usbd_transfer_setup_sub
void usbd_transfer_setup_sub(struct usb_setup_params *parm)
Definition: usb_transfer.c:457
usbd_transfer_done
void usbd_transfer_done(struct usb_xfer *xfer, usb_error_t error)
Definition: usb_transfer.c:2593
usbd_xfer_set_frame_len
void usbd_xfer_set_frame_len(struct usb_xfer *xfer, usb_frcount_t frindex, usb_frlength_t len)
Definition: usb_transfer.c:2316
usbd_xfer_get_fps_shift
uint8_t usbd_xfer_get_fps_shift(struct usb_xfer *xfer)
Definition: usb_transfer.c:2186
usb_dma_delay_done_cb
void usb_dma_delay_done_cb(struct usb_xfer *xfer)
Definition: usb_transfer.c:2530
usbd_transfer_enqueue
void usbd_transfer_enqueue(struct usb_xfer_queue *pq, struct usb_xfer *xfer)
Definition: usb_transfer.c:2569
usbd_xfer_get_isochronous_start_frame
uint8_t usbd_xfer_get_isochronous_start_frame(struct usb_xfer *xfer, uint32_t frame_curr, uint32_t frame_min, uint32_t frame_ms, uint32_t frame_mask, uint32_t *p_frame_start)
Definition: usb_transfer.c:3692
usbd_transfer_timeout_ms
void usbd_transfer_timeout_ms(struct usb_xfer *xfer, void(*cb)(void *arg), usb_timeout_t ms)
Definition: usb_transfer.c:2934
usb_transfer.h
usbd_transfer_setup_sub_malloc
uint8_t usbd_transfer_setup_sub_malloc(struct usb_setup_params *parm, struct usb_page_cache **ppc, usb_size_t size, usb_size_t align, usb_size_t count)
usb_pause_mtx
void usb_pause_mtx(struct mtx *mtx, int timo)
Definition: usb_util.c:135
usb_make_str_desc
uint8_t usb_make_str_desc(void *ptr, uint16_t max_len, const char *s)
Definition: usb_util.c:193
usb_util.h
usb_callout_init_mtx
#define usb_callout_init_mtx(c, m, f)
Definition: usbdi.h:480
usb_callout_reset
#define usb_callout_reset(c,...)
Definition: usbdi.h:481
usb_error_t
usb_error_t
Definition: usbdi.h:45
USB_ERR_NORMAL_COMPLETION
@ USB_ERR_NORMAL_COMPLETION
Definition: usbdi.h:46
USB_ERR_STALLED
@ USB_ERR_STALLED
Definition: usbdi.h:68
USB_ERR_IOERROR
@ USB_ERR_IOERROR
Definition: usbdi.h:64
USB_ERR_NOMEM
@ USB_ERR_NOMEM
Definition: usbdi.h:50
USB_ERR_CANCELLED
@ USB_ERR_CANCELLED
Definition: usbdi.h:51
USB_ERR_TIMEOUT
@ USB_ERR_TIMEOUT
Definition: usbdi.h:66
usb_callout_drain
#define usb_callout_drain(c)
Definition: usbdi.h:497
USB_MS_TO_TICKS
#define USB_MS_TO_TICKS(ms)
Definition: usbdi.h:120
usb_callout_stop
#define usb_callout_stop(c)
Definition: usbdi.h:489
status
uint8_t status
Definition: xhci.h:14