The file defines the constants, data structure, and functions defined by LL API.
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#define | SA_CONFIG_MDFD_REGISTRY |
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#define | OSSA_OFFSET_OF(STRUCT_TYPE, FEILD) (bitptr)&(((STRUCT_TYPE *)0)->FEILD) |
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#define | AGSA_WRITE_SGL(sglDest, sgLower, sgUpper, len, extReserved) |
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#define | AGSA_FLIP_2_BYTES(_x) |
| AGSA_FLIP_2_BYTES macro. More...
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#define | AGSA_FLIP_4_BYTES(_x) |
| AGSA_FLIP_4_BYTES macro. More...
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#define | FW_THIS_VERSION_SPC12G 0x03060005 |
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#define | FW_THIS_VERSION_SPC6G 0x02092400 |
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#define | FW_THIS_VERSION_SPC 0x01110000 |
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#define | STSDK_LL_INTERFACE_VERSION 0x20A |
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#define | STSDK_LL_OLD_INTERFACE_VERSION 0x1 /* SPC and SPCv before 02030401 */ |
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#define | STSDK_LL_VERSION FW_THIS_VERSION_SPC6G |
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#define | MAX_FW_VERSION_SUPPORTED FW_THIS_VERSION_SPC6G |
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#define | MATCHING_V_FW_VERSION FW_THIS_VERSION_SPC6G |
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#define | MIN_FW_SPCVE_VERSION_SUPPORTED 0x02000000 |
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#define | STSDK_LL_12G_INTERFACE_VERSION 0x302 |
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#define | STSDK_LL_12G_VERSION FW_THIS_VERSION_SPC12G |
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#define | MAX_FW_12G_VERSION_SUPPORTED FW_THIS_VERSION_SPC12G |
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#define | MATCHING_12G_V_FW_VERSION FW_THIS_VERSION_SPC12G |
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#define | MIN_FW_12G_SPCVE_VERSION_SUPPORTED 0x03000000 |
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#define | STSDK_LL_SPC_VERSION 0x01100000 |
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#define | MATCHING_SPC_FW_VERSION FW_THIS_VERSION_SPC |
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#define | MIN_FW_SPC_VERSION_SUPPORTED 0x01062502 |
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#define | STSDK_LL_INTERFACE_VERSION_IGNORE_MASK 0xF00 |
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#define | AGSA_RC_SUCCESS 0x00 |
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#define | AGSA_RC_FAILURE 0x01 |
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#define | AGSA_RC_BUSY 0x02 |
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#define | AGSA_RC_HDA_NO_FW_RUNNING 0x03 |
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#define | AGSA_RC_FW_NOT_IN_READY_STATE 0x04 |
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#define | AGSA_RC_VERSION_INCOMPATIBLE 0x05 |
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#define | AGSA_RC_VERSION_UNTESTED 0x06 |
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#define | AGSA_RC_NOT_SUPPORTED 0x07 |
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#define | AGSA_RC_COMPLETE 0x08 |
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#define | AGSA_CACHED_MEM 0x00 |
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#define | AGSA_DMA_MEM 0x01 |
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#define | AGSA_CACHED_DMA_MEM 0x02 |
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#define | AGSA_NUM_MEM_CHUNKS (10 + AGSA_MAX_INBOUND_Q + AGSA_MAX_OUTBOUND_Q) |
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#define | AGSA_MAX_VALID_PHYS 16 /* was 8 for SPC */ |
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#define | MAX_ESGL_ENTRIES 10 |
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#define | AGSA_MAX_INBOUND_Q 64 |
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#define | AGSA_MAX_OUTBOUND_Q 64 |
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#define | AGSA_MAX_BEST_INBOUND_Q 16 /* Max inbound Q number with good IO performance */ |
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#define | AGSA_PHY_LINK_RESET 0x01 |
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#define | AGSA_PHY_HARD_RESET 0x02 |
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#define | AGSA_PHY_GET_ERROR_COUNTS 0x03 /* SPC only used in original saLocalPhyControl */ |
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#define | AGSA_PHY_CLEAR_ERROR_COUNTS 0x04 /* SPC only */ |
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#define | AGSA_PHY_GET_BW_COUNTS 0x05 /* SPC only */ |
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#define | AGSA_PHY_NOTIFY_ENABLE_SPINUP 0x10 |
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#define | AGSA_PHY_BROADCAST_ASYNCH_EVENT 0x12 |
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#define | AGSA_PHY_COMINIT_OOB 0x20 |
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#define | AGSA_SAS_PHY_ERR_COUNTERS_PAGE 0x01 /* retrieve the SAS PHY error counters */ |
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#define | AGSA_SAS_PHY_ERR_COUNTERS_CLR_PAGE 0x02 /* retrieve the SAS PHY error counters After capturing the errors, the hardware error counters are cleared and restarted. */ |
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#define | AGSA_SAS_PHY_BW_COUNTERS_PAGE 0x03 /* retrieve the SAS PHY transmit and receive bandwidth counters. */ |
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#define | AGSA_SAS_PHY_ANALOG_SETTINGS_PAGE 0x04 /* retrieve the SAS PHY analog settings */ |
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#define | AGSA_SAS_PHY_GENERAL_STATUS_PAGE 0x05 /* retrieve the SAS PHY general status for the PHY specified in the phyID parameter */ |
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#define | AGSA_PHY_SNW3_PAGE 0x06 |
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#define | AGSA_PHY_RATE_CONTROL_PAGE 0x07 /* Used to set several rate control parameters. */ |
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#define | AGSA_SAS_PHY_MISC_PAGE 0x08 |
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#define | AGSA_SAS_PHY_OPEN_REJECT_RETRY_BACKOFF_THRESHOLD_PAGE 0x08 /* Used to set retry and backoff threshold parameters. */ |
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#define | AGSA_CHIP_RESET 0x00 |
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#define | AGSA_SOFT_RESET 0x01 |
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#define | AG_SA_DISCOVERY_TYPE_SAS 0x00 |
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#define | AG_SA_DISCOVERY_TYPE_SATA 0x01 |
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#define | AG_SA_DISCOVERY_OPTION_FULL_START 0x00 |
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#define | AG_SA_DISCOVERY_OPTION_INCREMENTAL_START 0x01 |
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#define | AG_SA_DISCOVERY_OPTION_ABORT 0x02 |
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#define | AGSA_REQTYPE_MASK 0xF0000000 |
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#define | AGSA_REQ_TYPE_UNKNOWN 0x00000000 |
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#define | AGSA_SSP_REQTYPE 0x80000000 |
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#define | AGSA_SMP_REQTYPE 0x40000000 |
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#define | AGSA_SATA_REQTYPE 0x20000000 |
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#define | AGSA_DIR_MASK 0x00000300 |
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#define | AGSA_AUTO_MASK 0x00000080 |
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#define | AGSA_SATA_ATAP_MASK 0x0000FC00 |
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#define | AGSA_DIR_NONE 0x00000000 |
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#define | AGSA_DIR_CONTROLLER_TO_HOST 0x00000100 |
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#define | AGSA_DIR_HOST_TO_CONTROLLER 0x00000200 |
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#define | AGSA_AUTO_GOOD_RESPONSE 0x00000080 |
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#define | AGSA_SSP_INIT 0x00000001 |
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#define | AGSA_SSP_TGT_MODE 0x00000003 |
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#define | AGSA_SSP_TASK_MGNT 0x00000005 |
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#define | AGSA_SSP_TGT_RSP 0x00000006 |
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#define | AGSA_SMP_INIT 0x00000007 |
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#define | AGSA_SMP_TGT 0x00000008 |
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#define | AGSA_SSP_INIT_EXT (AGSA_SSP_INIT | AGSA_SSP_EXT_BIT) |
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#define | AGSA_SSP_INIT_INDIRECT (AGSA_SSP_INIT | AGSA_SSP_INDIRECT_BIT) |
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#define | AGSA_MSG 0x00000010 |
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#define | AGSA_SSP_EXT_BIT 0x00000020 |
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#define | AGSA_SSP_INDIRECT_BIT 0x00000040 |
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#define | AGSA_MSG_BIT AGSA_MSG >> 2 |
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#define | AGSA_INDIRECT_CDB_BIT 0x00000008 |
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#define | AGSA_SKIP_MASK_BIT 0x00000010 |
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#define | AGSA_ENCRYPT_BIT 0x00000020 |
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#define | AGSA_DIF_BIT 0x00000040 |
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#define | AGSA_DIF_LA_BIT 0x00000080 |
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#define | AGSA_DIRECTION_BITS 0x00000300 |
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#define | AGSA_SKIP_MASK_OFFSET_BITS 0x0F000000 |
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#define | AGSA_SSP_INFO_LENGTH_BITS 0xF0000000 |
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#define | AGSA_SSP_TGT_BITS_INI_TAG 0xFFFF0000 /* 16 31 */ |
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#define | AGSA_SSP_TGT_BITS_ODS 0x00008000 /* 15 */ |
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#define | AGSA_SSP_TGT_BITS_DEE_DIF 0x00004000 /* 14 */ |
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#define | AGSA_SSP_TGT_BITS_DEE 0x00002000 /* 13 14 */ |
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#define | AGSA_SSP_TGT_BITS_R 0x00001000 /* 12 */ |
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#define | AGSA_SSP_TGT_BITS_DAD 0x00000600 /* 11 10 */ |
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#define | AGSA_SSP_TGT_BITS_DIR 0x00000300 /* 8 9 */ |
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#define | AGSA_SSP_TGT_BITS_DIR_IN 0x00000100 /* 8 9 */ |
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#define | AGSA_SSP_TGT_BITS_DIR_OUT 0x00000200 /* 8 9 */ |
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#define | AGSA_SSP_TGT_BITS_AGR 0x00000080 /* 7 */ |
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#define | AGSA_SSP_TGT_BITS_RDF 0x00000040 /* 6 */ |
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#define | AGSA_SSP_TGT_BITS_RTE 0x00000030 /* 4 5 */ |
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#define | AGSA_SSP_TGT_BITS_AN 0x00000006 /* 2 3 */ |
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#define | AGSA_DIF_UPDATE_BITS 0xFC000000 |
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#define | AGSA_DIF_VERIFY_BITS 0x03F00000 |
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#define | AGSA_DIF_BLOCK_SIZE_BITS 0x000F0000 |
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#define | AGSA_DIF_ENABLE_BLOCK_COUNT_BIT 0x00000040 |
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#define | AGSA_DIF_CRC_SEED_BIT 0x00000020 |
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#define | AGSA_DIF_CRC_INVERT_BIT 0x00000010 |
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#define | AGSA_DIF_CRC_VERIFY_BIT 0x00000008 |
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#define | AGSA_DIF_OP_BITS 0x00000007 |
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#define | AGSA_DIF_OP_INSERT 0x00000000 |
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#define | AGSA_DIF_OP_VERIFY_AND_FORWARD 0x00000001 |
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#define | AGSA_DIF_OP_VERIFY_AND_DELETE 0x00000002 |
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#define | AGSA_DIF_OP_VERIFY_AND_REPLACE 0x00000003 |
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#define | AGSA_DIF_OP_RESERVED2 0x00000004 |
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#define | AGSA_DIF_OP_VERIFY_UDT_REPLACE_CRC 0x00000005 |
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#define | AGSA_DIF_OP_RESERVED3 0x00000006 |
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#define | AGSA_DIF_OP_REPLACE_UDT_REPLACE_CRC 0x00000007 |
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#define | AGSA_ENCRYPT_DEK_BITS 0xFFFFFF000 |
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#define | AGSA_ENCRYPT_SKIP_DIF_BIT 0x000000010 |
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#define | AGSA_ENCRYPT_KEY_TABLE_BITS 0x00000000C |
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#define | AGSA_ENCRYPT_KEY_TAG_BIT 0x000000002 |
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#define | AGSA_ENCRYPT_ECB_Mode 0 |
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#define | AGSA_ENCRYPT_XTS_Mode 0x6 |
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#define | AGSA_ENCRYPT_KEK_SELECT_BITS 0x0000000E0 |
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#define | AGSA_ENCRYPT_SECTOR_SIZE_BITS 0x00000001F |
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#define | AGSA_SSP_INIT_NONDATA (AGSA_SSP_REQTYPE | AGSA_DIR_NONE | AGSA_SSP_INIT) |
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#define | AGSA_SSP_INIT_READ (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT) |
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#define | AGSA_SSP_INIT_WRITE (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT) |
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#define | AGSA_SSP_TGT_READ_DATA (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_TGT_MODE) |
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#define | AGSA_SSP_TGT_READ (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_TGT_MODE) |
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#define | AGSA_SSP_TGT_READ_GOOD_RESP (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_TGT_MODE | AGSA_AUTO_GOOD_RESPONSE) |
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#define | AGSA_SSP_TGT_WRITE_DATA (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_TGT_MODE) |
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#define | AGSA_SSP_TGT_WRITE (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_TGT_MODE) |
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#define | AGSA_SSP_TGT_WRITE_GOOD_RESP (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_TGT_MODE | AGSA_AUTO_GOOD_RESPONSE) |
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#define | AGSA_SSP_TASK_MGNT_REQ (AGSA_SSP_REQTYPE | AGSA_SSP_TASK_MGNT) |
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#define | AGSA_SSP_TGT_CMD_OR_TASK_RSP (AGSA_SSP_REQTYPE | AGSA_SSP_TGT_RSP) |
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#define | AGSA_SMP_INIT_REQ (AGSA_SMP_REQTYPE | AGSA_SMP_INIT) |
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#define | AGSA_SMP_TGT_RESPONSE (AGSA_SMP_REQTYPE | AGSA_SMP_TGT) |
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#define | AGSA_SSP_INIT_READ_M (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT | AGSA_MSG) |
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#define | AGSA_SSP_INIT_WRITE_M (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT | AGSA_MSG) |
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#define | AGSA_SSP_TASK_MGNT_REQ_M (AGSA_SSP_REQTYPE | AGSA_SSP_TASK_MGNT | AGSA_MSG) |
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#define | AGSA_SSP_INIT_READ_EXT (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT_EXT) |
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#define | AGSA_SSP_INIT_WRITE_EXT (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT_EXT) |
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#define | AGSA_SSP_INIT_READ_INDIRECT (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT_INDIRECT) |
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#define | AGSA_SSP_INIT_WRITE_INDIRECT (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT_INDIRECT) |
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#define | AGSA_SSP_INIT_READ_INDIRECT_M (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT_INDIRECT | AGSA_MSG) |
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#define | AGSA_SSP_INIT_WRITE_INDIRECT_M (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT_INDIRECT | AGSA_MSG) |
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#define | AGSA_SSP_INIT_READ_EXT_M (AGSA_SSP_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SSP_INIT_EXT | AGSA_MSG) |
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#define | AGSA_SSP_INIT_WRITE_EXT_M (AGSA_SSP_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SSP_INIT_EXT | AGSA_MSG) |
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#define | AGSA_SMP_IOCTL_REQUEST 0xFFFFFFFF |
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#define | AGSA_SATA_ATAP_SRST_ASSERT 0x00000400 |
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#define | AGSA_SATA_ATAP_SRST_DEASSERT 0x00000800 |
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#define | AGSA_SATA_ATAP_EXECDEVDIAG 0x00000C00 |
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#define | AGSA_SATA_ATAP_NON_DATA 0x00001000 |
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#define | AGSA_SATA_ATAP_PIO 0x00001400 |
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#define | AGSA_SATA_ATAP_DMA 0x00001800 |
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#define | AGSA_SATA_ATAP_NCQ 0x00001C00 |
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#define | AGSA_SATA_ATAP_PKT_DEVRESET 0x00002000 |
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#define | AGSA_SATA_ATAP_PKT 0x00002400 |
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#define | AGSA_SATA_PROTOCOL_NON_DATA (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_NON_DATA) |
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#define | AGSA_SATA_PROTOCOL_PIO_READ (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_PIO) |
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#define | AGSA_SATA_PROTOCOL_DMA_READ (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_DMA) |
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#define | AGSA_SATA_PROTOCOL_FPDMA_READ (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_NCQ) |
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#define | AGSA_SATA_PROTOCOL_PIO_WRITE (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_PIO) |
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#define | AGSA_SATA_PROTOCOL_DMA_WRITE (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_DMA) |
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#define | AGSA_SATA_PROTOCOL_FPDMA_WRITE (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_NCQ) |
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#define | AGSA_SATA_PROTOCOL_DEV_RESET (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_PKT_DEVRESET) |
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#define | AGSA_SATA_PROTOCOL_SRST_ASSERT (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_SRST_ASSERT) |
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#define | AGSA_SATA_PROTOCOL_SRST_DEASSERT (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_SRST_DEASSERT) |
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#define | AGSA_SATA_PROTOCOL_D2H_PKT (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_PKT) |
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#define | AGSA_SATA_PROTOCOL_H2D_PKT (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_PKT) |
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#define | AGSA_SATA_PROTOCOL_NON_PKT (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_PKT) |
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#define | AGSA_SATA_PROTOCOL_NON_DATA_M (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_NON_DATA | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_PIO_READ_M (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_PIO | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_DMA_READ_M (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_DMA | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_FPDMA_READ_M (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_NCQ | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_PIO_WRITE_M (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_PIO | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_DMA_WRITE_M (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_DMA | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_FPDMA_WRITE_M (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_NCQ | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_D2H_PKT_M (AGSA_SATA_REQTYPE | AGSA_DIR_CONTROLLER_TO_HOST | AGSA_SATA_ATAP_PKT | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_H2D_PKT_M (AGSA_SATA_REQTYPE | AGSA_DIR_HOST_TO_CONTROLLER | AGSA_SATA_ATAP_PKT | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_NON_PKT_M (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_PKT | AGSA_MSG) |
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#define | AGSA_SATA_PROTOCOL_DEV_RESET_M (AGSA_SATA_REQTYPE | AGSA_DIR_NONE | AGSA_SATA_ATAP_PKT_DEVRESET | AGSA_MSG) |
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#define | AGSA_INTERRUPT_HANDLE_ALL_CHANNELS 0xFFFFFFFF |
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#define | AGSA_IBQ_PRIORITY_NORMAL 0x0 |
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#define | AGSA_IBQ_PRIORITY_HIGH 0x1 |
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#define | AGSA_PHY_MAX_LINK_RATE_MASK 0x0000000F /* bits 0-3 */ |
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#define | AGSA_PHY_MAX_LINK_RATE_1_5G 0x00000001 /* 0001b */ |
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#define | AGSA_PHY_MAX_LINK_RATE_3_0G 0x00000002 /* 0010b */ |
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#define | AGSA_PHY_MAX_LINK_RATE_6_0G 0x00000004 /* 0100b */ |
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#define | AGSA_PHY_MAX_LINK_RATE_12_0G 0x00000008 /* 1000b */ |
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#define | AGSA_PHY_MODE_MASK 0x00000030 /* bits 4-5 */ |
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#define | AGSA_PHY_MODE_SAS 0x00000010 /* 01b */ |
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#define | AGSA_PHY_MODE_SATA 0x00000020 /* 10b */ |
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#define | AGSA_PHY_SPIN_UP_HOLD_MASK 0x00000040 /* bit6 */ |
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#define | AGSA_PHY_SPIN_UP_HOLD_ON 0x00000040 /* 1b */ |
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#define | AGSA_PHY_SPIN_UP_HOLD_OFF 0x00000000 /* 0b */ |
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#define | AGSA_DEV_INFO_SASSATA_MASK 0x00000010 /* bit 4 */ |
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#define | AGSA_DEV_INFO_SASSATA_SAS 0x00000010 /* 1b */ |
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#define | AGSA_DEV_INFO_SASSATA_SATA 0x00000000 /* 0b */ |
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#define | AGSA_DEV_INFO_RATE_MASK 0x0000000F /* bits 0-3 */ |
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#define | AGSA_DEV_INFO_RATE_1_5G 0x00000008 /* 8h */ |
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#define | AGSA_DEV_INFO_RATE_3_0G 0x00000009 /* 9h */ |
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#define | AGSA_DEV_INFO_RATE_6_0G 0x0000000A /* Ah */ |
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#define | AGSA_DEV_INFO_RATE_12_0G 0x0000000B /* Bh */ |
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#define | AGSA_DEV_INFO_DEV_TYPE_MASK 0x000000E0 /* bits 5-7 */ |
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#define | AGSA_DEV_INFO_DEV_TYPE_END_DEVICE 0x00000020 /* 001b */ |
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#define | AGSA_DEV_INFO_DEV_TYPE_EDGE_EXP_DEVICE 0x00000040 /* 010b */ |
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#define | AGSA_DEV_INFO_DEV_TYPE_FANOUT_EXP_DEVICE 0x00000060 /* 011b */ |
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#define | AGSA_ABORT_TASK 0x01 |
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#define | AGSA_ABORT_TASK_SET 0x02 |
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#define | AGSA_CLEAR_TASK_SET 0x04 |
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#define | AGSA_LOGICAL_UNIT_RESET 0x08 |
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#define | AGSA_IT_NEXUS_RESET 0x10 |
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#define | AGSA_CLEAR_ACA 0x40 |
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#define | AGSA_QUERY_TASK 0x80 |
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#define | AGSA_QUERY_TASK_SET 0x81 |
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#define | AGSA_QUERY_UNIT_ATTENTION 0x82 |
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#define | AGSA_TASK_MANAGEMENT_FUNCTION_COMPLETE 0x0 |
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#define | AGSA_INVALID_FRAME 0x2 |
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#define | AGSA_TASK_MANAGEMENT_FUNCTION_NOT_SUPPORTED 0x4 |
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#define | AGSA_TASK_MANAGEMENT_FUNCTION_FAILED 0x5 |
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#define | AGSA_TASK_MANAGEMENT_FUNCTION_SUCCEEDED 0x8 |
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#define | AGSA_INCORRECT_LOGICAL_UNIT_NUMBER 0x9 |
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#define | AGSA_OVERLAPPED_TAG_ATTEMPTED 0xA |
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#define | AGSA_SATA_BSY_OVERRIDE 0x00080000 |
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#define | AGSA_SATA_CLOSE_CLEAR_AFFILIATION 0x00400000 |
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#define | AGSA_MAX_SMPPAYLOAD_VIA_SFO 40 |
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#define | AGSA_MAX_SSPPAYLOAD_VIA_SFO 36 |
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#define | AGSA_RETURN_D2H_FIS_GOOD_COMPLETION 0x000001 |
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#define | AGSA_SATA_ENABLE_ENCRYPTION 0x000004 |
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#define | AGSA_SATA_ENABLE_DIF 0x000008 |
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#define | AGSA_SATA_SKIP_QWORD 0xFFFF00 |
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#define | AGSA_SAS_ENABLE_ENCRYPTION 0x0004 |
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#define | AGSA_SAS_ENABLE_DIF 0x0008 |
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#define | AGSA_SAS_ENABLE_SKIP_MASK 0x0010 |
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#define | AGSA_SAS_SKIP_MASK_OFFSET 0xFFE0 |
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#define | AGSA_PHY_CONTROL_LINK_RESET_OP 0x1 |
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#define | AGSA_PHY_CONTROL_HARD_RESET_OP 0x2 |
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#define | AGSA_PHY_CONTROL_DISABLE 0x3 |
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#define | AGSA_PHY_CONTROL_CLEAR_ERROR_LOG_OP 0x5 |
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#define | AGSA_PHY_CONTROL_CLEAR_AFFILIATION 0x6 |
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#define | AGSA_PHY_CONTROL_XMIT_SATA_PS_SIGNAL 0x7 |
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#define | AGSA_SAS_DIAG_START 0x1 |
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#define | AGSA_SAS_DIAG_END 0x0 |
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#define | AGSA_PORT_SET_SMP_PHY_WIDTH 0x1 |
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#define | AGSA_PORT_SET_PORT_RECOVERY_TIME 0x2 |
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#define | AGSA_PORT_IO_ABORT 0x3 |
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#define | AGSA_PORT_SET_PORT_RESET_TIME 0x4 |
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#define | AGSA_PORT_HARD_RESET 0x5 |
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#define | AGSA_PORT_CLEAN_UP 0x6 |
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#define | AGSA_STOP_PORT_RECOVERY_TIMER 0x7 |
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#define | SA_DS_OPERATIONAL 0x1 |
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#define | SA_DS_PORT_IN_RESET 0x2 |
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#define | SA_DS_IN_RECOVERY 0x3 |
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#define | SA_DS_IN_ERROR 0x4 |
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#define | SA_DS_NON_OPERATIONAL 0x7 |
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#define | OSSA_SUCCESS 0x00 |
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#define | OSSA_FAILURE 0x01 |
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#define | OSSA_RESET_PENDING 0x03 |
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#define | OSSA_CHIP_FAILED 0x04 |
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#define | OSSA_FREEZE_FAILED 0x05 |
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#define | OSSA_PHY_CONTROL_FAILURE 0x03 |
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#define | OSSA_FAILURE_OUT_OF_RESOURCE 0x01 |
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#define | OSSA_FAILURE_DEVICE_ALREADY_REGISTERED 0x02 |
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#define | OSSA_FAILURE_INVALID_PHY_ID 0x03 |
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#define | OSSA_FAILURE_PHY_ID_ALREADY_REGISTERED 0x04 |
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#define | OSSA_FAILURE_PORT_ID_OUT_OF_RANGE 0x05 |
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#define | OSSA_FAILURE_PORT_NOT_VALID_STATE 0x06 |
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#define | OSSA_FAILURE_DEVICE_TYPE_NOT_VALID 0x07 |
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#define | OSSA_ERR_DEVICE_HANDLE_UNAVAILABLE 0x1020 |
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#define | OSSA_ERR_DEVICE_ALREADY_REGISTERED 0x1021 |
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#define | OSSA_ERR_DEVICE_TYPE_NOT_VALID 0x1022 |
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#define | OSSA_MPI_ERR_DEVICE_ACCEPT_PENDING 0x1027 |
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#define | OSSA_ERR_PORT_INVALID 0x1041 |
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#define | OSSA_ERR_PORT_STATE_NOT_VALID 0x1042 |
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#define | OSSA_ERR_PORT_SMP_PHY_WIDTH_EXCEED 0x1045 |
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#define | OSSA_ERR_PHY_ID_INVALID 0x1061 |
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#define | OSSA_ERR_PHY_ID_ALREADY_REGISTERED 0x1062 |
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#define | OSSA_INVALID_HANDLE 0x02 |
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#define | OSSA_ERR_DEVICE_HANDLE_INVALID 0x1023 /* MPI_ERR_DEVICE_HANDLE_INVALID The device handle associated with DEVICE_ID does not exist. */ |
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#define | OSSA_ERR_DEVICE_BUSY 0x1024 /* MPI_ERR_DEVICE_BUSY Device has outstanding I/Os. */ |
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#define | OSSA_RC_ACCEPT 0x00 |
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#define | OSSA_RC_REJECT 0x01 |
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#define | OSSA_INVALID_STATE 0x0001 |
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#define | OSSA_ERR_DEVICE_NEW_STATE_INVALID 0x1025 |
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#define | OSSA_ERR_DEVICE_STATE_CHANGE_NOT_ALLOWED 0x1026 |
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#define | OSSA_ERR_DEVICE_STATE_INVALID 0x0049 |
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#define | OSSA_DIAG_SUCCESS 0x00 /* Successful SAS diagnostic command. */ |
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#define | OSSA_DIAG_INVALID_COMMAND 0x01 /* Invalid SAS diagnostic command. */ |
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#define | OSSA_REGISTER_ACCESS_TIMEOUT 0x02 /* Register access has been timed-out. This is applicable only to the SPCv controller. */ |
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#define | OSSA_DIAG_FAIL 0x02 /* SAS diagnostic command failed. This is applicable only to the SPC controller. */ |
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#define | OSSA_DIAG_NOT_IN_DIAGNOSTIC_MODE 0x03 /* Attempted to execute SAS diagnostic command but PHY is not in diagnostic mode */ |
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#define | OSSA_DIAG_INVALID_PHY 0x04 /* Attempted to execute SAS diagnostic command on an invalid/out-of-range PHY. */ |
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#define | OSSA_MEMORY_ALLOC_FAILURE 0x05 /* Memory allocation failed in diagnostic. This is applicable only to the SPCv controller. */ |
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#define | OSSA_DIAG_SE_SUCCESS 0x00 |
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#define | OSSA_DIAG_SE_INVALID_PHY_ID 0x01 |
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#define | OSSA_DIAG_PHY_NOT_DISABLED 0x02 |
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#define | OSSA_DIAG_OTHER_FAILURE 0x03 /* SPC */ |
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#define | OSSA_DIAG_OPCODE_INVALID 0x03 |
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#define | OSSA_PORT_CONTROL_FAILURE 0x03 |
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#define | OSSA_MPI_ERR_PORT_IO_RESOURCE_UNAVAILABLE 0x1004 |
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#define | OSSA_MPI_ERR_PORT_INVALID 0x1041 |
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#define | OSSA_MPI_ERR_PORT_OP_NOT_IN_USE 0x1043 |
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#define | OSSA_MPI_ERR_PORT_OP_NOT_SUPPORTED 0x1044 |
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#define | OSSA_MPI_ERR_PORT_SMP_WIDTH_EXCEEDED 0x1045 |
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#define | OSSA_MPI_ERR_PORT_NOT_IN_CORRECT_STATE 0x1047 |
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#define | GET_GSM_SM_INFO 0x02 |
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#define | GET_IOST_RB_INFO 0x03 |
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#define | OSSA_HW_EVENT_RESET_START 0x01 |
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#define | OSSA_HW_EVENT_RESET_COMPLETE 0x02 |
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#define | OSSA_HW_EVENT_PHY_STOP_STATUS 0x03 |
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#define | OSSA_HW_EVENT_SAS_PHY_UP 0x04 |
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#define | OSSA_HW_EVENT_SATA_PHY_UP 0x05 |
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#define | OSSA_HW_EVENT_SATA_SPINUP_HOLD 0x06 |
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#define | OSSA_HW_EVENT_PHY_DOWN 0x07 |
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#define | OSSA_HW_EVENT_BROADCAST_CHANGE 0x09 |
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#define | OSSA_HW_EVENT_PHY_ERROR 0x0A |
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#define | OSSA_HW_EVENT_BROADCAST_SES 0x0B |
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#define | OSSA_HW_EVENT_PHY_ERR_INBOUND_CRC 0x0C |
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#define | OSSA_HW_EVENT_HARD_RESET_RECEIVED 0x0D |
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#define | OSSA_HW_EVENT_MALFUNCTION 0x0E |
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#define | OSSA_HW_EVENT_ID_FRAME_TIMEOUT 0x0F |
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#define | OSSA_HW_EVENT_BROADCAST_EXP 0x10 |
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#define | OSSA_HW_EVENT_PHY_START_STATUS 0x11 |
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#define | OSSA_HW_EVENT_PHY_ERR_INVALID_DWORD 0x12 |
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#define | OSSA_HW_EVENT_PHY_ERR_DISPARITY_ERROR 0x13 |
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#define | OSSA_HW_EVENT_PHY_ERR_CODE_VIOLATION 0x14 |
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#define | OSSA_HW_EVENT_PHY_ERR_LOSS_OF_DWORD_SYNCH 0x15 |
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#define | OSSA_HW_EVENT_PHY_ERR_PHY_RESET_FAILED 0x16 |
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#define | OSSA_HW_EVENT_PORT_RECOVERY_TIMER_TMO 0x17 |
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#define | OSSA_HW_EVENT_PORT_RECOVER 0x18 |
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#define | OSSA_HW_EVENT_PORT_RESET_TIMER_TMO 0x19 |
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#define | OSSA_HW_EVENT_PORT_RESET_COMPLETE 0x20 |
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#define | OSSA_HW_EVENT_BROADCAST_ASYNCH_EVENT 0x21 |
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#define | OSSA_HW_EVENT_IT_NEXUS_LOSS 0x22 |
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#define | OSSA_HW_EVENT_OPEN_RETRY_BACKOFF_THR_ADJUSTED 0x25 |
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#define | OSSA_HW_EVENT_ENCRYPTION 0x83 |
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#define | OSSA_HW_EVENT_MODE 0x84 |
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#define | OSSA_HW_EVENT_SECURITY_MODE 0x85 |
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#define | OSSA_PORT_NOT_ESTABLISHED 0x00 |
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#define | OSSA_PORT_VALID 0x01 |
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#define | OSSA_PORT_LOSTCOMM 0x02 |
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#define | OSSA_PORT_IN_RESET 0x04 |
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#define | OSSA_PORT_3RDPARTY_RESET 0x07 |
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#define | OSSA_PORT_INVALID 0x08 |
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#define | OSSA_CTL_SUCCESS 0x0000 |
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#define | OSSA_CTL_INVALID_CONFIG_PAGE 0x1001 |
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#define | OSSA_CTL_INVALID_PARAM_IN_CONFIG_PAGE 0x1002 |
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#define | OSSA_CTL_INVALID_ENCRYPTION_SECURITY_MODE 0x1003 |
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#define | OSSA_CTL_RESOURCE_NOT_AVAILABLE 0x1004 |
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#define | OSSA_CTL_CONTROLLER_NOT_IDLE 0x1005 |
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#define | OSSA_CTL_OPERATOR_AUTHENTICATION_FAILURE 0x100XX |
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#define | OSSA_INBOUND_V_BIT_NOT_SET 0x01 |
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#define | OSSA_INBOUND_OPC_NOT_SUPPORTED 0x02 |
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#define | OSSA_INBOUND_IOMB_INVALID_OBID 0x03 |
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#define | OSSA_FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00 |
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#define | OSSA_FLASH_UPDATE_IN_PROGRESS 0x01 |
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#define | OSSA_FLASH_UPDATE_HDR_ERR 0x02 |
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#define | OSSA_FLASH_UPDATE_OFFSET_ERR 0x03 |
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#define | OSSA_FLASH_UPDATE_CRC_ERR 0x04 |
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#define | OSSA_FLASH_UPDATE_LENGTH_ERR 0x05 |
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#define | OSSA_FLASH_UPDATE_HW_ERR 0x06 |
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#define | OSSA_FLASH_UPDATE_HMAC_ERR 0x0E |
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#define | OSSA_FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10 |
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#define | OSSA_FLASH_UPDATE_DISABLED 0x11 |
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#define | OSSA_FLASH_FWDNLD_DEVICE_UNSUPPORT 0x12 |
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#define | OSSA_DISCOVER_STARTED 0x00 |
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#define | OSSA_DISCOVER_FOUND_DEVICE 0x01 |
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#define | OSSA_DISCOVER_REMOVED_DEVICE 0x02 |
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#define | OSSA_DISCOVER_COMPLETE 0x03 |
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#define | OSSA_DISCOVER_ABORT 0x04 |
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#define | OSSA_DISCOVER_ABORT_ERROR_1 0x05 |
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#define | OSSA_DISCOVER_ABORT_ERROR_2 0x06 |
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#define | OSSA_DISCOVER_ABORT_ERROR_3 0x07 |
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#define | OSSA_DISCOVER_ABORT_ERROR_4 0x08 |
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#define | OSSA_DISCOVER_ABORT_ERROR_5 0x09 |
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#define | OSSA_DISCOVER_ABORT_ERROR_6 0x0A |
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#define | OSSA_DISCOVER_ABORT_ERROR_7 0x0B |
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#define | OSSA_DISCOVER_ABORT_ERROR_8 0x0C |
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#define | OSSA_DISCOVER_ABORT_ERROR_9 0x0D |
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#define | OSSA_DEBUG_LEVEL_0 0x00 |
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#define | OSSA_DEBUG_LEVEL_1 0x01 |
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#define | OSSA_DEBUG_LEVEL_2 0x02 |
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#define | OSSA_DEBUG_LEVEL_3 0x03 |
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#define | OSSA_DEBUG_LEVEL_4 0x04 |
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#define | OSSA_DEBUG_PRINT_INVALID_NUMBER 0xFFFFFFFF |
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#define | OSSA_FRAME_TYPE_SSP_CMD 0x06 |
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#define | OSSA_FRAME_TYPE_SSP_TASK 0x16 |
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#define | OSSA_EVENT_SOURCE_DEVICE_HANDLE_ADDED 0x00 |
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#define | OSSA_EVENT_SOURCE_DEVICE_HANDLE_REMOVED 0x01 |
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#define | OSSA_DEV_INFO_INVALID_HANDLE 0x01 |
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#define | OSSA_DEV_INFO_NO_EXTENDED_INFO 0x02 |
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#define | OSSA_DEV_INFO_SAS_EXTENDED_INFO 0x03 |
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#define | OSSA_DEV_INFO_SATA_EXTENDED_INFO 0x04 |
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#define | AGSA_CMD_TYPE_DIAG_OPRN_PERFORM 0x00 |
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#define | AGSA_CMD_TYPE_DIAG_OPRN_STOP 0x01 |
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#define | AGSA_CMD_TYPE_DIAG_THRESHOLD_SPECIFY 0x02 |
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#define | AGSA_CMD_TYPE_DIAG_RECEIVE_ENABLE 0x03 |
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#define | AGSA_CMD_TYPE_DIAG_REPORT_GET 0x04 |
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#define | AGSA_CMD_TYPE_DIAG_ERR_CNT_RESET 0x05 |
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#define | AGSA_CMD_DESC_PRBS 0x00 |
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#define | AGSA_CMD_DESC_CJTPAT 0x01 |
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#define | AGSA_CMD_DESC_USR_PATTERNS 0x02 |
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#define | AGSA_CMD_DESC_PRBS_ERR_INSERT 0x08 |
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#define | AGSA_CMD_DESC_PRBS_INVERT 0x09 |
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#define | AGSA_CMD_DESC_CJTPAT_INVERT 0x0A |
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#define | AGSA_CMD_DESC_CODE_VIOL_INSERT 0x0B |
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#define | AGSA_CMD_DESC_DISP_ERR_INSERT 0x0C |
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#define | AGSA_CMD_DESC_SSPA_PERF_EVENT_1 0x0E |
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#define | AGSA_CMD_DESC_LINE_SIDE_ANA_LPBK 0x10 |
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#define | AGSA_CMD_DESC_LINE_SIDE_DIG_LPBK 0x11 |
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#define | AGSA_CMD_DESC_SYS_SIDE_ANA_LPBK 0x12 |
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#define | AGSA_CMD_DESC_PRBS_ERR_CNT 0x00 |
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#define | AGSA_CMD_DESC_CODE_VIOL_ERR_CNT 0x01 |
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#define | AGSA_CMD_DESC_DISP_ERR_CNT 0x02 |
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#define | AGSA_CMD_DESC_LOST_DWD_SYNC_CNT 0x05 |
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#define | AGSA_CMD_DESC_INVALID_DWD_CNT 0x06 |
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#define | AGSA_CMD_DESC_CODE_VIOL_ERR_CNT_THHD 0x09 |
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#define | AGSA_CMD_DESC_DISP_ERR_CNT_THHD 0x0A |
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#define | AGSA_CMD_DESC_SSPA_PERF_CNT 0x0B |
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#define | AGSA_CMD_DESC_PHY_RST_CNT 0x0C |
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#define | AGSA_CMD_DESC_SSPA_PERF_1_THRESHOLD 0x0E |
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#define | AGSA_CMD_DESC_CODE_VIOL_ERR_THHD 0x19 |
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#define | AGSA_CMD_DESC_DISP_ERR_THHD 0x1A |
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#define | AGSA_CMD_DESC_RX_LINK_BANDWIDTH 0x1B |
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#define | AGSA_CMD_DESC_TX_LINK_BANDWIDTH 0x1C |
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#define | AGSA_CMD_DESC_ALL 0x1F |
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#define | AGSA_NVMD_TWI_DEVICES 0x00 |
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#define | AGSA_NVMD_CONFIG_SEEPROM 0x01 |
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#define | AGSA_NVMD_VPD_FLASH 0x04 |
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#define | AGSA_NVMD_AAP1_REG_FLASH 0x05 |
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#define | AGSA_NVMD_IOP_REG_FLASH 0x06 |
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#define | AGSA_NVMD_EXPANSION_ROM 0x07 |
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#define | AGSA_NVMD_REG_FLASH 0x05 |
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#define | OSSA_NVMD_SUCCESS 0x0000 |
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#define | OSSA_NVMD_MODE_ERROR 0x0001 |
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#define | OSSA_NVMD_LENGTH_ERROR 0x0002 |
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#define | OSSA_NVMD_TWI_ADDRESS_SIZE_ERROR 0x0005 |
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#define | OSSA_NVMD_TWI_NACK_ERROR 0x2001 |
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#define | OSSA_NVMD_TWI_LOST_ARB_ERROR 0x2002 |
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#define | OSSA_NVMD_TWI_TIMEOUT_ERROR 0x2021 |
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#define | OSSA_NVMD_TWI_BUS_NACK_ERROR 0x2081 |
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#define | OSSA_NVMD_TWI_ARB_FAILED_ERROR 0x2082 |
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#define | OSSA_NVMD_TWI_BUS_TIMEOUT_ERROR 0x20FF |
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#define | OSSA_NVMD_FLASH_PARTITION_NUM_ERROR 0x9001 |
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#define | OSSA_NVMD_FLASH_LENGTH_TOOBIG_ERROR 0x9002 |
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#define | OSSA_NVMD_FLASH_PROGRAM_ERROR 0x9003 |
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#define | OSSA_NVMD_FLASH_DEVICEID_ERROR 0x9004 |
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#define | OSSA_NVMD_FLASH_VENDORID_ERROR 0x9005 |
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#define | OSSA_NVMD_FLASH_ERASE_TIMEOUT_ERROR 0x9006 |
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#define | OSSA_NVMD_FLASH_ERASE_ERROR 0x9007 |
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#define | OSSA_NVMD_FLASH_BUSY_ERROR 0x9008 |
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#define | OSSA_NVMD_FLASH_NOT_SUPPORT_DEVICE_ERROR 0x9009 |
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#define | OSSA_NVMD_FLASH_CFI_INF_ERROR 0x900A |
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#define | OSSA_NVMD_FLASH_MORE_ERASE_BLOCK_ERROR 0x900B |
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#define | OSSA_NVMD_FLASH_READ_ONLY_ERROR 0x900C |
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#define | OSSA_NVMD_FLASH_MAP_TYPE_ERROR 0x900D |
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#define | OSSA_NVMD_FLASH_MAP_DISABLE_ERROR 0x900E |
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#define | OSSA_HW_ENCRYPT_KEK_UPDATE 0x0000 |
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#define | OSSA_HW_ENCRYPT_KEK_UPDATE_AND_STORE 0x0001 |
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#define | OSSA_HW_ENCRYPT_KEK_INVALIDTE 0x0002 |
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#define | OSSA_HW_ENCRYPT_DEK_UPDATE 0x0003 |
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#define | OSSA_HW_ENCRYPT_DEK_INVALIDTE 0x0004 |
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#define | OSSA_HW_ENCRYPT_OPERATOR_MANAGEMENT 0x0005 |
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#define | OSSA_HW_ENCRYPT_TEST_EXECUTE 0x0006 |
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#define | OSSA_HW_ENCRYPT_SET_OPERATOR 0x0007 |
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#define | OSSA_HW_ENCRYPT_GET_OPERATOR 0x0008 |
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#define | OSSA_INVALID_ENCRYPTION_SECURITY_MODE 0x1003 |
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#define | OSSA_KEK_MGMT_SUBOP_NOT_SUPPORTED_ 0x2000 /*not in PM 101222*/ |
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#define | OSSA_DEK_MGMT_SUBOP_NOT_SUPPORTED 0x2000 |
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#define | OSSA_MPI_ENC_ERR_ILLEGAL_DEK_PARAM 0x2001 |
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#define | OSSA_MPI_ERR_DEK_MANAGEMENT_DEK_UNWRAP_FAIL 0x2002 |
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#define | OSSA_MPI_ENC_ERR_ILLEGAL_KEK_PARAM 0x2021 |
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#define | OSSA_MPI_ERR_KEK_MANAGEMENT_KEK_UNWRAP_FAIL 0x2022 |
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#define | OSSA_MPI_ERR_KEK_MANAGEMENT_NVRAM_OPERATION_FAIL 0x2023 |
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#define | OSSA_OPR_MGMT_OP_NOT_SUPPORTED 0x2060 |
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#define | OSSA_MPI_ENC_ERR_OPR_PARAM_ILLEGAL 0x2061 |
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#define | OSSA_MPI_ENC_ERR_OPR_ID_NOT_FOUND 0x2062 |
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#define | OSSA_MPI_ENC_ERR_OPR_ROLE_NOT_MATCH 0x2063 |
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#define | OSSA_MPI_ENC_ERR_OPR_MAX_NUM_EXCEEDED 0x2064 |
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#define | OSSA_MPI_ENC_ERR_CONTROLLER_NOT_IDLE 0x1005 |
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#define | OSSA_MPI_ENC_NVM_MEM_ACCESS_ERR 0x100B |
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#define | agsaEncryptSMF 0x00000000 |
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#define | agsaEncryptSMA 0x00000100 |
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#define | agsaEncryptSMB 0x00000200 |
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#define | agsaEncryptReturnSMF (1 << 12) |
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#define | agsaEncryptAuthorize (1 << 13) |
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#define | agsaEncryptAcmMask 0x00ff0000 |
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#define | agsaEncryptEnableAES_ECB (1 << 16) |
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#define | agsaEncryptEnableAES_XTS (1 << 22) |
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#define | agsaEncryptCipherModeECB 0x00000001 |
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#define | agsaEncryptCipherModeXTS 0x00000002 |
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#define | agsaEncryptStatusNoNVRAM 0x00000001 |
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#define | agsaEncryptStatusNVRAMErr 0x00000002 |
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#define | agsaEncryptSectorSize512 0 |
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#define | agsaEncryptSectorSize4096 2 |
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#define | agsaEncryptSectorSize4160 3 |
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#define | agsaEncryptSectorSize4224 4 |
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#define | agsaEncryptDIFSectorSize520 (agsaEncryptSectorSize512 | 0x18) |
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#define | agsaEncryptDIFSectorSize528 ( 0x19) |
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#define | agsaEncryptDIFSectorSize4104 (agsaEncryptSectorSize4096 | 0x18) |
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#define | agsaEncryptDIFSectorSize4168 (agsaEncryptSectorSize4160 | 0x18) |
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#define | agsaEncryptDIFSectorSize4232 (agsaEncryptSectorSize4224 | 0x18) |
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#define | AGSA_ENCRYPT_STORE_NVRAM 1 |
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#define | agsaModePageGet 1 |
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#define | agsaModePageSet 2 |
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#define | AGSA_READ_SGPIO_REGISTER 0x02 |
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#define | AGSA_WRITE_SGPIO_REGISTER 0x82 |
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#define | AGSA_SGPIO_CONFIG_REG 0x0 |
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#define | AGSA_SGPIO_DRIVE_BY_DRIVE_RECEIVE_REG 0x1 |
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#define | AGSA_SGPIO_GENERAL_PURPOSE_RECEIVE_REG 0x2 |
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#define | AGSA_SGPIO_DRIVE_BY_DRIVE_TRANSMIT_REG 0x3 |
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#define | AGSA_SGPIO_GENERAL_PURPOSE_TRANSMIT_REG 0x4 |
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#define | OSSA_SGPIO_COMMAND_SUCCESS 0x00 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FRAME_TYPE 0x01 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_TYPE 0x02 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_INDEX 0x03 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_COUNT 0x04 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FRAME_REG_TYPE 0x05 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FUNCTION 0x06 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FRAME_TYPE_REG_INDEX 0x19 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FRAME_TYPE_REG_CNT 0x81 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_TYPE_REG_INDEX 0x1A |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_TYPE_REG_COUNT 0x82 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_REG_INDEX_REG_COUNT 0x83 |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_FRAME_REG_TYPE_REG_INDEX 0x1D |
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#define | OSSA_SGPIO_CMD_ERROR_WRONG_ALL_HEADER_PARAMS 0x9D |
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#define | OSSA_SGPIO_MAX_READ_DATA_COUNT 0x0D |
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#define | OSSA_SGPIO_MAX_WRITE_DATA_COUNT 0x0C |
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#define | OSSA_DFE_MPI_IO_SUCCESS 0x0000 |
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#define | OSSA_DFE_DATA_OVERFLOW 0x0002 |
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#define | OSSA_DFE_MPI_ERR_RESOURCE_UNAVAILABLE 0x1004 |
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#define | OSSA_DFE_CHANNEL_DOWN 0x100E |
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#define | OSSA_DFE_MEASUREMENT_IN_PROGRESS 0x100F |
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#define | OSSA_DFE_CHANNEL_INVALID 0x1010 |
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#define | OSSA_DFE_DMA_FAILURE 0x1011 |
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#define | MAX_INDEX 10 |
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#define | TYPE_GSM_SPACE 1 |
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#define | TYPE_QUEUE 2 |
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#define | TYPE_FATAL 3 |
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#define | TYPE_NON_FATAL 4 |
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#define | TYPE_INBOUND_QUEUE 5 |
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#define | TYPE_OUTBOUND_QUEUE 6 |
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#define | BAR_SHIFT_GSM_OFFSET 0x400000 |
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#define | ONE_MEGABYTE 0x100000 |
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#define | SIXTYFOURKBYTE (1024 * 64) |
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#define | TYPE_INBOUND 1 |
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#define | TYPE_OUTBOUND 2 |
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#define | OSSA_PCIE_DIAG_SUCCESS 0x0000 |
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#define | OSSA_PCIE_DIAG_INVALID_COMMAND 0x0001 |
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#define | OSSA_PCIE_DIAG_INTERNAL_FAILURE 0x0002 |
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#define | OSSA_PCIE_DIAG_INVALID_CMD_TYPE 0x1006 |
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#define | OSSA_PCIE_DIAG_INVALID_CMD_DESC 0x1007 |
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#define | OSSA_PCIE_DIAG_INVALID_PCIE_ADDR 0x1008 |
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#define | OSSA_PCIE_DIAG_INVALID_BLOCK_SIZE 0x1009 |
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#define | OSSA_PCIE_DIAG_LENGTH_NOT_BLOCK_SIZE_ALIGNED 0x100A |
|
#define | OSSA_PCIE_DIAG_IO_XFR_ERROR_DIF_MISMATCH 0x3000 |
|
#define | OSSA_PCIE_DIAG_IO_XFR_ERROR_DIF_APPLICATION_TAG_MISMATCH 0x3001 |
|
#define | OSSA_PCIE_DIAG_IO_XFR_ERROR_DIF_REFERENCE_TAG_MISMATCH 0x3002 |
|
#define | OSSA_PCIE_DIAG_IO_XFR_ERROR_DIF_CRC_MISMATCH 0x3003 |
|
#define | OSSA_PCIE_DIAG_MPI_ERR_INVALID_LENGTH 0x0042 |
|
#define | OSSA_PCIE_DIAG_MPI_ERR_IO_RESOURCE_UNAVAILABLE 0x1004 |
|
#define | OSSA_PCIE_DIAG_MPI_ERR_CONTROLLER_NOT_IDLE 0x1005 |
|
#define | OQ_SHARE_PATH_BIT 0x00000001 |
|
#define | DISABLE_LOGGING 0x0 |
|
#define | CRITICAL_ERROR 0x1 |
|
#define | WARNING 0x2 |
|
#define | NOTICE 0x3 |
|
#define | INFORMATION 0x4 |
|
#define | DEBUGGING 0x5 |
|
#define | DEV_INFO_MASK 0xFF |
|
#define | DEV_INFO_MCN_SHIFT 16 |
|
#define | DEV_INFO_IR_SHIFT 20 |
|
#define | RETRY_DEVICE_FLAG (1 << SHIFT0) |
|
#define | AWT_DEVICE_FLAG (1 << SHIFT1) |
|
#define | SSP_DEVICE_FLAG (1 << SHIFT20) |
|
#define | ATAPI_DEVICE_FLAG 0x200000 /* bit21 */ |
|
#define | XFER_RDY_PRIORTY_DEVICE_FLAG (1 << SHIFT22) |
|
#define | DEV_LINK_RATE 0x3F |
|
#define | SA_DEVINFO_GET_SAS_ADDRESSLO(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressLo) |
|
#define | SA_DEVINFO_GET_SAS_ADDRESSHI(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressHi) |
|
#define | SA_DEVINFO_GET_DEVICETTYPE(devInfo) (((devInfo)->devType_S_Rate & 0xC0) >> 5) |
|
#define | SA_DEVINFO_PUT_SAS_ADDRESSLO(devInfo, src32) *(bit32 *)((devInfo)->sasAddressLo) = BIT32_TO_DMA_BEBIT32(src32) |
|
#define | SA_DEVINFO_PUT_SAS_ADDRESSHI(devInfo, src32) *(bit32 *)((devInfo)->sasAddressHi) = BIT32_TO_DMA_BEBIT32(src32) |
|
#define | SA_SASDEV_SSP_BIT SA_IDFRM_SSP_BIT /* SSP Initiator port */ |
|
#define | SA_SASDEV_STP_BIT SA_IDFRM_STP_BIT /* STP Initiator port */ |
|
#define | SA_SASDEV_SMP_BIT SA_IDFRM_SMP_BIT /* SMP Initiator port */ |
|
#define | SA_SASDEV_SATA_BIT SA_IDFRM_SATA_BIT /* SATA device, valid in the discovery response only */ |
|
#define | SA_SASDEV_IS_SSP_INITIATOR(sasDev) (((sasDev)->initiator_ssp_stp_smp & SA_SASDEV_SSP_BIT) == SA_SASDEV_SSP_BIT) |
|
#define | SA_SASDEV_IS_STP_INITIATOR(sasDev) (((sasDev)->initiator_ssp_stp_smp & SA_SASDEV_STP_BIT) == SA_SASDEV_STP_BIT) |
|
#define | SA_SASDEV_IS_SMP_INITIATOR(sasDev) (((sasDev)->initiator_ssp_stp_smp & SA_SASDEV_SMP_BIT) == SA_SASDEV_SMP_BIT) |
|
#define | SA_SASDEV_IS_SSP_TARGET(sasDev) (((sasDev)->target_ssp_stp_smp & SA_SASDEV_SSP_BIT) == SA_SASDEV_SSP_BIT) |
|
#define | SA_SASDEV_IS_STP_TARGET(sasDev) (((sasDev)->target_ssp_stp_smp & SA_SASDEV_STP_BIT) == SA_SASDEV_STP_BIT) |
|
#define | SA_SASDEV_IS_SMP_TARGET(sasDev) (((sasDev)->target_ssp_stp_smp & SA_SASDEV_SMP_BIT) == SA_SASDEV_SMP_BIT) |
|
#define | SA_SASDEV_IS_SATA_DEVICE(sasDev) (((sasDev)->target_ssp_stp_smp & SA_SASDEV_SATA_BIT) == SA_SASDEV_SATA_BIT) |
|
#define | MAX_CDB_LEN 32 |
| data structure describes an SSP Command INFORMATION UNIT More...
|
|
#define | DIF_UDT_SIZE 6 |
|
#define | AGSA_DIF_INSERT 0 |
|
#define | AGSA_DIF_VERIFY_FORWARD 1 |
|
#define | AGSA_DIF_VERIFY_DELETE 2 |
|
#define | AGSA_DIF_VERIFY_REPLACE 3 |
|
#define | AGSA_DIF_VERIFY_UDT_REPLACE_CRC 5 |
|
#define | AGSA_DIF_REPLACE_UDT_REPLACE_CRC 7 |
|
#define | agsaDIFSectorSize512 0 |
|
#define | agsaDIFSectorSize520 1 |
|
#define | agsaDIFSectorSize4096 2 |
|
#define | agsaDIFSectorSize4160 3 |
|
#define | DIF_FLAG_BITS_ACTION 0x00000007 /* 0-2*/ |
|
#define | DIF_FLAG_BITS_CRC_VER 0x00000008 /* 3 */ |
|
#define | DIF_FLAG_BITS_CRC_INV 0x00000010 /* 4 */ |
|
#define | DIF_FLAG_BITS_CRC_SEED 0x00000020 /* 5 */ |
|
#define | DIF_FLAG_BITS_UDT_REF_TAG 0x00000040 /* 6 */ |
|
#define | DIF_FLAG_BITS_UDT_APP_TAG 0x00000080 /* 7 */ |
|
#define | DIF_FLAG_BITS_UDTR_REF_BLKCOUNT 0x00000100 /* 8 */ |
|
#define | DIF_FLAG_BITS_UDTR_APP_BLKCOUNT 0x00000200 /* 9 */ |
|
#define | DIF_FLAG_BITS_CUST_APP_TAG 0x00000C00 /* 10 11*/ |
|
#define | DIF_FLAG_BITS_EPRC 0x00001000 /* 12 */ |
|
#define | DIF_FLAG_BITS_Reserved 0x0000E000 /* 13 14 15*/ |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_MASK 0x00070000 /* 16 17 18 */ |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_SHIFT 16 |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_512 0x00000000 /* */ |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_520 0x00010000 /* 16 */ |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_4096 0x00020000 /* 17 */ |
|
#define | DIF_FLAG_BITS_BLOCKSIZE_4160 0x00030000 /* 16 17 */ |
|
#define | DIF_FLAG_BITS_UDTVMASK 0x03F00000 /* 20 21 22 23 24 25 */ |
|
#define | DIF_FLAG_BITS_UDTV_SHIFT 20 |
|
#define | DIF_FLAG_BITS_UDTUPMASK 0xF6000000 /* 26 27 28 29 30 31 */ |
|
#define | DIF_FLAG_BITS_UDTUPSHIFT 26 |
|
#define | SSP_OPTION_BITS 0x3F |
|
#define | SSP_OPTION_ODS 0x8000 |
|
#define | SSP_OPTION_OTHR_NO_RETRY 0 |
|
#define | SSP_OPTION_OTHR_RETRY_ON_ACK_NAK_TIMEOUT 1 |
|
#define | SSP_OPTION_OTHR_RETRY_ON_NAK_RECEIVED 2 |
|
#define | SSP_OPTION_OTHR_RETRY_ON_BOTH_ACK_NAK_TIMEOUT_AND_NAK_RECEIVED 3 |
|
#define | SSP_OPTION_DATA_NO_RETRY 0 |
|
#define | SSP_OPTION_DATA_RETRY_ON_ACK_NAK_TIMEOUT 1 |
|
#define | SSP_OPTION_DATA_RETRY_ON_NAK_RECEIVED 2 |
|
#define | SSP_OPTION_DATA_RETRY_ON_BOTH_ACK_NAK_TIMEOUT_AND_NAK_RECEIVED 3 |
|
#define | SSP_OPTION_RETRY_DATA_FRAME_ENABLED (1 << SHIFT4) |
|
#define | SSP_OPTION_AUTO_GOOD_RESPONSE (1 << SHIFT5) |
|
#define | SSP_OPTION_ENCRYPT (1 << SHIFT6) |
|
#define | SSP_OPTION_DIF (1 << SHIFT7) |
|
#define | SSP_OPTION_OVERRIDE_DEVICE_STATE (1 << SHIFT15) |
|
#define | RESP_OPTION_BITS 0x3 /** bit0-1 */ |
|
#define | RESP_OPTION_ODS 0x8000 /** bit15 */ |
|
#define | smpFrameFlagDirectResponse 0 |
|
#define | smpFrameFlagIndirectResponse 1 |
|
#define | smpFrameFlagDirectPayload 0 |
|
#define | smpFrameFlagIndirectPayload 2 |
|
#define | AGSA_SAS_PROTOCOL_TIMER_CONFIG_PAGE 0x04 |
|
#define | AGSA_INTERRUPT_CONFIGURATION_PAGE 0x05 |
|
#define | AGSA_IO_GENERAL_CONFIG_PAGE 0x06 |
|
#define | AGSA_ENCRYPTION_GENERAL_CONFIG_PAGE 0x20 |
|
#define | AGSA_ENCRYPTION_DEK_CONFIG_PAGE 0x21 |
|
#define | AGSA_ENCRYPTION_CONTROL_PARM_PAGE 0x22 |
|
#define | AGSA_ENCRYPTION_HMAC_CONFIG_PAGE 0x23 |
|
#define | AGSA_ENC_CONFIG_PAGE_KEK_NUMBER 0x0000FF00 |
|
#define | AGSA_ENC_CONFIG_PAGE_KEK_SHIFT 8 |
|
#define | AGSA_ENC_DEK_CONFIG_PAGE_DEK_TABLE_NUMBER 0xF0000000 |
|
#define | AGSA_ENC_DEK_CONFIG_PAGE_DEK_TABLE_SHIFT SHIFT28 |
|
#define | AGSA_ENC_DEK_CONFIG_PAGE_DEK_CACHE_WAY 0x0F000000 |
|
#define | AGSA_ENC_DEK_CONFIG_PAGE_DEK_CACHE_SHIFT SHIFT24 |
|
#define | OperatorAuthenticationEnable_AUT 1 |
|
#define | ReturnToFactoryMode_ARF 2 |
|
#define | AGSA_BIST_TEST 0x1 |
|
#define | AGSA_HMAC_TEST 0x2 |
|
#define | AGSA_SHA_TEST 0x3 |
|
#define | AGSA_ID_SIZE 31 |
|
#define | SA_OPR_MGMNT_FLAG_MASK 0x00003000 |
|
#define | SA_OPR_MGMNT_FLAG_SHIFT 12 |
|
#define | AGSA_MPI_MAIN_CONFIGURATION_TABLE 1 |
|
#define | AGSA_MPI_GENERAL_STATUS_TABLE 2 |
|
#define | AGSA_MPI_INBOUND_QUEUE_CONFIGURATION_TABLE 3 |
|
#define | AGSA_MPI_OUTBOUND_QUEUE_CONFIGURATION_TABLE 4 |
|
#define | AGSA_MPI_SAS_PHY_ANALOG_SETUP_TABLE 5 |
|
#define | AGSA_MPI_INTERRUPT_VECTOR_TABLE 6 |
|
#define | AGSA_MPI_PER_SAS_PHY_ATTRIBUTE_TABLE 7 |
|
#define | AGSA_MPI_OUTBOUND_QUEUE_FAILOVER_TABLE 8 |
|
#define | SA_RESERVED_REQUEST_COUNT 16 |
|
#define | SIZE_DW 4 |
|
#define | SIZE_QW 8 |
|
#define | PCIBAR0 0 |
|
#define | PCIBAR1 1 |
|
#define | PCIBAR2 2 |
|
#define | PCIBAR3 3 |
|
#define | PCIBAR4 4 |
|
#define | PCIBAR5 5 |
|
#define | MAX_IO_DEVICE_ENTRIES 4096 |
|
#define | SA_PTNFE_POISION_TLP 0 /* Disable if zero default setting */ |
|
#define | SA_MDFD_MULTI_DATA_FETCH 0 /* Enable if zero default setting */ |
|
#define | SA_ARBTE 0 /* Disable if zero default setting */ |
|
#define | SA_OUTBOUND_COALESCE 1 /* Enable if one default setting */ |
|
#define | EnableFPGA_TEST_ICCcontrol 0x01 |
|
#define | EnableFPGA_TEST_ReadDEV 0x02 |
|
#define | EnableFPGA_TEST_WriteCALAll 0x04 |
|
#define | EnableFPGA_TEST_ReconfigSASParams 0x08 |
|
#define | EnableFPGA_TEST_LocalPhyControl 0x10 |
|
#define | EnableFPGA_TEST_PortControl 0x20 |
|
#define | OSSA_ENCRYPT_ENGINE_FAILURE_MASK 0x00FF0000 /* Encrypt Engine failed the BIST Test */ |
|
#define | OSSA_ENCRYPT_SEEPROM_NOT_FOUND 0x01 /* SEEPROM is not installed. This condition is reported based on the bootstrap pin setting. */ |
|
#define | OSSA_ENCRYPT_SEEPROM_IPW_RD_ACCESS_TMO 0x02 /* SEEPROM access timeout detected while reading initialization password or Allowable Cipher Modes. */ |
|
#define | OSSA_ENCRYPT_SEEPROM_IPW_RD_CRC_ERR 0x03 /* CRC Error detected when reading initialization password or Allowable Cipher Modes. */ |
|
#define | OSSA_ENCRYPT_SEEPROM_IPW_INVALID 0x04 /* Initialization password read from SEEPROM doesn't match any valid password value. This could also mean SEEPROM is blank. */ |
|
#define | OSSA_ENCRYPT_SEEPROM_WR_ACCESS_TMO 0x05 /* access timeout detected while writing initialization password or Allowable Cipher Modes. */ |
|
#define | OSSA_ENCRYPT_FLASH_ACCESS_TMO 0x20 /* Timeout while reading flash memory. */ |
|
#define | OSSA_ENCRYPT_FLASH_SECTOR_ERASE_TMO 0x21 /* Flash sector erase timeout while writing to flash memory. */ |
|
#define | OSSA_ENCRYPT_FLASH_SECTOR_ERASE_ERR 0x22 /* Flash sector erase failure while writing to flash memory. */ |
|
#define | OSSA_ENCRYPT_FLASH_ECC_CHECK_ERR 0x23 /* Flash ECC check failure. */ |
|
#define | OSSA_ENCRYPT_FLASH_NOT_INSTALLED 0x24 /* Flash memory not installed, this error is only detected in Security Mode B. */ |
|
#define | OSSA_ENCRYPT_INITIAL_KEK_NOT_FOUND 0x40 /* Initial KEK is not found in the flash memory. This error is only detected in Security Mode B. */ |
|
#define | OSSA_ENCRYPT_AES_BIST_ERR 0x41 /* Built-In Test Failure */ |
|
#define | OSSA_ENCRYPT_KWP_BIST_FAILURE 0x42 /* Built-In Test Failed on Key Wrap Engine */ |
|
#define | OSSA_DIF_ENGINE_FAILURE_MASK 0x0F000000 /* DIF Engine failed the BIST Test */ |
|
#define | OSSA_DIF_ENGINE_0_BIST_FAILURE 0x1 /* DIF Engine 0 failed the BIST Test */ |
|
#define | OSSA_DIF_ENGINE_1_BIST_FAILURE 0x2 /* DIF Engine 1 failed the BIST Test */ |
|
#define | OSSA_DIF_ENGINE_2_BIST_FAILURE 0x4 /* DIF Engine 2 failed the BIST Test */ |
|
#define | OSSA_DIF_ENGINE_3_BIST_FAILURE 0x8 /* DIF Engine 3 failed the BIST Test */ |
|
#define | SA_ROLE_CAPABILITIES_CSP 0x001 |
|
#define | SA_ROLE_CAPABILITIES_OPR 0x002 |
|
#define | SA_ROLE_CAPABILITIES_SCO 0x004 |
|
#define | SA_ROLE_CAPABILITIES_STS 0x008 |
|
#define | SA_ROLE_CAPABILITIES_TST 0x010 |
|
#define | SA_ROLE_CAPABILITIES_KEK 0x020 |
|
#define | SA_ROLE_CAPABILITIES_DEK 0x040 |
|
#define | SA_ROLE_CAPABILITIES_IOS 0x080 |
|
#define | SA_ROLE_CAPABILITIES_FWU 0x100 |
|
#define | SA_ROLE_CAPABILITIES_PRM 0x200 |
|
|
typedef struct agsaContext_s | agsaContext_t |
| data structure stores OS specific and LL specific context More...
|
|
typedef agsaContext_t | agsaRoot_t |
| hold points to global data structures used by the LL and OS Layers More...
|
|
typedef agsaContext_t | agsaDevHandle_t |
| holds the pointers to the device data structure used by the LL and OS Layers More...
|
|
typedef agsaContext_t | agsaPortContext_t |
| holds the pointers to the port data structure used by the LL and OS Layers More...
|
|
typedef agsaContext_t | agsaIORequest_t |
| data structure pointer to IO request structure More...
|
|
typedef void * | agsaFrameHandle_t |
| handle to access frame More...
|
|
typedef struct agsaSASReconfig_s | agsaSASReconfig_t |
| describe a SAS ReCofiguration structure in the SAS/SATA hardware More...
|
|
typedef struct agsaPhyAnalogSetupRegisters_s | agsaPhyAnalogSetupRegisters_t |
| describe a Phy Analog Setup registers for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaPhyAnalogSetupTable_s | agsaPhyAnalogSetupTable_t |
|
typedef struct agsaPhyAnalogSettingsPage_s | agsaPhyAnalogSettingsPage_t |
| describe a Phy Analog Setting More...
|
|
typedef struct agsaSASPhyOpenRejectRetryBackOffThresholdPage_s | agsaSASPhyOpenRejectRetryBackOffThresholdPage_t |
| describe a Open reject retry backoff threshold page More...
|
|
typedef struct agsaPhyRateControlPage_s | agsaPhyRateControlPage_t |
| describe a Phy Rate Control 4.56 agsaPhyRateControlPage_t Description This profile page is used to read or set several rate control parameters. The page code for this profile page is 0x07. This page can be READ by issuing saGetPhyProfile(). It can be read anytime and there is no need to quiesce the I/O to the controller. Related parameters can be modified by issuing saSetPhyProfile() before calling saPhyStart() to the PHY. Note: This page is applicable only to the SPCv controller. Usage Initiator and target. More...
|
|
typedef struct agsaRegDumpInfo_s | agsaRegDumpInfo_t |
| describe a Register Dump information for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaNVMDData_s | agsaNVMDData_t |
| describe a NVMData for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaPCIeDiagExecute_s | agsaPCIeDiagExecute_t |
|
typedef struct agsaPCIeDiagResponse_s | agsaPCIeDiagResponse_t |
| agsaPCIeDiagResponse_t More...
|
|
typedef struct agsaFatalErrorInfo_s | agsaFatalErrorInfo_t |
| describe a fatal error information for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaEventSource_s | agsaEventSource_t |
| describe a information for a Event in the SAS/SATA hardware More...
|
|
typedef struct agsaControllerInfo_s | agsaControllerInfo_t |
| describe a information for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaControllerStatus_s | agsaControllerStatus_t |
| describe a status for a Controller in the SAS/SATA hardware More...
|
|
typedef struct agsaGpioEventSetupInfo_s | agsaGpioEventSetupInfo_t |
| describe a GPIO Event Setup Infomation in the SAS/SATA hardware More...
|
|
typedef struct agsaGpioPinSetupInfo_t | agsaGpioPinSetupInfo_t |
| describe a GPIO Pin Setup Infomation in the SAS/SATA hardware More...
|
|
typedef struct agsaGpioWriteSetupInfo_s | agsaGpioWriteSetupInfo_t |
| describe a serial GPIO operation in the SAS/SATA hardware More...
|
|
typedef struct agsaGpioReadInfo_s | agsaGpioReadInfo_t |
| describe a GPIO Read Infomation in the SAS/SATA hardware More...
|
|
typedef struct agsaSGpioReqResponse_s | agsaSGpioReqResponse_t |
| describe a serial GPIO request and response in the SAS/SATA hardware More...
|
|
typedef struct agsaSGpioCfg0 | agsaSGpioCfg0_t |
| describe a serial GPIO operation response in the SAS/SATA hardware More...
|
|
typedef struct agsaSGpioCfg1 | agsaSGpioCfg1_t |
| SGPIO configuration register 1. More...
|
|
typedef struct agsaPhyConfig_s | agsaPhyConfig_t |
| describe a configuration for a PHY in the SAS/SATA hardware More...
|
|
typedef struct agsaPhySNW3Page_s | agsaPhySNW3Page_t |
| Structure is used as a parameter passed in saLocalPhyControlCB() to describe the error counter. More...
|
|
typedef struct agsaPhyErrCounters_s | agsaPhyErrCounters_t |
| structure describe error counters of a PHY in the SAS/SATA More...
|
|
typedef struct agsaPhyErrCountersPage_s | agsaPhyErrCountersPage_t |
| used in saGetPhyProfile More...
|
|
typedef struct agsaPhyBWCountersPage_s | agsaPhyBWCountersPage_t |
| structure describes bandwidth counters of a PHY in the SAS/SATA More...
|
|
typedef struct agsaHwConfig_s | agsaHwConfig_t |
| structure describe hardware configuration More...
|
|
typedef struct agsaSwConfig_s | agsaSwConfig_t |
| structure describe software configuration More...
|
|
typedef struct agsaQueueInbound_s | agsaQueueInbound_t |
|
typedef struct agsaQueueOutbound_s | agsaQueueOutbound_t |
|
typedef struct agsaPhyCalibrationTbl_s | agsaPhyCalibrationTbl_t |
|
typedef struct agsaQueueConfig_s | agsaQueueConfig_t |
|
typedef struct agsaFwImg_s | agsaFwImg_t |
|
typedef struct agsaMem_s | agsaMem_t |
| generic memory descriptor More...
|
|
typedef struct agsaControllerEventLog_s | agsaControllerEventLog_t |
| specify the controller Event Log for the SAS/SATA LL Layer More...
|
|
typedef struct agsaSASDiagExecute_s | agsaSASDiagExecute_t |
| specify the SAS Diagnostic Parameters for the SAS/SATA LL Layer More...
|
|
typedef struct agsaSASPhyGeneralStatusPage_s | agsaSASPhyGeneralStatusPage_t |
| for the SAS/SATA LL Layer More...
|
|
typedef struct agsaMemoryRequirement_s | agsaMemoryRequirement_t |
| specify the memory allocation requirement for the SAS/SATA LL Layer More...
|
|
typedef struct agsaSASAddressID_s | agsaSASAddressID_t |
| describe a SAS address and PHY Identifier More...
|
|
typedef struct agsaDeviceInfo_s | agsaDeviceInfo_t |
| data structure provides some information about a SATA device More...
|
|
typedef struct agsaSATADeviceInfo_s | agsaSATADeviceInfo_t |
| data structure provides some information about a SATA device More...
|
|
typedef struct agsaSASDeviceInfo_s | agsaSASDeviceInfo_t |
| data structure provides some information about a SAS device More...
|
|
typedef struct _SASG_DESCRIPTOR | SASG_DESCRIPTOR |
| the data structure describe SG list More...
|
|
typedef struct _SASG_DESCRIPTOR * | PSASG_DESCRIPTOR |
|
typedef struct agsaSgl_s | agsaSgl_t |
| data structure used to pass information about the scatter-gather list to the LL Layer More...
|
|
typedef struct agsaEsgl_s | agsaEsgl_t |
| data structure is used to pass information about the extended scatter-gather list (ESGL) to the LL Layer More...
|
|
typedef struct agsaSSPCmdInfoUnitExt_s | agsaSSPCmdInfoUnitExt_t |
|
typedef struct agsaDif_s | agsaDif_t |
|
typedef struct agsaEncryptDek_s | agsaEncryptDek_t |
|
typedef struct agsaEncrypt_s | agsaEncrypt_t |
|
typedef struct agsaSSPInitiatorRequest_s | agsaSSPInitiatorRequest_t |
| data structure describes a SAS SSP command request to be sent to the target device More...
|
|
typedef struct agsaSSPInitiatorRequestExt_s | agsaSSPInitiatorRequestExt_t |
| data structure describes a SAS SSP command request Ext to be sent to the target device More...
|
|
typedef struct agsaSSPInitiatorRequestIndirect_s | agsaSSPInitiatorRequestIndirect_t |
|
typedef struct agsaSSPTargetRequest_s | agsaSSPTargetRequest_t |
| data structure describes a SAS SSP target read and write request More...
|
|
typedef struct agsaSSPTargetResponse_s | agsaSSPTargetResponse_t |
| data structure describes a SAS SSP target response to be issued on the port More...
|
|
typedef struct agsaSMPFrame_s | agsaSMPFrame_t |
| data structure describes a SMP request or response frame to be sent on the SAS port More...
|
|
typedef union agsaSASRequestBody_u | agsaSASRequestBody_t |
| union data structure specifies a request More...
|
|
typedef struct agsaSATAInitiatorRequest_s | agsaSATAInitiatorRequest_t |
| data structure describes an STP or direct connect SATA command More...
|
|
typedef struct agsaEncryptGeneralPage_s | agsaEncryptGeneralPage_t |
|
typedef struct agsaEncryptDekConfigPage_s | agsaEncryptDekConfigPage_t |
|
typedef struct agsaEncryptControlParamPage_s | agsaEncryptControlParamPage_t |
|
typedef struct agsaEncryptInfo_s | agsaEncryptInfo_t |
|
typedef struct agsaEncryptSelfTestBitMap_s | agsaEncryptSelfTestBitMap_t |
|
typedef struct agsaEncryptSelfTestStatusBitMap_s | agsaEncryptSelfTestStatusBitMap_t |
|
typedef struct agsaEncryptHMACTestDescriptor_s | agsaEncryptHMACTestDescriptor_t |
|
typedef struct agsaEncryptHMACTestResult_s | agsaEncryptHMACTestResult_t |
|
typedef struct agsaEncryptSHATestDescriptor_s | agsaEncryptSHATestDescriptor_t |
|
typedef struct agsaEncryptSHATestResult_s | agsaEncryptSHATestResult_t |
|
typedef struct agsaEncryptDekBlob_s | agsaEncryptDekBlob_t |
|
typedef struct agsaEncryptKekBlob_s | agsaEncryptKekBlob_t |
|
typedef struct agsaEncryptHMACConfigPage_s | agsaEncryptHMACConfigPage_t |
|
typedef struct agsaID_s | agsaID_t |
|
typedef struct agsaSASPhyMiscPage_s | agsaSASPhyMiscPage_t |
|
typedef struct agsaHWEventEncrypt_s | agsaHWEventEncrypt_t |
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typedef struct agsaHWEventMode_s | agsaHWEventMode_t |
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typedef struct agsaInterruptConfigPage_s | agsaInterruptConfigPage_t |
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typedef struct agsaIoGeneralPage_s | agsaIoGeneralPage_t |
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typedef struct agsaDifDetails_s | agsaDifDetails_t |
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typedef struct agsaSASProtocolTimerConfigurationPage_s | agsaSASProtocolTimerConfigurationPage_t |
| data structure for SAS protocol timer configuration page. More...
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typedef struct agsaUpdateFwFlash_s | agsaUpdateFwFlash_t |
| data structure for firmware flash update saFwFlashUpdate(). More...
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typedef struct agsaFlashExtExecute_s | agsaFlashExtExecute_t |
| data structure for extended firmware flash update saFwFlashExtUpdate(). More...
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typedef struct agsaFlashExtResponse_s | agsaFlashExtResponse_t |
| data structure for firmware flash update saFwFlashUpdate(). More...
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typedef struct agsaMPIContext_s | agsaMPIContext_t |
| data structure for set fields in MPI table. The agsaMPIContext_t data structure is used to set fields in MPI table. For details of MPI table, refer to PM8001 Tachyon SPC 8x6G Programmers' Manual PMC-2080222 or PM8008/PM8009/PM8018 Tachyon SPCv/SPCve/SPCv+ Programmers Manual PMC-2091148/PMC-2102373. sTSDK section 4.39 More...
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typedef void(* | ossaDeviceRegistrationCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 status, agsaDevHandle_t *agDevHandle, bit32 deviceID) |
| Callback definition for .ossaDeviceRegistration. More...
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typedef void(* | ossaDeregisterDeviceHandleCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, agsaDevHandle_t *agDevHandle, bit32 status) |
| Callback definition for. More...
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typedef void(* | ossaGenericCB_t) (void) |
| Callback definition for. More...
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typedef void(* | ossaGenericAbortCB_t) (agsaRoot_t *agRoot, agsaIORequest_t *agIORequest, bit32 flag, bit32 status) |
| Callback definition for abort SMP SSP SATA callback. More...
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typedef void(* | ossaLocalPhyControlCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 phyId, bit32 phyOperation, bit32 status, void *parm) |
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typedef void(* | ossaSATACompletedCB_t) (agsaRoot_t *agRoot, agsaIORequest_t *agIORequest, bit32 agIOStatus, void *agFirstDword, bit32 agIOInfoLen, void *agParam) |
| Callback definition for. More...
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typedef void(* | ossaSMPCompletedCB_t) (agsaRoot_t *agRoot, agsaIORequest_t *agIORequest, bit32 agIOStatus, bit32 agIOInfoLen, agsaFrameHandle_t agFrameHandle) |
| Callback definition for. More...
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typedef void(* | ossaSSPCompletedCB_t) (agsaRoot_t *agRoot, agsaIORequest_t *agIORequest, bit32 agIOStatus, bit32 agIOInfoLen, void *agParam, bit16 sspTag, bit32 agOtherInfo) |
| Callback definition for. More...
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typedef void(* | ossaSetDeviceInfoCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, agsaDevHandle_t *agDevHandle, bit32 status, bit32 option, bit32 param) |
| Callback definition for. More...
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typedef struct agsaOffloadDifDetails_s | agsaOffloadDifDetails_t |
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typedef struct agsaDifEncPayload_s | agsaDifEncPayload_t |
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typedef void(* | ossaVhistCaptureCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 status, bit32 len) |
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typedef void(* | ossaDIFEncryptionOffloadStartCB_t) (agsaRoot_t *agRoot, agsaContext_t *agContext, bit32 status, agsaOffloadDifDetails_t *agsaOffloadDifDetails) |
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typedef struct agsaBarOffset_s | agsaBarOffset_t |
| describe an element of SPC-SPCV converter More...
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typedef union agsabit32bit64_U | agsabit32bit64 |
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typedef struct agsaIOErrorEventStats_s | agsaIOErrorEventStats_t |
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