Go to the source code of this file.
Data Structures | |
| struct | ural_tx_desc |
| struct | ural_rx_desc |
Macros | |
| #define | RAL_NOISE_FLOOR -95 |
| #define | RAL_RSSI_CORR 120 |
| #define | RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc)) |
| #define | RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc)) |
| #define | RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */ |
| #define | RAL_CONFIG_NO 1 |
| #define | RAL_IFACE_INDEX 0 |
| #define | RAL_VENDOR_REQUEST 0x01 |
| #define | RAL_WRITE_MAC 0x02 |
| #define | RAL_READ_MAC 0x03 |
| #define | RAL_WRITE_MULTI_MAC 0x06 |
| #define | RAL_READ_MULTI_MAC 0x07 |
| #define | RAL_READ_EEPROM 0x09 |
| #define | RAL_MAC_CSR0 0x0400 /* ASIC Version */ |
| #define | RAL_MAC_CSR1 0x0402 /* System control */ |
| #define | RAL_MAC_CSR2 0x0404 /* MAC addr0 */ |
| #define | RAL_MAC_CSR3 0x0406 /* MAC addr1 */ |
| #define | RAL_MAC_CSR4 0x0408 /* MAC addr2 */ |
| #define | RAL_MAC_CSR5 0x040a /* BSSID0 */ |
| #define | RAL_MAC_CSR6 0x040c /* BSSID1 */ |
| #define | RAL_MAC_CSR7 0x040e /* BSSID2 */ |
| #define | RAL_MAC_CSR8 0x0410 /* Max frame length */ |
| #define | RAL_MAC_CSR9 0x0412 /* Timer control */ |
| #define | RAL_MAC_CSR10 0x0414 /* Slot time */ |
| #define | RAL_MAC_CSR11 0x0416 /* IFS */ |
| #define | RAL_MAC_CSR12 0x0418 /* EIFS */ |
| #define | RAL_MAC_CSR13 0x041a /* Power mode0 */ |
| #define | RAL_MAC_CSR14 0x041c /* Power mode1 */ |
| #define | RAL_MAC_CSR15 0x041e /* Power saving transition0 */ |
| #define | RAL_MAC_CSR16 0x0420 /* Power saving transition1 */ |
| #define | RAL_MAC_CSR17 0x0422 /* Power state control */ |
| #define | RAL_MAC_CSR18 0x0424 /* Auto wake-up control */ |
| #define | RAL_MAC_CSR19 0x0426 /* GPIO control */ |
| #define | RAL_MAC_CSR20 0x0428 /* LED control0 */ |
| #define | RAL_MAC_CSR22 0x042c /* XXX not documented */ |
| #define | RAL_TXRX_CSR0 0x0440 /* Security control */ |
| #define | RAL_TXRX_CSR2 0x0444 /* Rx control */ |
| #define | RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */ |
| #define | RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */ |
| #define | RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */ |
| #define | RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */ |
| #define | RAL_TXRX_CSR10 0x0454 /* Auto responder control */ |
| #define | RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */ |
| #define | RAL_TXRX_CSR18 0x0464 /* Beacon interval */ |
| #define | RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */ |
| #define | RAL_TXRX_CSR20 0x0468 /* Beacon alignment */ |
| #define | RAL_TXRX_CSR21 0x046a /* XXX not documented */ |
| #define | RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */ |
| #define | RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */ |
| #define | RAL_PHY_CSR4 0x04c8 /* Interface configuration */ |
| #define | RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */ |
| #define | RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */ |
| #define | RAL_PHY_CSR7 0x04ce /* BBP serial control */ |
| #define | RAL_PHY_CSR8 0x04d0 /* BBP serial status */ |
| #define | RAL_PHY_CSR9 0x04d2 /* RF serial control0 */ |
| #define | RAL_PHY_CSR10 0x04d4 /* RF serial control1 */ |
| #define | RAL_STA_CSR0 0x04e0 /* FCS error */ |
| #define | RAL_DISABLE_RX (1 << 0) |
| #define | RAL_DROP_CRC (1 << 1) |
| #define | RAL_DROP_PHY (1 << 2) |
| #define | RAL_DROP_CTL (1 << 3) |
| #define | RAL_DROP_NOT_TO_ME (1 << 4) |
| #define | RAL_DROP_TODS (1 << 5) |
| #define | RAL_DROP_BAD_VERSION (1 << 6) |
| #define | RAL_DROP_MULTICAST (1 << 9) |
| #define | RAL_DROP_BROADCAST (1 << 10) |
| #define | RAL_SHORT_PREAMBLE (1 << 2) |
| #define | RAL_RESET_ASIC (1 << 0) |
| #define | RAL_RESET_BBP (1 << 1) |
| #define | RAL_HOST_READY (1 << 2) |
| #define | RAL_ENABLE_TSF (1 << 0) |
| #define | RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1) |
| #define | RAL_ENABLE_TBCN (1 << 3) |
| #define | RAL_ENABLE_BEACON_GENERATOR (1 << 4) |
| #define | RAL_RF_AWAKE (3 << 7) |
| #define | RAL_BBP_AWAKE (3 << 5) |
| #define | RAL_BBP_WRITE (1 << 15) |
| #define | RAL_BBP_BUSY (1 << 0) |
| #define | RAL_RF1_AUTOTUNE 0x08000 |
| #define | RAL_RF3_AUTOTUNE 0x00040 |
| #define | RAL_RF_2522 0x00 |
| #define | RAL_RF_2523 0x01 |
| #define | RAL_RF_2524 0x02 |
| #define | RAL_RF_2525 0x03 |
| #define | RAL_RF_2525E 0x04 |
| #define | RAL_RF_2526 0x05 |
| #define | RAL_RF_5222 0x10 |
| #define | RAL_BBP_VERSION 0 |
| #define | RAL_BBP_TX 2 |
| #define | RAL_BBP_RX 14 |
| #define | RAL_BBP_ANTA 0x00 |
| #define | RAL_BBP_DIVERSITY 0x01 |
| #define | RAL_BBP_ANTB 0x02 |
| #define | RAL_BBP_ANTMASK 0x03 |
| #define | RAL_BBP_FLIPIQ 0x04 |
| #define | RAL_JAPAN_FILTER 0x08 |
| #define | RAL_TX_RETRY(x) ((x) << 4) |
| #define | RAL_TX_MORE_FRAG (1 << 8) |
| #define | RAL_TX_ACK (1 << 9) |
| #define | RAL_TX_TIMESTAMP (1 << 10) |
| #define | RAL_TX_OFDM (1 << 11) |
| #define | RAL_TX_NEWSEQ (1 << 12) |
| #define | RAL_TX_IFS_MASK 0x00006000 |
| #define | RAL_TX_IFS_BACKOFF (0 << 13) |
| #define | RAL_TX_IFS_SIFS (1 << 13) |
| #define | RAL_TX_IFS_NEWBACKOFF (2 << 13) |
| #define | RAL_TX_IFS_NONE (3 << 13) |
| #define | RAL_LOGCWMAX(x) (((x) & 0xf) << 12) |
| #define | RAL_LOGCWMIN(x) (((x) & 0xf) << 8) |
| #define | RAL_AIFSN(x) (((x) & 0x3) << 6) |
| #define | RAL_IVOFFSET(x) (((x) & 0x3f)) |
| #define | RAL_PLCP_LENGEXT 0x80 |
| #define | RAL_RX_CRC_ERROR (1 << 5) |
| #define | RAL_RX_OFDM (1 << 6) |
| #define | RAL_RX_PHY_ERROR (1 << 7) |
| #define | RAL_RF_LOBUSY (1 << 15) |
| #define | RAL_RF_BUSY (1U << 31) |
| #define | RAL_RF_20BIT (20 << 24) |
| #define | RAL_RF1 0 |
| #define | RAL_RF2 2 |
| #define | RAL_RF3 1 |
| #define | RAL_RF4 3 |
| #define | RAL_EEPROM_ADDRESS 0x0004 |
| #define | RAL_EEPROM_TXPOWER 0x003c |
| #define | RAL_EEPROM_CONFIG0 0x0016 |
| #define | RAL_EEPROM_BBP_BASE 0x001c |
Variables | |
| struct ural_tx_desc | __packed |
Macro Definition Documentation
◆ RAL_AIFSN
| #define RAL_AIFSN | ( | x | ) | (((x) & 0x3) << 6) |
Definition at line 170 of file if_uralreg.h.
◆ RAL_BBP_ANTA
| #define RAL_BBP_ANTA 0x00 |
Definition at line 144 of file if_uralreg.h.
◆ RAL_BBP_ANTB
| #define RAL_BBP_ANTB 0x02 |
Definition at line 146 of file if_uralreg.h.
◆ RAL_BBP_ANTMASK
| #define RAL_BBP_ANTMASK 0x03 |
Definition at line 147 of file if_uralreg.h.
◆ RAL_BBP_AWAKE
| #define RAL_BBP_AWAKE (3 << 5) |
Definition at line 123 of file if_uralreg.h.
◆ RAL_BBP_BUSY
| #define RAL_BBP_BUSY (1 << 0) |
Definition at line 126 of file if_uralreg.h.
◆ RAL_BBP_DIVERSITY
| #define RAL_BBP_DIVERSITY 0x01 |
Definition at line 145 of file if_uralreg.h.
◆ RAL_BBP_FLIPIQ
| #define RAL_BBP_FLIPIQ 0x04 |
Definition at line 148 of file if_uralreg.h.
◆ RAL_BBP_RX
| #define RAL_BBP_RX 14 |
Definition at line 142 of file if_uralreg.h.
◆ RAL_BBP_TX
| #define RAL_BBP_TX 2 |
Definition at line 141 of file if_uralreg.h.
◆ RAL_BBP_VERSION
| #define RAL_BBP_VERSION 0 |
Definition at line 140 of file if_uralreg.h.
◆ RAL_BBP_WRITE
| #define RAL_BBP_WRITE (1 << 15) |
Definition at line 125 of file if_uralreg.h.
◆ RAL_CONFIG_NO
| #define RAL_CONFIG_NO 1 |
Definition at line 27 of file if_uralreg.h.
◆ RAL_DISABLE_RX
| #define RAL_DISABLE_RX (1 << 0) |
Definition at line 101 of file if_uralreg.h.
◆ RAL_DROP_BAD_VERSION
| #define RAL_DROP_BAD_VERSION (1 << 6) |
Definition at line 107 of file if_uralreg.h.
◆ RAL_DROP_BROADCAST
| #define RAL_DROP_BROADCAST (1 << 10) |
Definition at line 109 of file if_uralreg.h.
◆ RAL_DROP_CRC
| #define RAL_DROP_CRC (1 << 1) |
Definition at line 102 of file if_uralreg.h.
◆ RAL_DROP_CTL
| #define RAL_DROP_CTL (1 << 3) |
Definition at line 104 of file if_uralreg.h.
◆ RAL_DROP_MULTICAST
| #define RAL_DROP_MULTICAST (1 << 9) |
Definition at line 108 of file if_uralreg.h.
◆ RAL_DROP_NOT_TO_ME
| #define RAL_DROP_NOT_TO_ME (1 << 4) |
Definition at line 105 of file if_uralreg.h.
◆ RAL_DROP_PHY
| #define RAL_DROP_PHY (1 << 2) |
Definition at line 103 of file if_uralreg.h.
◆ RAL_DROP_TODS
| #define RAL_DROP_TODS (1 << 5) |
Definition at line 106 of file if_uralreg.h.
◆ RAL_EEPROM_ADDRESS
| #define RAL_EEPROM_ADDRESS 0x0004 |
Definition at line 207 of file if_uralreg.h.
◆ RAL_EEPROM_BBP_BASE
| #define RAL_EEPROM_BBP_BASE 0x001c |
Definition at line 210 of file if_uralreg.h.
◆ RAL_EEPROM_CONFIG0
| #define RAL_EEPROM_CONFIG0 0x0016 |
Definition at line 209 of file if_uralreg.h.
◆ RAL_EEPROM_TXPOWER
| #define RAL_EEPROM_TXPOWER 0x003c |
Definition at line 208 of file if_uralreg.h.
◆ RAL_ENABLE_BEACON_GENERATOR
| #define RAL_ENABLE_BEACON_GENERATOR (1 << 4) |
Definition at line 120 of file if_uralreg.h.
◆ RAL_ENABLE_TBCN
| #define RAL_ENABLE_TBCN (1 << 3) |
Definition at line 119 of file if_uralreg.h.
◆ RAL_ENABLE_TSF
| #define RAL_ENABLE_TSF (1 << 0) |
Definition at line 117 of file if_uralreg.h.
◆ RAL_ENABLE_TSF_SYNC
| #define RAL_ENABLE_TSF_SYNC | ( | x | ) | (((x) & 0x3) << 1) |
Definition at line 118 of file if_uralreg.h.
◆ RAL_FRAME_SIZE
| #define RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */ |
Definition at line 25 of file if_uralreg.h.
◆ RAL_HOST_READY
| #define RAL_HOST_READY (1 << 2) |
Definition at line 115 of file if_uralreg.h.
◆ RAL_IFACE_INDEX
| #define RAL_IFACE_INDEX 0 |
Definition at line 28 of file if_uralreg.h.
◆ RAL_IVOFFSET
| #define RAL_IVOFFSET | ( | x | ) | (((x) & 0x3f)) |
Definition at line 171 of file if_uralreg.h.
◆ RAL_JAPAN_FILTER
| #define RAL_JAPAN_FILTER 0x08 |
Definition at line 150 of file if_uralreg.h.
◆ RAL_LOGCWMAX
| #define RAL_LOGCWMAX | ( | x | ) | (((x) & 0xf) << 12) |
Definition at line 168 of file if_uralreg.h.
◆ RAL_LOGCWMIN
| #define RAL_LOGCWMIN | ( | x | ) | (((x) & 0xf) << 8) |
Definition at line 169 of file if_uralreg.h.
◆ RAL_MAC_CSR0
| #define RAL_MAC_CSR0 0x0400 /* ASIC Version */ |
Definition at line 40 of file if_uralreg.h.
◆ RAL_MAC_CSR1
| #define RAL_MAC_CSR1 0x0402 /* System control */ |
Definition at line 41 of file if_uralreg.h.
◆ RAL_MAC_CSR10
| #define RAL_MAC_CSR10 0x0414 /* Slot time */ |
Definition at line 50 of file if_uralreg.h.
◆ RAL_MAC_CSR11
| #define RAL_MAC_CSR11 0x0416 /* IFS */ |
Definition at line 51 of file if_uralreg.h.
◆ RAL_MAC_CSR12
| #define RAL_MAC_CSR12 0x0418 /* EIFS */ |
Definition at line 52 of file if_uralreg.h.
◆ RAL_MAC_CSR13
| #define RAL_MAC_CSR13 0x041a /* Power mode0 */ |
Definition at line 53 of file if_uralreg.h.
◆ RAL_MAC_CSR14
| #define RAL_MAC_CSR14 0x041c /* Power mode1 */ |
Definition at line 54 of file if_uralreg.h.
◆ RAL_MAC_CSR15
| #define RAL_MAC_CSR15 0x041e /* Power saving transition0 */ |
Definition at line 55 of file if_uralreg.h.
◆ RAL_MAC_CSR16
| #define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */ |
Definition at line 56 of file if_uralreg.h.
◆ RAL_MAC_CSR17
| #define RAL_MAC_CSR17 0x0422 /* Power state control */ |
Definition at line 57 of file if_uralreg.h.
◆ RAL_MAC_CSR18
| #define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */ |
Definition at line 58 of file if_uralreg.h.
◆ RAL_MAC_CSR19
| #define RAL_MAC_CSR19 0x0426 /* GPIO control */ |
Definition at line 59 of file if_uralreg.h.
◆ RAL_MAC_CSR2
| #define RAL_MAC_CSR2 0x0404 /* MAC addr0 */ |
Definition at line 42 of file if_uralreg.h.
◆ RAL_MAC_CSR20
| #define RAL_MAC_CSR20 0x0428 /* LED control0 */ |
Definition at line 60 of file if_uralreg.h.
◆ RAL_MAC_CSR22
| #define RAL_MAC_CSR22 0x042c /* XXX not documented */ |
Definition at line 61 of file if_uralreg.h.
◆ RAL_MAC_CSR3
| #define RAL_MAC_CSR3 0x0406 /* MAC addr1 */ |
Definition at line 43 of file if_uralreg.h.
◆ RAL_MAC_CSR4
| #define RAL_MAC_CSR4 0x0408 /* MAC addr2 */ |
Definition at line 44 of file if_uralreg.h.
◆ RAL_MAC_CSR5
| #define RAL_MAC_CSR5 0x040a /* BSSID0 */ |
Definition at line 45 of file if_uralreg.h.
◆ RAL_MAC_CSR6
| #define RAL_MAC_CSR6 0x040c /* BSSID1 */ |
Definition at line 46 of file if_uralreg.h.
◆ RAL_MAC_CSR7
| #define RAL_MAC_CSR7 0x040e /* BSSID2 */ |
Definition at line 47 of file if_uralreg.h.
◆ RAL_MAC_CSR8
| #define RAL_MAC_CSR8 0x0410 /* Max frame length */ |
Definition at line 48 of file if_uralreg.h.
◆ RAL_MAC_CSR9
| #define RAL_MAC_CSR9 0x0412 /* Timer control */ |
Definition at line 49 of file if_uralreg.h.
◆ RAL_NOISE_FLOOR
| #define RAL_NOISE_FLOOR -95 |
Definition at line 20 of file if_uralreg.h.
◆ RAL_PHY_CSR10
| #define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */ |
Definition at line 94 of file if_uralreg.h.
◆ RAL_PHY_CSR2
| #define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */ |
Definition at line 87 of file if_uralreg.h.
◆ RAL_PHY_CSR4
| #define RAL_PHY_CSR4 0x04c8 /* Interface configuration */ |
Definition at line 88 of file if_uralreg.h.
◆ RAL_PHY_CSR5
| #define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */ |
Definition at line 89 of file if_uralreg.h.
◆ RAL_PHY_CSR6
| #define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */ |
Definition at line 90 of file if_uralreg.h.
◆ RAL_PHY_CSR7
| #define RAL_PHY_CSR7 0x04ce /* BBP serial control */ |
Definition at line 91 of file if_uralreg.h.
◆ RAL_PHY_CSR8
| #define RAL_PHY_CSR8 0x04d0 /* BBP serial status */ |
Definition at line 92 of file if_uralreg.h.
◆ RAL_PHY_CSR9
| #define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */ |
Definition at line 93 of file if_uralreg.h.
◆ RAL_PLCP_LENGEXT
| #define RAL_PLCP_LENGEXT 0x80 |
Definition at line 176 of file if_uralreg.h.
◆ RAL_READ_EEPROM
| #define RAL_READ_EEPROM 0x09 |
Definition at line 35 of file if_uralreg.h.
◆ RAL_READ_MAC
| #define RAL_READ_MAC 0x03 |
Definition at line 32 of file if_uralreg.h.
◆ RAL_READ_MULTI_MAC
| #define RAL_READ_MULTI_MAC 0x07 |
Definition at line 34 of file if_uralreg.h.
◆ RAL_RESET_ASIC
| #define RAL_RESET_ASIC (1 << 0) |
Definition at line 113 of file if_uralreg.h.
◆ RAL_RESET_BBP
| #define RAL_RESET_BBP (1 << 1) |
Definition at line 114 of file if_uralreg.h.
◆ RAL_RF1
| #define RAL_RF1 0 |
Definition at line 202 of file if_uralreg.h.
◆ RAL_RF1_AUTOTUNE
| #define RAL_RF1_AUTOTUNE 0x08000 |
Definition at line 128 of file if_uralreg.h.
◆ RAL_RF2
| #define RAL_RF2 2 |
Definition at line 203 of file if_uralreg.h.
◆ RAL_RF3
| #define RAL_RF3 1 |
Definition at line 204 of file if_uralreg.h.
◆ RAL_RF3_AUTOTUNE
| #define RAL_RF3_AUTOTUNE 0x00040 |
Definition at line 129 of file if_uralreg.h.
◆ RAL_RF4
| #define RAL_RF4 3 |
Definition at line 205 of file if_uralreg.h.
◆ RAL_RF_20BIT
| #define RAL_RF_20BIT (20 << 24) |
Definition at line 200 of file if_uralreg.h.
◆ RAL_RF_2522
| #define RAL_RF_2522 0x00 |
Definition at line 131 of file if_uralreg.h.
◆ RAL_RF_2523
| #define RAL_RF_2523 0x01 |
Definition at line 132 of file if_uralreg.h.
◆ RAL_RF_2524
| #define RAL_RF_2524 0x02 |
Definition at line 133 of file if_uralreg.h.
◆ RAL_RF_2525
| #define RAL_RF_2525 0x03 |
Definition at line 134 of file if_uralreg.h.
◆ RAL_RF_2525E
| #define RAL_RF_2525E 0x04 |
Definition at line 135 of file if_uralreg.h.
◆ RAL_RF_2526
| #define RAL_RF_2526 0x05 |
Definition at line 136 of file if_uralreg.h.
◆ RAL_RF_5222
| #define RAL_RF_5222 0x10 |
Definition at line 138 of file if_uralreg.h.
◆ RAL_RF_AWAKE
| #define RAL_RF_AWAKE (3 << 7) |
Definition at line 122 of file if_uralreg.h.
◆ RAL_RF_BUSY
| #define RAL_RF_BUSY (1U << 31) |
Definition at line 199 of file if_uralreg.h.
◆ RAL_RF_LOBUSY
| #define RAL_RF_LOBUSY (1 << 15) |
Definition at line 198 of file if_uralreg.h.
◆ RAL_RSSI_CORR
| #define RAL_RSSI_CORR 120 |
Definition at line 21 of file if_uralreg.h.
◆ RAL_RX_CRC_ERROR
| #define RAL_RX_CRC_ERROR (1 << 5) |
Definition at line 186 of file if_uralreg.h.
◆ RAL_RX_DESC_SIZE
| #define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc)) |
Definition at line 23 of file if_uralreg.h.
◆ RAL_RX_OFDM
| #define RAL_RX_OFDM (1 << 6) |
Definition at line 187 of file if_uralreg.h.
◆ RAL_RX_PHY_ERROR
| #define RAL_RX_PHY_ERROR (1 << 7) |
Definition at line 188 of file if_uralreg.h.
◆ RAL_SEC_CSR0
| #define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */ |
Definition at line 82 of file if_uralreg.h.
◆ RAL_SHORT_PREAMBLE
| #define RAL_SHORT_PREAMBLE (1 << 2) |
Definition at line 111 of file if_uralreg.h.
◆ RAL_STA_CSR0
| #define RAL_STA_CSR0 0x04e0 /* FCS error */ |
Definition at line 99 of file if_uralreg.h.
◆ RAL_TX_ACK
| #define RAL_TX_ACK (1 << 9) |
Definition at line 156 of file if_uralreg.h.
◆ RAL_TX_DESC_SIZE
| #define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc)) |
Definition at line 24 of file if_uralreg.h.
◆ RAL_TX_IFS_BACKOFF
| #define RAL_TX_IFS_BACKOFF (0 << 13) |
Definition at line 162 of file if_uralreg.h.
◆ RAL_TX_IFS_MASK
| #define RAL_TX_IFS_MASK 0x00006000 |
Definition at line 161 of file if_uralreg.h.
◆ RAL_TX_IFS_NEWBACKOFF
| #define RAL_TX_IFS_NEWBACKOFF (2 << 13) |
Definition at line 164 of file if_uralreg.h.
◆ RAL_TX_IFS_NONE
| #define RAL_TX_IFS_NONE (3 << 13) |
Definition at line 165 of file if_uralreg.h.
◆ RAL_TX_IFS_SIFS
| #define RAL_TX_IFS_SIFS (1 << 13) |
Definition at line 163 of file if_uralreg.h.
◆ RAL_TX_MORE_FRAG
| #define RAL_TX_MORE_FRAG (1 << 8) |
Definition at line 155 of file if_uralreg.h.
◆ RAL_TX_NEWSEQ
| #define RAL_TX_NEWSEQ (1 << 12) |
Definition at line 159 of file if_uralreg.h.
◆ RAL_TX_OFDM
| #define RAL_TX_OFDM (1 << 11) |
Definition at line 158 of file if_uralreg.h.
◆ RAL_TX_RETRY
| #define RAL_TX_RETRY | ( | x | ) | ((x) << 4) |
Definition at line 154 of file if_uralreg.h.
◆ RAL_TX_TIMESTAMP
| #define RAL_TX_TIMESTAMP (1 << 10) |
Definition at line 157 of file if_uralreg.h.
◆ RAL_TXRX_CSR0
| #define RAL_TXRX_CSR0 0x0440 /* Security control */ |
Definition at line 66 of file if_uralreg.h.
◆ RAL_TXRX_CSR10
| #define RAL_TXRX_CSR10 0x0454 /* Auto responder control */ |
Definition at line 72 of file if_uralreg.h.
◆ RAL_TXRX_CSR11
| #define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */ |
Definition at line 73 of file if_uralreg.h.
◆ RAL_TXRX_CSR18
| #define RAL_TXRX_CSR18 0x0464 /* Beacon interval */ |
Definition at line 74 of file if_uralreg.h.
◆ RAL_TXRX_CSR19
| #define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */ |
Definition at line 75 of file if_uralreg.h.
◆ RAL_TXRX_CSR2
| #define RAL_TXRX_CSR2 0x0444 /* Rx control */ |
Definition at line 67 of file if_uralreg.h.
◆ RAL_TXRX_CSR20
| #define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */ |
Definition at line 76 of file if_uralreg.h.
◆ RAL_TXRX_CSR21
| #define RAL_TXRX_CSR21 0x046a /* XXX not documented */ |
Definition at line 77 of file if_uralreg.h.
◆ RAL_TXRX_CSR5
| #define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */ |
Definition at line 68 of file if_uralreg.h.
◆ RAL_TXRX_CSR6
| #define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */ |
Definition at line 69 of file if_uralreg.h.
◆ RAL_TXRX_CSR7
| #define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */ |
Definition at line 70 of file if_uralreg.h.
◆ RAL_TXRX_CSR8
| #define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */ |
Definition at line 71 of file if_uralreg.h.
◆ RAL_VENDOR_REQUEST
| #define RAL_VENDOR_REQUEST 0x01 |
Definition at line 30 of file if_uralreg.h.
◆ RAL_WRITE_MAC
| #define RAL_WRITE_MAC 0x02 |
Definition at line 31 of file if_uralreg.h.
◆ RAL_WRITE_MULTI_MAC
| #define RAL_WRITE_MULTI_MAC 0x06 |
Definition at line 33 of file if_uralreg.h.
Variable Documentation
◆ __packed
| struct ural_rx_desc __packed |
