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Data Structures
struct	smsc_softc

Macros
#define	SMSC_TX_CTRL_0_OFFSET(x) (((x) & 0x1FUL) << 16)

#define	SMSC_TX_CTRL_0_FIRST_SEG (0x1UL << 13)

#define	SMSC_TX_CTRL_0_LAST_SEG (0x1UL << 12)

#define	SMSC_TX_CTRL_0_BUF_SIZE(x) ((x) & 0x000007FFUL)

#define	SMSC_TX_CTRL_1_CSUM_ENABLE (0x1UL << 14)

#define	SMSC_TX_CTRL_1_CRC_DISABLE (0x1UL << 13)

#define	SMSC_TX_CTRL_1_PADDING_DISABLE (0x1UL << 12)

#define	SMSC_TX_CTRL_1_PKT_LENGTH(x) ((x) & 0x000007FFUL)

#define	SMSC_RX_STAT_FILTER_FAIL (0x1UL << 30)

#define	SMSC_RX_STAT_FRM_LENGTH(x) (((x) >> 16) & 0x3FFFUL)

#define	SMSC_RX_STAT_ERROR (0x1UL << 15)

#define	SMSC_RX_STAT_BROADCAST (0x1UL << 13)

#define	SMSC_RX_STAT_LENGTH_ERROR (0x1UL << 12)

#define	SMSC_RX_STAT_RUNT (0x1UL << 11)

#define	SMSC_RX_STAT_MULTICAST (0x1UL << 10)

#define	SMSC_RX_STAT_FRM_TO_LONG (0x1UL << 7)

#define	SMSC_RX_STAT_COLLISION (0x1UL << 6)

#define	SMSC_RX_STAT_FRM_TYPE (0x1UL << 5)

#define	SMSC_RX_STAT_WATCHDOG (0x1UL << 4)

#define	SMSC_RX_STAT_MII_ERROR (0x1UL << 3)

#define	SMSC_RX_STAT_DRIBBLING (0x1UL << 2)

#define	SMSC_RX_STAT_CRC_ERROR (0x1UL << 1)

#define	SMSC_ID_REV 0x000

#define	SMSC_INTR_STATUS 0x008

#define	SMSC_RX_CFG 0x00C

#define	SMSC_TX_CFG 0x010

#define	SMSC_HW_CFG 0x014

#define	SMSC_PM_CTRL 0x020

#define	SMSC_LED_GPIO_CFG 0x024

#define	SMSC_GPIO_CFG 0x028

#define	SMSC_AFC_CFG 0x02C

#define	SMSC_EEPROM_CMD 0x030

#define	SMSC_EEPROM_DATA 0x034

#define	SMSC_BURST_CAP 0x038

#define	SMSC_GPIO_WAKE 0x064

#define	SMSC_INTR_CFG 0x068

#define	SMSC_BULK_IN_DLY 0x06C

#define	SMSC_MAC_CSR 0x100

#define	SMSC_MAC_ADDRH 0x104

#define	SMSC_MAC_ADDRL 0x108

#define	SMSC_HASHH 0x10C

#define	SMSC_HASHL 0x110

#define	SMSC_MII_ADDR 0x114

#define	SMSC_MII_DATA 0x118

#define	SMSC_FLOW 0x11C

#define	SMSC_VLAN1 0x120

#define	SMSC_VLAN2 0x124

#define	SMSC_WUFF 0x128

#define	SMSC_WUCSR 0x12C

#define	SMSC_COE_CTRL 0x130

#define	SMSC_ID_REV_CHIP_ID_MASK 0xFFFF0000UL

#define	SMSC_ID_REV_CHIP_REV_MASK 0x0000FFFFUL

#define	SMSC_RX_FIFO_FLUSH (0x1UL << 0)

#define	SMSC_TX_CFG_ON (0x1UL << 2)

#define	SMSC_TX_CFG_STOP (0x1UL << 1)

#define	SMSC_TX_CFG_FIFO_FLUSH (0x1UL << 0)

#define	SMSC_HW_CFG_BIR (0x1UL << 12)

#define	SMSC_HW_CFG_LEDB (0x1UL << 11)

#define	SMSC_HW_CFG_RXDOFF (0x3UL << 9) /* RX pkt alignment */

#define	SMSC_HW_CFG_DRP (0x1UL << 6)

#define	SMSC_HW_CFG_MEF (0x1UL << 5)

#define	SMSC_HW_CFG_LRST (0x1UL << 3) /* Lite reset */

#define	SMSC_HW_CFG_PSEL (0x1UL << 2)

#define	SMSC_HW_CFG_BCE (0x1UL << 1)

#define	SMSC_HW_CFG_SRST (0x1UL << 0)

#define	SMSC_PM_CTRL_PHY_RST (0x1UL << 4) /* PHY reset */

#define	SMSC_LED_GPIO_CFG_SPD_LED (0x1UL << 24)

#define	SMSC_LED_GPIO_CFG_LNK_LED (0x1UL << 20)

#define	SMSC_LED_GPIO_CFG_FDX_LED (0x1UL << 16)

#define	AFC_CFG_DEFAULT (0x00F830A1)

#define	SMSC_EEPROM_CMD_BUSY (0x1UL << 31)

#define	SMSC_EEPROM_CMD_MASK (0x7UL << 28)

#define	SMSC_EEPROM_CMD_READ (0x0UL << 28)

#define	SMSC_EEPROM_CMD_WRITE (0x3UL << 28)

#define	SMSC_EEPROM_CMD_ERASE (0x5UL << 28)

#define	SMSC_EEPROM_CMD_RELOAD (0x7UL << 28)

#define	SMSC_EEPROM_CMD_TIMEOUT (0x1UL << 10)

#define	SMSC_EEPROM_CMD_ADDR_MASK 0x000001FFUL

#define	SMSC_MAC_CSR_RCVOWN (0x1UL << 23) /* Half duplex */

#define	SMSC_MAC_CSR_LOOPBK (0x1UL << 21) /* Loopback */

#define	SMSC_MAC_CSR_FDPX (0x1UL << 20) /* Full duplex */

#define	SMSC_MAC_CSR_MCPAS (0x1UL << 19) /* Multicast mode */

#define	SMSC_MAC_CSR_PRMS (0x1UL << 18) /* Promiscuous mode */

#define	SMSC_MAC_CSR_INVFILT (0x1UL << 17) /* Inverse filtering */

#define	SMSC_MAC_CSR_PASSBAD (0x1UL << 16) /* Pass on bad frames */

#define	SMSC_MAC_CSR_HPFILT (0x1UL << 13) /* Hash filtering */

#define	SMSC_MAC_CSR_BCAST (0x1UL << 11) /* Broadcast */

#define	SMSC_MAC_CSR_TXEN (0x1UL << 3) /* TX enable */

#define	SMSC_MAC_CSR_RXEN (0x1UL << 2) /* RX enable */

#define	SMSC_INTR_NTEP (0x1UL << 31)

#define	SMSC_INTR_MACRTO (0x1UL << 19)

#define	SMSC_INTR_TX_STOP (0x1UL << 17)

#define	SMSC_INTR_RX_STOP (0x1UL << 16)

#define	SMSC_INTR_PHY_INT (0x1UL << 15)

#define	SMSC_INTR_TXE (0x1UL << 14)

#define	SMSC_INTR_TDFU (0x1UL << 13)

#define	SMSC_INTR_TDFO (0x1UL << 12)

#define	SMSC_INTR_RXDF (0x1UL << 11)

#define	SMSC_INTR_GPIOS 0x000007FFUL

#define	SMSC_MII_WRITE (0x1UL << 1)

#define	SMSC_MII_READ (0x0UL << 1)

#define	SMSC_MII_BUSY (0x1UL << 0)

#define	SMSC_COE_CTRL_TX_EN (0x1UL << 16) /* Tx H/W csum enable */

#define	SMSC_COE_CTRL_RX_MODE (0x1UL << 1)

#define	SMSC_COE_CTRL_RX_EN (0x1UL << 0) /* Rx H/W csum enable */

#define	SMSC_PHY_INTR_STAT (29)

#define	SMSC_PHY_INTR_MASK (30)

#define	SMSC_PHY_INTR_ENERGY_ON (0x1U << 7)

#define	SMSC_PHY_INTR_ANEG_COMP (0x1U << 6)

#define	SMSC_PHY_INTR_REMOTE_FAULT (0x1U << 5)

#define	SMSC_PHY_INTR_LINK_DOWN (0x1U << 4)

#define	SMSC_UR_WRITE_REG 0xA0

#define	SMSC_UR_READ_REG 0xA1

#define	SMSC_UR_GET_STATS 0xA2

#define	SMSC_CONFIG_INDEX 0 /* config number 1 */

#define	SMSC_IFACE_IDX 0

#define	SMSC_FLAG_LINK 0x0001

#define	SMSC_FLAG_LAN9514 0x1000 /* LAN9514 */

#define	SMSC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)

#define	SMSC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)

#define	SMSC_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)

Enumerations
enum	{ SMSC_BULK_DT_RD , SMSC_BULK_DT_WR , SMSC_N_TRANSFER }

Macro Definition Documentation

◆ AFC_CFG_DEFAULT

#define AFC_CFG_DEFAULT (0x00F830A1)

Definition at line 182 of file if_smscreg.h.

◆ SMSC_AFC_CFG

#define SMSC_AFC_CFG 0x02C

Definition at line 131 of file if_smscreg.h.

◆ SMSC_BULK_IN_DLY

#define SMSC_BULK_IN_DLY 0x06C

Definition at line 137 of file if_smscreg.h.

◆ SMSC_BURST_CAP

#define SMSC_BURST_CAP 0x038

Definition at line 134 of file if_smscreg.h.

◆ SMSC_COE_CTRL

#define SMSC_COE_CTRL 0x130

Definition at line 150 of file if_smscreg.h.

◆ SMSC_COE_CTRL_RX_EN

#define SMSC_COE_CTRL_RX_EN (0x1UL << 0) /* Rx H/W csum enable */

Definition at line 226 of file if_smscreg.h.

◆ SMSC_COE_CTRL_RX_MODE

#define SMSC_COE_CTRL_RX_MODE (0x1UL << 1)

Definition at line 225 of file if_smscreg.h.

◆ SMSC_COE_CTRL_TX_EN

#define SMSC_COE_CTRL_TX_EN (0x1UL << 16) /* Tx H/W csum enable */

Definition at line 224 of file if_smscreg.h.

◆ SMSC_CONFIG_INDEX

#define SMSC_CONFIG_INDEX 0 /* config number 1 */

Definition at line 242 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD

#define SMSC_EEPROM_CMD 0x030

Definition at line 132 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_ADDR_MASK

#define SMSC_EEPROM_CMD_ADDR_MASK 0x000001FFUL

Definition at line 191 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_BUSY

#define SMSC_EEPROM_CMD_BUSY (0x1UL << 31)

Definition at line 184 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_ERASE

#define SMSC_EEPROM_CMD_ERASE (0x5UL << 28)

Definition at line 188 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_MASK

#define SMSC_EEPROM_CMD_MASK (0x7UL << 28)

Definition at line 185 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_READ

#define SMSC_EEPROM_CMD_READ (0x0UL << 28)

Definition at line 186 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_RELOAD

#define SMSC_EEPROM_CMD_RELOAD (0x7UL << 28)

Definition at line 189 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_TIMEOUT

#define SMSC_EEPROM_CMD_TIMEOUT (0x1UL << 10)

Definition at line 190 of file if_smscreg.h.

◆ SMSC_EEPROM_CMD_WRITE

#define SMSC_EEPROM_CMD_WRITE (0x3UL << 28)

Definition at line 187 of file if_smscreg.h.

◆ SMSC_EEPROM_DATA

#define SMSC_EEPROM_DATA 0x034

Definition at line 133 of file if_smscreg.h.

◆ SMSC_FLAG_LAN9514

#define SMSC_FLAG_LAN9514 0x1000 /* LAN9514 */

Definition at line 272 of file if_smscreg.h.

◆ SMSC_FLAG_LINK

#define SMSC_FLAG_LINK 0x0001

Definition at line 271 of file if_smscreg.h.

◆ SMSC_FLOW

#define SMSC_FLOW 0x11C

Definition at line 145 of file if_smscreg.h.

◆ SMSC_GPIO_CFG

#define SMSC_GPIO_CFG 0x028

Definition at line 130 of file if_smscreg.h.

◆ SMSC_GPIO_WAKE

#define SMSC_GPIO_WAKE 0x064

Definition at line 135 of file if_smscreg.h.

◆ SMSC_HASHH

#define SMSC_HASHH 0x10C

Definition at line 141 of file if_smscreg.h.

◆ SMSC_HASHL

#define SMSC_HASHL 0x110

Definition at line 142 of file if_smscreg.h.

◆ SMSC_HW_CFG

#define SMSC_HW_CFG 0x014

Definition at line 127 of file if_smscreg.h.

◆ SMSC_HW_CFG_BCE

#define SMSC_HW_CFG_BCE (0x1UL << 1)

Definition at line 169 of file if_smscreg.h.

◆ SMSC_HW_CFG_BIR

#define SMSC_HW_CFG_BIR (0x1UL << 12)

Definition at line 162 of file if_smscreg.h.

◆ SMSC_HW_CFG_DRP

#define SMSC_HW_CFG_DRP (0x1UL << 6)

Definition at line 165 of file if_smscreg.h.

◆ SMSC_HW_CFG_LEDB

#define SMSC_HW_CFG_LEDB (0x1UL << 11)

Definition at line 163 of file if_smscreg.h.

◆ SMSC_HW_CFG_LRST

#define SMSC_HW_CFG_LRST (0x1UL << 3) /* Lite reset */

Definition at line 167 of file if_smscreg.h.

◆ SMSC_HW_CFG_MEF

#define SMSC_HW_CFG_MEF (0x1UL << 5)

Definition at line 166 of file if_smscreg.h.

◆ SMSC_HW_CFG_PSEL

#define SMSC_HW_CFG_PSEL (0x1UL << 2)

Definition at line 168 of file if_smscreg.h.

◆ SMSC_HW_CFG_RXDOFF

#define SMSC_HW_CFG_RXDOFF (0x3UL << 9) /* RX pkt alignment */

Definition at line 164 of file if_smscreg.h.

◆ SMSC_HW_CFG_SRST

#define SMSC_HW_CFG_SRST (0x1UL << 0)

Definition at line 170 of file if_smscreg.h.

◆ SMSC_ID_REV

#define SMSC_ID_REV 0x000

REGISTERS

Definition at line 123 of file if_smscreg.h.

◆ SMSC_ID_REV_CHIP_ID_MASK

#define SMSC_ID_REV_CHIP_ID_MASK 0xFFFF0000UL

Definition at line 153 of file if_smscreg.h.

◆ SMSC_ID_REV_CHIP_REV_MASK

#define SMSC_ID_REV_CHIP_REV_MASK 0x0000FFFFUL

Definition at line 154 of file if_smscreg.h.

◆ SMSC_IFACE_IDX

#define SMSC_IFACE_IDX 0

Definition at line 243 of file if_smscreg.h.

◆ SMSC_INTR_CFG

#define SMSC_INTR_CFG 0x068

Definition at line 136 of file if_smscreg.h.

◆ SMSC_INTR_GPIOS

#define SMSC_INTR_GPIOS 0x000007FFUL

Definition at line 216 of file if_smscreg.h.

◆ SMSC_INTR_MACRTO

#define SMSC_INTR_MACRTO (0x1UL << 19)

Definition at line 208 of file if_smscreg.h.

◆ SMSC_INTR_NTEP

#define SMSC_INTR_NTEP (0x1UL << 31)

Definition at line 207 of file if_smscreg.h.

◆ SMSC_INTR_PHY_INT

#define SMSC_INTR_PHY_INT (0x1UL << 15)

Definition at line 211 of file if_smscreg.h.

◆ SMSC_INTR_RX_STOP

#define SMSC_INTR_RX_STOP (0x1UL << 16)

Definition at line 210 of file if_smscreg.h.

◆ SMSC_INTR_RXDF

#define SMSC_INTR_RXDF (0x1UL << 11)

Definition at line 215 of file if_smscreg.h.

◆ SMSC_INTR_STATUS

#define SMSC_INTR_STATUS 0x008

Definition at line 124 of file if_smscreg.h.

◆ SMSC_INTR_TDFO

#define SMSC_INTR_TDFO (0x1UL << 12)

Definition at line 214 of file if_smscreg.h.

◆ SMSC_INTR_TDFU

#define SMSC_INTR_TDFU (0x1UL << 13)

Definition at line 213 of file if_smscreg.h.

◆ SMSC_INTR_TX_STOP

#define SMSC_INTR_TX_STOP (0x1UL << 17)

Definition at line 209 of file if_smscreg.h.

◆ SMSC_INTR_TXE

#define SMSC_INTR_TXE (0x1UL << 14)

Definition at line 212 of file if_smscreg.h.

◆ SMSC_LED_GPIO_CFG

#define SMSC_LED_GPIO_CFG 0x024

Definition at line 129 of file if_smscreg.h.

◆ SMSC_LED_GPIO_CFG_FDX_LED

#define SMSC_LED_GPIO_CFG_FDX_LED (0x1UL << 16)

Definition at line 176 of file if_smscreg.h.

◆ SMSC_LED_GPIO_CFG_LNK_LED

#define SMSC_LED_GPIO_CFG_LNK_LED (0x1UL << 20)

Definition at line 175 of file if_smscreg.h.

◆ SMSC_LED_GPIO_CFG_SPD_LED

#define SMSC_LED_GPIO_CFG_SPD_LED (0x1UL << 24)

Definition at line 174 of file if_smscreg.h.

◆ SMSC_LOCK

#define SMSC_LOCK ( _sc ) mtx_lock(&(_sc)->sc_mtx)

Definition at line 275 of file if_smscreg.h.

◆ SMSC_LOCK_ASSERT

#define SMSC_LOCK_ASSERT	(	_sc,
		t
	)	mtx_assert(&(_sc)->sc_mtx, t)

Definition at line 277 of file if_smscreg.h.

◆ SMSC_MAC_ADDRH

#define SMSC_MAC_ADDRH 0x104

Definition at line 139 of file if_smscreg.h.

◆ SMSC_MAC_ADDRL

#define SMSC_MAC_ADDRL 0x108

Definition at line 140 of file if_smscreg.h.

◆ SMSC_MAC_CSR

#define SMSC_MAC_CSR 0x100

Definition at line 138 of file if_smscreg.h.

◆ SMSC_MAC_CSR_BCAST

#define SMSC_MAC_CSR_BCAST (0x1UL << 11) /* Broadcast */

Definition at line 202 of file if_smscreg.h.

◆ SMSC_MAC_CSR_FDPX

#define SMSC_MAC_CSR_FDPX (0x1UL << 20) /* Full duplex */

Definition at line 196 of file if_smscreg.h.

◆ SMSC_MAC_CSR_HPFILT

#define SMSC_MAC_CSR_HPFILT (0x1UL << 13) /* Hash filtering */

Definition at line 201 of file if_smscreg.h.

◆ SMSC_MAC_CSR_INVFILT

#define SMSC_MAC_CSR_INVFILT (0x1UL << 17) /* Inverse filtering */

Definition at line 199 of file if_smscreg.h.

◆ SMSC_MAC_CSR_LOOPBK

#define SMSC_MAC_CSR_LOOPBK (0x1UL << 21) /* Loopback */

Definition at line 195 of file if_smscreg.h.

◆ SMSC_MAC_CSR_MCPAS

#define SMSC_MAC_CSR_MCPAS (0x1UL << 19) /* Multicast mode */

Definition at line 197 of file if_smscreg.h.

◆ SMSC_MAC_CSR_PASSBAD

#define SMSC_MAC_CSR_PASSBAD (0x1UL << 16) /* Pass on bad frames */

Definition at line 200 of file if_smscreg.h.

◆ SMSC_MAC_CSR_PRMS

#define SMSC_MAC_CSR_PRMS (0x1UL << 18) /* Promiscuous mode */

Definition at line 198 of file if_smscreg.h.

◆ SMSC_MAC_CSR_RCVOWN

#define SMSC_MAC_CSR_RCVOWN (0x1UL << 23) /* Half duplex */

Definition at line 194 of file if_smscreg.h.

◆ SMSC_MAC_CSR_RXEN

#define SMSC_MAC_CSR_RXEN (0x1UL << 2) /* RX enable */

Definition at line 204 of file if_smscreg.h.

◆ SMSC_MAC_CSR_TXEN

#define SMSC_MAC_CSR_TXEN (0x1UL << 3) /* TX enable */

Definition at line 203 of file if_smscreg.h.

◆ SMSC_MII_ADDR

#define SMSC_MII_ADDR 0x114

Definition at line 143 of file if_smscreg.h.

◆ SMSC_MII_BUSY

#define SMSC_MII_BUSY (0x1UL << 0)

Definition at line 221 of file if_smscreg.h.

◆ SMSC_MII_DATA

#define SMSC_MII_DATA 0x118

Definition at line 144 of file if_smscreg.h.

◆ SMSC_MII_READ

#define SMSC_MII_READ (0x0UL << 1)

Definition at line 220 of file if_smscreg.h.

◆ SMSC_MII_WRITE

#define SMSC_MII_WRITE (0x1UL << 1)

Definition at line 219 of file if_smscreg.h.

◆ SMSC_PHY_INTR_ANEG_COMP

#define SMSC_PHY_INTR_ANEG_COMP (0x1U << 6)

Definition at line 233 of file if_smscreg.h.

◆ SMSC_PHY_INTR_ENERGY_ON

#define SMSC_PHY_INTR_ENERGY_ON (0x1U << 7)

Definition at line 232 of file if_smscreg.h.

◆ SMSC_PHY_INTR_LINK_DOWN

#define SMSC_PHY_INTR_LINK_DOWN (0x1U << 4)

Definition at line 235 of file if_smscreg.h.

◆ SMSC_PHY_INTR_MASK

#define SMSC_PHY_INTR_MASK (30)

Definition at line 230 of file if_smscreg.h.

◆ SMSC_PHY_INTR_REMOTE_FAULT

#define SMSC_PHY_INTR_REMOTE_FAULT (0x1U << 5)

Definition at line 234 of file if_smscreg.h.

◆ SMSC_PHY_INTR_STAT

#define SMSC_PHY_INTR_STAT (29)

Definition at line 229 of file if_smscreg.h.

◆ SMSC_PM_CTRL

#define SMSC_PM_CTRL 0x020

Definition at line 128 of file if_smscreg.h.

◆ SMSC_PM_CTRL_PHY_RST

#define SMSC_PM_CTRL_PHY_RST (0x1UL << 4) /* PHY reset */

Definition at line 172 of file if_smscreg.h.

◆ SMSC_RX_CFG

#define SMSC_RX_CFG 0x00C

Definition at line 125 of file if_smscreg.h.

◆ SMSC_RX_FIFO_FLUSH

#define SMSC_RX_FIFO_FLUSH (0x1UL << 0)

Definition at line 156 of file if_smscreg.h.

◆ SMSC_RX_STAT_BROADCAST

#define SMSC_RX_STAT_BROADCAST (0x1UL << 13)

Definition at line 107 of file if_smscreg.h.

◆ SMSC_RX_STAT_COLLISION

#define SMSC_RX_STAT_COLLISION (0x1UL << 6)

Definition at line 112 of file if_smscreg.h.

◆ SMSC_RX_STAT_CRC_ERROR

#define SMSC_RX_STAT_CRC_ERROR (0x1UL << 1)

Definition at line 117 of file if_smscreg.h.

◆ SMSC_RX_STAT_DRIBBLING

#define SMSC_RX_STAT_DRIBBLING (0x1UL << 2)

Definition at line 116 of file if_smscreg.h.

◆ SMSC_RX_STAT_ERROR

#define SMSC_RX_STAT_ERROR (0x1UL << 15)

Definition at line 106 of file if_smscreg.h.

◆ SMSC_RX_STAT_FILTER_FAIL

#define SMSC_RX_STAT_FILTER_FAIL (0x1UL << 30)

RECEIVE FRAMES

Rx frames are prefixed with an 4-byte status header which describes any errors with the frame as well as things like the length

  4 bytes             variable

+---------—+— . . . . . . . . . . . . —+ | RX_STAT | Ethernet frame data | +---------—+— . . . . . . . . . . . . —+

Where the status header has the following fields:

RX_STAT <30> Filter Fail RX_STAT <29:16> Frame Length RX_STAT <15> Error Summary RX_STAT <13> Broadcast Frame RX_STAT <12> Length Error RX_STAT <11> Runt Frame RX_STAT <10> Multicast Frame RX_STAT <7> Frame too long RX_STAT <6> Collision Seen RX_STAT <5> Frame Type RX_STAT <4> Receive Watchdog RX_STAT <3> Mii Error RX_STAT <2> Dribbling RX_STAT <1> CRC Error

Definition at line 104 of file if_smscreg.h.

◆ SMSC_RX_STAT_FRM_LENGTH

#define SMSC_RX_STAT_FRM_LENGTH ( x ) (((x) >> 16) & 0x3FFFUL)

Definition at line 105 of file if_smscreg.h.

◆ SMSC_RX_STAT_FRM_TO_LONG

#define SMSC_RX_STAT_FRM_TO_LONG (0x1UL << 7)

Definition at line 111 of file if_smscreg.h.

◆ SMSC_RX_STAT_FRM_TYPE

#define SMSC_RX_STAT_FRM_TYPE (0x1UL << 5)

Definition at line 113 of file if_smscreg.h.

◆ SMSC_RX_STAT_LENGTH_ERROR

#define SMSC_RX_STAT_LENGTH_ERROR (0x1UL << 12)

Definition at line 108 of file if_smscreg.h.

◆ SMSC_RX_STAT_MII_ERROR

#define SMSC_RX_STAT_MII_ERROR (0x1UL << 3)

Definition at line 115 of file if_smscreg.h.

◆ SMSC_RX_STAT_MULTICAST

#define SMSC_RX_STAT_MULTICAST (0x1UL << 10)

Definition at line 110 of file if_smscreg.h.

◆ SMSC_RX_STAT_RUNT

#define SMSC_RX_STAT_RUNT (0x1UL << 11)

Definition at line 109 of file if_smscreg.h.

◆ SMSC_RX_STAT_WATCHDOG

#define SMSC_RX_STAT_WATCHDOG (0x1UL << 4)

Definition at line 114 of file if_smscreg.h.

◆ SMSC_TX_CFG

#define SMSC_TX_CFG 0x010

Definition at line 126 of file if_smscreg.h.

◆ SMSC_TX_CFG_FIFO_FLUSH

#define SMSC_TX_CFG_FIFO_FLUSH (0x1UL << 0)

Definition at line 160 of file if_smscreg.h.

◆ SMSC_TX_CFG_ON

#define SMSC_TX_CFG_ON (0x1UL << 2)

Definition at line 158 of file if_smscreg.h.

◆ SMSC_TX_CFG_STOP

#define SMSC_TX_CFG_STOP (0x1UL << 1)

Definition at line 159 of file if_smscreg.h.

◆ SMSC_TX_CTRL_0_BUF_SIZE

#define SMSC_TX_CTRL_0_BUF_SIZE ( x ) ((x) & 0x000007FFUL)

Definition at line 68 of file if_smscreg.h.

◆ SMSC_TX_CTRL_0_FIRST_SEG

#define SMSC_TX_CTRL_0_FIRST_SEG (0x1UL << 13)

Definition at line 66 of file if_smscreg.h.

◆ SMSC_TX_CTRL_0_LAST_SEG

#define SMSC_TX_CTRL_0_LAST_SEG (0x1UL << 12)

Definition at line 67 of file if_smscreg.h.

◆ SMSC_TX_CTRL_0_OFFSET

#define SMSC_TX_CTRL_0_OFFSET ( x ) (((x) & 0x1FUL) << 16)

TRANSMIT FRAMES

Tx frames are prefixed with an 8-byte header which describes the frame

  4 bytes      4 bytes           variable

+---------—+---------—+— . . . . . . . . . . . . —+ | TX_CTRL_0 | TX_CTRL_1 | Ethernet frame data | +---------—+---------—+— . . . . . . . . . . . . —+

Where the headers have the following fields:

TX_CTRL_0 <20:16> Data offset TX_CTRL_0 <13> First segment of frame indicator TX_CTRL_0 <12> Last segment of frame indicator TX_CTRL_0 <10:0> Buffer size (?)

TX_CTRL_1 <14> Perform H/W checksuming on IP packets TX_CTRL_1 <13> Disable automatic ethernet CRC generation TX_CTRL_1 <12> Disable padding (?) TX_CTRL_1 <10:0> Packet byte length

Definition at line 65 of file if_smscreg.h.

◆ SMSC_TX_CTRL_1_CRC_DISABLE

#define SMSC_TX_CTRL_1_CRC_DISABLE (0x1UL << 13)

Definition at line 71 of file if_smscreg.h.

◆ SMSC_TX_CTRL_1_CSUM_ENABLE

#define SMSC_TX_CTRL_1_CSUM_ENABLE (0x1UL << 14)

Definition at line 70 of file if_smscreg.h.

◆ SMSC_TX_CTRL_1_PADDING_DISABLE

#define SMSC_TX_CTRL_1_PADDING_DISABLE (0x1UL << 12)

Definition at line 72 of file if_smscreg.h.

◆ SMSC_TX_CTRL_1_PKT_LENGTH

#define SMSC_TX_CTRL_1_PKT_LENGTH ( x ) ((x) & 0x000007FFUL)

Definition at line 73 of file if_smscreg.h.

◆ SMSC_UNLOCK

#define SMSC_UNLOCK ( _sc ) mtx_unlock(&(_sc)->sc_mtx)

Definition at line 276 of file if_smscreg.h.

◆ SMSC_UR_GET_STATS

#define SMSC_UR_GET_STATS 0xA2

Definition at line 240 of file if_smscreg.h.

◆ SMSC_UR_READ_REG

#define SMSC_UR_READ_REG 0xA1

Definition at line 239 of file if_smscreg.h.

◆ SMSC_UR_WRITE_REG

#define SMSC_UR_WRITE_REG 0xA0

Definition at line 238 of file if_smscreg.h.

◆ SMSC_VLAN1

#define SMSC_VLAN1 0x120

Definition at line 146 of file if_smscreg.h.

◆ SMSC_VLAN2

#define SMSC_VLAN2 0x124

Definition at line 147 of file if_smscreg.h.

◆ SMSC_WUCSR

#define SMSC_WUCSR 0x12C

Definition at line 149 of file if_smscreg.h.

◆ SMSC_WUFF

#define SMSC_WUFF 0x128

Definition at line 148 of file if_smscreg.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
SMSC_BULK_DT_RD
SMSC_BULK_DT_WR
SMSC_N_TRANSFER

Definition at line 248 of file if_smscreg.h.

Data Structures

Macros

Enumerations