FreeBSD kernel sound device code
emu10kx.c
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1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32#include <sys/param.h>
33#include <sys/types.h>
34#include <sys/bus.h>
35#include <machine/bus.h>
36#include <sys/rman.h>
37#include <sys/systm.h>
38#include <sys/sbuf.h>
39#include <sys/queue.h>
40#include <sys/lock.h>
41#include <sys/mutex.h>
42#include <sys/sysctl.h>
43#include <sys/kdb.h>
44
45#include <dev/pci/pcireg.h>
46#include <dev/pci/pcivar.h>
47
48#include <machine/clock.h> /* for DELAY */
49
50#ifdef HAVE_KERNEL_OPTION_HEADERS
51#include "opt_snd.h"
52#endif
53
54#include <dev/sound/chip.h>
55#include <dev/sound/pcm/sound.h>
56#include <dev/sound/pcm/ac97.h>
57
58#include <dev/sound/pci/emuxkireg.h>
59#include <dev/sound/pci/emu10kx.h>
60
61/* hw flags */
62#define HAS_51 0x0001
63#define HAS_71 0x0002
64#define HAS_AC97 0x0004
65
66#define IS_EMU10K1 0x0008
67#define IS_EMU10K2 0x0010
68#define IS_CA0102 0x0020
69#define IS_CA0108 0x0040
70#define IS_UNKNOWN 0x0080
71
72#define BROKEN_DIGITAL 0x0100
73#define DIGITAL_ONLY 0x0200
74
75#define IS_CARDBUS 0x0400
76
77#define MODE_ANALOG 1
78#define MODE_DIGITAL 2
79#define SPDIF_MODE_PCM 1
80#define SPDIF_MODE_AC3 2
81
82#define MACS 0x0
83#define MACS1 0x1
84#define MACW 0x2
85#define MACW1 0x3
86#define MACINTS 0x4
87#define MACINTW 0x5
88#define ACC3 0x6
89#define MACMV 0x7
90#define ANDXOR 0x8
91#define TSTNEG 0x9
92#define LIMIT 0xA
93#define LIMIT1 0xB
94#define LOG 0xC
95#define EXP 0xD
96#define INTERP 0xE
97#define SKIP 0xF
98
99#define GPR(i) (sc->gpr_base+(i))
100#define INP(i) (sc->input_base+(i))
101#define OUTP(i) (sc->output_base+(i))
102#define FX(i) (i)
103#define FX2(i) (sc->efxc_base+(i))
104#define DSP_CONST(i) (sc->dsp_zero+(i))
105
106#define COND_NORMALIZED DSP_CONST(0x1)
107#define COND_BORROW DSP_CONST(0x2)
108#define COND_MINUS DSP_CONST(0x3)
109#define COND_LESS_ZERO DSP_CONST(0x4)
110#define COND_EQ_ZERO DSP_CONST(0x5)
111#define COND_SATURATION DSP_CONST(0x6)
112#define COND_NEQ_ZERO DSP_CONST(0x8)
113
114#define DSP_ACCUM DSP_CONST(0x16)
115#define DSP_CCR DSP_CONST(0x17)
116
117/* Live! Inputs */
118#define IN_AC97_L 0x00
119#define IN_AC97_R 0x01
120#define IN_AC97 IN_AC97_L
121#define IN_SPDIF_CD_L 0x02
122#define IN_SPDIF_CD_R 0x03
123#define IN_SPDIF_CD IN_SPDIF_CD_L
124#define IN_ZOOM_L 0x04
125#define IN_ZOOM_R 0x05
126#define IN_ZOOM IN_ZOOM_L
127#define IN_TOSLINK_L 0x06
128#define IN_TOSLINK_R 0x07
129#define IN_TOSLINK IN_TOSLINK_L
130#define IN_LINE1_L 0x08
131#define IN_LINE1_R 0x09
132#define IN_LINE1 IN_LINE1_L
133#define IN_COAX_SPDIF_L 0x0a
134#define IN_COAX_SPDIF_R 0x0b
135#define IN_COAX_SPDIF IN_COAX_SPDIF_L
136#define IN_LINE2_L 0x0c
137#define IN_LINE2_R 0x0d
138#define IN_LINE2 IN_LINE2_L
139#define IN_0E 0x0e
140#define IN_0F 0x0f
141
142/* Outputs */
143#define OUT_AC97_L 0x00
144#define OUT_AC97_R 0x01
145#define OUT_AC97 OUT_AC97_L
146#define OUT_A_FRONT OUT_AC97
147#define OUT_TOSLINK_L 0x02
148#define OUT_TOSLINK_R 0x03
149#define OUT_TOSLINK OUT_TOSLINK_L
150#define OUT_D_CENTER 0x04
151#define OUT_D_SUB 0x05
152#define OUT_HEADPHONE_L 0x06
153#define OUT_HEADPHONE_R 0x07
154#define OUT_HEADPHONE OUT_HEADPHONE_L
155#define OUT_REAR_L 0x08
156#define OUT_REAR_R 0x09
157#define OUT_REAR OUT_REAR_L
158#define OUT_ADC_REC_L 0x0a
159#define OUT_ADC_REC_R 0x0b
160#define OUT_ADC_REC OUT_ADC_REC_L
161#define OUT_MIC_CAP 0x0c
162
163/* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */
164#define OUT_A_CENTER 0x11
165#define OUT_A_SUB 0x12
166
167/* Audigy Inputs */
168#define A_IN_AC97_L 0x00
169#define A_IN_AC97_R 0x01
170#define A_IN_AC97 A_IN_AC97_L
171#define A_IN_SPDIF_CD_L 0x02
172#define A_IN_SPDIF_CD_R 0x03
173#define A_IN_SPDIF_CD A_IN_SPDIF_CD_L
174#define A_IN_O_SPDIF_L 0x04
175#define A_IN_O_SPDIF_R 0x05
176#define A_IN_O_SPDIF A_IN_O_SPDIF_L
177#define A_IN_LINE2_L 0x08
178#define A_IN_LINE2_R 0x09
179#define A_IN_LINE2 A_IN_LINE2_L
180#define A_IN_R_SPDIF_L 0x0a
181#define A_IN_R_SPDIF_R 0x0b
182#define A_IN_R_SPDIF A_IN_R_SPDIF_L
183#define A_IN_AUX2_L 0x0c
184#define A_IN_AUX2_R 0x0d
185#define A_IN_AUX2 A_IN_AUX2_L
186
187/* Audigy Outputs */
188#define A_OUT_D_FRONT_L 0x00
189#define A_OUT_D_FRONT_R 0x01
190#define A_OUT_D_FRONT A_OUT_D_FRONT_L
191#define A_OUT_D_CENTER 0x02
192#define A_OUT_D_SUB 0x03
193#define A_OUT_D_SIDE_L 0x04
194#define A_OUT_D_SIDE_R 0x05
195#define A_OUT_D_SIDE A_OUT_D_SIDE_L
196#define A_OUT_D_REAR_L 0x06
197#define A_OUT_D_REAR_R 0x07
198#define A_OUT_D_REAR A_OUT_D_REAR_L
199
200/* on Audigy Platinum only */
201#define A_OUT_HPHONE_L 0x04
202#define A_OUT_HPHONE_R 0x05
203#define A_OUT_HPHONE A_OUT_HPHONE_L
204
205#define A_OUT_A_FRONT_L 0x08
206#define A_OUT_A_FRONT_R 0x09
207#define A_OUT_A_FRONT A_OUT_A_FRONT_L
208#define A_OUT_A_CENTER 0x0a
209#define A_OUT_A_SUB 0x0b
210#define A_OUT_A_SIDE_L 0x0c
211#define A_OUT_A_SIDE_R 0x0d
212#define A_OUT_A_SIDE A_OUT_A_SIDE_L
213#define A_OUT_A_REAR_L 0x0e
214#define A_OUT_A_REAR_R 0x0f
215#define A_OUT_A_REAR A_OUT_A_REAR_L
216#define A_OUT_AC97_L 0x10
217#define A_OUT_AC97_R 0x11
218#define A_OUT_AC97 A_OUT_AC97_L
219#define A_OUT_ADC_REC_L 0x16
220#define A_OUT_ADC_REC_R 0x17
221#define A_OUT_ADC_REC A_OUT_ADC_REC_L
222
223#define EMU_DATA2 0x24
224#define EMU_IPR2 0x28
225#define EMU_INTE2 0x2c
226#define EMU_IPR3 0x38
227#define EMU_INTE3 0x3c
228
229#define EMU_A2_SRCSel 0x60
230#define EMU_A2_SRCMULTI_ENABLE 0x6e
231
232#define EMU_A_I2S_CAPTURE_96000 0x00000400
233
234#define EMU_A2_MIXER_I2S_ENABLE 0x7B
235#define EMU_A2_MIXER_SPDIF_ENABLE 0x7A
236
237#define C_FRONT_L 0
238#define C_FRONT_R 1
239#define C_REC_L 2
240#define C_REC_R 3
241#define C_REAR_L 4
242#define C_REAR_R 5
243#define C_CENTER 6
244#define C_SUB 7
245#define C_SIDE_L 8
246#define C_SIDE_R 9
247#define NUM_CACHES 10
248
249#define CDSPDIFMUTE 0
250#define ANALOGMUTE 1
251#define NUM_MUTE 2
252
253#define EMU_MAX_GPR 512
254#define EMU_MAX_IRQ_CONSUMERS 32
255
256struct emu_voice {
257 int vnum;
258 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1;
259 int speed;
260 int start;
261 int end;
262 int vol;
263 uint32_t buf;
264 void *vbuf;
265 struct emu_voice *slave;
266 uint32_t sa;
267 uint32_t ea;
268 uint32_t routing[8];
269 uint32_t amounts[8];
270};
271
272struct emu_memblk {
273 SLIST_ENTRY(emu_memblk) link;
274 void *buf;
275 char owner[16];
276 bus_addr_t buf_addr;
277 uint32_t pte_start, pte_size;
278 bus_dmamap_t buf_map;
279};
280
281struct emu_mem {
282 uint8_t bmap[EMU_MAXPAGES / 8];
283 uint32_t *ptb_pages;
284 void *silent_page;
285 bus_addr_t ptb_pages_addr;
286 bus_addr_t silent_page_addr;
287 bus_dmamap_t ptb_map;
288 bus_dmamap_t silent_map;
289 bus_dma_tag_t dmat;
290 struct emu_sc_info *card;
291 SLIST_HEAD(, emu_memblk) blocks;
292};
293
294/* rm */
295struct emu_rm {
296 struct emu_sc_info *card;
297 struct mtx gpr_lock;
298 signed int allocmap[EMU_MAX_GPR];
299 int num_gprs;
300 int last_free_gpr;
301 int num_used;
302};
303
304struct emu_intr_handler {
305 void* softc;
306 uint32_t intr_mask;
307 uint32_t inte_mask;
308 uint32_t(*irq_func) (void *softc, uint32_t irq);
309};
310
311struct emu_sc_info {
312 struct mtx lock;
313 struct mtx rw; /* Hardware exclusive access lock */
314
315 /* Hardware and subdevices */
316 device_t dev;
317 device_t pcm[RT_COUNT];
318 device_t midi[2];
319 uint32_t type;
320 uint32_t rev;
321
322 bus_space_tag_t st;
323 bus_space_handle_t sh;
324
325 struct cdev *cdev; /* /dev/emu10k character device */
326 struct mtx emu10kx_lock;
327 int emu10kx_isopen;
328 struct sbuf emu10kx_sbuf;
329 int emu10kx_bufptr;
330
331 /* Resources */
332 struct resource *reg;
333 struct resource *irq;
334 void *ih;
335
336 /* IRQ handlers */
337 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
338
339 /* Card HW configuration */
340 unsigned int mode; /* analog / digital */
341 unsigned int mchannel_fx;
342 unsigned int dsp_zero;
343 unsigned int code_base;
344 unsigned int code_size;
345 unsigned int gpr_base;
346 unsigned int num_gprs;
347 unsigned int input_base;
348 unsigned int output_base;
349 unsigned int efxc_base;
350 unsigned int opcode_shift;
351 unsigned int high_operand_shift;
352 unsigned int address_mask;
353 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
354 has_ac97:1, has_51:1, has_71:1,
355 enable_ir:1,
356 broken_digital:1, is_cardbus:1;
357
358 signed int mch_disabled, mch_rec, dbg_level;
359 signed int num_inputs;
360 unsigned int num_outputs;
361 unsigned int num_fxbuses;
362 unsigned int routing_code_start;
363 unsigned int routing_code_end;
364
365 /* HW resources */
366 struct emu_voice voice[NUM_G]; /* Hardware voices */
367 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
368 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */
369 int timerinterval;
370 struct emu_rm *rm;
371 struct emu_mem mem; /* memory */
372
373 /* Mixer */
374 int mixer_gpr[NUM_MIXERS];
375 int mixer_volcache[NUM_MIXERS];
376 int cache_gpr[NUM_CACHES];
377 int dummy_gpr;
378 int mute_gpr[NUM_MUTE];
379 struct sysctl_ctx_list *ctx;
380 struct sysctl_oid *root;
381};
382
383static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
384static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map);
385static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map);
386static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
387static int emu_memfree(struct emu_mem *mem, void *membuf);
388static int emu_memstart(struct emu_mem *mem, void *membuf);
389
390/* /dev */
391static int emu10kx_dev_init(struct emu_sc_info *sc);
392static int emu10kx_dev_uninit(struct emu_sc_info *sc);
393static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
394
395static void emumix_set_mode(struct emu_sc_info *sc, int mode);
396static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
397static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
398static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
399static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
400
401static int emu_rm_init(struct emu_sc_info *sc);
402static int emu_rm_uninit(struct emu_sc_info *sc);
403static int emu_rm_gpr_alloc(struct emu_rm *rm, int count);
404
405static unsigned int emu_getcard(device_t dev);
406static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
407static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
408static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
409
410static void emu_vstop(struct emu_sc_info *sc, char channel, int enable);
411
412static void emu_intr(void *p);
413static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
414static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
415static void emu_initefx(struct emu_sc_info *sc);
416
417static int emu_cardbus_init(struct emu_sc_info *sc);
418static int emu_init(struct emu_sc_info *sc);
419static int emu_uninit(struct emu_sc_info *sc);
420
421static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
422static int emu_write_ivar(device_t bus __unused, device_t dev __unused,
423 int ivar_index, uintptr_t value __unused);
424
425static int emu_pci_probe(device_t dev);
426static int emu_pci_attach(device_t dev);
427static int emu_pci_detach(device_t dev);
428static int emu_modevent(module_t mod __unused, int cmd, void *data __unused);
429
430#ifdef SND_EMU10KX_DEBUG
431
432#define EMU_MTX_DEBUG() do { \
433 if (mtx_owned(&sc->rw)) { \
434 printf("RW owned in %s line %d for %s\n", __func__, \
435 __LINE__ , device_get_nameunit(sc->dev)); \
436 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \
437 printf("rw lock: value %x thread %x\n", \
438 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \
439 (uintptr_t)curthread); \
440 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\
441 db_show_mtx(&sc->rw); \
442 } \
443 } while (0)
444#else
445#define EMU_MTX_DEBUG() do { \
446 } while (0)
447#endif
448
449#define EMU_RWLOCK() do { \
450 EMU_MTX_DEBUG(); \
451 mtx_lock(&(sc->rw)); \
452 } while (0)
453
454#define EMU_RWUNLOCK() do { \
455 mtx_unlock(&(sc->rw)); \
456 EMU_MTX_DEBUG(); \
457 } while (0)
458
459/* Supported cards */
460struct emu_hwinfo {
461 uint16_t vendor;
462 uint16_t device;
463 uint16_t subvendor;
464 uint16_t subdevice;
465 char SBcode[8];
466 char desc[32];
467 int flags;
468};
469
470static struct emu_hwinfo emu_cards[] = {
471 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
472 /* 0x0020..0x002f 4.0 EMU10K1 cards */
473 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
474 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
475 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
476
477 /* (range unknown) 5.1 EMU10K1 cards */
478 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
479
480 /* 0x80??..0x805? 4.0 EMU10K1 cards */
481 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
482 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
483 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
484 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
485 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
486 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
487 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
488 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
489 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
490 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
491
492 /* 0x8061..0x???? 5.1 EMU10K1 cards */
493 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
494 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1},
495 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
496 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
497 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
498 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
499
500 /* Generic SB Live! */
501 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
502
503 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
504
505 /* 0x0051..0x0051 5.1 CA0100-IAF cards */
506 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
507 /* ES is CA0100-IDF chip that don't work in digital mode */
508 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
509 /* 0x0053..0x005C 5.1 CA0101-NAF cards */
510 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
511 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
512
513 /* 0x1002..0x1009 5.1 CA0102-IAT cards */
514 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
515 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
516 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
517
518 /* 0x2001..0x2003 7.1 CA0102-ICT cards */
519 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
520 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
521 /* XXX No reports about 0x2003 & 0x2004 cards */
522 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
523 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
524 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
525
526 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
527 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
528
529 /* Generic Audigy or Audigy 2 */
530 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
531
532 /* We don't support CA0103-DAT (Audigy LS) cards */
533 /* There is NO CA0104-xxx cards */
534 /* There is NO CA0105-xxx cards */
535 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */
536 /* There is NO CA0107-xxx cards */
537
538 /* 0x1000..0x1001 7.1 CA0108-IAT cards */
539 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
540 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
541 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
542
543 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
544
545 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
546};
547/* Unsupported cards */
548
549static struct emu_hwinfo emu_bad_cards[] = {
550 /* APS cards should be possible to support */
551 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
552 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
553 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
554 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */
555 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
556 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
557 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
558};
559
560/*
561 * Get best known information about device.
562 */
563static unsigned int
564emu_getcard(device_t dev)
565{
566 uint16_t device;
567 uint16_t subdevice;
568 unsigned int thiscard;
569 int i;
570
571 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
572 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
573
574 thiscard = 0;
575 for (i = 1; i < nitems(emu_cards); i++) {
576 if (device == emu_cards[i].device) {
577 if (subdevice == emu_cards[i].subdevice) {
578 thiscard = i;
579 break;
580 }
581 if (0x0000 == emu_cards[i].subdevice) {
582 thiscard = i;
583 /*
584 * don't break, we can get more specific card
585 * later in the list.
586 */
587 }
588 }
589 }
590
591 for (i = 0; i < nitems(emu_bad_cards); i++) {
592 if (device == emu_bad_cards[i].device) {
593 if (subdevice == emu_bad_cards[i].subdevice) {
594 thiscard = 0;
595 break;
596 }
597 if (0x0000 == emu_bad_cards[i].subdevice) {
598 thiscard = 0;
599 break; /* we avoid all this cards */
600 }
601 }
602 }
603 return (thiscard);
604}
605
606/*
607 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
608 * Some of them are used directly, some of them provide pointer / data pairs.
609 */
610static uint32_t
611emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
612{
613
614 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
615 switch (size) {
616 case 1:
617 return (bus_space_read_1(sc->st, sc->sh, regno));
618 case 2:
619 return (bus_space_read_2(sc->st, sc->sh, regno));
620 case 4:
621 return (bus_space_read_4(sc->st, sc->sh, regno));
622 }
623 return (0xffffffff);
624}
625
626static void
627emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
628{
629
630 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
631 switch (size) {
632 case 1:
633 bus_space_write_1(sc->st, sc->sh, regno, data);
634 break;
635 case 2:
636 bus_space_write_2(sc->st, sc->sh, regno, data);
637 break;
638 case 4:
639 bus_space_write_4(sc->st, sc->sh, regno, data);
640 break;
641 }
642}
643/*
644 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
645 * via (channel, register) pair. Some registers are channel-specific,
646 * some not.
647 */
648uint32_t
649emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
650{
651 uint32_t ptr, val, mask, size, offset;
652
653 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
654
655 EMU_RWLOCK();
656 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
657 val = emu_rd_nolock(sc, EMU_DATA, 4);
658 EMU_RWUNLOCK();
659
660 /*
661 * XXX Some register numbers has data size and offset encoded in
662 * it to get only part of 32bit register. This use is not described
663 * in register name, be careful!
664 */
665 if (reg & 0xff000000) {
666 size = (reg >> 24) & 0x3f;
667 offset = (reg >> 16) & 0x1f;
668 mask = ((1 << size) - 1) << offset;
669 val &= mask;
670 val >>= offset;
671 }
672 return (val);
673}
674
675void
676emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
677{
678 uint32_t ptr, mask, size, offset;
679
680 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
681
682 EMU_RWLOCK();
683 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
684 /*
685 * XXX Another kind of magic encoding in register number. This can
686 * give you side effect - it will read previous data from register
687 * and change only required bits.
688 */
689 if (reg & 0xff000000) {
690 size = (reg >> 24) & 0x3f;
691 offset = (reg >> 16) & 0x1f;
692 mask = ((1 << size) - 1) << offset;
693 data <<= offset;
694 data &= mask;
695 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
696 }
697 emu_wr_nolock(sc, EMU_DATA, data, 4);
698 EMU_RWUNLOCK();
699}
700/*
701 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
702 * via (channel, register) pair. Some registers are channel-specific,
703 * some not. This interface is supported by CA0102 and CA0108 chips only.
704 */
705uint32_t
706emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
707{
708 uint32_t val;
709
710 /* XXX separate lock? */
711 EMU_RWLOCK();
712 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
713 val = emu_rd_nolock(sc, EMU_DATA2, 4);
714
715 EMU_RWUNLOCK();
716
717 return (val);
718}
719
720void
721emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
722{
723
724 EMU_RWLOCK();
725 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
726 emu_wr_nolock(sc, EMU_DATA2, data, 4);
727 EMU_RWUNLOCK();
728}
729/*
730 * XXX CardBus interface. Not tested on any real hardware.
731 */
732static void
733emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
734{
735 uint32_t val;
736
737 /*
738 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems
739 * to be some reg/value accessible kind of config register on CardBus
740 * CA0108, with value(?) in top 16 bit, address(?) in low 16
741 */
742
743 val = emu_rd_nolock(sc, 0x38, 4);
744 emu_wr_nolock(sc, 0x38, data, 4);
745 val = emu_rd_nolock(sc, 0x38, 4);
746
747}
748
749/*
750 * Direct hardware register access
751 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
752 */
753void
754emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
755{
756 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
757 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
758
759 emu_wr_nolock(sc, regno, data, size);
760}
761
762uint32_t
763emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
764{
765 uint32_t rd;
766
767 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
768 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
769
770 rd = emu_rd_nolock(sc, regno, size);
771 return (rd);
772}
773
774/*
775 * Enabling IR MIDI messages is another kind of black magic. It just
776 * has to be made this way. It really do it.
777 */
778void
779emu_enable_ir(struct emu_sc_info *sc)
780{
781 uint32_t iocfg;
782
783 if (sc->is_emu10k2 || sc->is_ca0102) {
784 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
785 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
786 DELAY(500);
787 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
788 DELAY(500);
789 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
790 DELAY(100);
791 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
792 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
793 sc->enable_ir = 1;
794 }
795 if (sc->is_emu10k1) {
796 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
797 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
798 DELAY(500);
799 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
800 DELAY(100);
801 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
802 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
803 sc->enable_ir = 1;
804 }
805}
806
807/*
808 * emu_timer_ - HW timer management
809 */
810int
811emu_timer_create(struct emu_sc_info *sc)
812{
813 int i, timer;
814
815 timer = -1;
816
817 mtx_lock(&sc->lock);
818 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
819 if (sc->timer[i] == 0) {
820 sc->timer[i] = -1; /* disable it */
821 timer = i;
822 mtx_unlock(&sc->lock);
823 return (timer);
824 }
825 mtx_unlock(&sc->lock);
826
827 return (-1);
828}
829
830int
831emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
832{
833 int i;
834
835 if (timer < 0)
836 return (-1);
837
838 RANGE(delay, 16, 1024);
839 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
840
841 mtx_lock(&sc->lock);
842 sc->timer[timer] = delay;
843 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
844 if (sc->timerinterval > sc->timer[i])
845 sc->timerinterval = sc->timer[i];
846
847 /* XXX */
848 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
849 mtx_unlock(&sc->lock);
850
851 return (timer);
852}
853
854int
855emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
856{
857 uint32_t x;
858 int ena_int;
859 int i;
860
861 if (timer < 0)
862 return (-1);
863
864 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
865
866 mtx_lock(&sc->lock);
867
868 if ((go == 1) && (sc->timer[timer] < 0))
869 sc->timer[timer] = -sc->timer[timer];
870 if ((go == 0) && (sc->timer[timer] > 0))
871 sc->timer[timer] = -sc->timer[timer];
872
873 ena_int = 0;
874 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
875 if (sc->timerinterval > sc->timer[i])
876 sc->timerinterval = sc->timer[i];
877 if (sc->timer[i] > 0)
878 ena_int = 1;
879 }
880
881 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
882
883 if (ena_int == 1) {
884 x = emu_rd(sc, EMU_INTE, 4);
885 x |= EMU_INTE_INTERTIMERENB;
886 emu_wr(sc, EMU_INTE, x, 4);
887 } else {
888 x = emu_rd(sc, EMU_INTE, 4);
889 x &= ~EMU_INTE_INTERTIMERENB;
890 emu_wr(sc, EMU_INTE, x, 4);
891 }
892 mtx_unlock(&sc->lock);
893 return (0);
894}
895
896int
897emu_timer_clear(struct emu_sc_info *sc, int timer)
898{
899 if (timer < 0)
900 return (-1);
901
902 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
903
904 emu_timer_enable(sc, timer, 0);
905
906 mtx_lock(&sc->lock);
907 if (sc->timer[timer] != 0)
908 sc->timer[timer] = 0;
909 mtx_unlock(&sc->lock);
910
911 return (timer);
912}
913
914/*
915 * emu_intr_ - HW interrupt handler management
916 */
917int
918emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
919{
920 int i;
921 uint32_t x;
922
923 mtx_lock(&sc->lock);
924 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
925 if (sc->ihandler[i].inte_mask == 0) {
926 sc->ihandler[i].inte_mask = inte_mask;
927 sc->ihandler[i].intr_mask = intr_mask;
928 sc->ihandler[i].softc = isc;
929 sc->ihandler[i].irq_func = func;
930 x = emu_rd(sc, EMU_INTE, 4);
931 x |= inte_mask;
932 emu_wr(sc, EMU_INTE, x, 4);
933 mtx_unlock(&sc->lock);
934 if (sc->dbg_level > 1)
935 device_printf(sc->dev, "ihandle %d registered\n", i);
936
937 return (i);
938 }
939 mtx_unlock(&sc->lock);
940 if (sc->dbg_level > 1)
941 device_printf(sc->dev, "ihandle not registered\n");
942
943 return (-1);
944}
945
946int
947emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
948{
949 uint32_t x;
950 int i;
951
952 mtx_lock(&sc->lock);
953
954 if (sc->ihandler[hnumber].inte_mask == 0) {
955 mtx_unlock(&sc->lock);
956 return (-1);
957 }
958
959 x = emu_rd(sc, EMU_INTE, 4);
960 x &= ~sc->ihandler[hnumber].inte_mask;
961
962 sc->ihandler[hnumber].inte_mask = 0;
963 sc->ihandler[hnumber].intr_mask = 0;
964 sc->ihandler[hnumber].softc = NULL;
965 sc->ihandler[hnumber].irq_func = NULL;
966
967 /* other interrupt handlers may use this EMU_INTE value */
968 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
969 if (sc->ihandler[i].inte_mask != 0)
970 x |= sc->ihandler[i].inte_mask;
971
972 emu_wr(sc, EMU_INTE, x, 4);
973
974 mtx_unlock(&sc->lock);
975 return (hnumber);
976}
977
978static void
979emu_intr(void *p)
980{
981 struct emu_sc_info *sc = (struct emu_sc_info *)p;
982 uint32_t stat, ack;
983 int i;
984
985 for (;;) {
986 stat = emu_rd(sc, EMU_IPR, 4);
987 ack = 0;
988 if (stat == 0)
989 break;
990 emu_wr(sc, EMU_IPR, stat, 4);
991 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
992 if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
993 (((void *)sc->ihandler[i].irq_func) != NULL)) {
994 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
995 (sc->ihandler[i].intr_mask) & stat);
996 }
997 }
998 if (sc->dbg_level > 1)
999 if (stat & (~ack))
1000 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
1001 }
1002
1003 if ((sc->is_ca0102) || (sc->is_ca0108))
1004 for (;;) {
1005 stat = emu_rd(sc, EMU_IPR2, 4);
1006 ack = 0;
1007 if (stat == 0)
1008 break;
1009 emu_wr(sc, EMU_IPR2, stat, 4);
1010 if (sc->dbg_level > 1)
1011 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
1012
1013 break; /* to avoid infinite loop. should be removed
1014 * after completion of P16V interface. */
1015 }
1016
1017 if (sc->is_ca0102)
1018 for (;;) {
1019 stat = emu_rd(sc, EMU_IPR3, 4);
1020 ack = 0;
1021 if (stat == 0)
1022 break;
1023 emu_wr(sc, EMU_IPR3, stat, 4);
1024 if (sc->dbg_level > 1)
1025 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
1026
1027 break; /* to avoid infinite loop. should be removed
1028 * after completion of S/PDIF interface */
1029 }
1030}
1031
1032/*
1033 * Get data from private emu10kx structure for PCM buffer allocation.
1034 * Used by PCM code only.
1035 */
1036bus_dma_tag_t
1037emu_gettag(struct emu_sc_info *sc)
1038{
1039 return (sc->mem.dmat);
1040}
1041
1042static void
1043emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
1044{
1045 bus_addr_t *phys = (bus_addr_t *) arg;
1046
1047 *phys = error ? 0 : (bus_addr_t) segs->ds_addr;
1048
1049 if (bootverbose) {
1050 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
1051 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1052 nseg, error);
1053 }
1054}
1055
1056static void *
1057emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr,
1058 bus_dmamap_t *map)
1059{
1060 void *dmabuf;
1061 int error;
1062
1063 *addr = 0;
1064 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) {
1065 if (mem->card->dbg_level > 2)
1066 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error);
1067 return (NULL);
1068 }
1069 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) {
1070 if (mem->card->dbg_level > 2)
1071 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error);
1072 bus_dmamem_free(mem->dmat, dmabuf, *map);
1073 return (NULL);
1074 }
1075 return (dmabuf);
1076}
1077
1078static void
1079emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map)
1080{
1081 bus_dmamap_unload(mem->dmat, map);
1082 bus_dmamem_free(mem->dmat, dmabuf, map);
1083}
1084
1085static void *
1086emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
1087{
1088 uint32_t blksz, start, idx, ofs, tmp, found;
1089 struct emu_memblk *blk;
1090 void *membuf;
1091
1092 blksz = sz / EMUPAGESIZE;
1093 if (sz > (blksz * EMUPAGESIZE))
1094 blksz++;
1095 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) {
1096 if (mem->card->dbg_level > 2)
1097 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n");
1098 return (NULL);
1099 }
1100 /* find a free block in the bitmap */
1101 found = 0;
1102 start = 1;
1103 while (!found && start + blksz < EMU_MAXPAGES) {
1104 found = 1;
1105 for (idx = start; idx < start + blksz; idx++)
1106 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1107 found = 0;
1108 if (!found)
1109 start++;
1110 }
1111 if (!found) {
1112 if (mem->card->dbg_level > 2)
1113 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n");
1114 return (NULL);
1115 }
1116 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1117 if (blk == NULL) {
1118 if (mem->card->dbg_level > 2)
1119 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n");
1120 return (NULL);
1121 }
1122 bzero(blk, sizeof(*blk));
1123 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map);
1124 *addr = blk->buf_addr;
1125 if (membuf == NULL) {
1126 if (mem->card->dbg_level > 2)
1127 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n");
1128 free(blk, M_DEVBUF);
1129 return (NULL);
1130 }
1131 blk->buf = membuf;
1132 blk->pte_start = start;
1133 blk->pte_size = blksz;
1134 strncpy(blk->owner, owner, 15);
1135 blk->owner[15] = '\0';
1136 ofs = 0;
1137 for (idx = start; idx < start + blksz; idx++) {
1138 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1139 tmp = (uint32_t) (blk->buf_addr + ofs);
1140 mem->ptb_pages[idx] = (tmp << 1) | idx;
1141 ofs += EMUPAGESIZE;
1142 }
1143 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1144 return (membuf);
1145}
1146
1147static int
1148emu_memfree(struct emu_mem *mem, void *membuf)
1149{
1150 uint32_t idx, tmp;
1151 struct emu_memblk *blk, *i;
1152
1153 blk = NULL;
1154 SLIST_FOREACH(i, &mem->blocks, link) {
1155 if (i->buf == membuf)
1156 blk = i;
1157 }
1158 if (blk == NULL)
1159 return (EINVAL);
1160 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1161 emu_free(mem, membuf, blk->buf_map);
1162 tmp = (uint32_t) (mem->silent_page_addr) << 1;
1163 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1164 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1165 mem->ptb_pages[idx] = tmp | idx;
1166 }
1167 free(blk, M_DEVBUF);
1168 return (0);
1169}
1170
1171static int
1172emu_memstart(struct emu_mem *mem, void *membuf)
1173{
1174 struct emu_memblk *blk, *i;
1175
1176 blk = NULL;
1177 SLIST_FOREACH(i, &mem->blocks, link) {
1178 if (i->buf == membuf)
1179 blk = i;
1180 }
1181 if (blk == NULL)
1182 return (-1);
1183 return (blk->pte_start);
1184}
1185
1186static uint32_t
1187emu_rate_to_pitch(uint32_t rate)
1188{
1189 static uint32_t logMagTable[128] = {
1190 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
1191 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
1192 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
1193 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
1194 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
1195 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
1196 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
1197 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
1198 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
1199 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
1200 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
1201 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
1202 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
1203 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
1204 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
1205 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
1206 };
1207 static char logSlopeTable[128] = {
1208 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
1209 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
1210 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
1211 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
1212 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
1213 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
1214 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
1215 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
1216 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
1217 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
1218 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
1219 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
1220 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
1221 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
1222 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
1223 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
1224 };
1225 int i;
1226
1227 if (rate == 0)
1228 return (0);
1229 rate *= 11185; /* Scale 48000 to 0x20002380 */
1230 for (i = 31; i > 0; i--) {
1231 if (rate & 0x80000000) { /* Detect leading "1" */
1232 return (((uint32_t) (i - 15) << 20) +
1233 logMagTable[0x7f & (rate >> 24)] +
1234 (0x7f & (rate >> 17)) *
1235 logSlopeTable[0x7f & (rate >> 24)]);
1236 }
1237 rate <<= 1;
1238 }
1239 /* NOTREACHED */
1240 return (0);
1241}
1242
1243static uint32_t
1244emu_rate_to_linearpitch(uint32_t rate)
1245{
1246 rate = (rate << 8) / 375;
1247 return ((rate >> 1) + (rate & 1));
1248}
1249
1250struct emu_voice *
1251emu_valloc(struct emu_sc_info *sc)
1252{
1253 struct emu_voice *v;
1254 int i;
1255
1256 v = NULL;
1257 mtx_lock(&sc->lock);
1258 for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
1259 if (i < NUM_G) {
1260 v = &sc->voice[i];
1261 v->busy = 1;
1262 }
1263 mtx_unlock(&sc->lock);
1264 return (v);
1265}
1266
1267void
1268emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
1269{
1270 int i, r;
1271
1272 mtx_lock(&sc->lock);
1273 for (i = 0; i < NUM_G; i++) {
1274 if (v == &sc->voice[i] && sc->voice[i].busy) {
1275 v->busy = 0;
1276 /*
1277 * XXX What we should do with mono channels?
1278 * See -pcm.c emupchan_init for other side of
1279 * this problem
1280 */
1281 if (v->slave != NULL)
1282 r = emu_memfree(&sc->mem, v->vbuf);
1283 }
1284 }
1285 mtx_unlock(&sc->lock);
1286}
1287
1288int
1289emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
1290 uint32_t sz, struct snd_dbuf *b)
1291{
1292 void *vbuf;
1293 bus_addr_t tmp_addr;
1294
1295 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
1296 if (vbuf == NULL) {
1297 if(sc->dbg_level > 2)
1298 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n");
1299 return (ENOMEM);
1300 }
1301 if (b != NULL)
1302 sndbuf_setup(b, vbuf, sz);
1303 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
1304 if (m->start < 0) {
1305 if(sc->dbg_level > 2)
1306 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n");
1307 emu_memfree(&sc->mem, vbuf);
1308 return (ENOMEM);
1309 }
1310 m->end = m->start + sz;
1311 m->speed = 0;
1312 m->b16 = 0;
1313 m->stereo = 0;
1314 m->running = 0;
1315 m->ismaster = 1;
1316 m->vol = 0xff;
1317 m->buf = tmp_addr;
1318 m->vbuf = vbuf;
1319 m->slave = s;
1320 if (s != NULL) {
1321 s->start = m->start;
1322 s->end = m->end;
1323 s->speed = 0;
1324 s->b16 = 0;
1325 s->stereo = 0;
1326 s->running = 0;
1327 s->ismaster = 0;
1328 s->vol = m->vol;
1329 s->buf = m->buf;
1330 s->vbuf = NULL;
1331 s->slave = NULL;
1332 }
1333 return (0);
1334}
1335
1336void
1337emu_vsetup(struct emu_voice *v, int fmt, int spd)
1338{
1339 if (fmt) {
1340 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
1341 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0;
1342 if (v->slave != NULL) {
1343 v->slave->b16 = v->b16;
1344 v->slave->stereo = v->stereo;
1345 }
1346 }
1347 if (spd) {
1348 v->speed = spd;
1349 if (v->slave != NULL)
1350 v->slave->speed = v->speed;
1351 }
1352}
1353
1354void
1355emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
1356{
1357 int i;
1358
1359 for (i = 0; i < 8; i++) {
1360 v->routing[i] = rt->routing_left[i];
1361 v->amounts[i] = rt->amounts_left[i];
1362 }
1363 if ((v->stereo) && (v->ismaster == 0))
1364 for (i = 0; i < 8; i++) {
1365 v->routing[i] = rt->routing_right[i];
1366 v->amounts[i] = rt->amounts_right[i];
1367 }
1368
1369 if ((v->stereo) && (v->slave != NULL))
1370 emu_vroute(sc, rt, v->slave);
1371}
1372
1373void
1374emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
1375{
1376 int s;
1377 uint32_t start, val, silent_page;
1378
1379 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
1380
1381 v->sa = v->start >> s;
1382 v->ea = v->end >> s;
1383
1384 if (v->stereo) {
1385 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
1386 } else {
1387 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
1388 }
1389 val = v->stereo ? 28 : 30;
1390 val *= v->b16 ? 1 : 2;
1391 start = v->sa + val;
1392
1393 if (sc->is_emu10k1) {
1394 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
1395 (v->routing[2] << 8) |
1396 (v->routing[1] << 4) |
1397 (v->routing[0] << 0)) << 16);
1398 } else {
1399 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
1400 (v->routing[2] << 16) |
1401 (v->routing[1] << 8) |
1402 (v->routing[0] << 0));
1403 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
1404 (v->routing[6] << 16) |
1405 (v->routing[5] << 8) |
1406 (v->routing[4] << 0));
1407 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
1408 (v->amounts[6] << 26) |
1409 (v->amounts[5] << 8) |
1410 (v->amounts[4] << 0));
1411 }
1412 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
1413 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
1414 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
1415
1416 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
1417 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
1418 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
1419
1420 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
1421 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
1422 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
1423
1424 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
1425 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
1426 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
1427 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
1428 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
1429 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
1430 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
1431 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
1432 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
1433 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
1434
1435 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
1436 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
1437
1438 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
1439 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
1440 if ((v->stereo) && (v->slave != NULL))
1441 emu_vwrite(sc, v->slave);
1442}
1443
1444static void
1445emu_vstop(struct emu_sc_info *sc, char channel, int enable)
1446{
1447 int reg;
1448
1449 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
1450 channel &= 0x1f;
1451 reg |= 1 << 24;
1452 reg |= channel << 16;
1453 emu_wrptr(sc, 0, reg, enable);
1454}
1455
1456void
1457emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
1458{
1459 uint32_t pitch_target, initial_pitch;
1460 uint32_t cra, cs, ccis;
1461 uint32_t sample, i;
1462
1463 if (go) {
1464 cra = 64;
1465 cs = v->stereo ? 4 : 2;
1466 ccis = v->stereo ? 28 : 30;
1467 ccis *= v->b16 ? 1 : 2;
1468 sample = v->b16 ? 0x00000000 : 0x80808080;
1469 for (i = 0; i < cs; i++)
1470 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
1471 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
1472 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
1473 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
1474
1475 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
1476 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
1477 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
1478 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
1479 emu_vstop(sc, v->vnum, 0);
1480
1481 pitch_target = emu_rate_to_linearpitch(v->speed);
1482 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
1483 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
1484 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
1485 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
1486 } else {
1487 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
1488 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
1489 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
1490 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
1491 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
1492 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
1493 emu_vstop(sc, v->vnum, 1);
1494 }
1495 if ((v->stereo) && (v->slave != NULL))
1496 emu_vtrigger(sc, v->slave, go);
1497}
1498
1499int
1500emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
1501{
1502 int s, ptr;
1503
1504 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
1505 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
1506 return (ptr & ~0x0000001f);
1507}
1508
1509/* fx */
1510static void
1511emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
1512{
1513 emu_wrptr(sc, 0, sc->code_base + pc, data);
1514}
1515
1516static void
1517emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
1518{
1519 if ((*pc) + 1 > sc->code_size) {
1520 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
1521 return;
1522 }
1523 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
1524 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
1525 (*pc)++;
1526}
1527
1528static int
1529sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
1530{
1531 struct emu_sc_info *sc;
1532 int mixer_id;
1533 int new_vol;
1534 int err;
1535
1536 sc = arg1;
1537 mixer_id = arg2;
1538
1539 new_vol = emumix_get_volume(sc, mixer_id);
1540 err = sysctl_handle_int(oidp, &new_vol, 0, req);
1541
1542 if (err || req->newptr == NULL)
1543 return (err);
1544 if (new_vol < 0 || new_vol > 100)
1545 return (EINVAL);
1546 emumix_set_volume(sc, mixer_id, new_vol);
1547
1548 return (0);
1549}
1550
1551static int
1552emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
1553{
1554 int volgpr;
1555 char sysctl_name[32];
1556
1557 volgpr = emu_rm_gpr_alloc(sc->rm, 1);
1558 emumix_set_fxvol(sc, volgpr, defvolume);
1559 /*
1560 * Mixer controls with NULL mix_name are handled
1561 * by AC97 emulation code or PCM mixer.
1562 */
1563 if (mix_name != NULL) {
1564 /*
1565 * Temporary sysctls should start with underscore,
1566 * see freebsd-current mailing list, emu10kx driver
1567 * discussion around 2006-05-24.
1568 */
1569 snprintf(sysctl_name, 32, "_%s", mix_name);
1570 SYSCTL_ADD_PROC(sc->ctx,
1571 SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name,
1572 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, mix_id,
1573 sysctl_emu_mixer_control, "I", "");
1574 }
1575
1576 return (volgpr);
1577}
1578
1579static int
1580sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
1581{
1582 struct emu_sc_info *sc;
1583 int new_val;
1584 int err;
1585
1586 sc = arg1;
1587
1588 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0;
1589 err = sysctl_handle_int(oidp, &new_val, 0, req);
1590
1591 if (err || req->newptr == NULL)
1592 return (err);
1593 if (new_val < 0 || new_val > 1)
1594 return (EINVAL);
1595
1596 switch (new_val) {
1597 case 0:
1598 emumix_set_mode(sc, MODE_ANALOG);
1599 break;
1600 case 1:
1601 emumix_set_mode(sc, MODE_DIGITAL);
1602 break;
1603 }
1604 return (0);
1605}
1606
1607static void
1608emu_digitalswitch(struct emu_sc_info *sc)
1609{
1610 /* XXX temporary? */
1611 SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO,
1612 "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
1613 sc, 0, sysctl_emu_digitalswitch_control, "I",
1614 "Enable digital output");
1615
1616 return;
1617}
1618
1619/*
1620 * Allocate cache GPRs that will hold mixed output channels
1621 * and clear it on every DSP run.
1622 */
1623#define EFX_CACHE(CACHE_IDX) do { \
1624 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
1625 emu_addefxop(sc, ACC3, \
1626 GPR(sc->cache_gpr[CACHE_IDX]), \
1627 DSP_CONST(0), \
1628 DSP_CONST(0), \
1629 DSP_CONST(0), \
1630 &pc); \
1631} while (0)
1632
1633/* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
1634#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \
1635 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \
1636 sc->mixer_volcache[IN_GPR_IDX] = DEF; \
1637 emu_addefxop(sc, MACS, \
1638 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1639 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1640 INP_NR, \
1641 GPR(sc->mixer_gpr[IN_GPR_IDX]), \
1642 &pc); \
1643} while (0)
1644
1645/* allocate GPR, OUT = IN * VOL */
1646#define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \
1647 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
1648 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \
1649 emu_addefxop(sc, MACS, \
1650 OUTP(OUTP_NR), \
1651 DSP_CONST(0), \
1652 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1653 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1654 &pc); \
1655} while (0)
1656
1657/* like EFX_OUTPUT, but don't allocate mixer gpr */
1658#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \
1659 emu_addefxop(sc, MACS, \
1660 OUTP(OUTP_NR), \
1661 DSP_CONST(0), \
1662 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1663 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1664 &pc); \
1665} while (0)
1666
1667/* skip next OPCOUNT instructions if FLAG != 0 */
1668#define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \
1669 emu_addefxop(sc, MACS, \
1670 DSP_CONST(0), \
1671 GPR(sc->mute_gpr[FLAG_GPR]), \
1672 DSP_CONST(0), \
1673 DSP_CONST(0), \
1674 &pc); \
1675 emu_addefxop(sc, SKIP, \
1676 DSP_CCR, \
1677 DSP_CCR, \
1678 COND_NEQ_ZERO, \
1679 OPCOUNT, \
1680 &pc); \
1681} while (0)
1682
1683#define EFX_COPY(TO, FROM) do { \
1684 emu_addefxop(sc, ACC3, \
1685 TO, \
1686 DSP_CONST(0), \
1687 DSP_CONST(0), \
1688 FROM, \
1689 &pc); \
1690} while (0)
1691
1692static void
1693emu_initefx(struct emu_sc_info *sc)
1694{
1695 unsigned int i;
1696 uint32_t pc;
1697
1698 /* stop DSP */
1699 if (sc->is_emu10k1) {
1700 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
1701 } else {
1702 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
1703 }
1704
1705 /* code size is in instructions */
1706 pc = 0;
1707 for (i = 0; i < sc->code_size; i++) {
1708 if (sc->is_emu10k1) {
1709 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
1710 } else {
1711 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
1712 }
1713 }
1714
1715 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */
1716 for (i = 0; i < NUM_MUTE; i++) {
1717 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1);
1718 emumix_set_gpr(sc, sc->mute_gpr[i], 1);
1719 }
1720 emu_digitalswitch(sc);
1721
1722 pc = 0;
1723
1724 /*
1725 * DSP code below is not good, because:
1726 * 1. It can be written smaller, if it can use DSP accumulator register
1727 * instead of cache_gpr[].
1728 * 2. It can be more careful when volume is 100%, because in DSP
1729 * x*0x7fffffff may not be equal to x !
1730 */
1731
1732 /* clean outputs */
1733 for (i = 0; i < 16 ; i++) {
1734 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
1735 }
1736
1737 if (sc->is_emu10k1) {
1738 EFX_CACHE(C_FRONT_L);
1739 EFX_CACHE(C_FRONT_R);
1740 EFX_CACHE(C_REC_L);
1741 EFX_CACHE(C_REC_R);
1742
1743 /* fx0 to front/record, 100%/muted by default */
1744 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1745 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1746 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1747 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1748
1749 /* in0, from AC97 codec output */
1750 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
1751 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
1752 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1753 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1754
1755 /* in1, from CD S/PDIF */
1756 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */
1757 EFX_SKIP(4, CDSPDIFMUTE);
1758 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1759 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1760 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1761 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1762
1763 if (sc->dbg_level > 0) {
1764 /* in2, ZoomVide (???) */
1765 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1766 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1767 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
1768 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
1769 }
1770
1771 /* in3, TOSLink */
1772 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
1773 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
1774 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
1775 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
1776 /* in4, LineIn */
1777 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1778 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1779 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
1780 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
1781
1782 /* in5, on-card S/PDIF */
1783 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1784 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1785 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1786 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1787
1788 /* in6, Line2 on Live!Drive */
1789 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1790 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1791 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
1792 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
1793
1794 if (sc->dbg_level > 0) {
1795 /* in7, unknown */
1796 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
1797 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
1798 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
1799 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
1800 }
1801
1802 /* analog and digital */
1803 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
1804 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
1805 /* S/PDIF */
1806 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L);
1807 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R);
1808 /* Headphones */
1809 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
1810 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
1811
1812 /* rec output to "ADC" */
1813 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
1814 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
1815
1816 if (!(sc->mch_disabled)) {
1817 /*
1818 * Additional channel volume is controlled by mixer in
1819 * emu_dspmixer_set() in -pcm.c
1820 */
1821
1822 /* fx2/3 (pcm1) to rear */
1823 EFX_CACHE(C_REAR_L);
1824 EFX_CACHE(C_REAR_R);
1825 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
1826 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
1827
1828 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
1829 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
1830 if (sc->has_51) {
1831 /* fx4 (pcm2) to center */
1832 EFX_CACHE(C_CENTER);
1833 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
1834 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1835
1836 /* XXX in digital mode (default) this should be muted because
1837 this output is shared with digital out */
1838 EFX_SKIP(1, ANALOGMUTE);
1839 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1840
1841 /* fx5 (pcm3) to sub */
1842 EFX_CACHE(C_SUB);
1843 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
1844 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1845
1846 /* XXX in digital mode (default) this should be muted because
1847 this output is shared with digital out */
1848 EFX_SKIP(1, ANALOGMUTE);
1849 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1850 }
1851 } else {
1852 /* SND_EMU10KX_MULTICHANNEL_DISABLED */
1853 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */
1854 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */
1855
1856#if 0
1857 /* XXX 5.1 does not work */
1858
1859 if (sc->has_51) {
1860 /* (fx0+fx1)/2 to center */
1861 EFX_CACHE(C_CENTER);
1862 emu_addefxop(sc, MACS,
1863 GPR(sc->cache_gpr[C_CENTER]),
1864 GPR(sc->cache_gpr[C_CENTER]),
1865 DSP_CONST(0xd), /* = 1/2 */
1866 GPR(sc->cache_gpr[C_FRONT_L]),
1867 &pc);
1868 emu_addefxop(sc, MACS,
1869 GPR(sc->cache_gpr[C_CENTER]),
1870 GPR(sc->cache_gpr[C_CENTER]),
1871 DSP_CONST(0xd), /* = 1/2 */
1872 GPR(sc->cache_gpr[C_FRONT_R]),
1873 &pc);
1874 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1875
1876 /* XXX in digital mode (default) this should be muted because
1877 this output is shared with digital out */
1878 EFX_SKIP(1, ANALOGMUTE);
1879 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1880
1881 /* (fx0+fx1)/2 to sub */
1882 EFX_CACHE(C_SUB);
1883 emu_addefxop(sc, MACS,
1884 GPR(sc->cache_gpr[C_CENTER]),
1885 GPR(sc->cache_gpr[C_CENTER]),
1886 DSP_CONST(0xd), /* = 1/2 */
1887 GPR(sc->cache_gpr[C_FRONT_L]),
1888 &pc);
1889 emu_addefxop(sc, MACS,
1890 GPR(sc->cache_gpr[C_CENTER]),
1891 GPR(sc->cache_gpr[C_CENTER]),
1892 DSP_CONST(0xd), /* = 1/2 */
1893 GPR(sc->cache_gpr[C_FRONT_R]),
1894 &pc);
1895 /* XXX add lowpass filter here */
1896
1897 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1898
1899 /* XXX in digital mode (default) this should be muted because
1900 this output is shared with digital out */
1901 EFX_SKIP(1, ANALOGMUTE);
1902 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1903 }
1904#endif
1905 } /* !mch_disabled */
1906 if (sc->mch_rec) {
1907 /*
1908 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots
1909 * are used as outputs and already filled with data
1910 */
1911 /*
1912 * XXX On Live! cards stream does not begin at zero offset.
1913 * It can be HW, driver or sound buffering problem.
1914 * Use sync substream (offset 0x3E) to let userland find
1915 * correct data.
1916 */
1917
1918 /*
1919 * Substream map (in byte offsets, each substream is 2 bytes):
1920 * 0x00..0x1E - outputs
1921 * 0x20..0x3E - FX, inputs and sync stream
1922 */
1923
1924 /* First 2 channels (offset 0x20,0x22) are empty */
1925 for(i = (sc->has_51 ? 2 : 0); i < 2; i++)
1926 EFX_COPY(FX2(i), DSP_CONST(0));
1927
1928 /* PCM Playback monitoring, offset 0x24..0x2A */
1929 for(i = 0; i < 4; i++)
1930 EFX_COPY(FX2(i+2), FX(i));
1931
1932 /* Copy of some inputs, offset 0x2C..0x3C */
1933 for(i = 0; i < 9; i++)
1934 EFX_COPY(FX2(i+8), INP(i));
1935
1936 /* sync data (0xc0de, offset 0x3E) */
1937 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
1938 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
1939
1940 EFX_COPY(FX2(15), GPR(sc->dummy_gpr));
1941 } /* mch_rec */
1942 } else /* emu10k2 and later */ {
1943 EFX_CACHE(C_FRONT_L);
1944 EFX_CACHE(C_FRONT_R);
1945 EFX_CACHE(C_REC_L);
1946 EFX_CACHE(C_REC_R);
1947
1948 /* fx0 to front/record, 100%/muted by default */
1949 /*
1950 * FRONT_[L|R] is controlled by AC97 emulation in
1951 * emu_ac97_[read|write]_emulation in -pcm.c
1952 */
1953 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1954 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1955 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1956 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1957
1958 /* in0, from AC97 codec output */
1959 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
1960 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
1961 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1962 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1963
1964 /* in1, from CD S/PDIF */
1965 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1966 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1967 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1968 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1969
1970 /* in2, optical & coax S/PDIF on AudigyDrive*/
1971 /* XXX Should be muted when GPRSCS valid stream == 0 */
1972 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1973 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1974 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
1975 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
1976
1977 if (sc->dbg_level > 0) {
1978 /* in3, unknown */
1979 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
1980 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
1981 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
1982 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
1983 }
1984
1985 /* in4, LineIn 2 on AudigyDrive */
1986 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1987 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1988 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
1989 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
1990
1991 /* in5, on-card S/PDIF */
1992 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1993 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1994 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1995 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1996
1997 /* in6, AUX2 on AudigyDrive */
1998 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1999 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
2000 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
2001 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
2002
2003 if (sc->dbg_level > 0) {
2004 /* in7, unknown */
2005 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
2006 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
2007 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
2008 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
2009 }
2010
2011 /* front output to headphones and alog and digital *front */
2012 /* volume controlled by AC97 emulation */
2013 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
2014 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
2015 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
2016 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
2017 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
2018 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
2019
2020 /* rec output to "ADC" */
2021 /* volume controlled by AC97 emulation */
2022 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
2023 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
2024
2025 if (!(sc->mch_disabled)) {
2026 /*
2027 * Additional channel volume is controlled by mixer in
2028 * emu_dspmixer_set() in -pcm.c
2029 */
2030
2031 /* fx2/3 (pcm1) to rear */
2032 EFX_CACHE(C_REAR_L);
2033 EFX_CACHE(C_REAR_R);
2034 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
2035 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
2036
2037 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
2038 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
2039 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
2040 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
2041
2042 /* fx4 (pcm2) to center */
2043 EFX_CACHE(C_CENTER);
2044 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
2045 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2046#if 0
2047 /*
2048 * XXX in digital mode (default) this should be muted
2049 * because this output is shared with digital out
2050 */
2051 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2052#endif
2053 /* fx5 (pcm3) to sub */
2054 EFX_CACHE(C_SUB);
2055 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
2056 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2057#if 0
2058 /*
2059 * XXX in digital mode (default) this should be muted
2060 * because this output is shared with digital out
2061 */
2062 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2063#endif
2064 if (sc->has_71) {
2065 /* XXX this will broke headphones on AudigyDrive */
2066 /* fx6/7 (pcm4) to side */
2067 EFX_CACHE(C_SIDE_L);
2068 EFX_CACHE(C_SIDE_R);
2069 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
2070 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
2071 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
2072 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
2073 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
2074 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
2075 }
2076 } else { /* mch_disabled */
2077 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
2078 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
2079
2080 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
2081 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
2082
2083 if (sc->has_51) {
2084 /* (fx0+fx1)/2 to center */
2085 EFX_CACHE(C_CENTER);
2086 emu_addefxop(sc, MACS,
2087 GPR(sc->cache_gpr[C_CENTER]),
2088 GPR(sc->cache_gpr[C_CENTER]),
2089 DSP_CONST(0xd), /* = 1/2 */
2090 GPR(sc->cache_gpr[C_FRONT_L]),
2091 &pc);
2092 emu_addefxop(sc, MACS,
2093 GPR(sc->cache_gpr[C_CENTER]),
2094 GPR(sc->cache_gpr[C_CENTER]),
2095 DSP_CONST(0xd), /* = 1/2 */
2096 GPR(sc->cache_gpr[C_FRONT_R]),
2097 &pc);
2098 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2099
2100 /* XXX in digital mode (default) this should be muted because
2101 this output is shared with digital out */
2102 EFX_SKIP(1, ANALOGMUTE);
2103 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2104
2105 /* (fx0+fx1)/2 to sub */
2106 EFX_CACHE(C_SUB);
2107 emu_addefxop(sc, MACS,
2108 GPR(sc->cache_gpr[C_SUB]),
2109 GPR(sc->cache_gpr[C_SUB]),
2110 DSP_CONST(0xd), /* = 1/2 */
2111 GPR(sc->cache_gpr[C_FRONT_L]),
2112 &pc);
2113 emu_addefxop(sc, MACS,
2114 GPR(sc->cache_gpr[C_SUB]),
2115 GPR(sc->cache_gpr[C_SUB]),
2116 DSP_CONST(0xd), /* = 1/2 */
2117 GPR(sc->cache_gpr[C_FRONT_R]),
2118 &pc);
2119 /* XXX add lowpass filter here */
2120
2121 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2122
2123 /* XXX in digital mode (default) this should be muted because
2124 this output is shared with digital out */
2125 EFX_SKIP(1, ANALOGMUTE);
2126 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2127 }
2128 } /* mch_disabled */
2129 if (sc->mch_rec) {
2130 /* MCH RECORDING, high 32 slots */
2131
2132 /*
2133 * Stream map (in byte offsets):
2134 * 0x00..0x3E - outputs
2135 * 0x40..0x7E - FX, inputs
2136 * each substream is 2 bytes.
2137 */
2138 /*
2139 * XXX Audigy 2 Value cards (and, possibly,
2140 * Audigy 4) write some unknown data in place of
2141 * some outputs (offsets 0x20..0x3F) and one
2142 * input (offset 0x7E).
2143 */
2144
2145 /* PCM Playback monitoring, offsets 0x40..0x5E */
2146 for(i = 0; i < 16; i++)
2147 EFX_COPY(FX2(i), FX(i));
2148
2149 /* Copy of all inputs, offsets 0x60..0x7E */
2150 for(i = 0; i < 16; i++)
2151 EFX_COPY(FX2(i+16), INP(i));
2152#if 0
2153 /* XXX Audigy seems to work correct and does not need this */
2154 /* sync data (0xc0de), offset 0x7E */
2155 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
2156 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
2157 EFX_COPY(FX2(31), GPR(sc->dummy_gpr));
2158#endif
2159 } /* mch_rec */
2160 }
2161
2162 sc->routing_code_end = pc;
2163
2164 /* start DSP */
2165 if (sc->is_emu10k1) {
2166 emu_wrptr(sc, 0, EMU_DBG, 0);
2167 } else {
2168 emu_wrptr(sc, 0, EMU_A_DBG, 0);
2169 }
2170}
2171
2172/* /dev/em10kx */
2173static d_open_t emu10kx_open;
2174static d_close_t emu10kx_close;
2175static d_read_t emu10kx_read;
2176
2177static struct cdevsw emu10kx_cdevsw = {
2178 .d_open = emu10kx_open,
2179 .d_close = emu10kx_close,
2180 .d_read = emu10kx_read,
2181 .d_name = "emu10kx",
2182 .d_version = D_VERSION,
2183};
2184
2185static int
2186emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2187{
2188 int error;
2189 struct emu_sc_info *sc;
2190
2191 sc = i_dev->si_drv1;
2192 mtx_lock(&sc->emu10kx_lock);
2193 if (sc->emu10kx_isopen) {
2194 mtx_unlock(&sc->emu10kx_lock);
2195 return (EBUSY);
2196 }
2197 sc->emu10kx_isopen = 1;
2198 mtx_unlock(&sc->emu10kx_lock);
2199 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
2200 error = ENXIO;
2201 goto out;
2202 }
2203 sc->emu10kx_bufptr = 0;
2204 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
2205out:
2206 if (error) {
2207 mtx_lock(&sc->emu10kx_lock);
2208 sc->emu10kx_isopen = 0;
2209 mtx_unlock(&sc->emu10kx_lock);
2210 }
2211 return (error);
2212}
2213
2214static int
2215emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2216{
2217 struct emu_sc_info *sc;
2218
2219 sc = i_dev->si_drv1;
2220
2221 mtx_lock(&sc->emu10kx_lock);
2222 if (!(sc->emu10kx_isopen)) {
2223 mtx_unlock(&sc->emu10kx_lock);
2224 return (EBADF);
2225 }
2226 sbuf_delete(&sc->emu10kx_sbuf);
2227 sc->emu10kx_isopen = 0;
2228 mtx_unlock(&sc->emu10kx_lock);
2229
2230 return (0);
2231}
2232
2233static int
2234emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused)
2235{
2236 int l, err;
2237 struct emu_sc_info *sc;
2238
2239 sc = i_dev->si_drv1;
2240 mtx_lock(&sc->emu10kx_lock);
2241 if (!(sc->emu10kx_isopen)) {
2242 mtx_unlock(&sc->emu10kx_lock);
2243 return (EBADF);
2244 }
2245 mtx_unlock(&sc->emu10kx_lock);
2246
2247 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
2248 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
2249 sc->emu10kx_bufptr += l;
2250
2251 return (err);
2252}
2253
2254static int
2255emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
2256{
2257 int i;
2258
2259 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
2260 sbuf_printf(s, "\nHardware resource usage:\n");
2261 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
2262 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
2263 sbuf_printf(s, "Card supports");
2264 if (sc->has_ac97) {
2265 sbuf_printf(s, " AC97 codec");
2266 } else {
2267 sbuf_printf(s, " NO AC97 codec");
2268 }
2269 if (sc->has_51) {
2270 if (sc->has_71)
2271 sbuf_printf(s, " and 7.1 output");
2272 else
2273 sbuf_printf(s, " and 5.1 output");
2274 }
2275 if (sc->is_emu10k1)
2276 sbuf_printf(s, ", SBLive! DSP code");
2277 if (sc->is_emu10k2)
2278 sbuf_printf(s, ", Audigy DSP code");
2279 if (sc->is_ca0102)
2280 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
2281 if (sc->is_ca0108)
2282 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
2283 sbuf_printf(s, "\n");
2284 if (sc->broken_digital)
2285 sbuf_printf(s, "Digital mode unsupported\n");
2286 sbuf_printf(s, "\nInstalled devices:\n");
2287 for (i = 0; i < RT_COUNT; i++)
2288 if (sc->pcm[i] != NULL)
2289 if (device_is_attached(sc->pcm[i])) {
2290 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
2291 }
2292 if (sc->midi[0] != NULL)
2293 if (device_is_attached(sc->midi[0])) {
2294 sbuf_printf(s, "EMU10Kx MIDI Interface\n");
2295 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
2296 }
2297 if (sc->midi[1] != NULL)
2298 if (device_is_attached(sc->midi[1])) {
2299 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
2300 }
2301 if (sc->midi[0] != NULL)
2302 if (device_is_attached(sc->midi[0])) {
2303 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
2304 }
2305 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital");
2306
2307 sbuf_finish(s);
2308 return (sbuf_len(s));
2309}
2310
2311/* INIT & UNINIT */
2312static int
2313emu10kx_dev_init(struct emu_sc_info *sc)
2314{
2315 int unit;
2316
2317 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0);
2318 unit = device_get_unit(sc->dev);
2319
2320 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
2321 if (sc->cdev != NULL) {
2322 sc->cdev->si_drv1 = sc;
2323 return (0);
2324 }
2325 return (ENXIO);
2326}
2327
2328static int
2329emu10kx_dev_uninit(struct emu_sc_info *sc)
2330{
2331 mtx_lock(&sc->emu10kx_lock);
2332 if (sc->emu10kx_isopen) {
2333 mtx_unlock(&sc->emu10kx_lock);
2334 return (EBUSY);
2335 }
2336 if (sc->cdev)
2337 destroy_dev(sc->cdev);
2338 sc->cdev = NULL;
2339
2340 mtx_destroy(&sc->emu10kx_lock);
2341 return (0);
2342}
2343
2344/* resource manager */
2345int
2346emu_rm_init(struct emu_sc_info *sc)
2347{
2348 int i;
2349 int maxcount;
2350 struct emu_rm *rm;
2351
2352 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO);
2353 if (rm == NULL) {
2354 return (ENOMEM);
2355 }
2356 sc->rm = rm;
2357 rm->card = sc;
2358 maxcount = sc->num_gprs;
2359 rm->num_used = 0;
2360 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF);
2361 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
2362 for (i = 0; i < rm->num_gprs; i++)
2363 rm->allocmap[i] = 0;
2364 /* pre-allocate gpr[0] */
2365 rm->allocmap[0] = 1;
2366 rm->last_free_gpr = 1;
2367
2368 return (0);
2369}
2370
2371int
2372emu_rm_uninit(struct emu_sc_info *sc)
2373{
2374 int i;
2375
2376 if (sc->dbg_level > 1) {
2377 mtx_lock(&(sc->rm->gpr_lock));
2378 for (i = 1; i < sc->rm->last_free_gpr; i++)
2379 if (sc->rm->allocmap[i] > 0)
2380 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
2381 mtx_unlock(&(sc->rm->gpr_lock));
2382 }
2383
2384 mtx_destroy(&(sc->rm->gpr_lock));
2385 free(sc->rm, M_DEVBUF);
2386 return (0);
2387}
2388
2389static int
2390emu_rm_gpr_alloc(struct emu_rm *rm, int count)
2391{
2392 int i, j;
2393 int allocated_gpr;
2394
2395 allocated_gpr = rm->num_gprs;
2396 /* try fast way first */
2397 mtx_lock(&(rm->gpr_lock));
2398 if (rm->last_free_gpr + count <= rm->num_gprs) {
2399 allocated_gpr = rm->last_free_gpr;
2400 rm->last_free_gpr += count;
2401 rm->allocmap[allocated_gpr] = count;
2402 for (i = 1; i < count; i++)
2403 rm->allocmap[allocated_gpr + i] = -(count - i);
2404 } else {
2405 /* longer */
2406 i = 0;
2407 allocated_gpr = rm->num_gprs;
2408 while (i < rm->last_free_gpr - count) {
2409 if (rm->allocmap[i] > 0) {
2410 i += rm->allocmap[i];
2411 } else {
2412 allocated_gpr = i;
2413 for (j = 1; j < count; j++) {
2414 if (rm->allocmap[i + j] != 0)
2415 allocated_gpr = rm->num_gprs;
2416 }
2417 if (allocated_gpr == i)
2418 break;
2419 }
2420 }
2421 if (allocated_gpr + count < rm->last_free_gpr) {
2422 rm->allocmap[allocated_gpr] = count;
2423 for (i = 1; i < count; i++)
2424 rm->allocmap[allocated_gpr + i] = -(count - i);
2425 }
2426 }
2427 if (allocated_gpr == rm->num_gprs)
2428 allocated_gpr = (-1);
2429 if (allocated_gpr >= 0)
2430 rm->num_used += count;
2431 mtx_unlock(&(rm->gpr_lock));
2432 return (allocated_gpr);
2433}
2434
2435/* mixer */
2436void
2437emumix_set_mode(struct emu_sc_info *sc, int mode)
2438{
2439 uint32_t a_iocfg;
2440 uint32_t hcfg;
2441 uint32_t tmp;
2442
2443 switch (mode) {
2444 case MODE_DIGITAL:
2445 /* FALLTHROUGH */
2446 case MODE_ANALOG:
2447 break;
2448 default:
2449 return;
2450 }
2451
2452 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
2453 a_iocfg = 0;
2454
2455 if (sc->rev >= 6)
2456 hcfg |= EMU_HCFG_JOYENABLE;
2457
2458 if (sc->is_emu10k1)
2459 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
2460 else
2461 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
2462
2463 if (mode == MODE_DIGITAL) {
2464 if (sc->broken_digital) {
2465 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
2466 }
2467 a_iocfg |= EMU_A_IOCFG_GPOUT1;
2468 hcfg |= EMU_HCFG_GPOUT0;
2469 }
2470
2471 if (mode == MODE_ANALOG)
2472 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2473
2474 if (sc->is_emu10k2)
2475 a_iocfg |= 0x80; /* XXX */
2476
2477 if ((sc->is_ca0102) || (sc->is_ca0108))
2478 /*
2479 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
2480 * on diffrerent cards.
2481 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
2482 * "disable analog outs" on Audigy (emu10k2)
2483 */
2484 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
2485
2486 if (sc->is_ca0108)
2487 a_iocfg |= 0x20; /* XXX */
2488
2489 /* Mute analog center & subwoofer before mode change */
2490 if (mode == MODE_DIGITAL)
2491 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
2492
2493 emu_wr(sc, EMU_HCFG, hcfg, 4);
2494
2495 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2496 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2497 tmp = a_iocfg;
2498 emu_wr(sc, EMU_A_IOCFG, tmp, 2);
2499 }
2500
2501 /* Unmute if we have changed mode to analog. */
2502
2503 if (mode == MODE_ANALOG)
2504 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0);
2505
2506 sc->mode = mode;
2507}
2508
2509void
2510emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
2511{
2512 uint32_t spcs;
2513
2514 switch (mode) {
2515 case SPDIF_MODE_PCM:
2516 break;
2517 case SPDIF_MODE_AC3:
2518 device_printf(sc->dev, "AC3 mode does not work and disabled\n");
2519 return;
2520 default:
2521 return;
2522 }
2523
2524 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
2525 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
2526 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
2527 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
2528
2529 mode = SPDIF_MODE_PCM;
2530
2531 emu_wrptr(sc, 0, EMU_SPCS0, spcs);
2532 emu_wrptr(sc, 0, EMU_SPCS1, spcs);
2533 emu_wrptr(sc, 0, EMU_SPCS2, spcs);
2534}
2535
2536#define L2L_POINTS 10
2537
2538static int l2l_df[L2L_POINTS] = {
2539 0x572C5CA, /* 100..90 */
2540 0x3211625, /* 90..80 */
2541 0x1CC1A76, /* 80..70 */
2542 0x108428F, /* 70..60 */
2543 0x097C70A, /* 60..50 */
2544 0x0572C5C, /* 50..40 */
2545 0x0321162, /* 40..30 */
2546 0x01CC1A7, /* 30..20 */
2547 0x0108428, /* 20..10 */
2548 0x016493D /* 10..0 */
2549};
2550
2551static int l2l_f[L2L_POINTS] = {
2552 0x4984461A, /* 90 */
2553 0x2A3968A7, /* 80 */
2554 0x18406003, /* 70 */
2555 0x0DEDC66D, /* 60 */
2556 0x07FFFFFF, /* 50 */
2557 0x04984461, /* 40 */
2558 0x02A3968A, /* 30 */
2559 0x01840600, /* 20 */
2560 0x00DEDC66, /* 10 */
2561 0x00000000 /* 0 */
2562};
2563
2564static int
2565log2lin(int log_t)
2566{
2567 int lin_t;
2568 int idx, lin;
2569
2570 if (log_t <= 0) {
2571 lin_t = 0x00000000;
2572 return (lin_t);
2573 }
2574
2575 if (log_t >= 100) {
2576 lin_t = 0x7fffffff;
2577 return (lin_t);
2578 }
2579
2580 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
2581 lin = log_t % (L2L_POINTS);
2582 lin_t = l2l_df[idx] * lin + l2l_f[idx];
2583 return (lin_t);
2584}
2585
2586void
2587emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
2588{
2589
2590 vol = log2lin(vol);
2591 emumix_set_gpr(sc, gpr, vol);
2592}
2593
2594void
2595emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
2596{
2597 if (sc->dbg_level > 1)
2598 if (gpr == 0) {
2599 device_printf(sc->dev, "Zero gpr write access\n");
2600#ifdef KDB
2601 kdb_backtrace();
2602#endif
2603 return;
2604 }
2605
2606 emu_wrptr(sc, 0, GPR(gpr), val);
2607}
2608
2609void
2610emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
2611{
2612
2613 RANGE(volume, 0, 100);
2614 if (mixer_idx < NUM_MIXERS) {
2615 sc->mixer_volcache[mixer_idx] = volume;
2616 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
2617 }
2618}
2619
2620int
2621emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
2622{
2623 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
2624 return (sc->mixer_volcache[mixer_idx]);
2625 return (-1);
2626}
2627
2628/* Init CardBus part */
2629static int
2630emu_cardbus_init(struct emu_sc_info *sc)
2631{
2632
2633 /*
2634 * XXX May not need this if we have EMU_IPR3 handler.
2635 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
2636 * Looks much like "(data << 16) | register".
2637 */
2638 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
2639 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
2640 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
2641 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
2642
2643 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
2644
2645 return (0);
2646}
2647
2648/* Probe and attach the card */
2649static int
2650emu_init(struct emu_sc_info *sc)
2651{
2652 uint32_t ch, tmp;
2653 uint32_t spdif_sr;
2654 uint32_t ac97slot;
2655 int def_mode;
2656 int i;
2657
2658 /* disable audio and lock cache */
2659 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2660
2661 /* reset recording buffers */
2662 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2663 emu_wrptr(sc, 0, EMU_MICBA, 0);
2664 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2665 emu_wrptr(sc, 0, EMU_FXBA, 0);
2666 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2667 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2668
2669 /* disable channel interrupt */
2670 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
2671 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2672 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2673 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2674 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2675
2676 /* disable P16V and S/PDIF interrupts */
2677 if ((sc->is_ca0102) || (sc->is_ca0108))
2678 emu_wr(sc, EMU_INTE2, 0, 4);
2679
2680 if (sc->is_ca0102)
2681 emu_wr(sc, EMU_INTE3, 0, 4);
2682
2683 /* init phys inputs and outputs */
2684 ac97slot = 0;
2685 if (sc->has_51)
2686 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
2687 if (sc->has_71)
2688 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
2689 if (sc->is_emu10k2)
2690 ac97slot |= 0x40;
2691 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
2692
2693 if (sc->is_emu10k2) /* XXX for later cards? */
2694 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if
2695 * we write 1 here? */
2696
2697 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
2698 /* alignment */ 2, /* boundary */ 0,
2699 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */
2700 /* highaddr */ BUS_SPACE_MAXADDR,
2701 /* filter */ NULL, /* filterarg */ NULL,
2702 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
2703 /* flags */ 0, /* lockfunc */NULL, /* lockarg */NULL,
2704 &sc->mem.dmat) != 0) {
2705 device_printf(sc->dev, "unable to create dma tag\n");
2706 bus_dma_tag_destroy(sc->mem.dmat);
2707 return (ENOMEM);
2708 }
2709
2710 sc->mem.card = sc;
2711 SLIST_INIT(&sc->mem.blocks);
2712 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map);
2713 if (sc->mem.ptb_pages == NULL)
2714 return (ENOMEM);
2715
2716 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map);
2717 if (sc->mem.silent_page == NULL) {
2718 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2719 return (ENOMEM);
2720 }
2721 /* Clear page with silence & setup all pointers to this page */
2722 bzero(sc->mem.silent_page, EMUPAGESIZE);
2723 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
2724 for (i = 0; i < EMU_MAXPAGES; i++)
2725 sc->mem.ptb_pages[i] = tmp | i;
2726
2727 for (ch = 0; ch < NUM_G; ch++) {
2728 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
2729 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
2730 }
2731 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
2732 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */
2733 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */
2734
2735 /* init envelope engine */
2736 for (ch = 0; ch < NUM_G; ch++) {
2737 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2738 emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
2739 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
2740 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
2741 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2742 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2743 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
2744
2745 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
2746 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
2747 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
2748 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
2749 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
2750 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
2751
2752 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
2753 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
2754 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
2755 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
2756 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
2757 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */
2758 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */
2759 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
2760
2761 /*** these are last so OFF prevents writing ***/
2762 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
2763 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
2764 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
2765 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
2766 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
2767
2768 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2769 emu_wrptr(sc, ch, 0x4c, 0x0);
2770 emu_wrptr(sc, ch, 0x4d, 0x0);
2771 emu_wrptr(sc, ch, 0x4e, 0x0);
2772 emu_wrptr(sc, ch, 0x4f, 0x0);
2773 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f);
2774 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
2775 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0);
2776 }
2777 }
2778
2779 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2780
2781 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2782 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000);
2783
2784 /*
2785 * CAxxxx cards needs additional setup:
2786 * 1. Set I2S capture sample rate to 96000
2787 * 2. Disable P16v / P17v proceesing
2788 * 3. Allow EMU10K DSP inputs
2789 */
2790 if ((sc->is_ca0102) || (sc->is_ca0108)) {
2791 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE);
2792 spdif_sr &= 0xfffff1ff;
2793 spdif_sr |= EMU_A_I2S_CAPTURE_96000;
2794 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr);
2795
2796 /* Disable P16v processing */
2797 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14);
2798
2799 /* Setup P16v/P17v sound routing */
2800 if (sc->is_ca0102)
2801 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00);
2802 else {
2803 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000);
2804 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000);
2805
2806 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2807 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2);
2808 }
2809 }
2810 emu_initefx(sc);
2811
2812 def_mode = MODE_ANALOG;
2813 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2814 def_mode = MODE_DIGITAL;
2815 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
2816 device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
2817 def_mode = MODE_ANALOG;
2818 }
2819 emumix_set_mode(sc, def_mode);
2820
2821 if (bootverbose) {
2822 tmp = emu_rd(sc, EMU_HCFG, 4);
2823 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp);
2824 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
2825 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
2826 (tmp & 0x40000000 ? "[0x40] " : ""),
2827 (tmp & 0x20000000 ? "[0x20] " : ""),
2828 (tmp & 0x10000000 ? "[0x10] " : ""),
2829 (tmp & 0x08000000 ? "[0x08] " : ""),
2830 (tmp & 0x04000000 ? "[0x04] " : ""),
2831 (tmp & 0x02000000 ? "[0x02] " : ""),
2832 (tmp & 0x01000000 ? "[0x01]" : " "));
2833 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
2834 (tmp & 0x00800000 ? "[0x80] " : ""),
2835 (tmp & 0x00400000 ? "[0x40] " : ""),
2836 (tmp & 0x00200000 ? "[Legacy INT] " : ""),
2837 (tmp & 0x00100000 ? "[0x10] " : ""),
2838 (tmp & 0x00080000 ? "[0x08] " : ""),
2839 (tmp & 0x00040000 ? "[Codec4] " : ""),
2840 (tmp & 0x00020000 ? "[Codec2] " : ""),
2841 (tmp & 0x00010000 ? "[I2S Codec]" : " "));
2842 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
2843 (tmp & 0x00008000 ? "[0x80] " : ""),
2844 (tmp & 0x00004000 ? "[GPINPUT0] " : ""),
2845 (tmp & 0x00002000 ? "[GPINPUT1] " : ""),
2846 (tmp & 0x00001000 ? "[GPOUT0] " : ""),
2847 (tmp & 0x00000800 ? "[GPOUT1] " : ""),
2848 (tmp & 0x00000400 ? "[GPOUT2] " : ""),
2849 (tmp & 0x00000200 ? "[Joystick] " : ""),
2850 (tmp & 0x00000100 ? "[0x01]" : " "));
2851 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
2852 (tmp & 0x00000080 ? "[0x80] " : ""),
2853 (tmp & 0x00000040 ? "[0x40] " : ""),
2854 (tmp & 0x00000020 ? "[0x20] " : ""),
2855 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
2856 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
2857 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
2858 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
2859 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
2860
2861 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2862 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2863 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp);
2864 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )");
2865 printf(" : %s%s%s%s%s%s%s%s\n",
2866 (tmp & 0x8000 ? "[Rear Speakers] " : ""),
2867 (tmp & 0x4000 ? "[Front Speakers] " : ""),
2868 (tmp & 0x2000 ? "[0x20] " : ""),
2869 (tmp & 0x1000 ? "[0x10] " : ""),
2870 (tmp & 0x0800 ? "[0x08] " : ""),
2871 (tmp & 0x0400 ? "[0x04] " : ""),
2872 (tmp & 0x0200 ? "[0x02] " : ""),
2873 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
2874 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )");
2875 printf(" : %s%s%s%s%s%s%s%s\n",
2876 (tmp & 0x0080 ? "[0x80] " : ""),
2877 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
2878 (tmp & 0x0020 ? "[0x20] " : ""),
2879 (tmp & 0x0010 ? "[0x10] " : ""),
2880 (tmp & 0x0008 ? "[0x08] " : ""),
2881 (tmp & 0x0004 ? "[GPOUT0] " : ""),
2882 (tmp & 0x0002 ? "[GPOUT1] " : ""),
2883 (tmp & 0x0001 ? "[GPOUT2]" : " "));
2884 } /* is_emu10k2 or ca* */
2885 } /* bootverbose */
2886 return (0);
2887}
2888
2889static int
2890emu_uninit(struct emu_sc_info *sc)
2891{
2892 uint32_t ch;
2893 struct emu_memblk *blk;
2894
2895 emu_wr(sc, EMU_INTE, 0, 4);
2896 for (ch = 0; ch < NUM_G; ch++)
2897 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2898 for (ch = 0; ch < NUM_G; ch++) {
2899 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
2900 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
2901 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2902 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2903 }
2904
2905 /* disable audio and lock cache */
2906 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2907
2908 emu_wrptr(sc, 0, EMU_PTB, 0);
2909 /* reset recording buffers */
2910 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2911 emu_wrptr(sc, 0, EMU_MICBA, 0);
2912 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2913 emu_wrptr(sc, 0, EMU_FXBA, 0);
2914 emu_wrptr(sc, 0, EMU_FXWC, 0);
2915 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2916 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2917 emu_wrptr(sc, 0, EMU_TCB, 0);
2918 emu_wrptr(sc, 0, EMU_TCBS, 0);
2919
2920 /* disable channel interrupt */
2921 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2922 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2923 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2924 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2925
2926 if (!SLIST_EMPTY(&sc->mem.blocks))
2927 device_printf(sc->dev, "warning: memblock list not empty\n");
2928
2929 SLIST_FOREACH(blk, &sc->mem.blocks, link)
2930 if (blk != NULL)
2931 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
2932
2933 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2934 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map);
2935
2936 return (0);
2937}
2938
2939static int
2940emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
2941{
2942 struct sndcard_func *func = device_get_ivars(dev);
2943 struct emu_sc_info *sc = device_get_softc(bus);
2944
2945 if (func==NULL)
2946 return (ENOMEM);
2947 if (sc == NULL)
2948 return (ENOMEM);
2949
2950 switch (ivar_index) {
2951 case EMU_VAR_FUNC:
2952 *result = func->func;
2953 break;
2954 case EMU_VAR_ROUTE:
2955 if (func->varinfo == NULL)
2956 return (ENOMEM);
2957 *result = ((struct emu_pcminfo *)func->varinfo)->route;
2958 break;
2959 case EMU_VAR_ISEMU10K1:
2960 *result = sc->is_emu10k1;
2961 break;
2962 case EMU_VAR_MCH_DISABLED:
2963 *result = sc->mch_disabled;
2964 break;
2965 case EMU_VAR_MCH_REC:
2966 *result = sc->mch_rec;
2967 break;
2968 default:
2969 return (ENOENT);
2970 }
2971
2972 return (0);
2973}
2974
2975static int
2976emu_write_ivar(device_t bus __unused, device_t dev __unused,
2977 int ivar_index, uintptr_t value __unused)
2978{
2979
2980 switch (ivar_index) {
2981 case 0:
2982 return (EINVAL);
2983
2984 default:
2985 return (ENOENT);
2986 }
2987}
2988
2989static int
2990emu_pci_probe(device_t dev)
2991{
2992 struct sbuf *s;
2993 unsigned int thiscard = 0;
2994 uint16_t vendor;
2995
2996 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
2997 if (vendor != 0x1102)
2998 return (ENXIO); /* Not Creative */
2999
3000 thiscard = emu_getcard(dev);
3001 if (thiscard == 0)
3002 return (ENXIO);
3003
3004 s = sbuf_new(NULL, NULL, 4096, 0);
3005 if (s == NULL)
3006 return (ENOMEM);
3007 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
3008 sbuf_finish(s);
3009
3010 device_set_desc_copy(dev, sbuf_data(s));
3011
3012 sbuf_delete(s);
3013
3014 return (BUS_PROBE_DEFAULT);
3015}
3016
3017static int
3018emu_pci_attach(device_t dev)
3019{
3020 struct sndcard_func *func;
3021 struct emu_sc_info *sc;
3022 struct emu_pcminfo *pcminfo;
3023#if 0
3024 struct emu_midiinfo *midiinfo;
3025#endif
3026 int i;
3027 int device_flags;
3028 char status[255];
3029 int error = ENXIO;
3030 int unit;
3031
3032 sc = device_get_softc(dev);
3033 unit = device_get_unit(dev);
3034
3035 /* Get configuration */
3036
3037 sc->ctx = device_get_sysctl_ctx(dev);
3038 if (sc->ctx == NULL)
3039 goto bad;
3040 sc->root = device_get_sysctl_tree(dev);
3041 if (sc->root == NULL)
3042 goto bad;
3043
3044 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled)))
3045 RANGE(sc->mch_disabled, 0, 1);
3046 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3047 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3048 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting");
3049
3050 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec)))
3051 RANGE(sc->mch_rec, 0, 1);
3052 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3053 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3054 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting");
3055
3056 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level)))
3057 RANGE(sc->mch_rec, 0, 2);
3058 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3059 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3060 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level");
3061
3062 /* Fill in the softc. */
3063 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF);
3064 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF);
3065 sc->dev = dev;
3066 sc->type = pci_get_devid(dev);
3067 sc->rev = pci_get_revid(dev);
3068 sc->enable_ir = 0;
3069 sc->has_ac97 = 0;
3070 sc->has_51 = 0;
3071 sc->has_71 = 0;
3072 sc->broken_digital = 0;
3073 sc->is_emu10k1 = 0;
3074 sc->is_emu10k2 = 0;
3075 sc->is_ca0102 = 0;
3076 sc->is_ca0108 = 0;
3077 sc->is_cardbus = 0;
3078
3079 device_flags = emu_cards[emu_getcard(dev)].flags;
3080 if (device_flags & HAS_51)
3081 sc->has_51 = 1;
3082 if (device_flags & HAS_71) {
3083 sc->has_51 = 1;
3084 sc->has_71 = 1;
3085 }
3086 if (device_flags & IS_EMU10K1)
3087 sc->is_emu10k1 = 1;
3088 if (device_flags & IS_EMU10K2)
3089 sc->is_emu10k2 = 1;
3090 if (device_flags & IS_CA0102)
3091 sc->is_ca0102 = 1;
3092 if (device_flags & IS_CA0108)
3093 sc->is_ca0108 = 1;
3094 if ((sc->is_emu10k2) && (sc->rev == 4)) {
3095 sc->is_emu10k2 = 0;
3096 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */
3097 }
3098 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
3099 if (device_flags & IS_CARDBUS)
3100 sc->is_cardbus = 1;
3101
3102 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
3103 device_printf(sc->dev, "Unable to detect HW chipset\n");
3104 goto bad;
3105 }
3106 if (device_flags & BROKEN_DIGITAL)
3107 sc->broken_digital = 1;
3108 if (device_flags & HAS_AC97)
3109 sc->has_ac97 = 1;
3110
3111 sc->opcode_shift = 0;
3112 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
3113 sc->opcode_shift = 24;
3114 sc->high_operand_shift = 12;
3115
3116 /* DSP map */
3117 /* sc->fx_base = 0x0 */
3118 sc->input_base = 0x40;
3119 /* sc->p16vinput_base = 0x50; */
3120 sc->output_base = 0x60;
3121 sc->efxc_base = 0x80;
3122 /* sc->output32h_base = 0xa0; */
3123 /* sc->output32l_base = 0xb0; */
3124 sc->dsp_zero = 0xc0;
3125 /* 0xe0...0x100 are unknown */
3126 /* sc->tram_base = 0x200 */
3127 /* sc->tram_addr_base = 0x300 */
3128 sc->gpr_base = EMU_A_FXGPREGBASE;
3129 sc->num_gprs = 0x200;
3130 sc->code_base = EMU_A_MICROCODEBASE;
3131 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words,
3132 * 1024 instructions */
3133
3134 sc->mchannel_fx = 8;
3135 sc->num_fxbuses = 16;
3136 sc->num_inputs = 8;
3137 sc->num_outputs = 16;
3138 sc->address_mask = EMU_A_PTR_ADDR_MASK;
3139 }
3140 if (sc->is_emu10k1) {
3141 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */
3142 sc->opcode_shift = 20;
3143 sc->high_operand_shift = 10;
3144 sc->code_base = EMU_MICROCODEBASE;
3145 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words,
3146 * 512 instructions */
3147 sc->gpr_base = EMU_FXGPREGBASE;
3148 sc->num_gprs = 0x100;
3149 sc->input_base = 0x10;
3150 sc->output_base = 0x20;
3151 /*
3152 * XXX 5.1 Analog outputs are inside efxc address space!
3153 * They use output+0x11/+0x12 (=efxc+1/+2).
3154 * Don't use this efx registers for recording on SB Live! 5.1!
3155 */
3156 sc->efxc_base = 0x30;
3157 sc->dsp_zero = 0x40;
3158 sc->mchannel_fx = 0;
3159 sc->num_fxbuses = 8;
3160 sc->num_inputs = 8;
3161 sc->num_outputs = 16;
3162 sc->address_mask = EMU_PTR_ADDR_MASK;
3163 }
3164 if (sc->opcode_shift == 0)
3165 goto bad;
3166
3167 pci_enable_busmaster(dev);
3168
3169 i = PCIR_BAR(0);
3170 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
3171 if (sc->reg == NULL) {
3172 device_printf(dev, "unable to map register space\n");
3173 goto bad;
3174 }
3175 sc->st = rman_get_bustag(sc->reg);
3176 sc->sh = rman_get_bushandle(sc->reg);
3177
3178 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
3179 sc->timer[i] = 0; /* disable it */
3180
3181 i = 0;
3182 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
3183 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
3184 NULL,
3185 emu_intr, sc, &sc->ih)) {
3186 device_printf(dev, "unable to map interrupt\n");
3187 goto bad;
3188 }
3189 if (emu_rm_init(sc) != 0) {
3190 device_printf(dev, "unable to create resource manager\n");
3191 goto bad;
3192 }
3193 if (sc->is_cardbus)
3194 if (emu_cardbus_init(sc) != 0) {
3195 device_printf(dev, "unable to initialize CardBus interface\n");
3196 goto bad;
3197 }
3198 if (emu_init(sc) != 0) {
3199 device_printf(dev, "unable to initialize the card\n");
3200 goto bad;
3201 }
3202 if (emu10kx_dev_init(sc) != 0) {
3203 device_printf(dev, "unable to create control device\n");
3204 goto bad;
3205 }
3206 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
3207
3208 /* Voices */
3209 for (i = 0; i < NUM_G; i++) {
3210 sc->voice[i].vnum = i;
3211 sc->voice[i].slave = NULL;
3212 sc->voice[i].busy = 0;
3213 sc->voice[i].ismaster = 0;
3214 sc->voice[i].running = 0;
3215 sc->voice[i].b16 = 0;
3216 sc->voice[i].stereo = 0;
3217 sc->voice[i].speed = 0;
3218 sc->voice[i].start = 0;
3219 sc->voice[i].end = 0;
3220 }
3221
3222 /* PCM Audio */
3223 for (i = 0; i < RT_COUNT; i++)
3224 sc->pcm[i] = NULL;
3225
3226 /* FRONT */
3227 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3228 if (func == NULL) {
3229 error = ENOMEM;
3230 goto bad;
3231 }
3232 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3233 if (pcminfo == NULL) {
3234 error = ENOMEM;
3235 goto bad;
3236 }
3237 pcminfo->card = sc;
3238 pcminfo->route = RT_FRONT;
3239
3240 func->func = SCF_PCM;
3241 func->varinfo = pcminfo;
3242 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
3243 device_set_ivars(sc->pcm[RT_FRONT], func);
3244
3245 if (!(sc->mch_disabled)) {
3246 /* REAR */
3247 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3248 if (func == NULL) {
3249 error = ENOMEM;
3250 goto bad;
3251 }
3252 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3253 if (pcminfo == NULL) {
3254 error = ENOMEM;
3255 goto bad;
3256 }
3257 pcminfo->card = sc;
3258 pcminfo->route = RT_REAR;
3259
3260 func->func = SCF_PCM;
3261 func->varinfo = pcminfo;
3262 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
3263 device_set_ivars(sc->pcm[RT_REAR], func);
3264 if (sc->has_51) {
3265 /* CENTER */
3266 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3267 if (func == NULL) {
3268 error = ENOMEM;
3269 goto bad;
3270 }
3271 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3272 if (pcminfo == NULL) {
3273 error = ENOMEM;
3274 goto bad;
3275 }
3276 pcminfo->card = sc;
3277 pcminfo->route = RT_CENTER;
3278
3279 func->func = SCF_PCM;
3280 func->varinfo = pcminfo;
3281 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
3282 device_set_ivars(sc->pcm[RT_CENTER], func);
3283 /* SUB */
3284 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3285 if (func == NULL) {
3286 error = ENOMEM;
3287 goto bad;
3288 }
3289 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3290 if (pcminfo == NULL) {
3291 error = ENOMEM;
3292 goto bad;
3293 }
3294 pcminfo->card = sc;
3295 pcminfo->route = RT_SUB;
3296
3297 func->func = SCF_PCM;
3298 func->varinfo = pcminfo;
3299 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
3300 device_set_ivars(sc->pcm[RT_SUB], func);
3301 }
3302 if (sc->has_71) {
3303 /* SIDE */
3304 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3305 if (func == NULL) {
3306 error = ENOMEM;
3307 goto bad;
3308 }
3309 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3310 if (pcminfo == NULL) {
3311 error = ENOMEM;
3312 goto bad;
3313 }
3314 pcminfo->card = sc;
3315 pcminfo->route = RT_SIDE;
3316
3317 func->func = SCF_PCM;
3318 func->varinfo = pcminfo;
3319 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
3320 device_set_ivars(sc->pcm[RT_SIDE], func);
3321 }
3322 } /* mch_disabled */
3323
3324 if (sc->mch_rec) {
3325 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3326 if (func == NULL) {
3327 error = ENOMEM;
3328 goto bad;
3329 }
3330 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3331 if (pcminfo == NULL) {
3332 error = ENOMEM;
3333 goto bad;
3334 }
3335 pcminfo->card = sc;
3336 pcminfo->route = RT_MCHRECORD;
3337
3338 func->func = SCF_PCM;
3339 func->varinfo = pcminfo;
3340 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
3341 device_set_ivars(sc->pcm[RT_MCHRECORD], func);
3342 } /*mch_rec */
3343
3344 for (i = 0; i < 2; i++)
3345 sc->midi[i] = NULL;
3346
3347 /* MIDI has some memory mangament and (possible) locking problems */
3348#if 0
3349 /* Midi Interface 1: Live!, Audigy, Audigy 2 */
3350 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
3351 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3352 if (func == NULL) {
3353 error = ENOMEM;
3354 goto bad;
3355 }
3356 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3357 if (midiinfo == NULL) {
3358 error = ENOMEM;
3359 goto bad;
3360 }
3361 midiinfo->card = sc;
3362 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3363 midiinfo->port = EMU_A_MUDATA1;
3364 midiinfo->portnr = 1;
3365 }
3366 if (sc->is_emu10k1) {
3367 midiinfo->port = MUDATA;
3368 midiinfo->portnr = 1;
3369 }
3370 func->func = SCF_MIDI;
3371 func->varinfo = midiinfo;
3372 sc->midi[0] = device_add_child(dev, "midi", -1);
3373 device_set_ivars(sc->midi[0], func);
3374 }
3375 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
3376 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3377 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3378 if (func == NULL) {
3379 error = ENOMEM;
3380 goto bad;
3381 }
3382 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3383 if (midiinfo == NULL) {
3384 error = ENOMEM;
3385 goto bad;
3386 }
3387 midiinfo->card = sc;
3388
3389 midiinfo->port = EMU_A_MUDATA2;
3390 midiinfo->portnr = 2;
3391
3392 func->func = SCF_MIDI;
3393 func->varinfo = midiinfo;
3394 sc->midi[1] = device_add_child(dev, "midi", -1);
3395 device_set_ivars(sc->midi[1], func);
3396 }
3397#endif
3398 return (bus_generic_attach(dev));
3399
3400bad:
3401 /* XXX can we just call emu_pci_detach here? */
3402 if (sc->cdev)
3403 emu10kx_dev_uninit(sc);
3404 if (sc->rm != NULL)
3405 emu_rm_uninit(sc);
3406 if (sc->reg)
3407 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3408 if (sc->ih)
3409 bus_teardown_intr(dev, sc->irq, sc->ih);
3410 if (sc->irq)
3411 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3412 mtx_destroy(&sc->rw);
3413 mtx_destroy(&sc->lock);
3414 return (error);
3415}
3416
3417static int
3418emu_pci_detach(device_t dev)
3419{
3420 struct emu_sc_info *sc;
3421 struct sndcard_func *func;
3422 int devcount, i;
3423 device_t *childlist;
3424 int r = 0;
3425
3426 sc = device_get_softc(dev);
3427
3428 for (i = 0; i < RT_COUNT; i++) {
3429 if (sc->pcm[i] != NULL) {
3430 func = device_get_ivars(sc->pcm[i]);
3431 if (func != NULL && func->func == SCF_PCM) {
3432 device_set_ivars(sc->pcm[i], NULL);
3433 free(func->varinfo, M_DEVBUF);
3434 free(func, M_DEVBUF);
3435 }
3436 r = device_delete_child(dev, sc->pcm[i]);
3437 if (r) return (r);
3438 }
3439 }
3440
3441 if (sc->midi[0] != NULL) {
3442 func = device_get_ivars(sc->midi[0]);
3443 if (func != NULL && func->func == SCF_MIDI) {
3444 device_set_ivars(sc->midi[0], NULL);
3445 free(func->varinfo, M_DEVBUF);
3446 free(func, M_DEVBUF);
3447 }
3448 r = device_delete_child(dev, sc->midi[0]);
3449 if (r) return (r);
3450 }
3451
3452 if (sc->midi[1] != NULL) {
3453 func = device_get_ivars(sc->midi[1]);
3454 if (func != NULL && func->func == SCF_MIDI) {
3455 device_set_ivars(sc->midi[1], NULL);
3456 free(func->varinfo, M_DEVBUF);
3457 free(func, M_DEVBUF);
3458 }
3459 r = device_delete_child(dev, sc->midi[1]);
3460 if (r) return (r);
3461 }
3462
3463 if (device_get_children(dev, &childlist, &devcount) == 0)
3464 for (i = 0; i < devcount - 1; i++) {
3465 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
3466 func = device_get_ivars(childlist[i]);
3467 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) {
3468 device_set_ivars(childlist[i], NULL);
3469 free(func->varinfo, M_DEVBUF);
3470 free(func, M_DEVBUF);
3471 }
3472 device_delete_child(dev, childlist[i]);
3473 }
3474 if (childlist != NULL)
3475 free(childlist, M_TEMP);
3476
3477 r = emu10kx_dev_uninit(sc);
3478 if (r)
3479 return (r);
3480
3481 /* shutdown chip */
3482 emu_uninit(sc);
3483 emu_rm_uninit(sc);
3484
3485 if (sc->mem.dmat)
3486 bus_dma_tag_destroy(sc->mem.dmat);
3487
3488 if (sc->reg)
3489 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3490 bus_teardown_intr(dev, sc->irq, sc->ih);
3491 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3492 mtx_destroy(&sc->rw);
3493 mtx_destroy(&sc->lock);
3494
3495 return (bus_generic_detach(dev));
3496}
3497/* add suspend, resume */
3498static device_method_t emu_methods[] = {
3499 /* Device interface */
3500 DEVMETHOD(device_probe, emu_pci_probe),
3501 DEVMETHOD(device_attach, emu_pci_attach),
3502 DEVMETHOD(device_detach, emu_pci_detach),
3503 /* Bus methods */
3504 DEVMETHOD(bus_read_ivar, emu_read_ivar),
3505 DEVMETHOD(bus_write_ivar, emu_write_ivar),
3506
3507 DEVMETHOD_END
3508};
3509
3510static driver_t emu_driver = {
3511 "emu10kx",
3512 emu_methods,
3513 sizeof(struct emu_sc_info),
3514 NULL,
3515 0,
3516 NULL
3517};
3518
3519static int
3520emu_modevent(module_t mod __unused, int cmd, void *data __unused)
3521{
3522 int err = 0;
3523
3524 switch (cmd) {
3525 case MOD_LOAD:
3526 break; /* Success */
3527
3528 case MOD_UNLOAD:
3529 case MOD_SHUTDOWN:
3530
3531 /* XXX Should we check state of pcm & midi subdevices here? */
3532
3533 break; /* Success */
3534
3535 default:
3536 err = EINVAL;
3537 break;
3538 }
3539
3540 return (err);
3541
3542}
3543
3544static devclass_t emu_devclass;
3545
3546DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
3547MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);
data
u_int32_t data
Definition: ac97_if.m:60
regno
int regno
Definition: ac97_if.m:53
desc
char * desc
Definition: atiixp.c:174
vendor
uint16_t vendor
Definition: atiixp.c:172
rate
uint32_t rate
Definition: audio_dai_if.m:58
go
int go
Definition: audio_dai_if.m:64
fmt
unsigned int fmt
Definition: audio_soc.c:91
sndbuf_setup
int sndbuf_setup(struct snd_dbuf *b, void *buf, unsigned int size)
Definition: buffer.c:123
SLIST_HEAD
SLIST_HEAD(pcm_synclist, pcmchan_syncgroup) snd_pcm_syncgroups
free
METHOD int free
Definition: channel_if.m:110
channel
INTERFACE channel
Definition: channel_if.m:35
m
struct pcmchan_matrix * m
Definition: channel_if.m:232
b
struct snd_dbuf * b
Definition: channel_if.m:105
SCF_PCM
@ SCF_PCM
Definition: chip.h:36
SCF_MIDI
@ SCF_MIDI
Definition: chip.h:37
spd
uint32_t spd
Definition: dsp.c:394
NUM_G
#define NUM_G
Definition: emu10k1.c:50
EMU_HCFG_GPOUT1
#define EMU_HCFG_GPOUT1
Definition: emu10k1.c:78
EMUPAGESIZE
#define EMUPAGESIZE
Definition: emu10k1.c:52
emu_rd
uint32_t emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
Definition: emu10kx.c:763
IS_EMU10K2
#define IS_EMU10K2
Definition: emu10kx.c:67
IN_SPDIF_CD_L
#define IN_SPDIF_CD_L
Definition: emu10kx.c:121
EMU_INTE3
#define EMU_INTE3
Definition: emu10kx.c:227
IN_ZOOM_L
#define IN_ZOOM_L
Definition: emu10kx.c:124
A_IN_R_SPDIF_L
#define A_IN_R_SPDIF_L
Definition: emu10kx.c:180
ANALOGMUTE
#define ANALOGMUTE
Definition: emu10kx.c:250
emu_timer_clear
int emu_timer_clear(struct emu_sc_info *sc, int timer)
Definition: emu10kx.c:897
A_IN_SPDIF_CD_R
#define A_IN_SPDIF_CD_R
Definition: emu10kx.c:172
SPDIF_MODE_AC3
#define SPDIF_MODE_AC3
Definition: emu10kx.c:80
emu_rm_gpr_alloc
static int emu_rm_gpr_alloc(struct emu_rm *rm, int count)
Definition: emu10kx.c:2390
log2lin
static int log2lin(int log_t)
Definition: emu10kx.c:2565
C_REC_L
#define C_REC_L
Definition: emu10kx.c:239
MACS
#define MACS
Definition: emu10kx.c:82
A_OUT_D_REAR_R
#define A_OUT_D_REAR_R
Definition: emu10kx.c:197
IS_CA0108
#define IS_CA0108
Definition: emu10kx.c:69
IN_LINE2_L
#define IN_LINE2_L
Definition: emu10kx.c:136
OUT_D_CENTER
#define OUT_D_CENTER
Definition: emu10kx.c:150
OUT_REAR_R
#define OUT_REAR_R
Definition: emu10kx.c:156
EMU_A_I2S_CAPTURE_96000
#define EMU_A_I2S_CAPTURE_96000
Definition: emu10kx.c:232
C_CENTER
#define C_CENTER
Definition: emu10kx.c:243
emu_vroute
void emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
Definition: emu10kx.c:1355
C_FRONT_R
#define C_FRONT_R
Definition: emu10kx.c:238
IN_COAX_SPDIF_R
#define IN_COAX_SPDIF_R
Definition: emu10kx.c:134
EMU_DATA2
#define EMU_DATA2
Definition: emu10kx.c:223
A_OUT_A_CENTER
#define A_OUT_A_CENTER
Definition: emu10kx.c:208
EFX_ROUTE
#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF)
Definition: emu10kx.c:1634
emu_timer_set
int emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
Definition: emu10kx.c:831
emu_vinit
int emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, uint32_t sz, struct snd_dbuf *b)
Definition: emu10kx.c:1289
emumix_set_volume
void emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
Definition: emu10kx.c:2610
emu_vsetup
void emu_vsetup(struct emu_voice *v, int fmt, int spd)
Definition: emu10kx.c:1337
C_SIDE_L
#define C_SIDE_L
Definition: emu10kx.c:245
emu_vwrite
void emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
Definition: emu10kx.c:1374
OUT_A_CENTER
#define OUT_A_CENTER
Definition: emu10kx.c:164
emu_driver
static driver_t emu_driver
Definition: emu10kx.c:3510
A_OUT_D_SIDE_R
#define A_OUT_D_SIDE_R
Definition: emu10kx.c:194
emu_rdptr
uint32_t emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
Definition: emu10kx.c:649
FX
#define FX(i)
Definition: emu10kx.c:102
C_SUB
#define C_SUB
Definition: emu10kx.c:244
C_REAR_L
#define C_REAR_L
Definition: emu10kx.c:241
EMU_IPR3
#define EMU_IPR3
Definition: emu10kx.c:226
emu_wr_p16vptr
void emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
Definition: emu10kx.c:721
C_REAR_R
#define C_REAR_R
Definition: emu10kx.c:242
emu_initefx
static void emu_initefx(struct emu_sc_info *sc)
Definition: emu10kx.c:1693
A_OUT_A_FRONT_L
#define A_OUT_A_FRONT_L
Definition: emu10kx.c:205
IS_CARDBUS
#define IS_CARDBUS
Definition: emu10kx.c:75
A_IN_AC97_R
#define A_IN_AC97_R
Definition: emu10kx.c:169
A_IN_SPDIF_CD_L
#define A_IN_SPDIF_CD_L
Definition: emu10kx.c:171
A_OUT_A_SIDE_R
#define A_OUT_A_SIDE_R
Definition: emu10kx.c:211
emu_addefxop
static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t *pc)
Definition: emu10kx.c:1517
DRIVER_MODULE
DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL)
emu_wr_cbptr
static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
Definition: emu10kx.c:733
emu_init
static int emu_init(struct emu_sc_info *sc)
Definition: emu10kx.c:2650
emu10kx_read
static d_read_t emu10kx_read
Definition: emu10kx.c:2175
HAS_AC97
#define HAS_AC97
Definition: emu10kx.c:64
C_FRONT_L
#define C_FRONT_L
Definition: emu10kx.c:237
IN_COAX_SPDIF_L
#define IN_COAX_SPDIF_L
Definition: emu10kx.c:133
NUM_MUTE
#define NUM_MUTE
Definition: emu10kx.c:251
DSP_CONST
#define DSP_CONST(i)
Definition: emu10kx.c:104
DIGITAL_ONLY
#define DIGITAL_ONLY
Definition: emu10kx.c:73
A_IN_AUX2_R
#define A_IN_AUX2_R
Definition: emu10kx.c:184
HAS_51
#define HAS_51
Definition: emu10kx.c:62
emu_modevent
static int emu_modevent(module_t mod __unused, int cmd, void *data __unused)
Definition: emu10kx.c:3520
EMU_MAX_IRQ_CONSUMERS
#define EMU_MAX_IRQ_CONSUMERS
Definition: emu10kx.c:254
A_OUT_A_REAR_L
#define A_OUT_A_REAR_L
Definition: emu10kx.c:213
emu_read_ivar
static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t *result)
Definition: emu10kx.c:2940
MODE_DIGITAL
#define MODE_DIGITAL
Definition: emu10kx.c:78
IN_SPDIF_CD_R
#define IN_SPDIF_CD_R
Definition: emu10kx.c:122
OUT_ADC_REC_R
#define OUT_ADC_REC_R
Definition: emu10kx.c:159
emu_pci_detach
static int emu_pci_detach(device_t dev)
Definition: emu10kx.c:3418
OUT_AC97_R
#define OUT_AC97_R
Definition: emu10kx.c:144
emu_valloc
struct emu_voice * emu_valloc(struct emu_sc_info *sc)
Definition: emu10kx.c:1251
emu_write_ivar
static int emu_write_ivar(device_t bus __unused, device_t dev __unused, int ivar_index, uintptr_t value __unused)
Definition: emu10kx.c:2976
emu_intr_register
int emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func)(void *softc, uint32_t irq), void *isc)
Definition: emu10kx.c:918
OUT_HEADPHONE_R
#define OUT_HEADPHONE_R
Definition: emu10kx.c:153
emu_vfree
void emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
Definition: emu10kx.c:1268
OUT_ADC_REC_L
#define OUT_ADC_REC_L
Definition: emu10kx.c:158
emu_timer_enable
int emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
Definition: emu10kx.c:855
A_OUT_D_REAR_L
#define A_OUT_D_REAR_L
Definition: emu10kx.c:196
NUM_CACHES
#define NUM_CACHES
Definition: emu10kx.c:247
emu10kx_dev_init
static int emu10kx_dev_init(struct emu_sc_info *sc)
Definition: emu10kx.c:2313
emumix_get_volume
int emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
Definition: emu10kx.c:2621
l2l_f
static int l2l_f[L2L_POINTS]
Definition: emu10kx.c:2551
EMU_RWLOCK
#define EMU_RWLOCK()
Definition: emu10kx.c:449
emu_addefxmixer
static int emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
Definition: emu10kx.c:1552
emu_vstop
static void emu_vstop(struct emu_sc_info *sc, char channel, int enable)
Definition: emu10kx.c:1445
emu_wr
void emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
Definition: emu10kx.c:754
IN_AC97_R
#define IN_AC97_R
Definition: emu10kx.c:119
MODE_ANALOG
#define MODE_ANALOG
Definition: emu10kx.c:77
A_OUT_D_SUB
#define A_OUT_D_SUB
Definition: emu10kx.c:192
emu10kx_close
static d_close_t emu10kx_close
Definition: emu10kx.c:2174
A_IN_LINE2_R
#define A_IN_LINE2_R
Definition: emu10kx.c:178
A_OUT_HPHONE_L
#define A_OUT_HPHONE_L
Definition: emu10kx.c:201
emumix_set_mode
static void emumix_set_mode(struct emu_sc_info *sc, int mode)
Definition: emu10kx.c:2437
emu_pci_attach
static int emu_pci_attach(device_t dev)
Definition: emu10kx.c:3018
SKIP
#define SKIP
Definition: emu10kx.c:97
emu_rm_uninit
static int emu_rm_uninit(struct emu_sc_info *sc)
Definition: emu10kx.c:2372
MODULE_VERSION
MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER)
EMU_A2_MIXER_I2S_ENABLE
#define EMU_A2_MIXER_I2S_ENABLE
Definition: emu10kx.c:234
IN_ZOOM_R
#define IN_ZOOM_R
Definition: emu10kx.c:125
sysctl_emu_digitalswitch_control
static int sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
Definition: emu10kx.c:1580
emumix_set_gpr
static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
Definition: emu10kx.c:2595
EMU_MAX_GPR
#define EMU_MAX_GPR
Definition: emu10kx.c:253
emu_intr
static void emu_intr(void *p)
Definition: emu10kx.c:979
CDSPDIFMUTE
#define CDSPDIFMUTE
Definition: emu10kx.c:249
emu_enable_ir
void emu_enable_ir(struct emu_sc_info *sc)
Definition: emu10kx.c:779
OUT_REAR_L
#define OUT_REAR_L
Definition: emu10kx.c:155
OUT_AC97_L
#define OUT_AC97_L
Definition: emu10kx.c:143
FX2
#define FX2(i)
Definition: emu10kx.c:103
A_OUT_D_SIDE_L
#define A_OUT_D_SIDE_L
Definition: emu10kx.c:193
emumix_set_fxvol
static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
Definition: emu10kx.c:2587
L2L_POINTS
#define L2L_POINTS
Definition: emu10kx.c:2536
OUT_D_SUB
#define OUT_D_SUB
Definition: emu10kx.c:151
emu_memfree
static int emu_memfree(struct emu_mem *mem, void *membuf)
Definition: emu10kx.c:1148
emu_cardbus_init
static int emu_cardbus_init(struct emu_sc_info *sc)
Definition: emu10kx.c:2630
OUTP
#define OUTP(i)
Definition: emu10kx.c:101
emu_gettag
bus_dma_tag_t emu_gettag(struct emu_sc_info *sc)
Definition: emu10kx.c:1037
emu_intr_unregister
int emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
Definition: emu10kx.c:947
EFX_COPY
#define EFX_COPY(TO, FROM)
Definition: emu10kx.c:1683
A_OUT_HPHONE_R
#define A_OUT_HPHONE_R
Definition: emu10kx.c:202
INP
#define INP(i)
Definition: emu10kx.c:100
EFX_SKIP
#define EFX_SKIP(OPCOUNT, FLAG_GPR)
Definition: emu10kx.c:1668
emu_cards
static struct emu_hwinfo emu_cards[]
Definition: emu10kx.c:470
A_IN_AUX2_L
#define A_IN_AUX2_L
Definition: emu10kx.c:183
emu_memstart
static int emu_memstart(struct emu_mem *mem, void *membuf)
Definition: emu10kx.c:1172
emu10kx_cdevsw
static struct cdevsw emu10kx_cdevsw
Definition: emu10kx.c:2177
A_IN_LINE2_L
#define A_IN_LINE2_L
Definition: emu10kx.c:177
EMU_RWUNLOCK
#define EMU_RWUNLOCK()
Definition: emu10kx.c:454
emu_wrptr
void emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
Definition: emu10kx.c:676
EFX_OUTPUT
#define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF)
Definition: emu10kx.c:1646
emu_rd_nolock
static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
Definition: emu10kx.c:611
EFX_OUTPUTD
#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR)
Definition: emu10kx.c:1658
A_OUT_ADC_REC_L
#define A_OUT_ADC_REC_L
Definition: emu10kx.c:219
A_IN_O_SPDIF_L
#define A_IN_O_SPDIF_L
Definition: emu10kx.c:174
OUT_HEADPHONE_L
#define OUT_HEADPHONE_L
Definition: emu10kx.c:152
A_OUT_D_FRONT_L
#define A_OUT_D_FRONT_L
Definition: emu10kx.c:188
EMU_A2_SRCMULTI_ENABLE
#define EMU_A2_SRCMULTI_ENABLE
Definition: emu10kx.c:230
BROKEN_DIGITAL
#define BROKEN_DIGITAL
Definition: emu10kx.c:72
IN_LINE1_R
#define IN_LINE1_R
Definition: emu10kx.c:131
A_OUT_D_FRONT_R
#define A_OUT_D_FRONT_R
Definition: emu10kx.c:189
emu_malloc
static void * emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, bus_dmamap_t *map)
Definition: emu10kx.c:1057
emu_setmap
static void emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
Definition: emu10kx.c:1043
IS_EMU10K1
#define IS_EMU10K1
Definition: emu10kx.c:66
l2l_df
static int l2l_df[L2L_POINTS]
Definition: emu10kx.c:2538
A_IN_AC97_L
#define A_IN_AC97_L
Definition: emu10kx.c:168
EMU_A2_MIXER_SPDIF_ENABLE
#define EMU_A2_MIXER_SPDIF_ENABLE
Definition: emu10kx.c:235
EMU_IPR2
#define EMU_IPR2
Definition: emu10kx.c:224
emu_wrefx
static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
Definition: emu10kx.c:1511
SPDIF_MODE_PCM
#define SPDIF_MODE_PCM
Definition: emu10kx.c:79
C_SIDE_R
#define C_SIDE_R
Definition: emu10kx.c:246
OUT_TOSLINK_R
#define OUT_TOSLINK_R
Definition: emu10kx.c:148
emu_devclass
static devclass_t emu_devclass
Definition: emu10kx.c:3544
OUT_A_SUB
#define OUT_A_SUB
Definition: emu10kx.c:165
emu_uninit
static int emu_uninit(struct emu_sc_info *sc)
Definition: emu10kx.c:2890
emu_rd_p16vptr
uint32_t emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
Definition: emu10kx.c:706
emu_bad_cards
static struct emu_hwinfo emu_bad_cards[]
Definition: emu10kx.c:549
IS_CA0102
#define IS_CA0102
Definition: emu10kx.c:68
emu_digitalswitch
static void emu_digitalswitch(struct emu_sc_info *sc)
Definition: emu10kx.c:1608
emu10kx_prepare
static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
Definition: emu10kx.c:2255
IN_AC97_L
#define IN_AC97_L
Definition: emu10kx.c:118
A_OUT_ADC_REC_R
#define A_OUT_ADC_REC_R
Definition: emu10kx.c:220
emu_pci_probe
static int emu_pci_probe(device_t dev)
Definition: emu10kx.c:2990
A_OUT_A_FRONT_R
#define A_OUT_A_FRONT_R
Definition: emu10kx.c:206
A_OUT_A_REAR_R
#define A_OUT_A_REAR_R
Definition: emu10kx.c:214
emu_rate_to_linearpitch
static uint32_t emu_rate_to_linearpitch(uint32_t rate)
Definition: emu10kx.c:1244
ACC3
#define ACC3
Definition: emu10kx.c:88
A_OUT_A_SUB
#define A_OUT_A_SUB
Definition: emu10kx.c:209
emu_rate_to_pitch
static uint32_t emu_rate_to_pitch(uint32_t rate)
Definition: emu10kx.c:1187
emu_vtrigger
void emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
Definition: emu10kx.c:1457
emu10kx_dev_uninit
static int emu10kx_dev_uninit(struct emu_sc_info *sc)
Definition: emu10kx.c:2329
emu_timer_create
int emu_timer_create(struct emu_sc_info *sc)
Definition: emu10kx.c:811
emu_memalloc
static void * emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, const char *owner)
Definition: emu10kx.c:1086
IN_TOSLINK_R
#define IN_TOSLINK_R
Definition: emu10kx.c:128
A_OUT_A_SIDE_L
#define A_OUT_A_SIDE_L
Definition: emu10kx.c:210
emu_free
static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map)
Definition: emu10kx.c:1079
A_OUT_D_CENTER
#define A_OUT_D_CENTER
Definition: emu10kx.c:191
IN_TOSLINK_L
#define IN_TOSLINK_L
Definition: emu10kx.c:127
emu_rm_init
static int emu_rm_init(struct emu_sc_info *sc)
Definition: emu10kx.c:2346
GPR
#define GPR(i)
Definition: emu10kx.c:99
IN_LINE1_L
#define IN_LINE1_L
Definition: emu10kx.c:130
A_IN_R_SPDIF_R
#define A_IN_R_SPDIF_R
Definition: emu10kx.c:181
emu_getcard
static unsigned int emu_getcard(device_t dev)
Definition: emu10kx.c:564
C_REC_R
#define C_REC_R
Definition: emu10kx.c:240
emu_wr_nolock
static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
Definition: emu10kx.c:627
emu_vpos
int emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
Definition: emu10kx.c:1500
EMU_INTE2
#define EMU_INTE2
Definition: emu10kx.c:225
HAS_71
#define HAS_71
Definition: emu10kx.c:63
sysctl_emu_mixer_control
static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
Definition: emu10kx.c:1529
EMU_A2_SRCSel
#define EMU_A2_SRCSel
Definition: emu10kx.c:229
OUT_TOSLINK_L
#define OUT_TOSLINK_L
Definition: emu10kx.c:147
emu_methods
static device_method_t emu_methods[]
Definition: emu10kx.c:3498
IN_LINE2_R
#define IN_LINE2_R
Definition: emu10kx.c:137
A_IN_O_SPDIF_R
#define A_IN_O_SPDIF_R
Definition: emu10kx.c:175
emumix_set_spdif_mode
static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
Definition: emu10kx.c:2510
EFX_CACHE
#define EFX_CACHE(CACHE_IDX)
Definition: emu10kx.c:1623
emu10kx_open
static d_open_t emu10kx_open
Definition: emu10kx.c:2173
M_IN3_FRONT_R
#define M_IN3_FRONT_R
Definition: emu10kx.h:93
RT_SUB
#define RT_SUB
Definition: emu10kx.h:67
RT_COUNT
#define RT_COUNT
Definition: emu10kx.h:70
M_IN7_REC_R
#define M_IN7_REC_R
Definition: emu10kx.h:118
EMU_MAXPAGES
#define EMU_MAXPAGES
Definition: emu10kx.h:48
EMU_A_IOCFG_GPOUT2
#define EMU_A_IOCFG_GPOUT2
Definition: emu10kx.h:57
EMU_HCFG_GPOUT2
#define EMU_HCFG_GPOUT2
Definition: emu10kx.h:62
RT_CENTER
#define RT_CENTER
Definition: emu10kx.h:66
EMU_MAX_BUFSZ
#define EMU_MAX_BUFSZ
Definition: emu10kx.h:47
M_IN2_FRONT_R
#define M_IN2_FRONT_R
Definition: emu10kx.h:91
M_IN4_FRONT_L
#define M_IN4_FRONT_L
Definition: emu10kx.h:94
M_FX2_REAR_L
#define M_FX2_REAR_L
Definition: emu10kx.h:76
EMU_VAR_MCH_REC
#define EMU_VAR_MCH_REC
Definition: emu10kx.h:54
M_FX6_SIDE_L
#define M_FX6_SIDE_L
Definition: emu10kx.h:80
M_IN6_FRONT_R
#define M_IN6_FRONT_R
Definition: emu10kx.h:99
M_IN3_REC_L
#define M_IN3_REC_L
Definition: emu10kx.h:109
M_IN0_FRONT_L
#define M_IN0_FRONT_L
Definition: emu10kx.h:86
M_MASTER_REAR_R
#define M_MASTER_REAR_R
Definition: emu10kx.h:123
M_IN3_REC_R
#define M_IN3_REC_R
Definition: emu10kx.h:110
M_IN5_REC_R
#define M_IN5_REC_R
Definition: emu10kx.h:114
M_IN1_FRONT_L
#define M_IN1_FRONT_L
Definition: emu10kx.h:88
M_IN1_FRONT_R
#define M_IN1_FRONT_R
Definition: emu10kx.h:89
M_FX1_REC_R
#define M_FX1_REC_R
Definition: emu10kx.h:84
M_FX0_REC_L
#define M_FX0_REC_L
Definition: emu10kx.h:83
M_MASTER_CENTER
#define M_MASTER_CENTER
Definition: emu10kx.h:124
NUM_MIXERS
#define NUM_MIXERS
Definition: emu10kx.h:132
M_IN2_REC_R
#define M_IN2_REC_R
Definition: emu10kx.h:108
EMU_AC97SLOT_REAR_LEFT
#define EMU_AC97SLOT_REAR_LEFT
Definition: emu10kx.h:59
EMU_AC97SLOT_REAR_RIGHT
#define EMU_AC97SLOT_REAR_RIGHT
Definition: emu10kx.h:58
M_IN0_REC_R
#define M_IN0_REC_R
Definition: emu10kx.h:104
M_IN3_FRONT_L
#define M_IN3_FRONT_L
Definition: emu10kx.h:92
M_IN5_FRONT_R
#define M_IN5_FRONT_R
Definition: emu10kx.h:97
M_IN2_REC_L
#define M_IN2_REC_L
Definition: emu10kx.h:107
M_MASTER_FRONT_R
#define M_MASTER_FRONT_R
Definition: emu10kx.h:121
M_MASTER_SUBWOOFER
#define M_MASTER_SUBWOOFER
Definition: emu10kx.h:125
M_FX4_CENTER
#define M_FX4_CENTER
Definition: emu10kx.h:78
M_IN0_FRONT_R
#define M_IN0_FRONT_R
Definition: emu10kx.h:87
M_MASTER_REC_R
#define M_MASTER_REC_R
Definition: emu10kx.h:130
M_IN6_FRONT_L
#define M_IN6_FRONT_L
Definition: emu10kx.h:98
M_IN5_REC_L
#define M_IN5_REC_L
Definition: emu10kx.h:113
M_FX3_REAR_R
#define M_FX3_REAR_R
Definition: emu10kx.h:77
M_IN4_REC_R
#define M_IN4_REC_R
Definition: emu10kx.h:112
M_FX5_SUBWOOFER
#define M_FX5_SUBWOOFER
Definition: emu10kx.h:79
M_MASTER_SIDE_L
#define M_MASTER_SIDE_L
Definition: emu10kx.h:126
EMU_A_IOCFG_DISABLE_ANALOG
#define EMU_A_IOCFG_DISABLE_ANALOG
Definition: emu10kx.h:56
EMU_VAR_ISEMU10K1
#define EMU_VAR_ISEMU10K1
Definition: emu10kx.h:52
RT_SIDE
#define RT_SIDE
Definition: emu10kx.h:68
M_IN0_REC_L
#define M_IN0_REC_L
Definition: emu10kx.h:103
M_FX7_SIDE_R
#define M_FX7_SIDE_R
Definition: emu10kx.h:81
M_IN1_REC_L
#define M_IN1_REC_L
Definition: emu10kx.h:105
M_IN5_FRONT_L
#define M_IN5_FRONT_L
Definition: emu10kx.h:96
M_IN1_REC_R
#define M_IN1_REC_R
Definition: emu10kx.h:106
M_IN7_REC_L
#define M_IN7_REC_L
Definition: emu10kx.h:117
M_MASTER_REAR_L
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Definition: emu10kx.h:122
EMU_VAR_ROUTE
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Definition: emu10kx.h:51
EMU_VAR_FUNC
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Definition: emu10kx.h:50
M_IN4_REC_L
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Definition: emu10kx.h:111
M_FX0_FRONT_L
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Definition: emu10kx.h:74
EMU_HCFG_GPOUT0
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Definition: emu10kx.h:60
M_IN2_FRONT_L
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Definition: emu10kx.h:90
RT_REAR
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M_IN6_REC_L
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Definition: emu10kx.h:115
M_MASTER_FRONT_L
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Definition: emu10kx.h:120
M_IN4_FRONT_R
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Definition: emu10kx.h:95
M_IN7_FRONT_R
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Definition: emu10kx.h:101
M_MASTER_REC_L
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SND_EMU10KX_PREFVER
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M_IN7_FRONT_L
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Definition: emu10kx.h:100
M_MASTER_SIDE_R
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RT_FRONT
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Definition: emu10kx.h:64
M_FX1_FRONT_R
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RT_MCHRECORD
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Definition: emu10kx.h:69
EMU_VAR_MCH_DISABLED
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EMU_CHAN_DSL
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EMU_ADCBA
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Definition: emuxkireg.h:400
EMU_CHAN_CCR_READADDRESS
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Definition: emuxkireg.h:260
EMU_MICROCODEBASE
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Definition: emuxkireg.h:566
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Definition: emuxkireg.h:275
EMU_MICBS
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Definition: emuxkireg.h:404
EMU_CHAN_CCR
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Definition: emuxkireg.h:253
EMU_CHAN_FXRT
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EMU_CLIEH
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EMU_CHAN_PSST
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EMU_HCFG_JOYENABLE
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EMU_CHAN_FMMOD
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EMU_CHAN_ATKHLDM
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EMU_CHAN_PEFE_FILTERAMOUNT
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EMU_SPCS_SOURCENUM_UNSPEC
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EMU_CHAN_PEFE_PITCHAMOUNT
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Definition: emuxkireg.h:211
EMU_CHAN_LFOVAL1
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EMU_CHAN_PTRX_PITCHTARGET
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Definition: emuxkireg.h:205
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Definition: emuxkireg.h:58
EMU_CHAN_ENVVOL
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Definition: emuxkireg.h:280
EMU_CHAN_LFOVAL2
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Definition: emuxkireg.h:310
EMU_PTB
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Definition: emuxkireg.h:362
EMU_CHAN_VTFT_FILTERTARGET_MASK
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Definition: emuxkireg.h:220
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Definition: emuxkireg.h:53
EMU_CHAN_PTRX
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EMU_A2_PTR
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Definition: emuxkireg.h:183
EMU_A_MUDATA1
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Definition: emuxkireg.h:521
EMU_A_CHAN_FXRT2
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Definition: emuxkireg.h:537
EMU_ADCBS
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Definition: emuxkireg.h:405
EMU_CHAN_Z2
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Definition: emuxkireg.h:224
EMU_FXGPREGBASE
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Definition: emuxkireg.h:553
EMU_DATA
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Definition: emuxkireg.h:56
EMU_CHAN_MAPA
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Definition: emuxkireg.h:274
EMU_CHAN_Z1
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Definition: emuxkireg.h:223
EMU_A_SPDIF_48000
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Definition: emuxkireg.h:531
EMU_SPCS_GENERATIONSTATUS
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Definition: emuxkireg.h:476
EMU_CHAN_ENVVAL
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Definition: emuxkireg.h:297
EMU_CHAN_CCCA_CURRADDR
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Definition: emuxkireg.h:251
EMU_FXWC
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Definition: emuxkireg.h:387
EMU_CHAN_IP
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Definition: emuxkireg.h:313
EMU_FXBA
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Definition: emuxkireg.h:401
EMU_AC97SLOT_CENTER
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Definition: emuxkireg.h:498
EMU_CHAN_FM2FRQ2
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Definition: emuxkireg.h:336
EMU_CHAN_PEFE
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Definition: emuxkireg.h:323
EMU_A_DBG
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Definition: emuxkireg.h:452
EMU_HCFG_MUTEBUTTONENABLE
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Definition: emuxkireg.h:156
EMU_CHAN_MAP_PTI_MASK
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Definition: emuxkireg.h:278
EMU_CHAN_ATKHLDV
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Definition: emuxkireg.h:283
EMU_MICBA
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Definition: emuxkireg.h:399
EMU_SOLEL
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Definition: emuxkireg.h:490
EMU_A_CHAN_FXRT1
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Definition: emuxkireg.h:547
EMU_CHAN_IFATN
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Definition: emuxkireg.h:317
EMU_A_PTR_ADDR_MASK
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Definition: emuxkireg.h:54
EMU_HCFG
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Definition: emuxkireg.h:126
EMU_A_IOCFG_GPOUT1
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Definition: emuxkireg.h:172
EMU_HCFG_LOCKSOUNDCACHE
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Definition: emuxkireg.h:153
EMU_SPCS0
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Definition: emuxkireg.h:459
EMU_CHAN_CCR_CACHEINVALIDSIZE
#define EMU_CHAN_CCR_CACHEINVALIDSIZE
Definition: emuxkireg.h:255
EMU_CHAN_DCYSUSV
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Definition: emuxkireg.h:288
EMU_INTE_INTERTIMERENB
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Definition: emuxkireg.h:115
EMU_INTE_SAMPLERATER
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Definition: emuxkireg.h:104
EMU_CHAN_DCYSUSM_DECAYTIME_MASK
#define EMU_CHAN_DCYSUSM_DECAYTIME_MASK
Definition: emuxkireg.h:308
EMU_A_MUDATA2
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Definition: emuxkireg.h:524
EMU_HCFG_AUTOMUTE
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Definition: emuxkireg.h:152
EMU_SPCS2
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Definition: emuxkireg.h:461
EMU_CHAN_ATKHLDV_ATTACKTIME_MASK
#define EMU_CHAN_ATKHLDV_ATTACKTIME_MASK
Definition: emuxkireg.h:286
EMU_A_CHAN_SENDAMOUNTS
#define EMU_A_CHAN_SENDAMOUNTS
Definition: emuxkireg.h:542
EMU_CHAN_CPF_STEREO_MASK
#define EMU_CHAN_CPF_STEREO_MASK
Definition: emuxkireg.h:198
EMU_TCBS
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Definition: emuxkireg.h:388
EMU_TCB
#define EMU_TCB
Definition: emuxkireg.h:365
EMU_CHAN_TEMPENV
#define EMU_CHAN_TEMPENV
Definition: emuxkireg.h:340
EMU_CHAN_CD0
#define EMU_CHAN_CD0
Definition: emuxkireg.h:343
EMU_SPCS_COPYRIGHT
#define EMU_SPCS_COPYRIGHT
Definition: emuxkireg.h:482
EMU_CHAN_DCYSUSM
#define EMU_CHAN_DCYSUSM
Definition: emuxkireg.h:305
EMU_SPCS_SAMPLERATE_48
#define EMU_SPCS_SAMPLERATE_48
Definition: emuxkireg.h:468
EMU_A_SPDIF_SAMPLERATE
#define EMU_A_SPDIF_SAMPLERATE
Definition: emuxkireg.h:529
EMU_A_DBG_SINGLE_STEP
#define EMU_A_DBG_SINGLE_STEP
Definition: emuxkireg.h:453
EMU_SPCS_CHANNELNUM_LEFT
#define EMU_SPCS_CHANNELNUM_LEFT
Definition: emuxkireg.h:472
EMU_RECBS_BUFSIZE_NONE
#define EMU_RECBS_BUFSIZE_NONE
Definition: emuxkireg.h:407
EMU_PTR
#define EMU_PTR
Definition: emuxkireg.h:51
EMU_CHAN_CVCF_CURRFILTER_MASK
#define EMU_CHAN_CVCF_CURRFILTER_MASK
Definition: emuxkireg.h:214
EMU_CHAN_VTFT
#define EMU_CHAN_VTFT
Definition: emuxkireg.h:217
EMU_DBG
#define EMU_DBG
Definition: emuxkireg.h:443
EMU_HCFG_AUDIOENABLE
#define EMU_HCFG_AUDIOENABLE
Definition: emuxkireg.h:157
EMU_SPCS1
#define EMU_SPCS1
Definition: emuxkireg.h:460
EMU_A_MICROCODEBASE
#define EMU_A_MICROCODEBASE
Definition: emuxkireg.h:567
EMU_CHAN_ATKHLDV_HOLDTIME_MASK
#define EMU_CHAN_ATKHLDV_HOLDTIME_MASK
Definition: emuxkireg.h:285
EMU_HCFG_CODECFMT_I2S
#define EMU_HCFG_CODECFMT_I2S
Definition: emuxkireg.h:142
EMU_CHAN_CCCA_8BITSELECT
#define EMU_CHAN_CCCA_8BITSELECT
Definition: emuxkireg.h:249
EMU_CHAN_CPF
#define EMU_CHAN_CPF
Definition: emuxkireg.h:194
EMU_TIMER
#define EMU_TIMER
Definition: emuxkireg.h:174
EMU_A_IOCFG
#define EMU_A_IOCFG
Definition: emuxkireg.h:168
EMU_AC97SLOT_LFE
#define EMU_AC97SLOT_LFE
Definition: emuxkireg.h:499
count
u_int32_t count
Definition: feeder_if.m:86
value
uint32_t value
Definition: hdaa.c:58
enable
uint8_t enable
Definition: hdac.c:213
mask
uint8_t mask
Definition: hdac.c:212
reg
uint8_t reg
Definition: hdac.c:211
blksz
int blksz
Definition: hdac_if.m:64
buf
bus_addr_t buf
Definition: hdac_if.m:63
size
uint8_t size
r
uint8_t r
error
struct @109 error
dev
unsigned dev
Definition: mixer_if.m:59
start
bool start
status
bool * status
val
u_int32_t val
func
u_int func
bus
u_int bus
maxcount
int maxcount
addr
uint64_t * addr
irq
int * irq
PCIR_BAR
#define PCIR_BAR(x)
PCIR_DEVICE
#define PCIR_DEVICE
PCIR_SUBDEV_0
#define PCIR_SUBDEV_0
PCIR_DEVVENDOR
#define PCIR_DEVVENDOR
RANGE
#define RANGE(var, low, high)
Definition: sequencer.h:45
PCMMINOR
#define PCMMINOR(x)
Definition: sound.h:124
AFMT_CHANNEL
#define AFMT_CHANNEL(v)
Definition: sound.h:227
AFMT_16BIT
#define AFMT_16BIT
Definition: sound.h:191
emu_hwinfo
Definition: emu10kx.c:460
emu_hwinfo::desc
char desc[32]
Definition: emu10kx.c:466
emu_hwinfo::flags
int flags
Definition: emu10kx.c:467
emu_hwinfo::SBcode
char SBcode[8]
Definition: emu10kx.c:465
emu_hwinfo::device
uint16_t device
Definition: emu10kx.c:462
emu_hwinfo::subdevice
uint16_t subdevice
Definition: emu10kx.c:464
emu_hwinfo::subvendor
uint16_t subvendor
Definition: emu10kx.c:463
emu_hwinfo::vendor
uint16_t vendor
Definition: emu10kx.c:461
emu_intr_handler
Definition: emu10kx.c:304
emu_intr_handler::irq_func
uint32_t(* irq_func)(void *softc, uint32_t irq)
Definition: emu10kx.c:308
emu_intr_handler::intr_mask
uint32_t intr_mask
Definition: emu10kx.c:306
emu_intr_handler::softc
void * softc
Definition: emu10kx.c:305
emu_intr_handler::inte_mask
uint32_t inte_mask
Definition: emu10kx.c:307
emu_mem
Definition: emu10k1.c:168
emu_mem::dmat
bus_dma_tag_t dmat
Definition: emu10kx.c:289
emu_mem::silent_map
bus_dmamap_t silent_map
Definition: emu10k1.c:175
emu_mem::bmap
u_int8_t bmap[EMUMAXPAGES/8]
Definition: emu10k1.c:169
emu_mem::ptb_pages
uint32_t * ptb_pages
Definition: emu10kx.c:283
emu_mem::silent_page_addr
bus_addr_t silent_page_addr
Definition: emu10k1.c:172
emu_mem::ptb_pages
u_int32_t * ptb_pages
Definition: emu10k1.c:170
emu_mem::ptb_pages_addr
bus_addr_t ptb_pages_addr
Definition: emu10k1.c:173
emu_mem::ptb_map
bus_dmamap_t ptb_map
Definition: emu10k1.c:174
emu_mem::silent_page
void * silent_page
Definition: emu10k1.c:171
emu_mem::card
struct emu_sc_info * card
Definition: emu10kx.c:290
emu_memblk
Definition: emu10k1.c:160
emu_midiinfo
Definition: emu10kx.h:137
emu_midiinfo::port
int port
Definition: emu10kx.h:139
emu_midiinfo::card
struct emu_sc_info * card
Definition: emu10kx.h:138
emu_midiinfo::portnr
int portnr
Definition: emu10kx.h:140
emu_pcminfo
Definition: emu10kx.h:144
emu_pcminfo::route
int route
Definition: emu10kx.h:146
emu_pcminfo::card
struct emu_sc_info * card
Definition: emu10kx.h:145
emu_rm
Definition: emu10kx.c:295
emu_rm::card
struct emu_sc_info * card
Definition: emu10kx.c:296
emu_rm::num_used
int num_used
Definition: emu10kx.c:301
emu_rm::allocmap
signed int allocmap[EMU_MAX_GPR]
Definition: emu10kx.c:298
emu_rm::gpr_lock
struct mtx gpr_lock
Definition: emu10kx.c:297
emu_rm::last_free_gpr
int last_free_gpr
Definition: emu10kx.c:300
emu_rm::num_gprs
int num_gprs
Definition: emu10kx.c:299
emu_route
Definition: emu10kx.h:168
emu_route::amounts_right
int amounts_right[8]
Definition: emu10kx.h:172
emu_route::routing_left
int routing_left[8]
Definition: emu10kx.h:169
emu_route::amounts_left
int amounts_left[8]
Definition: emu10kx.h:170
emu_route::routing_right
int routing_right[8]
Definition: emu10kx.h:171
emu_sc_info
Definition: emu10kx.c:311
emu_sc_info::input_base
unsigned int input_base
Definition: emu10kx.c:347
emu_sc_info::timer
int timer[EMU_MAX_IRQ_CONSUMERS]
Definition: emu10kx.c:368
emu_sc_info::mixer_gpr
int mixer_gpr[NUM_MIXERS]
Definition: emu10kx.c:374
emu_sc_info::rev
uint32_t rev
Definition: emu10kx.c:320
emu_sc_info::is_ca0102
uint32_t is_ca0102
Definition: emu10kx.c:353
emu_sc_info::root
struct sysctl_oid * root
Definition: emu10kx.c:380
emu_sc_info::lock
struct mtx lock
Definition: emu10kx.c:312
emu_sc_info::type
uint32_t type
Definition: emu10kx.c:319
emu_sc_info::rw
struct mtx rw
Definition: emu10kx.c:313
emu_sc_info::mixer_volcache
int mixer_volcache[NUM_MIXERS]
Definition: emu10kx.c:375
emu_sc_info::sh
bus_space_handle_t sh
Definition: emu10kx.c:323
emu_sc_info::ih
void * ih
Definition: emu10kx.c:334
emu_sc_info::num_inputs
signed int num_inputs
Definition: emu10kx.c:359
emu_sc_info::mchannel_fx
unsigned int mchannel_fx
Definition: emu10kx.c:341
emu_sc_info::mode
unsigned int mode
Definition: emu10kx.c:340
emu_sc_info::midi
device_t midi[2]
Definition: emu10kx.c:318
emu_sc_info::emu10kx_isopen
int emu10kx_isopen
Definition: emu10kx.c:327
emu_sc_info::ctx
struct sysctl_ctx_list * ctx
Definition: emu10kx.c:379
emu_sc_info::code_size
unsigned int code_size
Definition: emu10kx.c:344
emu_sc_info::mch_rec
signed int mch_rec
Definition: emu10kx.c:358
emu_sc_info::has_ac97
uint32_t has_ac97
Definition: emu10kx.c:354
emu_sc_info::code_base
unsigned int code_base
Definition: emu10kx.c:343
emu_sc_info::dev
device_t dev
Definition: emu10kx.c:316
emu_sc_info::emu10kx_lock
struct mtx emu10kx_lock
Definition: emu10kx.c:326
emu_sc_info::routing_code_start
unsigned int routing_code_start
Definition: emu10kx.c:362
emu_sc_info::num_fxbuses
unsigned int num_fxbuses
Definition: emu10kx.c:361
emu_sc_info::efxc_base
unsigned int efxc_base
Definition: emu10kx.c:349
emu_sc_info::has_71
uint32_t has_71
Definition: emu10kx.c:354
emu_sc_info::output_base
unsigned int output_base
Definition: emu10kx.c:348
emu_sc_info::irq_mask
uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]
Definition: emu10kx.c:367
emu_sc_info::num_gprs
unsigned int num_gprs
Definition: emu10kx.c:346
emu_sc_info::dsp_zero
unsigned int dsp_zero
Definition: emu10kx.c:342
emu_sc_info::pcm
device_t pcm[RT_COUNT]
Definition: emu10kx.c:317
emu_sc_info::emu10kx_bufptr
int emu10kx_bufptr
Definition: emu10kx.c:329
emu_sc_info::voice
struct emu_voice voice[NUM_G]
Definition: emu10kx.c:366
emu_sc_info::gpr_base
unsigned int gpr_base
Definition: emu10kx.c:345
emu_sc_info::irq
struct resource * irq
Definition: emu10kx.c:333
emu_sc_info::is_emu10k1
uint32_t is_emu10k1
Definition: emu10kx.c:353
emu_sc_info::opcode_shift
unsigned int opcode_shift
Definition: emu10kx.c:350
emu_sc_info::high_operand_shift
unsigned int high_operand_shift
Definition: emu10kx.c:351
emu_sc_info::routing_code_end
unsigned int routing_code_end
Definition: emu10kx.c:363
emu_sc_info::mute_gpr
int mute_gpr[NUM_MUTE]
Definition: emu10kx.c:378
emu_sc_info::is_ca0108
uint32_t is_ca0108
Definition: emu10kx.c:353
emu_sc_info::num_outputs
unsigned int num_outputs
Definition: emu10kx.c:360
emu_sc_info::is_cardbus
uint32_t is_cardbus
Definition: emu10kx.c:356
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