This graph shows which files directly or indirectly include this file:

Macros
#define	EMU_MKSUBREG(sz, idx, reg) (((sz) << 24) \| ((idx) << 16) \| (reg))

#define	EMU_PTR 0x00

#define	EMU_PTR_CHNO_MASK 0x0000003f

#define	EMU_PTR_ADDR_MASK 0x07ff0000

#define	EMU_A_PTR_ADDR_MASK 0x0fff0000

#define	EMU_DATA 0x04

#define	EMU_IPR 0x08

#define	EMU_IPR_RATETRCHANGE 0x01000000

#define	EMU_IPR_FXDSP 0x00800000

#define	EMU_IPR_FORCEINT 0x00400000

#define	EMU_PCIERROR 0x00200000

#define	EMU_IPR_VOLINCR 0x00100000

#define	EMU_IPR_VOLDECR 0x00080000

#define	EMU_IPR_MUTE 0x00040000

#define	EMU_IPR_MICBUFFULL 0x00020000

#define	EMU_IPR_MICBUFHALFFULL 0x00010000

#define	EMU_IPR_ADCBUFFULL 0x00008000

#define	EMU_IPR_ADCBUFHALFFULL 0x00004000

#define	EMU_IPR_EFXBUFFULL 0x00002000

#define	EMU_IPR_EFXBUFHALFFULL 0x00001000

#define	EMU_IPR_GPSPDIFSTCHANGE 0x00000800

#define	EMU_IPR_CDROMSTCHANGE 0x00000400

#define	EMU_IPR_INTERVALTIMER 0x00000200

#define	EMU_IPR_MIDITRANSBUFE 0x00000100

#define	EMU_IPR_MIDIRECVBUFE 0x00000080

#define	EMU_IPR_A_MIDITRANSBUFE2 0x10000000

#define	EMU_IPR_A_MIDIRECBUFE2 0x08000000

#define	EMU_IPR_CHANNELLOOP 0x00000040

#define	EMU_IPR_CHNOMASK 0x0000003f

#define	EMU_INTE 0x0c

#define	EMU_INTE_VSB_MASK 0xc0000000

#define	EMU_INTE_VSB_220 0x00000000

#define	EMU_INTE_VSB_240 0x40000000

#define	EMU_INTE_VSB_260 0x80000000

#define	EMU_INTE_VSB_280 0xc0000000

#define	EMU_INTE_VMPU_MASK 0x30000000

#define	EMU_INTE_VMPU_300 0x00000000

#define	EMU_INTE_VMPU_310 0x10000000

#define	EMU_INTE_VMPU_320 0x20000000

#define	EMU_INTE_VMPU_330 0x30000000

#define	EMU_INTE_MDMAENABLE 0x08000000

#define	EMU_INTE_SDMAENABLE 0x04000000

#define	EMU_INTE_MPICENABLE 0x02000000

#define	EMU_INTE_SPICENABLE 0x01000000

#define	EMU_INTE_VSBENABLE 0x00800000

#define	EMU_INTE_ADLIBENABLE 0x00400000

#define	EMU_INTE_MPUENABLE 0x00200000

#define	EMU_INTE_FORCEINT 0x00100000

#define	EMU_INTE_MRHANDENABLE 0x00080000

#define	EMU_INTE_SAMPLERATER 0x00002000

#define	EMU_INTE_FXDSPENABLE 0x00001000

#define	EMU_INTE_PCIERRENABLE 0x00000800

#define	EMU_INTE_VOLINCRENABLE 0x00000400

#define	EMU_INTE_VOLDECRENABLE 0x00000200

#define	EMU_INTE_MUTEENABLE 0x00000100

#define	EMU_INTE_MICBUFENABLE 0x00000080

#define	EMU_INTE_ADCBUFENABLE 0x00000040

#define	EMU_INTE_EFXBUFENABLE 0x00000020

#define	EMU_INTE_GPSPDIFENABLE 0x00000010

#define	EMU_INTE_CDSPDIFENABLE 0x00000008

#define	EMU_INTE_INTERTIMERENB 0x00000004

#define	EMU_INTE_MIDITXENABLE 0x00000002

#define	EMU_INTE_MIDIRXENABLE 0x00000001

#define	EMU_INTE_A_MIDITXENABLE2 0x00020000

#define	EMU_INTE_A_MIDIRXENABLE2 0x00010000

#define	EMU_WC 0x10

#define	EMU_WC_SAMPLECOUNTER_MASK 0x03FFFFC0

#define	EMU_WC_SAMPLECOUNTER EMU_MKSUBREG(20, 6, EMU_WC)

#define	EMU_WC_CURRENTCHANNEL 0x0000003F

#define	EMU_HCFG 0x14

#define	EMU_HCFG_LEGACYFUNC_MASK 0xe0000000

#define	EMU_HCFG_LEGACYFUNC_MPU 0x00000000

#define	EMU_HCFG_LEGACYFUNC_SB 0x40000000

#define	EMU_HCFG_LEGACYFUNC_AD 0x60000000

#define	EMU_HCFG_LEGACYFUNC_MPIC 0x80000000

#define	EMU_HCFG_LEGACYFUNC_MDMA 0xa0000000

#define	EMU_HCFG_LEGACYFUNC_SPCI 0xc0000000

#define	EMU_HCFG_LEGACYFUNC_SDMA 0xe0000000

#define	EMU_HCFG_IOCAPTUREADDR 0x1f000000

#define	EMU_HCFG_LEGACYWRITE 0x00800000

#define	EMU_HCFG_LEGACYWORD 0x00400000

#define	EMU_HCFG_LEGACYINT 0x00200000

#define	EMU_HCFG_CODECFMT_MASK 0x00070000

#define	EMU_HCFG_CODECFMT_AC97 0x00000000

#define	EMU_HCFG_CODECFMT_I2S 0x00010000

#define	EMU_HCFG_GPINPUT0 0x00004000

#define	EMU_HCFG_GPINPUT1 0x00002000

#define	EMU_HCFG_GPOUTPUT_MASK 0x00001c00

#define	EMU_HCFG_JOYENABLE 0x00000200

#define	EMU_HCFG_PHASETRACKENABLE 0x00000100

#define	EMU_HCFG_AC3ENABLE_MASK 0x000000e0

#define	EMU_HCFG_AC3ENABLE_ZVIDEO 0x00000080

#define	EMU_HCFG_AC3ENABLE_CDSPDIF 0x00000040

#define	EMU_HCFG_AC3ENABLE_GPSPDIF 0x00000020

#define	EMU_HCFG_AUTOMUTE 0x00000010

#define	EMU_HCFG_LOCKSOUNDCACHE 0x00000008

#define	EMU_HCFG_LOCKTANKCACHE_MASK 0x00000004

#define	EMU_HCFG_LOCKTANKCACHE EMU_MKSUBREG(1, 2, EMU_HCFG)

#define	EMU_HCFG_MUTEBUTTONENABLE 0x00000002

#define	EMU_HCFG_AUDIOENABLE 0x00000001

#define	EMU_MUDATA 0x18

#define	EMU_MUCMD 0x19

#define	EMU_MUCMD_RESET 0xff

#define	EMU_MUCMD_ENTERUARTMODE 0x3f

#define	EMU_MUSTAT EMU_MUCMD

#define	EMU_MUSTAT_IRDYN 0x80

#define	EMU_MUSTAT_ORDYN 0x40

#define	EMU_A_IOCFG 0x18

#define	EMU_A_GPINPUT_MASK 0xff00

#define	EMU_A_GPOUTPUT_MASK 0x00ff

#define	EMU_A_IOCFG_GPOUT0 0x0044

#define	EMU_A_IOCFG_GPOUT1 0x0002

#define	EMU_TIMER 0x1a

#define	EMU_TIMER_RATE_MASK 0x000003ff

#define	EMU_TIMER_RATE EMU_MKSUBREG(10, 0, EMU_TIMER)

#define	EMU_AC97DATA 0x1c

#define	EMU_AC97ADDR 0x1e

#define	EMU_AC97ADDR_RDY 0x80

#define	EMU_AC97ADDR_ADDR 0x7f

#define	EMU_A2_PTR 0x20

#define	EMU_A2_DATA 0x24

#define	EMU_A2_SRCSEL 0x600000

#define	EMU_A2_SRCSEL_ENABLE_SPDIF 0x00000004

#define	EMU_A2_SRCSEL_ENABLE_SRCMULTI 0x00000010

#define	EMU_A2_SRCMULTI 0x6e0000

#define	EMU_A2_SRCMULTI_ENABLE_INPUT 0xff00ff00

#define	EMU_CHAN_CPF 0x00

#define	EMU_CHAN_CPF_PITCH_MASK 0xffff0000

#define	EMU_CHAN_CPF_PITCH EMU_MKSUBREG(16, 16, EMU_CHAN_CPF)

#define	EMU_CHAN_CPF_STEREO_MASK 0x00008000

#define	EMU_CHAN_CPF_STEREO EMU_MKSUBREG(1, 15, EMU_CHAN_CPF)

#define	EMU_CHAN_CPF_STOP_MASK 0x00004000

#define	EMU_CHAN_CPF_FRACADDRESS_MASK 0x00003fff

#define	EMU_CHAN_PTRX 0x01

#define	EMU_CHAN_PTRX_PITCHTARGET_MASK 0xffff0000

#define	EMU_CHAN_PTRX_PITCHTARGET EMU_MKSUBREG(16, 16, EMU_CHAN_PTRX)

#define	EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK 0x0000ff00

#define	EMU_CHAN_PTRX_FXSENDAMOUNT_A EMU_MKSUBREG(8, 8, EMU_CHAN_PTRX)

#define	EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK 0x000000ff

#define	EMU_CHAN_PTRX_FXSENDAMOUNT_B EMU_MKSUBREG(8, 0, EMU_CHAN_PTRX)

#define	EMU_CHAN_CVCF 0x02

#define	EMU_CHAN_CVCF_CURRVOL_MASK 0xffff0000

#define	EMU_CHAN_CVCF_CURRVOL EMU_MKSUBREG(16, 16, EMU_CHAN_CVCF)

#define	EMU_CHAN_CVCF_CURRFILTER_MASK 0x0000ffff

#define	EMU_CHAN_CVCF_CURRFILTER EMU_MKSUBREG(16, 0, EMU_CHAN_CVCF)

#define	EMU_CHAN_VTFT 0x03

#define	EMU_CHAN_VTFT_VOLUMETARGET_MASK 0xffff0000

#define	EMU_CHAN_VTFT_VOLUMETARGET EMU_MKSUBREG(16, 16, EMU_CHAN_VTFT)

#define	EMU_CHAN_VTFT_FILTERTARGET_MASK 0x0000ffff

#define	EMU_CHAN_VTFT_FILTERTARGET EMU_MKSUBREG(16, 0, EMU_CHAN_VTFT)

#define	EMU_CHAN_Z1 0x05

#define	EMU_CHAN_Z2 0x04

#define	EMU_CHAN_PSST 0x06

#define	EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK 0xff000000

#define	EMU_CHAN_PSST_FXSENDAMOUNT_C EMU_MKSUBREG(8, 24, EMU_CHAN_PSST)

#define	EMU_CHAN_PSST_LOOPSTARTADDR_MASK 0x00ffffff

#define	EMU_CHAN_PSST_LOOPSTARTADDR EMU_MKSUBREG(24, 0, EMU_CHAN_PSST)

#define	EMU_CHAN_DSL 0x07

#define	EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK 0xff000000

#define	EMU_CHAN_DSL_FXSENDAMOUNT_D EMU_MKSUBREG(8, 24, EMU_CHAN_DSL)

#define	EMU_CHAN_DSL_LOOPENDADDR_MASK 0x00ffffff

#define	EMU_CHAN_DSL_LOOPENDADDR EMU_MKSUBREG(24, 0, EMU_CHAN_DSL)

#define	EMU_CHAN_CCCA 0x08

#define	EMU_CHAN_CCCA_RESONANCE 0xf0000000

#define	EMU_CHAN_CCCA_INTERPROMMASK 0x0e000000

#define	EMU_CHAN_CCCA_INTERPROM_0 0x00000000

#define	EMU_CHAN_CCCA_INTERPROM_1 0x02000000

#define	EMU_CHAN_CCCA_INTERPROM_2 0x04000000

#define	EMU_CHAN_CCCA_INTERPROM_3 0x06000000

#define	EMU_CHAN_CCCA_INTERPROM_4 0x08000000

#define	EMU_CHAN_CCCA_INTERPROM_5 0x0a000000

#define	EMU_CHAN_CCCA_INTERPROM_6 0x0c000000

#define	EMU_CHAN_CCCA_INTERPROM_7 0x0e000000

#define	EMU_CHAN_CCCA_8BITSELECT 0x01000000

#define	EMU_CHAN_CCCA_CURRADDR_MASK 0x00ffffff

#define	EMU_CHAN_CCCA_CURRADDR EMU_MKSUBREG(24, 0, EMU_CHAN_CCCA)

#define	EMU_CHAN_CCR 0x09

#define	EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK 0xfe000000

#define	EMU_CHAN_CCR_CACHEINVALIDSIZE EMU_MKSUBREG(7, 25, EMU_CHAN_CCR)

#define	EMU_CHAN_CCR_CACHELOOPFLAG 0x01000000

#define	EMU_CHAN_CCR_INTERLEAVEDSAMPLES 0x00800000

#define	EMU_CHAN_CCR_WORDSIZEDSAMPLES 0x00400000

#define	EMU_CHAN_CCR_READADDRESS_MASK 0x003f0000

#define	EMU_CHAN_CCR_READADDRESS EMU_MKSUBREG(6, 16, EMU_CHAN_CCR)

#define	EMU_CHAN_CCR_LOOPINVALSIZE 0x0000fe00

#define	EMU_CHAN_CCR_LOOPFLAG 0x00000100

#define	EMU_CHAN_CCR_CACHELOOPADDRHI 0x000000ff

#define	EMU_CHAN_CLP 0x0a

#define	EMU_CHAN_CLP_CACHELOOPADDR 0x0000ffff

#define	EMU_CHAN_FXRT 0x0b

#define	EMU_CHAN_FXRT_CHANNELA 0x000f0000

#define	EMU_CHAN_FXRT_CHANNELB 0x00f00000

#define	EMU_CHAN_FXRT_CHANNELC 0x0f000000

#define	EMU_CHAN_FXRT_CHANNELD 0xf0000000

#define	EMU_CHAN_MAPA 0x0c

#define	EMU_CHAN_MAPB 0x0d

#define	EMU_CHAN_MAP_PTE_MASK 0xffffe000

#define	EMU_CHAN_MAP_PTI_MASK 0x00001fff

#define	EMU_CHAN_ENVVOL 0x10

#define	EMU_CHAN_ENVVOL_MASK 0x0000ffff

#define	EMU_CHAN_ATKHLDV 0x11

#define	EMU_CHAN_ATKHLDV_PHASE0 0x00008000

#define	EMU_CHAN_ATKHLDV_HOLDTIME_MASK 0x00007f00

#define	EMU_CHAN_ATKHLDV_ATTACKTIME_MASK 0x0000007f

#define	EMU_CHAN_DCYSUSV 0x12

#define	EMU_CHAN_DCYSUSV_PHASE1_MASK 0x00008000

#define	EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK 0x00007f00

#define	EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK 0x00000080

#define	EMU_CHAN_DCYSUSV_DECAYTIME_MASK 0x0000007f

#define	EMU_CHAN_LFOVAL1 0x13

#define	EMU_CHAN_LFOVAL_MASK 0x0000ffff

#define	EMU_CHAN_ENVVAL 0x14

#define	EMU_CHAN_ENVVAL_MASK 0x0000ffff

#define	EMU_CHAN_ATKHLDM 0x15

#define	EMU_CHAN_ATKHLDM_PHASE0 0x00008000

#define	EMU_CHAN_ATKHLDM_HOLDTIME 0x00007f00

#define	EMU_CHAN_ATKHLDM_ATTACKTIME 0x0000007f

#define	EMU_CHAN_DCYSUSM 0x16

#define	EMU_CHAN_DCYSUSM_PHASE1_MASK 0x00008000

#define	EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK 0x00007f00

#define	EMU_CHAN_DCYSUSM_DECAYTIME_MASK 0x0000007f

#define	EMU_CHAN_LFOVAL2 0x17

#define	EMU_CHAN_LFOVAL2_MASK 0x0000ffff

#define	EMU_CHAN_IP 0x18

#define	EMU_CHAN_IP_MASK 0x0000ffff

#define	EMU_CHAN_IP_UNITY 0x0000e000

#define	EMU_CHAN_IFATN 0x19

#define	EMU_CHAN_IFATN_FILTERCUTOFF_MASK 0x0000ff00

#define	EMU_CHAN_IFATN_FILTERCUTOFF EMU_MKSUBREG(8, 8, EMU_CHAN_IFATN)

#define	EMU_CHAN_IFATN_ATTENUATION_MASK 0x000000ff

#define	EMU_CHAN_IFATN_ATTENUATION EMU_MKSUBREG(8, 0, EMU_CHAN_IFATN)

#define	EMU_CHAN_PEFE 0x1a

#define	EMU_CHAN_PEFE_PITCHAMOUNT_MASK 0x0000ff00

#define	EMU_CHAN_PEFE_PITCHAMOUNT EMU_MKSUBREG(8, 8, EMU_CHAN_PEFE)

#define	EMU_CHAN_PEFE_FILTERAMOUNT_MASK 0x000000ff

#define	EMU_CHAN_PEFE_FILTERAMOUNT EMU_MKSUBREG(8, 0, EMU_CHAN_PEFE)

#define	EMU_CHAN_FMMOD 0x1b

#define	EMU_CHAN_FMMOD_MODVIBRATO 0x0000ff00

#define	EMU_CHAN_FMMOD_MOFILTER 0x000000ff

#define	EMU_CHAN_TREMFRQ 0x1c

#define	EMU_CHAN_TREMFRQ_DEPTH 0x0000ff00

#define	EMU_CHAN_FM2FRQ2 0x1d

#define	EMU_CHAN_FM2FRQ2_DEPTH 0x0000ff00

#define	EMU_CHAN_FM2FRQ2_FREQUENCY 0x000000ff

#define	EMU_CHAN_TEMPENV 0x1e

#define	EMU_CHAN_TEMPENV_MASK 0x0000ffff

#define	EMU_CHAN_CD0 0x20

#define	EMU_CHAN_CD1 0x21

#define	EMU_CHAN_CD2 0x22

#define	EMU_CHAN_CD3 0x23

#define	EMU_CHAN_CD4 0x24

#define	EMU_CHAN_CD5 0x25

#define	EMU_CHAN_CD6 0x26

#define	EMU_CHAN_CD7 0x27

#define	EMU_CHAN_CD8 0x28

#define	EMU_CHAN_CD9 0x29

#define	EMU_CHAN_CDA 0x2a

#define	EMU_CHAN_CDB 0x2b

#define	EMU_CHAN_CDC 0x2c

#define	EMU_CHAN_CDD 0x2d

#define	EMU_CHAN_CDE 0x2e

#define	EMU_CHAN_CDF 0x2f

#define	EMU_PTB 0x40

#define	EMU_PTB_MASK 0xfffff000

#define	EMU_TCB 0x41

#define	EMU_TCB_MASK 0xfffff000

#define	EMU_ADCCR 0x42

#define	EMU_ADCCR_RCHANENABLE 0x00000010

#define	EMU_A_ADCCR_RCHANENABLE 0x00000020

#define	EMU_ADCCR_LCHANENABLE 0x00000008

#define	EMU_A_ADCCR_LCHANENABLE 0x00000010

#define	EMU_ADCCR_SAMPLERATE_MASK 0x00000007

#define	EMU_A_ADCCR_SAMPLERATE_MASK 0x0000000f

#define	EMU_ADCCR_SAMPLERATE_48 0x00000000

#define	EMU_ADCCR_SAMPLERATE_44 0x00000001

#define	EMU_ADCCR_SAMPLERATE_32 0x00000002

#define	EMU_ADCCR_SAMPLERATE_24 0x00000003

#define	EMU_ADCCR_SAMPLERATE_22 0x00000004

#define	EMU_ADCCR_SAMPLERATE_16 0x00000005

#define	EMU_A_ADCCR_SAMPLERATE_12 0x00000006

#define	EMU_ADCCR_SAMPLERATE_11 0x00000006

#define	EMU_A_ADCCR_SAMPLERATE_11 0x00000007

#define	EMU_ADCCR_SAMPLERATE_8 0x00000007

#define	EMU_A_ADCCR_SAMPLERATE_8 0x00000008

#define	EMU_FXWC 0x43

#define	EMU_TCBS 0x44

#define	EMU_TCBS_MASK 0x00000007

#define	EMU_TCBS_BUFFSIZE_16K 0x00000000

#define	EMU_TCBS_BUFFSIZE_32K 0x00000001

#define	EMU_TCBS_BUFFSIZE_64K 0x00000002

#define	EMU_TCBS_BUFFSIZE_128K 0x00000003

#define	EMU_TCBS_BUFFSIZE_256K 0x00000004

#define	EMU_TCBS_BUFFSIZE_512K 0x00000005

#define	EMU_TCBS_BUFFSIZE_1024K 0x00000006

#define	EMU_TCBS_BUFFSIZE_2048K 0x00000007

#define	EMU_MICBA 0x45

#define	EMU_ADCBA 0x46

#define	EMU_FXBA 0x47

#define	EMU_RECBA_MASK 0xfffff000

#define	EMU_MICBS 0x49

#define	EMU_ADCBS 0x4a

#define	EMU_FXBS 0x4b

#define	EMU_RECBS_BUFSIZE_NONE 0x00000000

#define	EMU_RECBS_BUFSIZE_384 0x00000001

#define	EMU_RECBS_BUFSIZE_448 0x00000002

#define	EMU_RECBS_BUFSIZE_512 0x00000003

#define	EMU_RECBS_BUFSIZE_640 0x00000004

#define	EMU_RECBS_BUFSIZE_768 0x00000005

#define	EMU_RECBS_BUFSIZE_896 0x00000006

#define	EMU_RECBS_BUFSIZE_1024 0x00000007

#define	EMU_RECBS_BUFSIZE_1280 0x00000008

#define	EMU_RECBS_BUFSIZE_1536 0x00000009

#define	EMU_RECBS_BUFSIZE_1792 0x0000000a

#define	EMU_RECBS_BUFSIZE_2048 0x0000000b

#define	EMU_RECBS_BUFSIZE_2560 0x0000000c

#define	EMU_RECBS_BUFSIZE_3072 0x0000000d

#define	EMU_RECBS_BUFSIZE_3584 0x0000000e

#define	EMU_RECBS_BUFSIZE_4096 0x0000000f

#define	EMU_RECBS_BUFSIZE_5120 0x00000010

#define	EMU_RECBS_BUFSIZE_6144 0x00000011

#define	EMU_RECBS_BUFSIZE_7168 0x00000012

#define	EMU_RECBS_BUFSIZE_8192 0x00000013

#define	EMU_RECBS_BUFSIZE_10240 0x00000014

#define	EMU_RECBS_BUFSIZE_12288 0x00000015

#define	EMU_RECBS_BUFSIZE_14366 0x00000016

#define	EMU_RECBS_BUFSIZE_16384 0x00000017

#define	EMU_RECBS_BUFSIZE_20480 0x00000018

#define	EMU_RECBS_BUFSIZE_24576 0x00000019

#define	EMU_RECBS_BUFSIZE_28672 0x0000001a

#define	EMU_RECBS_BUFSIZE_32768 0x0000001b

#define	EMU_RECBS_BUFSIZE_40960 0x0000001c

#define	EMU_RECBS_BUFSIZE_49152 0x0000001d

#define	EMU_RECBS_BUFSIZE_57344 0x0000001e

#define	EMU_RECBS_BUFSIZE_65536 0x0000001f

#define	EMU_CDCS 0x50

#define	EMU_GPSCS 0x51

#define	EMU_DBG 0x52

#define	EMU_DBG_ZC 0x80000000

#define	EMU_DBG_SATURATION_OCCURRED 0x02000000

#define	EMU_DBG_SATURATION_ADDR 0x01ff0000

#define	EMU_DBG_SINGLE_STEP 0x00008000

#define	EMU_DBG_STEP 0x00004000

#define	EMU_DBG_CONDITION_CODE 0x00003e00

#define	EMU_DBG_SINGLE_STEP_ADDR 0x000001ff

#define	EMU_A_DBG 0x53

#define	EMU_A_DBG_SINGLE_STEP 0x00020000

#define	EMU_A_DBG_ZC 0x40000000

#define	EMU_A_DBG_STEP_ADDR 0x000003ff

#define	EMU_A_DBG_SATURATION_OCCRD 0x20000000

#define	EMU_A_DBG_SATURATION_ADDR 0x0ffc0000

#define	EMU_SPCS0 0x54

#define	EMU_SPCS1 0x55

#define	EMU_SPCS2 0x56

#define	EMU_SPCS_CLKACCYMASK 0x30000000

#define	EMU_SPCS_CLKACCY_1000PPM 0x00000000

#define	EMU_SPCS_CLKACCY_50PPM 0x10000000

#define	EMU_SPCS_CLKACCY_VARIABLE 0x20000000

#define	EMU_SPCS_SAMPLERATEMASK 0x0f000000

#define	EMU_SPCS_SAMPLERATE_44 0x00000000

#define	EMU_SPCS_SAMPLERATE_48 0x02000000

#define	EMU_SPCS_SAMPLERATE_32 0x03000000

#define	EMU_SPCS_CHANNELNUMMASK 0x00f00000

#define	EMU_SPCS_CHANNELNUM_UNSPEC 0x00000000

#define	EMU_SPCS_CHANNELNUM_LEFT 0x00100000

#define	EMU_SPCS_CHANNELNUM_RIGHT 0x00200000

#define	EMU_SPCS_SOURCENUMMASK 0x000f0000

#define	EMU_SPCS_SOURCENUM_UNSPEC 0x00000000

#define	EMU_SPCS_GENERATIONSTATUS 0x00008000

#define	EMU_SPCS_CATEGORYCODEMASK 0x00007f00

#define	EMU_SPCS_MODEMASK 0x000000c0

#define	EMU_SPCS_EMPHASISMASK 0x00000038

#define	EMU_SPCS_EMPHASIS_NONE 0x00000000

#define	EMU_SPCS_EMPHASIS_50_15 0x00000008

#define	EMU_SPCS_COPYRIGHT 0x00000004

#define	EMU_SPCS_NOTAUDIODATA 0x00000002

#define	EMU_SPCS_PROFESSIONAL 0x00000001

#define	EMU_CLIEL 0x58

#define	EMU_CLIEH 0x59

#define	EMU_CLIPL 0x5a

#define	EMU_CLIPH 0x5b

#define	EMU_SOLEL 0x5c

#define	EMU_SOLEH 0x5d

#define	EMU_SPBYPASS 0x5e

#define	EMU_SPBYPASS_ENABLE 0x00000001

#define	EMU_SPBYPASS_24_BITS 0x00000f00

#define	EMU_AC97SLOT 0x5f

#define	EMU_AC97SLOT_CENTER 0x00000010

#define	EMU_AC97SLOT_LFE 0x00000020

#define	EMU_CDSRCS 0x60

#define	EMU_GPSRCS 0x61

#define	EMU_ZVSRCS 0x62

#define	EMU_SRCS_SPDIFLOCKED 0x02000000

#define	EMU_SRCS_RATELOCKED 0x01000000

#define	EMU_SRCS_ESTSAMPLERATE 0x0007ffff

#define	EMU_MICIDX 0x63

#define	EMU_A_MICIDX 0x64

#define	EMU_ADCIDX 0x64

#define	EMU_A_ADCIDX 0x63

#define	EMU_FXIDX 0x65

#define	EMU_RECIDX_MASK 0x0000ffff

#define	EMU_RECIDX(idxreg) (0x10000000\|(idxreg))

#define	EMU_A_MUDATA1 0x70

#define	EMU_A_MUCMD1 0x71

#define	EMU_A_MUSTAT1 EMU_A_MUCMD1

#define	EMU_A_MUDATA2 0x72

#define	EMU_A_MUCMD2 0x73

#define	EMU_A_MUSTAT2 EMU_A_MUCMD2

#define	EMU_A_FXWC1 0x74

#define	EMU_A_FXWC2 0x75

#define	EMU_A_SPDIF_SAMPLERATE 0x76

#define	EMU_A_SPDIF_44100 0x00000080

#define	EMU_A_SPDIF_48000 0x00000000

#define	EMU_A_SPDIF_96000 0x00000040

#define	EMU_A2_SPDIF_SAMPLERATE EMU_MKSUBREG(3, 9, EMU_A_SPDIF_SAMPLERATE)

#define	EMU_A2_SPDIF_MASK 0x00000e00

#define	EMU_A2_SPDIF_UNKNOWN 0x2

#define	EMU_A_CHAN_FXRT2 0x7c

#define	EMU_A_CHAN_FXRT_CHANNELE 0x0000003f

#define	EMU_A_CHAN_FXRT_CHANNELF 0x00003f00

#define	EMU_A_CHAN_FXRT_CHANNELG 0x003f0000

#define	EMU_A_CHAN_FXRT_CHANNELH 0x3f000000

#define	EMU_A_CHAN_SENDAMOUNTS 0x7d

#define	EMU_A_CHAN_FXSENDAMOUNTS_E_MASK 0xff000000

#define	EMU_A_CHAN_FXSENDAMOUNTS_F_MASK 0x00ff0000

#define	EMU_A_CHAN_FXSENDAMOUNTS_G_MASK 0x0000ff00

#define	EMU_A_CHAN_FXSENDAMOUNTS_H_MASK 0x000000ff

#define	EMU_A_CHAN_FXRT1 0x7e

#define	EMU_A_CHAN_FXRT_CHANNELA 0x0000003f

#define	EMU_A_CHAN_FXRT_CHANNELB 0x00003f00

#define	EMU_A_CHAN_FXRT_CHANNELC 0x003f0000

#define	EMU_A_CHAN_FXRT_CHANNELD 0x3f000000

#define	EMU_FXGPREGBASE 0x100

#define	EMU_A_FXGPREGBASE 0x400

#define	EMU_TANKMEMDATAREGBASE 0x200

#define	EMU_TANKMEMDATAREG_MASK 0x000fffff

#define	EMU_TANKMEMADDRREGBASE 0x300

#define	EMU_TANKMEMADDRREG_ADDR_MASK 0x000fffff

#define	EMU_TANKMEMADDRREG_CLEAR 0x00800000

#define	EMU_TANKMEMADDRREG_ALIGN 0x00400000

#define	EMU_TANKMEMADDRREG_WRITE 0x00200000

#define	EMU_TANKMEMADDRREG_READ 0x00100000

#define	EMU_MICROCODEBASE 0x400

#define	EMU_A_MICROCODEBASE 0x600

#define	EMU_DSP_LOWORD_OPX_MASK 0x000ffc00

#define	EMU_DSP_LOWORD_OPY_MASK 0x000003ff

#define	EMU_DSP_HIWORD_OPCODE_MASK 0x00f00000

#define	EMU_DSP_HIWORD_RESULT_MASK 0x000ffc00

#define	EMU_DSP_HIWORD_OPA_MASK 0x000003ff

#define	EMU_A_DSP_LOWORD_OPX_MASK 0x007ff000

#define	EMU_A_DSP_LOWORD_OPY_MASK 0x000007ff

#define	EMU_A_DSP_HIWORD_OPCODE_MASK 0x0f000000

#define	EMU_A_DSP_HIWORD_RESULT_MASK 0x007ff000

#define	EMU_A_DSP_HIWORD_OPA_MASK 0x000007ff

#define	EMU_DSP_OP_MACS 0x0

#define	EMU_DSP_OP_MACS1 0x1

#define	EMU_DSP_OP_MACW 0x2

#define	EMU_DSP_OP_MACW1 0x3

#define	EMU_DSP_OP_MACINTS 0x4

#define	EMU_DSP_OP_MACINTW 0x5

#define	EMU_DSP_OP_ACC3 0x6

#define	EMU_DSP_OP_MACMV 0x7

#define	EMU_DSP_OP_ANDXOR 0x8

#define	EMU_DSP_OP_TSTNEG 0x9

#define	EMU_DSP_OP_LIMIT 0xA

#define	EMU_DSP_OP_LIMIT1 0xB

#define	EMU_DSP_OP_LOG 0xC

#define	EMU_DSP_OP_EXP 0xD

#define	EMU_DSP_OP_INTERP 0xE

#define	EMU_DSP_OP_SKIP 0xF

#define	EMU_DSP_FX(num) (num)

#define	EMU_DSP_IOL(base, num) (base + (num << 1))

#define	EMU_DSP_IOR(base, num) (EMU_DSP_IOL(base, num) + 1)

#define	EMU_DSP_INL_BASE 0x010

#define	EMU_DSP_INL(num) (EMU_DSP_IOL(EMU_DSP_INL_BASE, num))

#define	EMU_DSP_INR(num) (EMU_DSP_IOR(EMU_DSP_INL_BASE, num))

#define	EMU_A_DSP_INL_BASE 0x040

#define	EMU_A_DSP_INL(num) (EMU_DSP_IOL(EMU_A_DSP_INL_BASE, num))

#define	EMU_A_DSP_INR(num) (EMU_DSP_IOR(EMU_A_DSP_INL_BASE, num))

#define	EMU_DSP_IN_AC97 0

#define	EMU_DSP_IN_CDSPDIF 1

#define	EMU_DSP_IN_ZOOM 2

#define	EMU_DSP_IN_TOSOPT 3

#define	EMU_DSP_IN_LVDLM1 4

#define	EMU_DSP_IN_LVDCOS 5

#define	EMU_DSP_IN_LVDLM2 6

#define	EMU_DSP_IN_UNKNOWN 7

#define	EMU_DSP_OUTL_BASE 0x020

#define	EMU_DSP_OUTL(num) (EMU_DSP_IOL(EMU_DSP_OUTL_BASE, num))

#define	EMU_DSP_OUTR(num) (EMU_DSP_IOR(EMU_DSP_OUTL_BASE, num))

#define	EMU_DSP_OUT_A_FRONT 0

#define	EMU_DSP_OUT_D_FRONT 1

#define	EMU_DSP_OUT_D_CENTER 2

#define	EMU_DSP_OUT_DRIVE_HP 3

#define	EMU_DSP_OUT_AD_REAR 4

#define	EMU_DSP_OUT_ADC 5

#define	EMU_DSP_OUTL_MIC 6

#define	EMU_A_DSP_OUTL_BASE 0x060

#define	EMU_A_DSP_OUTL(num) (EMU_DSP_IOL(EMU_A_DSP_OUTL_BASE, num))

#define	EMU_A_DSP_OUTR(num) (EMU_DSP_IOR(EMU_A_DSP_OUTL_BASE, num))

#define	EMU_A_DSP_OUT_D_FRONT 0

#define	EMU_A_DSP_OUT_D_CENTER 1

#define	EMU_A_DSP_OUT_DRIVE_HP 2

#define	EMU_A_DSP_OUT_DREAR 3

#define	EMU_A_DSP_OUT_A_FRONT 4

#define	EMU_A_DSP_OUT_A_CENTER 5

#define	EMU_A_DSP_OUT_A_REAR 7

#define	EMU_A_DSP_OUT_ADC 11

#define	EMU_DSP_CST_BASE 0x40

#define	EMU_A_DSP_CST_BASE 0xc0

#define	EMU_DSP_CST(num) (EMU_DSP_CST_BASE + num)

#define	EMU_A_DSP_CST(num) (EMU_A_DSP_CST_BASE + num)

#define	EMU_DSP_HWR_ACC 0x056

#define	EMU_DSP_HWR_CCR 0x057

#define	EMU_DSP_HWR_CCR_S 0x04

#define	EMU_DSP_HWR_CCR_Z 0x03

#define	EMU_DSP_HWR_CCR_M 0x02

#define	EMU_DSP_HWR_CCR_N 0x01

#define	EMU_DSP_HWR_CCR_B 0x00

#define	EMU_DSP_HWR_NOISE0 0x058

#define	EMU_DSP_HWR_NOISE1 0x059

#define	EMU_DSP_HWR_INTR 0x05A

#define	EMU_DSP_HWR_DBAC 0x05B

#define	EMU_DSP_GPR(num) (EMU_FXGPREGBASE + num)

#define	EMU_A_DSP_GPR(num) (EMU_A_FXGPREGBASE + num)

Macro Definition Documentation

◆ EMU_A2_DATA

#define EMU_A2_DATA 0x24

Definition at line 184 of file emuxkireg.h.

◆ EMU_A2_PTR

#define EMU_A2_PTR 0x20

Definition at line 183 of file emuxkireg.h.

◆ EMU_A2_SPDIF_MASK

#define EMU_A2_SPDIF_MASK 0x00000e00

Definition at line 534 of file emuxkireg.h.

◆ EMU_A2_SPDIF_SAMPLERATE

#define EMU_A2_SPDIF_SAMPLERATE EMU_MKSUBREG(3, 9, EMU_A_SPDIF_SAMPLERATE)

Definition at line 533 of file emuxkireg.h.

◆ EMU_A2_SPDIF_UNKNOWN

#define EMU_A2_SPDIF_UNKNOWN 0x2

Definition at line 535 of file emuxkireg.h.

◆ EMU_A2_SRCMULTI

#define EMU_A2_SRCMULTI 0x6e0000

Definition at line 189 of file emuxkireg.h.

◆ EMU_A2_SRCMULTI_ENABLE_INPUT

#define EMU_A2_SRCMULTI_ENABLE_INPUT 0xff00ff00

Definition at line 190 of file emuxkireg.h.

◆ EMU_A2_SRCSEL

#define EMU_A2_SRCSEL 0x600000

Definition at line 186 of file emuxkireg.h.

◆ EMU_A2_SRCSEL_ENABLE_SPDIF

#define EMU_A2_SRCSEL_ENABLE_SPDIF 0x00000004

Definition at line 187 of file emuxkireg.h.

◆ EMU_A2_SRCSEL_ENABLE_SRCMULTI

#define EMU_A2_SRCSEL_ENABLE_SRCMULTI 0x00000010

Definition at line 188 of file emuxkireg.h.

◆ EMU_A_ADCCR_LCHANENABLE

#define EMU_A_ADCCR_LCHANENABLE 0x00000010

Definition at line 372 of file emuxkireg.h.

◆ EMU_A_ADCCR_RCHANENABLE

#define EMU_A_ADCCR_RCHANENABLE 0x00000020

Definition at line 370 of file emuxkireg.h.

◆ EMU_A_ADCCR_SAMPLERATE_11

#define EMU_A_ADCCR_SAMPLERATE_11 0x00000007

Definition at line 383 of file emuxkireg.h.

◆ EMU_A_ADCCR_SAMPLERATE_12

#define EMU_A_ADCCR_SAMPLERATE_12 0x00000006

Definition at line 381 of file emuxkireg.h.

◆ EMU_A_ADCCR_SAMPLERATE_8

#define EMU_A_ADCCR_SAMPLERATE_8 0x00000008

Definition at line 385 of file emuxkireg.h.

◆ EMU_A_ADCCR_SAMPLERATE_MASK

#define EMU_A_ADCCR_SAMPLERATE_MASK 0x0000000f

Definition at line 374 of file emuxkireg.h.

◆ EMU_A_ADCIDX

#define EMU_A_ADCIDX 0x63

Definition at line 511 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT1

#define EMU_A_CHAN_FXRT1 0x7e

Definition at line 547 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT2

#define EMU_A_CHAN_FXRT2 0x7c

Definition at line 537 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELA

#define EMU_A_CHAN_FXRT_CHANNELA 0x0000003f

Definition at line 548 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELB

#define EMU_A_CHAN_FXRT_CHANNELB 0x00003f00

Definition at line 549 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELC

#define EMU_A_CHAN_FXRT_CHANNELC 0x003f0000

Definition at line 550 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELD

#define EMU_A_CHAN_FXRT_CHANNELD 0x3f000000

Definition at line 551 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELE

#define EMU_A_CHAN_FXRT_CHANNELE 0x0000003f

Definition at line 538 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELF

#define EMU_A_CHAN_FXRT_CHANNELF 0x00003f00

Definition at line 539 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELG

#define EMU_A_CHAN_FXRT_CHANNELG 0x003f0000

Definition at line 540 of file emuxkireg.h.

◆ EMU_A_CHAN_FXRT_CHANNELH

#define EMU_A_CHAN_FXRT_CHANNELH 0x3f000000

Definition at line 541 of file emuxkireg.h.

◆ EMU_A_CHAN_FXSENDAMOUNTS_E_MASK

#define EMU_A_CHAN_FXSENDAMOUNTS_E_MASK 0xff000000

Definition at line 543 of file emuxkireg.h.

◆ EMU_A_CHAN_FXSENDAMOUNTS_F_MASK

#define EMU_A_CHAN_FXSENDAMOUNTS_F_MASK 0x00ff0000

Definition at line 544 of file emuxkireg.h.

◆ EMU_A_CHAN_FXSENDAMOUNTS_G_MASK

#define EMU_A_CHAN_FXSENDAMOUNTS_G_MASK 0x0000ff00

Definition at line 545 of file emuxkireg.h.

◆ EMU_A_CHAN_FXSENDAMOUNTS_H_MASK

#define EMU_A_CHAN_FXSENDAMOUNTS_H_MASK 0x000000ff

Definition at line 546 of file emuxkireg.h.

◆ EMU_A_CHAN_SENDAMOUNTS

#define EMU_A_CHAN_SENDAMOUNTS 0x7d

Definition at line 542 of file emuxkireg.h.

◆ EMU_A_DBG

#define EMU_A_DBG 0x53

Definition at line 452 of file emuxkireg.h.

◆ EMU_A_DBG_SATURATION_ADDR

#define EMU_A_DBG_SATURATION_ADDR 0x0ffc0000

Definition at line 457 of file emuxkireg.h.

◆ EMU_A_DBG_SATURATION_OCCRD

#define EMU_A_DBG_SATURATION_OCCRD 0x20000000

Definition at line 456 of file emuxkireg.h.

◆ EMU_A_DBG_SINGLE_STEP

#define EMU_A_DBG_SINGLE_STEP 0x00020000

Definition at line 453 of file emuxkireg.h.

◆ EMU_A_DBG_STEP_ADDR

#define EMU_A_DBG_STEP_ADDR 0x000003ff

Definition at line 455 of file emuxkireg.h.

◆ EMU_A_DBG_ZC

#define EMU_A_DBG_ZC 0x40000000

Definition at line 454 of file emuxkireg.h.

◆ EMU_A_DSP_CST

#define EMU_A_DSP_CST ( num ) (EMU_A_DSP_CST_BASE + num)

Definition at line 642 of file emuxkireg.h.

◆ EMU_A_DSP_CST_BASE

#define EMU_A_DSP_CST_BASE 0xc0

Definition at line 640 of file emuxkireg.h.

◆ EMU_A_DSP_GPR

#define EMU_A_DSP_GPR ( num ) (EMU_A_FXGPREGBASE + num)

Definition at line 681 of file emuxkireg.h.

◆ EMU_A_DSP_HIWORD_OPA_MASK

#define EMU_A_DSP_HIWORD_OPA_MASK 0x000007ff

Definition at line 577 of file emuxkireg.h.

◆ EMU_A_DSP_HIWORD_OPCODE_MASK

#define EMU_A_DSP_HIWORD_OPCODE_MASK 0x0f000000

Definition at line 575 of file emuxkireg.h.

◆ EMU_A_DSP_HIWORD_RESULT_MASK

#define EMU_A_DSP_HIWORD_RESULT_MASK 0x007ff000

Definition at line 576 of file emuxkireg.h.

◆ EMU_A_DSP_INL

#define EMU_A_DSP_INL ( num ) (EMU_DSP_IOL(EMU_A_DSP_INL_BASE, num))

Definition at line 605 of file emuxkireg.h.

◆ EMU_A_DSP_INL_BASE

#define EMU_A_DSP_INL_BASE 0x040

Definition at line 604 of file emuxkireg.h.

◆ EMU_A_DSP_INR

#define EMU_A_DSP_INR ( num ) (EMU_DSP_IOR(EMU_A_DSP_INL_BASE, num))

Definition at line 606 of file emuxkireg.h.

◆ EMU_A_DSP_LOWORD_OPX_MASK

#define EMU_A_DSP_LOWORD_OPX_MASK 0x007ff000

Definition at line 573 of file emuxkireg.h.

◆ EMU_A_DSP_LOWORD_OPY_MASK

#define EMU_A_DSP_LOWORD_OPY_MASK 0x000007ff

Definition at line 574 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_A_CENTER

#define EMU_A_DSP_OUT_A_CENTER 5

Definition at line 635 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_A_FRONT

#define EMU_A_DSP_OUT_A_FRONT 4

Definition at line 634 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_A_REAR

#define EMU_A_DSP_OUT_A_REAR 7

Definition at line 636 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_ADC

#define EMU_A_DSP_OUT_ADC 11

Definition at line 637 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_D_CENTER

#define EMU_A_DSP_OUT_D_CENTER 1

Definition at line 631 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_D_FRONT

#define EMU_A_DSP_OUT_D_FRONT 0

Definition at line 630 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_DREAR

#define EMU_A_DSP_OUT_DREAR 3

Definition at line 633 of file emuxkireg.h.

◆ EMU_A_DSP_OUT_DRIVE_HP

#define EMU_A_DSP_OUT_DRIVE_HP 2

Definition at line 632 of file emuxkireg.h.

◆ EMU_A_DSP_OUTL

#define EMU_A_DSP_OUTL ( num ) (EMU_DSP_IOL(EMU_A_DSP_OUTL_BASE, num))

Definition at line 628 of file emuxkireg.h.

◆ EMU_A_DSP_OUTL_BASE

#define EMU_A_DSP_OUTL_BASE 0x060

Definition at line 627 of file emuxkireg.h.

◆ EMU_A_DSP_OUTR

#define EMU_A_DSP_OUTR ( num ) (EMU_DSP_IOR(EMU_A_DSP_OUTL_BASE, num))

Definition at line 629 of file emuxkireg.h.

◆ EMU_A_FXGPREGBASE

#define EMU_A_FXGPREGBASE 0x400

Definition at line 554 of file emuxkireg.h.

◆ EMU_A_FXWC1

#define EMU_A_FXWC1 0x74

Definition at line 527 of file emuxkireg.h.

◆ EMU_A_FXWC2

#define EMU_A_FXWC2 0x75

Definition at line 528 of file emuxkireg.h.

◆ EMU_A_GPINPUT_MASK

#define EMU_A_GPINPUT_MASK 0xff00

Definition at line 169 of file emuxkireg.h.

◆ EMU_A_GPOUTPUT_MASK

#define EMU_A_GPOUTPUT_MASK 0x00ff

Definition at line 170 of file emuxkireg.h.

◆ EMU_A_IOCFG

#define EMU_A_IOCFG 0x18

Definition at line 168 of file emuxkireg.h.

◆ EMU_A_IOCFG_GPOUT0

#define EMU_A_IOCFG_GPOUT0 0x0044

Definition at line 171 of file emuxkireg.h.

◆ EMU_A_IOCFG_GPOUT1

#define EMU_A_IOCFG_GPOUT1 0x0002

Definition at line 172 of file emuxkireg.h.

◆ EMU_A_MICIDX

#define EMU_A_MICIDX 0x64

Definition at line 509 of file emuxkireg.h.

◆ EMU_A_MICROCODEBASE

#define EMU_A_MICROCODEBASE 0x600

Definition at line 567 of file emuxkireg.h.

◆ EMU_A_MUCMD1

#define EMU_A_MUCMD1 0x71

Definition at line 522 of file emuxkireg.h.

◆ EMU_A_MUCMD2

#define EMU_A_MUCMD2 0x73

Definition at line 525 of file emuxkireg.h.

◆ EMU_A_MUDATA1

#define EMU_A_MUDATA1 0x70

Definition at line 521 of file emuxkireg.h.

◆ EMU_A_MUDATA2

#define EMU_A_MUDATA2 0x72

Definition at line 524 of file emuxkireg.h.

◆ EMU_A_MUSTAT1

#define EMU_A_MUSTAT1 EMU_A_MUCMD1

Definition at line 523 of file emuxkireg.h.

◆ EMU_A_MUSTAT2

#define EMU_A_MUSTAT2 EMU_A_MUCMD2

Definition at line 526 of file emuxkireg.h.

◆ EMU_A_PTR_ADDR_MASK

#define EMU_A_PTR_ADDR_MASK 0x0fff0000

Definition at line 54 of file emuxkireg.h.

◆ EMU_A_SPDIF_44100

#define EMU_A_SPDIF_44100 0x00000080

Definition at line 530 of file emuxkireg.h.

◆ EMU_A_SPDIF_48000

#define EMU_A_SPDIF_48000 0x00000000

Definition at line 531 of file emuxkireg.h.

◆ EMU_A_SPDIF_96000

#define EMU_A_SPDIF_96000 0x00000040

Definition at line 532 of file emuxkireg.h.

◆ EMU_A_SPDIF_SAMPLERATE

#define EMU_A_SPDIF_SAMPLERATE 0x76

Definition at line 529 of file emuxkireg.h.

◆ EMU_AC97ADDR

#define EMU_AC97ADDR 0x1e

Definition at line 179 of file emuxkireg.h.

◆ EMU_AC97ADDR_ADDR

#define EMU_AC97ADDR_ADDR 0x7f

Definition at line 181 of file emuxkireg.h.

◆ EMU_AC97ADDR_RDY

#define EMU_AC97ADDR_RDY 0x80

Definition at line 180 of file emuxkireg.h.

◆ EMU_AC97DATA

#define EMU_AC97DATA 0x1c

Definition at line 178 of file emuxkireg.h.

◆ EMU_AC97SLOT

#define EMU_AC97SLOT 0x5f

Definition at line 497 of file emuxkireg.h.

◆ EMU_AC97SLOT_CENTER

#define EMU_AC97SLOT_CENTER 0x00000010

Definition at line 498 of file emuxkireg.h.

◆ EMU_AC97SLOT_LFE

#define EMU_AC97SLOT_LFE 0x00000020

Definition at line 499 of file emuxkireg.h.

◆ EMU_ADCBA

#define EMU_ADCBA 0x46

Definition at line 400 of file emuxkireg.h.

◆ EMU_ADCBS

#define EMU_ADCBS 0x4a

Definition at line 405 of file emuxkireg.h.

◆ EMU_ADCCR

#define EMU_ADCCR 0x42

Definition at line 368 of file emuxkireg.h.

◆ EMU_ADCCR_LCHANENABLE

#define EMU_ADCCR_LCHANENABLE 0x00000008

Definition at line 371 of file emuxkireg.h.

◆ EMU_ADCCR_RCHANENABLE

#define EMU_ADCCR_RCHANENABLE 0x00000010

Definition at line 369 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_11

#define EMU_ADCCR_SAMPLERATE_11 0x00000006

Definition at line 382 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_16

#define EMU_ADCCR_SAMPLERATE_16 0x00000005

Definition at line 380 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_22

#define EMU_ADCCR_SAMPLERATE_22 0x00000004

Definition at line 379 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_24

#define EMU_ADCCR_SAMPLERATE_24 0x00000003

Definition at line 378 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_32

#define EMU_ADCCR_SAMPLERATE_32 0x00000002

Definition at line 377 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_44

#define EMU_ADCCR_SAMPLERATE_44 0x00000001

Definition at line 376 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_48

#define EMU_ADCCR_SAMPLERATE_48 0x00000000

Definition at line 375 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_8

#define EMU_ADCCR_SAMPLERATE_8 0x00000007

Definition at line 384 of file emuxkireg.h.

◆ EMU_ADCCR_SAMPLERATE_MASK

#define EMU_ADCCR_SAMPLERATE_MASK 0x00000007

Definition at line 373 of file emuxkireg.h.

◆ EMU_ADCIDX

#define EMU_ADCIDX 0x64

Definition at line 510 of file emuxkireg.h.

◆ EMU_CDCS

#define EMU_CDCS 0x50

Definition at line 440 of file emuxkireg.h.

◆ EMU_CDSRCS

#define EMU_CDSRCS 0x60

Definition at line 501 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDM

#define EMU_CHAN_ATKHLDM 0x15

Definition at line 300 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDM_ATTACKTIME

#define EMU_CHAN_ATKHLDM_ATTACKTIME 0x0000007f

Definition at line 303 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDM_HOLDTIME

#define EMU_CHAN_ATKHLDM_HOLDTIME 0x00007f00

Definition at line 302 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDM_PHASE0

#define EMU_CHAN_ATKHLDM_PHASE0 0x00008000

Definition at line 301 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDV

#define EMU_CHAN_ATKHLDV 0x11

Definition at line 283 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDV_ATTACKTIME_MASK

#define EMU_CHAN_ATKHLDV_ATTACKTIME_MASK 0x0000007f

Definition at line 286 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDV_HOLDTIME_MASK

#define EMU_CHAN_ATKHLDV_HOLDTIME_MASK 0x00007f00

Definition at line 285 of file emuxkireg.h.

◆ EMU_CHAN_ATKHLDV_PHASE0

#define EMU_CHAN_ATKHLDV_PHASE0 0x00008000

Definition at line 284 of file emuxkireg.h.

◆ EMU_CHAN_CCCA

#define EMU_CHAN_CCCA 0x08

Definition at line 238 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_8BITSELECT

#define EMU_CHAN_CCCA_8BITSELECT 0x01000000

Definition at line 249 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_CURRADDR

#define EMU_CHAN_CCCA_CURRADDR EMU_MKSUBREG(24, 0, EMU_CHAN_CCCA)

Definition at line 251 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_CURRADDR_MASK

#define EMU_CHAN_CCCA_CURRADDR_MASK 0x00ffffff

Definition at line 250 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_0

#define EMU_CHAN_CCCA_INTERPROM_0 0x00000000

Definition at line 241 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_1

#define EMU_CHAN_CCCA_INTERPROM_1 0x02000000

Definition at line 242 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_2

#define EMU_CHAN_CCCA_INTERPROM_2 0x04000000

Definition at line 243 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_3

#define EMU_CHAN_CCCA_INTERPROM_3 0x06000000

Definition at line 244 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_4

#define EMU_CHAN_CCCA_INTERPROM_4 0x08000000

Definition at line 245 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_5

#define EMU_CHAN_CCCA_INTERPROM_5 0x0a000000

Definition at line 246 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_6

#define EMU_CHAN_CCCA_INTERPROM_6 0x0c000000

Definition at line 247 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROM_7

#define EMU_CHAN_CCCA_INTERPROM_7 0x0e000000

Definition at line 248 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_INTERPROMMASK

#define EMU_CHAN_CCCA_INTERPROMMASK 0x0e000000

Definition at line 240 of file emuxkireg.h.

◆ EMU_CHAN_CCCA_RESONANCE

#define EMU_CHAN_CCCA_RESONANCE 0xf0000000

Definition at line 239 of file emuxkireg.h.

◆ EMU_CHAN_CCR

#define EMU_CHAN_CCR 0x09

Definition at line 253 of file emuxkireg.h.

◆ EMU_CHAN_CCR_CACHEINVALIDSIZE

#define EMU_CHAN_CCR_CACHEINVALIDSIZE EMU_MKSUBREG(7, 25, EMU_CHAN_CCR)

Definition at line 255 of file emuxkireg.h.

◆ EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK

#define EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK 0xfe000000

Definition at line 254 of file emuxkireg.h.

◆ EMU_CHAN_CCR_CACHELOOPADDRHI

#define EMU_CHAN_CCR_CACHELOOPADDRHI 0x000000ff

Definition at line 263 of file emuxkireg.h.

◆ EMU_CHAN_CCR_CACHELOOPFLAG

#define EMU_CHAN_CCR_CACHELOOPFLAG 0x01000000

Definition at line 256 of file emuxkireg.h.

◆ EMU_CHAN_CCR_INTERLEAVEDSAMPLES

#define EMU_CHAN_CCR_INTERLEAVEDSAMPLES 0x00800000

Definition at line 257 of file emuxkireg.h.

◆ EMU_CHAN_CCR_LOOPFLAG

#define EMU_CHAN_CCR_LOOPFLAG 0x00000100

Definition at line 262 of file emuxkireg.h.

◆ EMU_CHAN_CCR_LOOPINVALSIZE

#define EMU_CHAN_CCR_LOOPINVALSIZE 0x0000fe00

Definition at line 261 of file emuxkireg.h.

◆ EMU_CHAN_CCR_READADDRESS

#define EMU_CHAN_CCR_READADDRESS EMU_MKSUBREG(6, 16, EMU_CHAN_CCR)

Definition at line 260 of file emuxkireg.h.

◆ EMU_CHAN_CCR_READADDRESS_MASK

#define EMU_CHAN_CCR_READADDRESS_MASK 0x003f0000

Definition at line 259 of file emuxkireg.h.

◆ EMU_CHAN_CCR_WORDSIZEDSAMPLES

#define EMU_CHAN_CCR_WORDSIZEDSAMPLES 0x00400000

Definition at line 258 of file emuxkireg.h.

◆ EMU_CHAN_CD0

#define EMU_CHAN_CD0 0x20

Definition at line 343 of file emuxkireg.h.

◆ EMU_CHAN_CD1

#define EMU_CHAN_CD1 0x21

Definition at line 344 of file emuxkireg.h.

◆ EMU_CHAN_CD2

#define EMU_CHAN_CD2 0x22

Definition at line 345 of file emuxkireg.h.

◆ EMU_CHAN_CD3

#define EMU_CHAN_CD3 0x23

Definition at line 346 of file emuxkireg.h.

◆ EMU_CHAN_CD4

#define EMU_CHAN_CD4 0x24

Definition at line 347 of file emuxkireg.h.

◆ EMU_CHAN_CD5

#define EMU_CHAN_CD5 0x25

Definition at line 348 of file emuxkireg.h.

◆ EMU_CHAN_CD6

#define EMU_CHAN_CD6 0x26

Definition at line 349 of file emuxkireg.h.

◆ EMU_CHAN_CD7

#define EMU_CHAN_CD7 0x27

Definition at line 350 of file emuxkireg.h.

◆ EMU_CHAN_CD8

#define EMU_CHAN_CD8 0x28

Definition at line 351 of file emuxkireg.h.

◆ EMU_CHAN_CD9

#define EMU_CHAN_CD9 0x29

Definition at line 352 of file emuxkireg.h.

◆ EMU_CHAN_CDA

#define EMU_CHAN_CDA 0x2a

Definition at line 353 of file emuxkireg.h.

◆ EMU_CHAN_CDB

#define EMU_CHAN_CDB 0x2b

Definition at line 354 of file emuxkireg.h.

◆ EMU_CHAN_CDC

#define EMU_CHAN_CDC 0x2c

Definition at line 355 of file emuxkireg.h.

◆ EMU_CHAN_CDD

#define EMU_CHAN_CDD 0x2d

Definition at line 356 of file emuxkireg.h.

◆ EMU_CHAN_CDE

#define EMU_CHAN_CDE 0x2e

Definition at line 357 of file emuxkireg.h.

◆ EMU_CHAN_CDF

#define EMU_CHAN_CDF 0x2f

Definition at line 358 of file emuxkireg.h.

◆ EMU_CHAN_CLP

#define EMU_CHAN_CLP 0x0a

Definition at line 265 of file emuxkireg.h.

◆ EMU_CHAN_CLP_CACHELOOPADDR

#define EMU_CHAN_CLP_CACHELOOPADDR 0x0000ffff

Definition at line 266 of file emuxkireg.h.

◆ EMU_CHAN_CPF

#define EMU_CHAN_CPF 0x00

Definition at line 194 of file emuxkireg.h.

◆ EMU_CHAN_CPF_FRACADDRESS_MASK

#define EMU_CHAN_CPF_FRACADDRESS_MASK 0x00003fff

Definition at line 201 of file emuxkireg.h.

◆ EMU_CHAN_CPF_PITCH

#define EMU_CHAN_CPF_PITCH EMU_MKSUBREG(16, 16, EMU_CHAN_CPF)

Definition at line 197 of file emuxkireg.h.

◆ EMU_CHAN_CPF_PITCH_MASK

#define EMU_CHAN_CPF_PITCH_MASK 0xffff0000

Definition at line 196 of file emuxkireg.h.

◆ EMU_CHAN_CPF_STEREO

#define EMU_CHAN_CPF_STEREO EMU_MKSUBREG(1, 15, EMU_CHAN_CPF)

Definition at line 199 of file emuxkireg.h.

◆ EMU_CHAN_CPF_STEREO_MASK

#define EMU_CHAN_CPF_STEREO_MASK 0x00008000

Definition at line 198 of file emuxkireg.h.

◆ EMU_CHAN_CPF_STOP_MASK

#define EMU_CHAN_CPF_STOP_MASK 0x00004000

Definition at line 200 of file emuxkireg.h.

◆ EMU_CHAN_CVCF

#define EMU_CHAN_CVCF 0x02

Definition at line 211 of file emuxkireg.h.

◆ EMU_CHAN_CVCF_CURRFILTER

#define EMU_CHAN_CVCF_CURRFILTER EMU_MKSUBREG(16, 0, EMU_CHAN_CVCF)

Definition at line 215 of file emuxkireg.h.

◆ EMU_CHAN_CVCF_CURRFILTER_MASK

#define EMU_CHAN_CVCF_CURRFILTER_MASK 0x0000ffff

Definition at line 214 of file emuxkireg.h.

◆ EMU_CHAN_CVCF_CURRVOL

#define EMU_CHAN_CVCF_CURRVOL EMU_MKSUBREG(16, 16, EMU_CHAN_CVCF)

Definition at line 213 of file emuxkireg.h.

◆ EMU_CHAN_CVCF_CURRVOL_MASK

#define EMU_CHAN_CVCF_CURRVOL_MASK 0xffff0000

Definition at line 212 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSM

#define EMU_CHAN_DCYSUSM 0x16

Definition at line 305 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSM_DECAYTIME_MASK

#define EMU_CHAN_DCYSUSM_DECAYTIME_MASK 0x0000007f

Definition at line 308 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSM_PHASE1_MASK

#define EMU_CHAN_DCYSUSM_PHASE1_MASK 0x00008000

Definition at line 306 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK

#define EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK 0x00007f00

Definition at line 307 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSV

#define EMU_CHAN_DCYSUSV 0x12

Definition at line 288 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK

#define EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK 0x00000080

Definition at line 291 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSV_DECAYTIME_MASK

#define EMU_CHAN_DCYSUSV_DECAYTIME_MASK 0x0000007f

Definition at line 292 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSV_PHASE1_MASK

#define EMU_CHAN_DCYSUSV_PHASE1_MASK 0x00008000

Definition at line 289 of file emuxkireg.h.

◆ EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK

#define EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK 0x00007f00

Definition at line 290 of file emuxkireg.h.

◆ EMU_CHAN_DSL

#define EMU_CHAN_DSL 0x07

Definition at line 232 of file emuxkireg.h.

◆ EMU_CHAN_DSL_FXSENDAMOUNT_D

#define EMU_CHAN_DSL_FXSENDAMOUNT_D EMU_MKSUBREG(8, 24, EMU_CHAN_DSL)

Definition at line 234 of file emuxkireg.h.

◆ EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK

#define EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK 0xff000000

Definition at line 233 of file emuxkireg.h.

◆ EMU_CHAN_DSL_LOOPENDADDR

#define EMU_CHAN_DSL_LOOPENDADDR EMU_MKSUBREG(24, 0, EMU_CHAN_DSL)

Definition at line 236 of file emuxkireg.h.

◆ EMU_CHAN_DSL_LOOPENDADDR_MASK

#define EMU_CHAN_DSL_LOOPENDADDR_MASK 0x00ffffff

Definition at line 235 of file emuxkireg.h.

◆ EMU_CHAN_ENVVAL

#define EMU_CHAN_ENVVAL 0x14

Definition at line 297 of file emuxkireg.h.

◆ EMU_CHAN_ENVVAL_MASK

#define EMU_CHAN_ENVVAL_MASK 0x0000ffff

Definition at line 298 of file emuxkireg.h.

◆ EMU_CHAN_ENVVOL

#define EMU_CHAN_ENVVOL 0x10

Definition at line 280 of file emuxkireg.h.

◆ EMU_CHAN_ENVVOL_MASK

#define EMU_CHAN_ENVVOL_MASK 0x0000ffff

Definition at line 281 of file emuxkireg.h.

◆ EMU_CHAN_FM2FRQ2

#define EMU_CHAN_FM2FRQ2 0x1d

Definition at line 336 of file emuxkireg.h.

◆ EMU_CHAN_FM2FRQ2_DEPTH

#define EMU_CHAN_FM2FRQ2_DEPTH 0x0000ff00

Definition at line 337 of file emuxkireg.h.

◆ EMU_CHAN_FM2FRQ2_FREQUENCY

#define EMU_CHAN_FM2FRQ2_FREQUENCY 0x000000ff

Definition at line 338 of file emuxkireg.h.

◆ EMU_CHAN_FMMOD

#define EMU_CHAN_FMMOD 0x1b

Definition at line 329 of file emuxkireg.h.

◆ EMU_CHAN_FMMOD_MODVIBRATO

#define EMU_CHAN_FMMOD_MODVIBRATO 0x0000ff00

Definition at line 330 of file emuxkireg.h.

◆ EMU_CHAN_FMMOD_MOFILTER

#define EMU_CHAN_FMMOD_MOFILTER 0x000000ff

Definition at line 331 of file emuxkireg.h.

◆ EMU_CHAN_FXRT

#define EMU_CHAN_FXRT 0x0b

Definition at line 268 of file emuxkireg.h.

◆ EMU_CHAN_FXRT_CHANNELA

#define EMU_CHAN_FXRT_CHANNELA 0x000f0000

Definition at line 269 of file emuxkireg.h.

◆ EMU_CHAN_FXRT_CHANNELB

#define EMU_CHAN_FXRT_CHANNELB 0x00f00000

Definition at line 270 of file emuxkireg.h.

◆ EMU_CHAN_FXRT_CHANNELC

#define EMU_CHAN_FXRT_CHANNELC 0x0f000000

Definition at line 271 of file emuxkireg.h.

◆ EMU_CHAN_FXRT_CHANNELD

#define EMU_CHAN_FXRT_CHANNELD 0xf0000000

Definition at line 272 of file emuxkireg.h.

◆ EMU_CHAN_IFATN

#define EMU_CHAN_IFATN 0x19

Definition at line 317 of file emuxkireg.h.

◆ EMU_CHAN_IFATN_ATTENUATION

#define EMU_CHAN_IFATN_ATTENUATION EMU_MKSUBREG(8, 0, EMU_CHAN_IFATN)

Definition at line 321 of file emuxkireg.h.

◆ EMU_CHAN_IFATN_ATTENUATION_MASK

#define EMU_CHAN_IFATN_ATTENUATION_MASK 0x000000ff

Definition at line 320 of file emuxkireg.h.

◆ EMU_CHAN_IFATN_FILTERCUTOFF

#define EMU_CHAN_IFATN_FILTERCUTOFF EMU_MKSUBREG(8, 8, EMU_CHAN_IFATN)

Definition at line 319 of file emuxkireg.h.

◆ EMU_CHAN_IFATN_FILTERCUTOFF_MASK

#define EMU_CHAN_IFATN_FILTERCUTOFF_MASK 0x0000ff00

Definition at line 318 of file emuxkireg.h.

◆ EMU_CHAN_IP

#define EMU_CHAN_IP 0x18

Definition at line 313 of file emuxkireg.h.

◆ EMU_CHAN_IP_MASK

#define EMU_CHAN_IP_MASK 0x0000ffff

Definition at line 314 of file emuxkireg.h.

◆ EMU_CHAN_IP_UNITY

#define EMU_CHAN_IP_UNITY 0x0000e000

Definition at line 315 of file emuxkireg.h.

◆ EMU_CHAN_LFOVAL1

#define EMU_CHAN_LFOVAL1 0x13

Definition at line 294 of file emuxkireg.h.

◆ EMU_CHAN_LFOVAL2

#define EMU_CHAN_LFOVAL2 0x17

Definition at line 310 of file emuxkireg.h.

◆ EMU_CHAN_LFOVAL2_MASK

#define EMU_CHAN_LFOVAL2_MASK 0x0000ffff

Definition at line 311 of file emuxkireg.h.

◆ EMU_CHAN_LFOVAL_MASK

#define EMU_CHAN_LFOVAL_MASK 0x0000ffff

Definition at line 295 of file emuxkireg.h.

◆ EMU_CHAN_MAP_PTE_MASK

#define EMU_CHAN_MAP_PTE_MASK 0xffffe000

Definition at line 277 of file emuxkireg.h.

◆ EMU_CHAN_MAP_PTI_MASK

#define EMU_CHAN_MAP_PTI_MASK 0x00001fff

Definition at line 278 of file emuxkireg.h.

◆ EMU_CHAN_MAPA

#define EMU_CHAN_MAPA 0x0c

Definition at line 274 of file emuxkireg.h.

◆ EMU_CHAN_MAPB

#define EMU_CHAN_MAPB 0x0d

Definition at line 275 of file emuxkireg.h.

◆ EMU_CHAN_PEFE

#define EMU_CHAN_PEFE 0x1a

Definition at line 323 of file emuxkireg.h.

◆ EMU_CHAN_PEFE_FILTERAMOUNT

#define EMU_CHAN_PEFE_FILTERAMOUNT EMU_MKSUBREG(8, 0, EMU_CHAN_PEFE)

Definition at line 327 of file emuxkireg.h.

◆ EMU_CHAN_PEFE_FILTERAMOUNT_MASK

#define EMU_CHAN_PEFE_FILTERAMOUNT_MASK 0x000000ff

Definition at line 326 of file emuxkireg.h.

◆ EMU_CHAN_PEFE_PITCHAMOUNT

#define EMU_CHAN_PEFE_PITCHAMOUNT EMU_MKSUBREG(8, 8, EMU_CHAN_PEFE)

Definition at line 325 of file emuxkireg.h.

◆ EMU_CHAN_PEFE_PITCHAMOUNT_MASK

#define EMU_CHAN_PEFE_PITCHAMOUNT_MASK 0x0000ff00

Definition at line 324 of file emuxkireg.h.

◆ EMU_CHAN_PSST

#define EMU_CHAN_PSST 0x06

Definition at line 226 of file emuxkireg.h.

◆ EMU_CHAN_PSST_FXSENDAMOUNT_C

#define EMU_CHAN_PSST_FXSENDAMOUNT_C EMU_MKSUBREG(8, 24, EMU_CHAN_PSST)

Definition at line 228 of file emuxkireg.h.

◆ EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK

#define EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK 0xff000000

Definition at line 227 of file emuxkireg.h.

◆ EMU_CHAN_PSST_LOOPSTARTADDR

#define EMU_CHAN_PSST_LOOPSTARTADDR EMU_MKSUBREG(24, 0, EMU_CHAN_PSST)

Definition at line 230 of file emuxkireg.h.

◆ EMU_CHAN_PSST_LOOPSTARTADDR_MASK

#define EMU_CHAN_PSST_LOOPSTARTADDR_MASK 0x00ffffff

Definition at line 229 of file emuxkireg.h.

◆ EMU_CHAN_PTRX

#define EMU_CHAN_PTRX 0x01

Definition at line 203 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_FXSENDAMOUNT_A

#define EMU_CHAN_PTRX_FXSENDAMOUNT_A EMU_MKSUBREG(8, 8, EMU_CHAN_PTRX)

Definition at line 207 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK

#define EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK 0x0000ff00

Definition at line 206 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_FXSENDAMOUNT_B

#define EMU_CHAN_PTRX_FXSENDAMOUNT_B EMU_MKSUBREG(8, 0, EMU_CHAN_PTRX)

Definition at line 209 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK

#define EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK 0x000000ff

Definition at line 208 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_PITCHTARGET

#define EMU_CHAN_PTRX_PITCHTARGET EMU_MKSUBREG(16, 16, EMU_CHAN_PTRX)

Definition at line 205 of file emuxkireg.h.

◆ EMU_CHAN_PTRX_PITCHTARGET_MASK

#define EMU_CHAN_PTRX_PITCHTARGET_MASK 0xffff0000

Definition at line 204 of file emuxkireg.h.

◆ EMU_CHAN_TEMPENV

#define EMU_CHAN_TEMPENV 0x1e

Definition at line 340 of file emuxkireg.h.

◆ EMU_CHAN_TEMPENV_MASK

#define EMU_CHAN_TEMPENV_MASK 0x0000ffff

Definition at line 341 of file emuxkireg.h.

◆ EMU_CHAN_TREMFRQ

#define EMU_CHAN_TREMFRQ 0x1c

Definition at line 333 of file emuxkireg.h.

◆ EMU_CHAN_TREMFRQ_DEPTH

#define EMU_CHAN_TREMFRQ_DEPTH 0x0000ff00

Definition at line 334 of file emuxkireg.h.

◆ EMU_CHAN_VTFT

#define EMU_CHAN_VTFT 0x03

Definition at line 217 of file emuxkireg.h.

◆ EMU_CHAN_VTFT_FILTERTARGET

#define EMU_CHAN_VTFT_FILTERTARGET EMU_MKSUBREG(16, 0, EMU_CHAN_VTFT)

Definition at line 221 of file emuxkireg.h.

◆ EMU_CHAN_VTFT_FILTERTARGET_MASK

#define EMU_CHAN_VTFT_FILTERTARGET_MASK 0x0000ffff

Definition at line 220 of file emuxkireg.h.

◆ EMU_CHAN_VTFT_VOLUMETARGET

#define EMU_CHAN_VTFT_VOLUMETARGET EMU_MKSUBREG(16, 16, EMU_CHAN_VTFT)

Definition at line 219 of file emuxkireg.h.

◆ EMU_CHAN_VTFT_VOLUMETARGET_MASK

#define EMU_CHAN_VTFT_VOLUMETARGET_MASK 0xffff0000

Definition at line 218 of file emuxkireg.h.

◆ EMU_CHAN_Z1

#define EMU_CHAN_Z1 0x05

Definition at line 223 of file emuxkireg.h.

◆ EMU_CHAN_Z2

#define EMU_CHAN_Z2 0x04

Definition at line 224 of file emuxkireg.h.

◆ EMU_CLIEH

#define EMU_CLIEH 0x59

Definition at line 487 of file emuxkireg.h.

◆ EMU_CLIEL

#define EMU_CLIEL 0x58

Definition at line 486 of file emuxkireg.h.

◆ EMU_CLIPH

#define EMU_CLIPH 0x5b

Definition at line 489 of file emuxkireg.h.

◆ EMU_CLIPL

#define EMU_CLIPL 0x5a

Definition at line 488 of file emuxkireg.h.

◆ EMU_DATA

#define EMU_DATA 0x04

Definition at line 56 of file emuxkireg.h.

◆ EMU_DBG

#define EMU_DBG 0x52

Definition at line 443 of file emuxkireg.h.

◆ EMU_DBG_CONDITION_CODE

#define EMU_DBG_CONDITION_CODE 0x00003e00

Definition at line 449 of file emuxkireg.h.

◆ EMU_DBG_SATURATION_ADDR

#define EMU_DBG_SATURATION_ADDR 0x01ff0000

Definition at line 446 of file emuxkireg.h.

◆ EMU_DBG_SATURATION_OCCURRED

#define EMU_DBG_SATURATION_OCCURRED 0x02000000

Definition at line 445 of file emuxkireg.h.

◆ EMU_DBG_SINGLE_STEP

#define EMU_DBG_SINGLE_STEP 0x00008000

Definition at line 447 of file emuxkireg.h.

◆ EMU_DBG_SINGLE_STEP_ADDR

#define EMU_DBG_SINGLE_STEP_ADDR 0x000001ff

Definition at line 450 of file emuxkireg.h.

◆ EMU_DBG_STEP

#define EMU_DBG_STEP 0x00004000

Definition at line 448 of file emuxkireg.h.

◆ EMU_DBG_ZC

#define EMU_DBG_ZC 0x80000000

Definition at line 444 of file emuxkireg.h.

◆ EMU_DSP_CST

#define EMU_DSP_CST ( num ) (EMU_DSP_CST_BASE + num)

Definition at line 641 of file emuxkireg.h.

◆ EMU_DSP_CST_BASE

#define EMU_DSP_CST_BASE 0x40

Definition at line 639 of file emuxkireg.h.

◆ EMU_DSP_FX

#define EMU_DSP_FX ( num ) (num)

Definition at line 596 of file emuxkireg.h.

◆ EMU_DSP_GPR

#define EMU_DSP_GPR ( num ) (EMU_FXGPREGBASE + num)

Definition at line 680 of file emuxkireg.h.

◆ EMU_DSP_HIWORD_OPA_MASK

#define EMU_DSP_HIWORD_OPA_MASK 0x000003ff

Definition at line 572 of file emuxkireg.h.

◆ EMU_DSP_HIWORD_OPCODE_MASK

#define EMU_DSP_HIWORD_OPCODE_MASK 0x00f00000

Definition at line 570 of file emuxkireg.h.

◆ EMU_DSP_HIWORD_RESULT_MASK

#define EMU_DSP_HIWORD_RESULT_MASK 0x000ffc00

Definition at line 571 of file emuxkireg.h.

◆ EMU_DSP_HWR_ACC

#define EMU_DSP_HWR_ACC 0x056

Definition at line 668 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR

#define EMU_DSP_HWR_CCR 0x057

Definition at line 669 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR_B

#define EMU_DSP_HWR_CCR_B 0x00

Definition at line 674 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR_M

#define EMU_DSP_HWR_CCR_M 0x02

Definition at line 672 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR_N

#define EMU_DSP_HWR_CCR_N 0x01

Definition at line 673 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR_S

#define EMU_DSP_HWR_CCR_S 0x04

Definition at line 670 of file emuxkireg.h.

◆ EMU_DSP_HWR_CCR_Z

#define EMU_DSP_HWR_CCR_Z 0x03

Definition at line 671 of file emuxkireg.h.

◆ EMU_DSP_HWR_DBAC

#define EMU_DSP_HWR_DBAC 0x05B

Definition at line 678 of file emuxkireg.h.

◆ EMU_DSP_HWR_INTR

#define EMU_DSP_HWR_INTR 0x05A

Definition at line 677 of file emuxkireg.h.

◆ EMU_DSP_HWR_NOISE0

#define EMU_DSP_HWR_NOISE0 0x058

Definition at line 675 of file emuxkireg.h.

◆ EMU_DSP_HWR_NOISE1

#define EMU_DSP_HWR_NOISE1 0x059

Definition at line 676 of file emuxkireg.h.

◆ EMU_DSP_IN_AC97

#define EMU_DSP_IN_AC97 0

Definition at line 607 of file emuxkireg.h.

◆ EMU_DSP_IN_CDSPDIF

#define EMU_DSP_IN_CDSPDIF 1

Definition at line 608 of file emuxkireg.h.

◆ EMU_DSP_IN_LVDCOS

#define EMU_DSP_IN_LVDCOS 5

Definition at line 612 of file emuxkireg.h.

◆ EMU_DSP_IN_LVDLM1

#define EMU_DSP_IN_LVDLM1 4

Definition at line 611 of file emuxkireg.h.

◆ EMU_DSP_IN_LVDLM2

#define EMU_DSP_IN_LVDLM2 6

Definition at line 613 of file emuxkireg.h.

◆ EMU_DSP_IN_TOSOPT

#define EMU_DSP_IN_TOSOPT 3

Definition at line 610 of file emuxkireg.h.

◆ EMU_DSP_IN_UNKNOWN

#define EMU_DSP_IN_UNKNOWN 7

Definition at line 614 of file emuxkireg.h.

◆ EMU_DSP_IN_ZOOM

#define EMU_DSP_IN_ZOOM 2

Definition at line 609 of file emuxkireg.h.

◆ EMU_DSP_INL

#define EMU_DSP_INL ( num ) (EMU_DSP_IOL(EMU_DSP_INL_BASE, num))

Definition at line 602 of file emuxkireg.h.

◆ EMU_DSP_INL_BASE

#define EMU_DSP_INL_BASE 0x010

Definition at line 601 of file emuxkireg.h.

◆ EMU_DSP_INR

#define EMU_DSP_INR ( num ) (EMU_DSP_IOR(EMU_DSP_INL_BASE, num))

Definition at line 603 of file emuxkireg.h.

◆ EMU_DSP_IOL

#define EMU_DSP_IOL	(	base,
		num
	)	(base + (num << 1))

Definition at line 598 of file emuxkireg.h.

◆ EMU_DSP_IOR

#define EMU_DSP_IOR	(	base,
		num
	)	(EMU_DSP_IOL(base, num) + 1)

Definition at line 599 of file emuxkireg.h.

◆ EMU_DSP_LOWORD_OPX_MASK

#define EMU_DSP_LOWORD_OPX_MASK 0x000ffc00

Definition at line 568 of file emuxkireg.h.

◆ EMU_DSP_LOWORD_OPY_MASK

#define EMU_DSP_LOWORD_OPY_MASK 0x000003ff

Definition at line 569 of file emuxkireg.h.

◆ EMU_DSP_OP_ACC3

#define EMU_DSP_OP_ACC3 0x6

Definition at line 585 of file emuxkireg.h.

◆ EMU_DSP_OP_ANDXOR

#define EMU_DSP_OP_ANDXOR 0x8

Definition at line 587 of file emuxkireg.h.

◆ EMU_DSP_OP_EXP

#define EMU_DSP_OP_EXP 0xD

Definition at line 592 of file emuxkireg.h.

◆ EMU_DSP_OP_INTERP

#define EMU_DSP_OP_INTERP 0xE

Definition at line 593 of file emuxkireg.h.

◆ EMU_DSP_OP_LIMIT

#define EMU_DSP_OP_LIMIT 0xA

Definition at line 589 of file emuxkireg.h.

◆ EMU_DSP_OP_LIMIT1

#define EMU_DSP_OP_LIMIT1 0xB

Definition at line 590 of file emuxkireg.h.

◆ EMU_DSP_OP_LOG

#define EMU_DSP_OP_LOG 0xC

Definition at line 591 of file emuxkireg.h.

◆ EMU_DSP_OP_MACINTS

#define EMU_DSP_OP_MACINTS 0x4

Definition at line 583 of file emuxkireg.h.

◆ EMU_DSP_OP_MACINTW

#define EMU_DSP_OP_MACINTW 0x5

Definition at line 584 of file emuxkireg.h.

◆ EMU_DSP_OP_MACMV

#define EMU_DSP_OP_MACMV 0x7

Definition at line 586 of file emuxkireg.h.

◆ EMU_DSP_OP_MACS

#define EMU_DSP_OP_MACS 0x0

Definition at line 579 of file emuxkireg.h.

◆ EMU_DSP_OP_MACS1

#define EMU_DSP_OP_MACS1 0x1

Definition at line 580 of file emuxkireg.h.

◆ EMU_DSP_OP_MACW

#define EMU_DSP_OP_MACW 0x2

Definition at line 581 of file emuxkireg.h.

◆ EMU_DSP_OP_MACW1

#define EMU_DSP_OP_MACW1 0x3

Definition at line 582 of file emuxkireg.h.

◆ EMU_DSP_OP_SKIP

#define EMU_DSP_OP_SKIP 0xF

Definition at line 594 of file emuxkireg.h.

◆ EMU_DSP_OP_TSTNEG

#define EMU_DSP_OP_TSTNEG 0x9

Definition at line 588 of file emuxkireg.h.

◆ EMU_DSP_OUT_A_FRONT

#define EMU_DSP_OUT_A_FRONT 0

Definition at line 619 of file emuxkireg.h.

◆ EMU_DSP_OUT_AD_REAR

#define EMU_DSP_OUT_AD_REAR 4

Definition at line 623 of file emuxkireg.h.

◆ EMU_DSP_OUT_ADC

#define EMU_DSP_OUT_ADC 5

Definition at line 624 of file emuxkireg.h.

◆ EMU_DSP_OUT_D_CENTER

#define EMU_DSP_OUT_D_CENTER 2

Definition at line 621 of file emuxkireg.h.

◆ EMU_DSP_OUT_D_FRONT

#define EMU_DSP_OUT_D_FRONT 1

Definition at line 620 of file emuxkireg.h.

◆ EMU_DSP_OUT_DRIVE_HP

#define EMU_DSP_OUT_DRIVE_HP 3

Definition at line 622 of file emuxkireg.h.

◆ EMU_DSP_OUTL

#define EMU_DSP_OUTL ( num ) (EMU_DSP_IOL(EMU_DSP_OUTL_BASE, num))

Definition at line 617 of file emuxkireg.h.

◆ EMU_DSP_OUTL_BASE

#define EMU_DSP_OUTL_BASE 0x020

Definition at line 616 of file emuxkireg.h.

◆ EMU_DSP_OUTL_MIC

#define EMU_DSP_OUTL_MIC 6

Definition at line 625 of file emuxkireg.h.

◆ EMU_DSP_OUTR

#define EMU_DSP_OUTR ( num ) (EMU_DSP_IOR(EMU_DSP_OUTL_BASE, num))

Definition at line 618 of file emuxkireg.h.

◆ EMU_FXBA

#define EMU_FXBA 0x47

Definition at line 401 of file emuxkireg.h.

◆ EMU_FXBS

#define EMU_FXBS 0x4b

Definition at line 406 of file emuxkireg.h.

◆ EMU_FXGPREGBASE

#define EMU_FXGPREGBASE 0x100

Definition at line 553 of file emuxkireg.h.

◆ EMU_FXIDX

#define EMU_FXIDX 0x65

Definition at line 512 of file emuxkireg.h.

◆ EMU_FXWC

#define EMU_FXWC 0x43

Definition at line 387 of file emuxkireg.h.

◆ EMU_GPSCS

#define EMU_GPSCS 0x51

Definition at line 441 of file emuxkireg.h.

◆ EMU_GPSRCS

#define EMU_GPSRCS 0x61

Definition at line 502 of file emuxkireg.h.

◆ EMU_HCFG

#define EMU_HCFG 0x14

Definition at line 126 of file emuxkireg.h.

◆ EMU_HCFG_AC3ENABLE_CDSPDIF

#define EMU_HCFG_AC3ENABLE_CDSPDIF 0x00000040

Definition at line 150 of file emuxkireg.h.

◆ EMU_HCFG_AC3ENABLE_GPSPDIF

#define EMU_HCFG_AC3ENABLE_GPSPDIF 0x00000020

Definition at line 151 of file emuxkireg.h.

◆ EMU_HCFG_AC3ENABLE_MASK

#define EMU_HCFG_AC3ENABLE_MASK 0x000000e0

Definition at line 148 of file emuxkireg.h.

◆ EMU_HCFG_AC3ENABLE_ZVIDEO

#define EMU_HCFG_AC3ENABLE_ZVIDEO 0x00000080

Definition at line 149 of file emuxkireg.h.

◆ EMU_HCFG_AUDIOENABLE

#define EMU_HCFG_AUDIOENABLE 0x00000001

Definition at line 157 of file emuxkireg.h.

◆ EMU_HCFG_AUTOMUTE

#define EMU_HCFG_AUTOMUTE 0x00000010

Definition at line 152 of file emuxkireg.h.

◆ EMU_HCFG_CODECFMT_AC97

#define EMU_HCFG_CODECFMT_AC97 0x00000000

Definition at line 141 of file emuxkireg.h.

◆ EMU_HCFG_CODECFMT_I2S

#define EMU_HCFG_CODECFMT_I2S 0x00010000

Definition at line 142 of file emuxkireg.h.

◆ EMU_HCFG_CODECFMT_MASK

#define EMU_HCFG_CODECFMT_MASK 0x00070000

Definition at line 140 of file emuxkireg.h.

◆ EMU_HCFG_GPINPUT0

#define EMU_HCFG_GPINPUT0 0x00004000

Definition at line 143 of file emuxkireg.h.

◆ EMU_HCFG_GPINPUT1

#define EMU_HCFG_GPINPUT1 0x00002000

Definition at line 144 of file emuxkireg.h.

◆ EMU_HCFG_GPOUTPUT_MASK

#define EMU_HCFG_GPOUTPUT_MASK 0x00001c00

Definition at line 145 of file emuxkireg.h.

◆ EMU_HCFG_IOCAPTUREADDR

#define EMU_HCFG_IOCAPTUREADDR 0x1f000000

Definition at line 135 of file emuxkireg.h.

◆ EMU_HCFG_JOYENABLE

#define EMU_HCFG_JOYENABLE 0x00000200

Definition at line 146 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_AD

#define EMU_HCFG_LEGACYFUNC_AD 0x60000000

Definition at line 130 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_MASK

#define EMU_HCFG_LEGACYFUNC_MASK 0xe0000000

Definition at line 127 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_MDMA

#define EMU_HCFG_LEGACYFUNC_MDMA 0xa0000000

Definition at line 132 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_MPIC

#define EMU_HCFG_LEGACYFUNC_MPIC 0x80000000

Definition at line 131 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_MPU

#define EMU_HCFG_LEGACYFUNC_MPU 0x00000000

Definition at line 128 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_SB

#define EMU_HCFG_LEGACYFUNC_SB 0x40000000

Definition at line 129 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_SDMA

#define EMU_HCFG_LEGACYFUNC_SDMA 0xe0000000

Definition at line 134 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYFUNC_SPCI

#define EMU_HCFG_LEGACYFUNC_SPCI 0xc0000000

Definition at line 133 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYINT

#define EMU_HCFG_LEGACYINT 0x00200000

Definition at line 138 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYWORD

#define EMU_HCFG_LEGACYWORD 0x00400000

Definition at line 137 of file emuxkireg.h.

◆ EMU_HCFG_LEGACYWRITE

#define EMU_HCFG_LEGACYWRITE 0x00800000

Definition at line 136 of file emuxkireg.h.

◆ EMU_HCFG_LOCKSOUNDCACHE

#define EMU_HCFG_LOCKSOUNDCACHE 0x00000008

Definition at line 153 of file emuxkireg.h.

◆ EMU_HCFG_LOCKTANKCACHE

#define EMU_HCFG_LOCKTANKCACHE EMU_MKSUBREG(1, 2, EMU_HCFG)

Definition at line 155 of file emuxkireg.h.

◆ EMU_HCFG_LOCKTANKCACHE_MASK

#define EMU_HCFG_LOCKTANKCACHE_MASK 0x00000004

Definition at line 154 of file emuxkireg.h.

◆ EMU_HCFG_MUTEBUTTONENABLE

#define EMU_HCFG_MUTEBUTTONENABLE 0x00000002

Definition at line 156 of file emuxkireg.h.

◆ EMU_HCFG_PHASETRACKENABLE

#define EMU_HCFG_PHASETRACKENABLE 0x00000100

Definition at line 147 of file emuxkireg.h.

◆ EMU_INTE

#define EMU_INTE 0x0c

Definition at line 82 of file emuxkireg.h.

◆ EMU_INTE_A_MIDIRXENABLE2

#define EMU_INTE_A_MIDIRXENABLE2 0x00010000

Definition at line 119 of file emuxkireg.h.

◆ EMU_INTE_A_MIDITXENABLE2

#define EMU_INTE_A_MIDITXENABLE2 0x00020000

Definition at line 118 of file emuxkireg.h.

◆ EMU_INTE_ADCBUFENABLE

#define EMU_INTE_ADCBUFENABLE 0x00000040

Definition at line 111 of file emuxkireg.h.

◆ EMU_INTE_ADLIBENABLE

#define EMU_INTE_ADLIBENABLE 0x00400000

Definition at line 100 of file emuxkireg.h.

◆ EMU_INTE_CDSPDIFENABLE

#define EMU_INTE_CDSPDIFENABLE 0x00000008

Definition at line 114 of file emuxkireg.h.

◆ EMU_INTE_EFXBUFENABLE

#define EMU_INTE_EFXBUFENABLE 0x00000020

Definition at line 112 of file emuxkireg.h.

◆ EMU_INTE_FORCEINT

#define EMU_INTE_FORCEINT 0x00100000

Definition at line 102 of file emuxkireg.h.

◆ EMU_INTE_FXDSPENABLE

#define EMU_INTE_FXDSPENABLE 0x00001000

Definition at line 105 of file emuxkireg.h.

◆ EMU_INTE_GPSPDIFENABLE

#define EMU_INTE_GPSPDIFENABLE 0x00000010

Definition at line 113 of file emuxkireg.h.

◆ EMU_INTE_INTERTIMERENB

#define EMU_INTE_INTERTIMERENB 0x00000004

Definition at line 115 of file emuxkireg.h.

◆ EMU_INTE_MDMAENABLE

#define EMU_INTE_MDMAENABLE 0x08000000

Definition at line 95 of file emuxkireg.h.

◆ EMU_INTE_MICBUFENABLE

#define EMU_INTE_MICBUFENABLE 0x00000080

Definition at line 110 of file emuxkireg.h.

◆ EMU_INTE_MIDIRXENABLE

#define EMU_INTE_MIDIRXENABLE 0x00000001

Definition at line 117 of file emuxkireg.h.

◆ EMU_INTE_MIDITXENABLE

#define EMU_INTE_MIDITXENABLE 0x00000002

Definition at line 116 of file emuxkireg.h.

◆ EMU_INTE_MPICENABLE

#define EMU_INTE_MPICENABLE 0x02000000

Definition at line 97 of file emuxkireg.h.

◆ EMU_INTE_MPUENABLE

#define EMU_INTE_MPUENABLE 0x00200000

Definition at line 101 of file emuxkireg.h.

◆ EMU_INTE_MRHANDENABLE

#define EMU_INTE_MRHANDENABLE 0x00080000

Definition at line 103 of file emuxkireg.h.

◆ EMU_INTE_MUTEENABLE

#define EMU_INTE_MUTEENABLE 0x00000100

Definition at line 109 of file emuxkireg.h.

◆ EMU_INTE_PCIERRENABLE

#define EMU_INTE_PCIERRENABLE 0x00000800

Definition at line 106 of file emuxkireg.h.

◆ EMU_INTE_SAMPLERATER

#define EMU_INTE_SAMPLERATER 0x00002000

Definition at line 104 of file emuxkireg.h.

◆ EMU_INTE_SDMAENABLE

#define EMU_INTE_SDMAENABLE 0x04000000

Definition at line 96 of file emuxkireg.h.

◆ EMU_INTE_SPICENABLE

#define EMU_INTE_SPICENABLE 0x01000000

Definition at line 98 of file emuxkireg.h.

◆ EMU_INTE_VMPU_300

#define EMU_INTE_VMPU_300 0x00000000

Definition at line 91 of file emuxkireg.h.

◆ EMU_INTE_VMPU_310

#define EMU_INTE_VMPU_310 0x10000000

Definition at line 92 of file emuxkireg.h.

◆ EMU_INTE_VMPU_320

#define EMU_INTE_VMPU_320 0x20000000

Definition at line 93 of file emuxkireg.h.

◆ EMU_INTE_VMPU_330

#define EMU_INTE_VMPU_330 0x30000000

Definition at line 94 of file emuxkireg.h.

◆ EMU_INTE_VMPU_MASK

#define EMU_INTE_VMPU_MASK 0x30000000

Definition at line 90 of file emuxkireg.h.

◆ EMU_INTE_VOLDECRENABLE

#define EMU_INTE_VOLDECRENABLE 0x00000200

Definition at line 108 of file emuxkireg.h.

◆ EMU_INTE_VOLINCRENABLE

#define EMU_INTE_VOLINCRENABLE 0x00000400

Definition at line 107 of file emuxkireg.h.

◆ EMU_INTE_VSB_220

#define EMU_INTE_VSB_220 0x00000000

Definition at line 85 of file emuxkireg.h.

◆ EMU_INTE_VSB_240

#define EMU_INTE_VSB_240 0x40000000

Definition at line 86 of file emuxkireg.h.

◆ EMU_INTE_VSB_260

#define EMU_INTE_VSB_260 0x80000000

Definition at line 87 of file emuxkireg.h.

◆ EMU_INTE_VSB_280

#define EMU_INTE_VSB_280 0xc0000000

Definition at line 88 of file emuxkireg.h.

◆ EMU_INTE_VSB_MASK

#define EMU_INTE_VSB_MASK 0xc0000000

Definition at line 84 of file emuxkireg.h.

◆ EMU_INTE_VSBENABLE

#define EMU_INTE_VSBENABLE 0x00800000

Definition at line 99 of file emuxkireg.h.

◆ EMU_IPR

#define EMU_IPR 0x08

Definition at line 58 of file emuxkireg.h.

◆ EMU_IPR_A_MIDIRECBUFE2

#define EMU_IPR_A_MIDIRECBUFE2 0x08000000

Definition at line 78 of file emuxkireg.h.

◆ EMU_IPR_A_MIDITRANSBUFE2

#define EMU_IPR_A_MIDITRANSBUFE2 0x10000000

Definition at line 77 of file emuxkireg.h.

◆ EMU_IPR_ADCBUFFULL

#define EMU_IPR_ADCBUFFULL 0x00008000

Definition at line 68 of file emuxkireg.h.

◆ EMU_IPR_ADCBUFHALFFULL

#define EMU_IPR_ADCBUFHALFFULL 0x00004000

Definition at line 69 of file emuxkireg.h.

◆ EMU_IPR_CDROMSTCHANGE

#define EMU_IPR_CDROMSTCHANGE 0x00000400

Definition at line 73 of file emuxkireg.h.

◆ EMU_IPR_CHANNELLOOP

#define EMU_IPR_CHANNELLOOP 0x00000040

Definition at line 79 of file emuxkireg.h.

◆ EMU_IPR_CHNOMASK

#define EMU_IPR_CHNOMASK 0x0000003f

Definition at line 80 of file emuxkireg.h.

◆ EMU_IPR_EFXBUFFULL

#define EMU_IPR_EFXBUFFULL 0x00002000

Definition at line 70 of file emuxkireg.h.

◆ EMU_IPR_EFXBUFHALFFULL

#define EMU_IPR_EFXBUFHALFFULL 0x00001000

Definition at line 71 of file emuxkireg.h.

◆ EMU_IPR_FORCEINT

#define EMU_IPR_FORCEINT 0x00400000

Definition at line 61 of file emuxkireg.h.

◆ EMU_IPR_FXDSP

#define EMU_IPR_FXDSP 0x00800000

Definition at line 60 of file emuxkireg.h.

◆ EMU_IPR_GPSPDIFSTCHANGE

#define EMU_IPR_GPSPDIFSTCHANGE 0x00000800

Definition at line 72 of file emuxkireg.h.

◆ EMU_IPR_INTERVALTIMER

#define EMU_IPR_INTERVALTIMER 0x00000200

Definition at line 74 of file emuxkireg.h.

◆ EMU_IPR_MICBUFFULL

#define EMU_IPR_MICBUFFULL 0x00020000

Definition at line 66 of file emuxkireg.h.

◆ EMU_IPR_MICBUFHALFFULL

#define EMU_IPR_MICBUFHALFFULL 0x00010000

Definition at line 67 of file emuxkireg.h.

◆ EMU_IPR_MIDIRECVBUFE

#define EMU_IPR_MIDIRECVBUFE 0x00000080

Definition at line 76 of file emuxkireg.h.

◆ EMU_IPR_MIDITRANSBUFE

#define EMU_IPR_MIDITRANSBUFE 0x00000100

Definition at line 75 of file emuxkireg.h.

◆ EMU_IPR_MUTE

#define EMU_IPR_MUTE 0x00040000

Definition at line 65 of file emuxkireg.h.

◆ EMU_IPR_RATETRCHANGE

#define EMU_IPR_RATETRCHANGE 0x01000000

Definition at line 59 of file emuxkireg.h.

◆ EMU_IPR_VOLDECR

#define EMU_IPR_VOLDECR 0x00080000

Definition at line 64 of file emuxkireg.h.

◆ EMU_IPR_VOLINCR

#define EMU_IPR_VOLINCR 0x00100000

Definition at line 63 of file emuxkireg.h.

◆ EMU_MICBA

#define EMU_MICBA 0x45

Definition at line 399 of file emuxkireg.h.

◆ EMU_MICBS

#define EMU_MICBS 0x49

Definition at line 404 of file emuxkireg.h.

◆ EMU_MICIDX

#define EMU_MICIDX 0x63

Definition at line 508 of file emuxkireg.h.

◆ EMU_MICROCODEBASE

#define EMU_MICROCODEBASE 0x400

Definition at line 566 of file emuxkireg.h.

◆ EMU_MKSUBREG

#define EMU_MKSUBREG	(	sz,
		idx,
		reg
	)	(((sz) << 24) \| ((idx) << 16) \| (reg))

Definition at line 49 of file emuxkireg.h.

◆ EMU_MUCMD

#define EMU_MUCMD 0x19

Definition at line 160 of file emuxkireg.h.

◆ EMU_MUCMD_ENTERUARTMODE

#define EMU_MUCMD_ENTERUARTMODE 0x3f

Definition at line 162 of file emuxkireg.h.

◆ EMU_MUCMD_RESET

#define EMU_MUCMD_RESET 0xff

Definition at line 161 of file emuxkireg.h.

◆ EMU_MUDATA

#define EMU_MUDATA 0x18

Definition at line 159 of file emuxkireg.h.

◆ EMU_MUSTAT

#define EMU_MUSTAT EMU_MUCMD

Definition at line 164 of file emuxkireg.h.

◆ EMU_MUSTAT_IRDYN

#define EMU_MUSTAT_IRDYN 0x80

Definition at line 165 of file emuxkireg.h.

◆ EMU_MUSTAT_ORDYN

#define EMU_MUSTAT_ORDYN 0x40

Definition at line 166 of file emuxkireg.h.

◆ EMU_PCIERROR

#define EMU_PCIERROR 0x00200000

Definition at line 62 of file emuxkireg.h.

◆ EMU_PTB

#define EMU_PTB 0x40

Definition at line 362 of file emuxkireg.h.

◆ EMU_PTB_MASK

#define EMU_PTB_MASK 0xfffff000

Definition at line 363 of file emuxkireg.h.

◆ EMU_PTR

#define EMU_PTR 0x00

Definition at line 51 of file emuxkireg.h.

◆ EMU_PTR_ADDR_MASK

#define EMU_PTR_ADDR_MASK 0x07ff0000

Definition at line 53 of file emuxkireg.h.

◆ EMU_PTR_CHNO_MASK

#define EMU_PTR_CHNO_MASK 0x0000003f

Definition at line 52 of file emuxkireg.h.

◆ EMU_RECBA_MASK

#define EMU_RECBA_MASK 0xfffff000

Definition at line 402 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_1024

#define EMU_RECBS_BUFSIZE_1024 0x00000007

Definition at line 414 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_10240

#define EMU_RECBS_BUFSIZE_10240 0x00000014

Definition at line 427 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_12288

#define EMU_RECBS_BUFSIZE_12288 0x00000015

Definition at line 428 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_1280

#define EMU_RECBS_BUFSIZE_1280 0x00000008

Definition at line 415 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_14366

#define EMU_RECBS_BUFSIZE_14366 0x00000016

Definition at line 429 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_1536

#define EMU_RECBS_BUFSIZE_1536 0x00000009

Definition at line 416 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_16384

#define EMU_RECBS_BUFSIZE_16384 0x00000017

Definition at line 430 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_1792

#define EMU_RECBS_BUFSIZE_1792 0x0000000a

Definition at line 417 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_2048

#define EMU_RECBS_BUFSIZE_2048 0x0000000b

Definition at line 418 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_20480

#define EMU_RECBS_BUFSIZE_20480 0x00000018

Definition at line 431 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_24576

#define EMU_RECBS_BUFSIZE_24576 0x00000019

Definition at line 432 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_2560

#define EMU_RECBS_BUFSIZE_2560 0x0000000c

Definition at line 419 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_28672

#define EMU_RECBS_BUFSIZE_28672 0x0000001a

Definition at line 433 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_3072

#define EMU_RECBS_BUFSIZE_3072 0x0000000d

Definition at line 420 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_32768

#define EMU_RECBS_BUFSIZE_32768 0x0000001b

Definition at line 434 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_3584

#define EMU_RECBS_BUFSIZE_3584 0x0000000e

Definition at line 421 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_384

#define EMU_RECBS_BUFSIZE_384 0x00000001

Definition at line 408 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_4096

#define EMU_RECBS_BUFSIZE_4096 0x0000000f

Definition at line 422 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_40960

#define EMU_RECBS_BUFSIZE_40960 0x0000001c

Definition at line 435 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_448

#define EMU_RECBS_BUFSIZE_448 0x00000002

Definition at line 409 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_49152

#define EMU_RECBS_BUFSIZE_49152 0x0000001d

Definition at line 436 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_512

#define EMU_RECBS_BUFSIZE_512 0x00000003

Definition at line 410 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_5120

#define EMU_RECBS_BUFSIZE_5120 0x00000010

Definition at line 423 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_57344

#define EMU_RECBS_BUFSIZE_57344 0x0000001e

Definition at line 437 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_6144

#define EMU_RECBS_BUFSIZE_6144 0x00000011

Definition at line 424 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_640

#define EMU_RECBS_BUFSIZE_640 0x00000004

Definition at line 411 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_65536

#define EMU_RECBS_BUFSIZE_65536 0x0000001f

Definition at line 438 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_7168

#define EMU_RECBS_BUFSIZE_7168 0x00000012

Definition at line 425 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_768

#define EMU_RECBS_BUFSIZE_768 0x00000005

Definition at line 412 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_8192

#define EMU_RECBS_BUFSIZE_8192 0x00000013

Definition at line 426 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_896

#define EMU_RECBS_BUFSIZE_896 0x00000006

Definition at line 413 of file emuxkireg.h.

◆ EMU_RECBS_BUFSIZE_NONE

#define EMU_RECBS_BUFSIZE_NONE 0x00000000

Definition at line 407 of file emuxkireg.h.

◆ EMU_RECIDX

#define EMU_RECIDX ( idxreg ) (0x10000000|(idxreg))

Definition at line 514 of file emuxkireg.h.

◆ EMU_RECIDX_MASK

#define EMU_RECIDX_MASK 0x0000ffff

Definition at line 513 of file emuxkireg.h.

◆ EMU_SOLEH

#define EMU_SOLEH 0x5d

Definition at line 491 of file emuxkireg.h.

◆ EMU_SOLEL

#define EMU_SOLEL 0x5c

Definition at line 490 of file emuxkireg.h.

◆ EMU_SPBYPASS

#define EMU_SPBYPASS 0x5e

Definition at line 493 of file emuxkireg.h.

◆ EMU_SPBYPASS_24_BITS

#define EMU_SPBYPASS_24_BITS 0x00000f00

Definition at line 495 of file emuxkireg.h.

◆ EMU_SPBYPASS_ENABLE

#define EMU_SPBYPASS_ENABLE 0x00000001

Definition at line 494 of file emuxkireg.h.

◆ EMU_SPCS0

#define EMU_SPCS0 0x54

Definition at line 459 of file emuxkireg.h.

◆ EMU_SPCS1

#define EMU_SPCS1 0x55

Definition at line 460 of file emuxkireg.h.

◆ EMU_SPCS2

#define EMU_SPCS2 0x56

Definition at line 461 of file emuxkireg.h.

◆ EMU_SPCS_CATEGORYCODEMASK

#define EMU_SPCS_CATEGORYCODEMASK 0x00007f00

Definition at line 477 of file emuxkireg.h.

◆ EMU_SPCS_CHANNELNUM_LEFT

#define EMU_SPCS_CHANNELNUM_LEFT 0x00100000

Definition at line 472 of file emuxkireg.h.

◆ EMU_SPCS_CHANNELNUM_RIGHT

#define EMU_SPCS_CHANNELNUM_RIGHT 0x00200000

Definition at line 473 of file emuxkireg.h.

◆ EMU_SPCS_CHANNELNUM_UNSPEC

#define EMU_SPCS_CHANNELNUM_UNSPEC 0x00000000

Definition at line 471 of file emuxkireg.h.

◆ EMU_SPCS_CHANNELNUMMASK

#define EMU_SPCS_CHANNELNUMMASK 0x00f00000

Definition at line 470 of file emuxkireg.h.

◆ EMU_SPCS_CLKACCY_1000PPM

#define EMU_SPCS_CLKACCY_1000PPM 0x00000000

Definition at line 463 of file emuxkireg.h.

◆ EMU_SPCS_CLKACCY_50PPM

#define EMU_SPCS_CLKACCY_50PPM 0x10000000

Definition at line 464 of file emuxkireg.h.

◆ EMU_SPCS_CLKACCY_VARIABLE

#define EMU_SPCS_CLKACCY_VARIABLE 0x20000000

Definition at line 465 of file emuxkireg.h.

◆ EMU_SPCS_CLKACCYMASK

#define EMU_SPCS_CLKACCYMASK 0x30000000

Definition at line 462 of file emuxkireg.h.

◆ EMU_SPCS_COPYRIGHT

#define EMU_SPCS_COPYRIGHT 0x00000004

Definition at line 482 of file emuxkireg.h.

◆ EMU_SPCS_EMPHASIS_50_15

#define EMU_SPCS_EMPHASIS_50_15 0x00000008

Definition at line 481 of file emuxkireg.h.

◆ EMU_SPCS_EMPHASIS_NONE

#define EMU_SPCS_EMPHASIS_NONE 0x00000000

Definition at line 480 of file emuxkireg.h.

◆ EMU_SPCS_EMPHASISMASK

#define EMU_SPCS_EMPHASISMASK 0x00000038

Definition at line 479 of file emuxkireg.h.

◆ EMU_SPCS_GENERATIONSTATUS

#define EMU_SPCS_GENERATIONSTATUS 0x00008000

Definition at line 476 of file emuxkireg.h.

◆ EMU_SPCS_MODEMASK

#define EMU_SPCS_MODEMASK 0x000000c0

Definition at line 478 of file emuxkireg.h.

◆ EMU_SPCS_NOTAUDIODATA

#define EMU_SPCS_NOTAUDIODATA 0x00000002

Definition at line 483 of file emuxkireg.h.

◆ EMU_SPCS_PROFESSIONAL

#define EMU_SPCS_PROFESSIONAL 0x00000001

Definition at line 484 of file emuxkireg.h.

◆ EMU_SPCS_SAMPLERATE_32

#define EMU_SPCS_SAMPLERATE_32 0x03000000

Definition at line 469 of file emuxkireg.h.

◆ EMU_SPCS_SAMPLERATE_44

#define EMU_SPCS_SAMPLERATE_44 0x00000000

Definition at line 467 of file emuxkireg.h.

◆ EMU_SPCS_SAMPLERATE_48

#define EMU_SPCS_SAMPLERATE_48 0x02000000

Definition at line 468 of file emuxkireg.h.

◆ EMU_SPCS_SAMPLERATEMASK

#define EMU_SPCS_SAMPLERATEMASK 0x0f000000

Definition at line 466 of file emuxkireg.h.

◆ EMU_SPCS_SOURCENUM_UNSPEC

#define EMU_SPCS_SOURCENUM_UNSPEC 0x00000000

Definition at line 475 of file emuxkireg.h.

◆ EMU_SPCS_SOURCENUMMASK

#define EMU_SPCS_SOURCENUMMASK 0x000f0000

Definition at line 474 of file emuxkireg.h.

◆ EMU_SRCS_ESTSAMPLERATE

#define EMU_SRCS_ESTSAMPLERATE 0x0007ffff

Definition at line 506 of file emuxkireg.h.

◆ EMU_SRCS_RATELOCKED

#define EMU_SRCS_RATELOCKED 0x01000000

Definition at line 505 of file emuxkireg.h.

◆ EMU_SRCS_SPDIFLOCKED

#define EMU_SRCS_SPDIFLOCKED 0x02000000

Definition at line 504 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREG_ADDR_MASK

#define EMU_TANKMEMADDRREG_ADDR_MASK 0x000fffff

Definition at line 560 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREG_ALIGN

#define EMU_TANKMEMADDRREG_ALIGN 0x00400000

Definition at line 562 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREG_CLEAR

#define EMU_TANKMEMADDRREG_CLEAR 0x00800000

Definition at line 561 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREG_READ

#define EMU_TANKMEMADDRREG_READ 0x00100000

Definition at line 564 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREG_WRITE

#define EMU_TANKMEMADDRREG_WRITE 0x00200000

Definition at line 563 of file emuxkireg.h.

◆ EMU_TANKMEMADDRREGBASE

#define EMU_TANKMEMADDRREGBASE 0x300

Definition at line 559 of file emuxkireg.h.

◆ EMU_TANKMEMDATAREG_MASK

#define EMU_TANKMEMDATAREG_MASK 0x000fffff

Definition at line 557 of file emuxkireg.h.

◆ EMU_TANKMEMDATAREGBASE

#define EMU_TANKMEMDATAREGBASE 0x200

Definition at line 556 of file emuxkireg.h.

◆ EMU_TCB

#define EMU_TCB 0x41

Definition at line 365 of file emuxkireg.h.

◆ EMU_TCB_MASK

#define EMU_TCB_MASK 0xfffff000

Definition at line 366 of file emuxkireg.h.

◆ EMU_TCBS

#define EMU_TCBS 0x44

Definition at line 388 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_1024K

#define EMU_TCBS_BUFFSIZE_1024K 0x00000006

Definition at line 396 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_128K

#define EMU_TCBS_BUFFSIZE_128K 0x00000003

Definition at line 393 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_16K

#define EMU_TCBS_BUFFSIZE_16K 0x00000000

Definition at line 390 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_2048K

#define EMU_TCBS_BUFFSIZE_2048K 0x00000007

Definition at line 397 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_256K

#define EMU_TCBS_BUFFSIZE_256K 0x00000004

Definition at line 394 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_32K

#define EMU_TCBS_BUFFSIZE_32K 0x00000001

Definition at line 391 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_512K

#define EMU_TCBS_BUFFSIZE_512K 0x00000005

Definition at line 395 of file emuxkireg.h.

◆ EMU_TCBS_BUFFSIZE_64K

#define EMU_TCBS_BUFFSIZE_64K 0x00000002

Definition at line 392 of file emuxkireg.h.

◆ EMU_TCBS_MASK

#define EMU_TCBS_MASK 0x00000007

Definition at line 389 of file emuxkireg.h.

◆ EMU_TIMER

#define EMU_TIMER 0x1a

Definition at line 174 of file emuxkireg.h.

◆ EMU_TIMER_RATE

#define EMU_TIMER_RATE EMU_MKSUBREG(10, 0, EMU_TIMER)

Definition at line 176 of file emuxkireg.h.

◆ EMU_TIMER_RATE_MASK

#define EMU_TIMER_RATE_MASK 0x000003ff

Definition at line 175 of file emuxkireg.h.

◆ EMU_WC

#define EMU_WC 0x10

Definition at line 121 of file emuxkireg.h.

◆ EMU_WC_CURRENTCHANNEL

#define EMU_WC_CURRENTCHANNEL 0x0000003F

Definition at line 124 of file emuxkireg.h.

◆ EMU_WC_SAMPLECOUNTER

#define EMU_WC_SAMPLECOUNTER EMU_MKSUBREG(20, 6, EMU_WC)

Definition at line 123 of file emuxkireg.h.

◆ EMU_WC_SAMPLECOUNTER_MASK

#define EMU_WC_SAMPLECOUNTER_MASK 0x03FFFFC0

Definition at line 122 of file emuxkireg.h.

◆ EMU_ZVSRCS

#define EMU_ZVSRCS 0x62

Definition at line 503 of file emuxkireg.h.

Macros