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#define | HDA_CMD_VERB_MASK 0x000fffff |
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#define | HDA_CMD_VERB_SHIFT 0 |
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#define | HDA_CMD_NID_MASK 0x0ff00000 |
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#define | HDA_CMD_NID_SHIFT 20 |
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#define | HDA_CMD_CAD_MASK 0xf0000000 |
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#define | HDA_CMD_CAD_SHIFT 28 |
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#define | HDA_CMD_VERB_4BIT_SHIFT 16 |
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#define | HDA_CMD_VERB_12BIT_SHIFT 8 |
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#define | HDA_CMD_VERB_4BIT(verb, payload) (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload)) |
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#define | HDA_CMD_4BIT(cad, nid, verb, payload) |
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#define | HDA_CMD_VERB_12BIT(verb, payload) (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload)) |
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#define | HDA_CMD_12BIT(cad, nid, verb, payload) |
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#define | HDA_CMD_VERB_GET_PARAMETER 0xf00 |
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#define | HDA_CMD_GET_PARAMETER(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_CONN_SELECT_CONTROL 0xf01 |
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#define | HDA_CMD_VERB_SET_CONN_SELECT_CONTROL 0x701 |
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#define | HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid) |
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#define | HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_CONN_LIST_ENTRY 0xf02 |
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#define | HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload) |
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#define | HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT 1 |
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#define | HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG 2 |
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#define | HDA_CMD_VERB_GET_PROCESSING_STATE 0xf03 |
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#define | HDA_CMD_VERB_SET_PROCESSING_STATE 0x703 |
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#define | HDA_CMD_GET_PROCESSING_STATE(cad, nid) |
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#define | HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload) |
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#define | HDA_CMD_GET_PROCESSING_STATE_STATE_OFF 0x00 |
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#define | HDA_CMD_GET_PROCESSING_STATE_STATE_ON 0x01 |
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#define | HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN 0x02 |
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#define | HDA_CMD_VERB_GET_COEFF_INDEX 0xd |
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#define | HDA_CMD_VERB_SET_COEFF_INDEX 0x5 |
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#define | HDA_CMD_GET_COEFF_INDEX(cad, nid) |
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#define | HDA_CMD_SET_COEFF_INDEX(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_PROCESSING_COEFF 0xc |
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#define | HDA_CMD_VERB_SET_PROCESSING_COEFF 0x4 |
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#define | HDA_CMD_GET_PROCESSING_COEFF(cad, nid) |
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#define | HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_AMP_GAIN_MUTE 0xb |
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#define | HDA_CMD_VERB_SET_AMP_GAIN_MUTE 0x3 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload) |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload) |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_INPUT 0x0000 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT 0x8000 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT 0x0000 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_LEFT 0x2000 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK 0x00000008 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT 7 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK 0x00000007 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT 0 |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp) |
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#define | HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp) |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT 0x8000 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_INPUT 0x4000 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_LEFT 0x2000 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT 0x1000 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK 0x0f00 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT 8 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_MUTE 0x0080 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK 0x0007 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT 0 |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index) |
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#define | HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index) |
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#define | HDA_CMD_VERB_GET_CONV_FMT 0xa |
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#define | HDA_CMD_VERB_SET_CONV_FMT 0x2 |
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#define | HDA_CMD_GET_CONV_FMT(cad, nid) |
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#define | HDA_CMD_SET_CONV_FMT(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1 0xf0d |
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#define | HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2 0xf0e |
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#define | HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1 0x70d |
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#define | HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2 0x70e |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid) |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload) |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK 0x7f00 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT 8 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK 0x0080 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT 7 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK 0x0040 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT 6 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK 0x0020 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT 5 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK 0x0010 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT 4 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK 0x0008 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT 3 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK 0x0004 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT 2 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK 0x0002 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT 1 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK 0x0001 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT 0 |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp) |
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#define | HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp) |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_L 0x80 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO 0x40 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO 0x20 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY 0x10 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE 0x08 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG 0x04 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_V 0x02 |
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#define | HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN 0x01 |
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#define | HDA_CMD_VERB_GET_POWER_STATE 0xf05 |
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#define | HDA_CMD_VERB_SET_POWER_STATE 0x705 |
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#define | HDA_CMD_GET_POWER_STATE(cad, nid) |
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#define | HDA_CMD_SET_POWER_STATE(cad, nid, payload) |
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#define | HDA_CMD_POWER_STATE_D0 0x00 |
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#define | HDA_CMD_POWER_STATE_D1 0x01 |
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#define | HDA_CMD_POWER_STATE_D2 0x02 |
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#define | HDA_CMD_POWER_STATE_D3 0x03 |
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#define | HDA_CMD_POWER_STATE_ACT_MASK 0x000000f0 |
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#define | HDA_CMD_POWER_STATE_ACT_SHIFT 4 |
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#define | HDA_CMD_POWER_STATE_SET_MASK 0x0000000f |
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#define | HDA_CMD_POWER_STATE_SET_SHIFT 0 |
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#define | HDA_CMD_GET_POWER_STATE_ACT(rsp) |
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#define | HDA_CMD_GET_POWER_STATE_SET(rsp) |
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#define | HDA_CMD_SET_POWER_STATE_ACT(ps) |
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#define | HDA_CMD_SET_POWER_STATE_SET(ps) |
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#define | HDA_CMD_VERB_GET_CONV_STREAM_CHAN 0xf06 |
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#define | HDA_CMD_VERB_SET_CONV_STREAM_CHAN 0x706 |
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#define | HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid) |
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#define | HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload) |
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#define | HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK 0x000000f0 |
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#define | HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT 4 |
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#define | HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK 0x0000000f |
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#define | HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT 0 |
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#define | HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp) |
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#define | HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp) |
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#define | HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param) |
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#define | HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param) |
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#define | HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT 0xf04 |
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#define | HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT 0x704 |
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#define | HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid) |
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#define | HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_PIN_WIDGET_CTRL 0xf07 |
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#define | HDA_CMD_VERB_SET_PIN_WIDGET_CTRL 0x707 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid) |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload) |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK 0x00000080 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT 7 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK 0x00000040 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT 6 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK 0x00000020 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT 5 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x00000007 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp) |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp) |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp) |
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#define | HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp) |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE 0x80 |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE 0x40 |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE 0x20 |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x07 |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 |
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#define | HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param) |
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#define | HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ 0 |
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#define | HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50 1 |
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#define | HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND 2 |
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#define | HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80 4 |
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#define | HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100 5 |
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#define | HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE 0xf08 |
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#define | HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE 0x708 |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid) |
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#define | HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload) |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK 0x00000080 |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT 7 |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK 0x0000001f |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp) |
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#define | HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp) |
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#define | HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE 0x80 |
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#define | HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK 0x3f |
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#define | HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 |
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#define | HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param) |
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#define | HDA_CMD_VERB_GET_PIN_SENSE 0xf09 |
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#define | HDA_CMD_VERB_SET_PIN_SENSE 0x709 |
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#define | HDA_CMD_GET_PIN_SENSE(cad, nid) |
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#define | HDA_CMD_SET_PIN_SENSE(cad, nid, payload) |
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#define | HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT 0x80000000 |
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#define | HDA_CMD_GET_PIN_SENSE_ELD_VALID 0x40000000 |
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#define | HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK 0x7fffffff |
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#define | HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT 0 |
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#define | HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp) |
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#define | HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID 0x7fffffff |
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#define | HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL 0x00 |
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#define | HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL 0x01 |
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#define | HDA_CMD_VERB_GET_EAPD_BTL_ENABLE 0xf0c |
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#define | HDA_CMD_VERB_SET_EAPD_BTL_ENABLE 0x70c |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid) |
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#define | HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload) |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK 0x00000004 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT 2 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK 0x00000002 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT 1 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK 0x00000001 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT 0 |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp) |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp) |
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#define | HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp) |
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#define | HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP 0x04 |
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#define | HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD 0x02 |
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#define | HDA_CMD_SET_EAPD_BTL_ENABLE_BTL 0x01 |
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#define | HDA_CMD_VERB_GET_GPI_DATA 0xf10 |
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#define | HDA_CMD_VERB_SET_GPI_DATA 0x710 |
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#define | HDA_CMD_GET_GPI_DATA(cad, nid) |
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#define | HDA_CMD_SET_GPI_DATA(cad, nid) |
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#define | HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK 0xf11 |
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#define | HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK 0x711 |
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#define | HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK 0xf12 |
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#define | HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK 0x712 |
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#define | HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPI_STICKY_MASK 0xf13 |
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#define | HDA_CMD_VERB_SET_GPI_STICKY_MASK 0x713 |
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#define | HDA_CMD_GET_GPI_STICKY_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPO_DATA 0xf14 |
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#define | HDA_CMD_VERB_SET_GPO_DATA 0x714 |
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#define | HDA_CMD_GET_GPO_DATA(cad, nid) |
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#define | HDA_CMD_SET_GPO_DATA(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_DATA 0xf15 |
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#define | HDA_CMD_VERB_SET_GPIO_DATA 0x715 |
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#define | HDA_CMD_GET_GPIO_DATA(cad, nid) |
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#define | HDA_CMD_SET_GPIO_DATA(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_ENABLE_MASK 0xf16 |
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#define | HDA_CMD_VERB_SET_GPIO_ENABLE_MASK 0x716 |
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#define | HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_DIRECTION 0xf17 |
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#define | HDA_CMD_VERB_SET_GPIO_DIRECTION 0x717 |
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#define | HDA_CMD_GET_GPIO_DIRECTION(cad, nid) |
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#define | HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK 0xf18 |
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#define | HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK 0x718 |
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#define | HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK 0xf19 |
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#define | HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK 0x719 |
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#define | HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_GPIO_STICKY_MASK 0xf1a |
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#define | HDA_CMD_VERB_SET_GPIO_STICKY_MASK 0x71a |
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#define | HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid) |
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#define | HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_BEEP_GENERATION 0xf0a |
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#define | HDA_CMD_VERB_SET_BEEP_GENERATION 0x70a |
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#define | HDA_CMD_GET_BEEP_GENERATION(cad, nid) |
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#define | HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_VOLUME_KNOB 0xf0f |
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#define | HDA_CMD_VERB_SET_VOLUME_KNOB 0x70f |
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#define | HDA_CMD_GET_VOLUME_KNOB(cad, nid) |
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#define | HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_SUBSYSTEM_ID 0xf20 |
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#define | HDA_CMD_VERB_SET_SUSBYSTEM_ID1 0x720 |
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#define | HDA_CMD_VERB_SET_SUBSYSTEM_ID2 0x721 |
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#define | HDA_CMD_VERB_SET_SUBSYSTEM_ID3 0x722 |
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#define | HDA_CMD_VERB_SET_SUBSYSTEM_ID4 0x723 |
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#define | HDA_CMD_GET_SUBSYSTEM_ID(cad, nid) |
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#define | HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload) |
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#define | HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload) |
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#define | HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload) |
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#define | HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT 0xf1c |
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#define | HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1 0x71c |
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#define | HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2 0x71d |
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#define | HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3 0x71e |
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#define | HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4 0x71f |
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#define | HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid) |
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#define | HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload) |
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#define | HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload) |
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#define | HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload) |
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#define | HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_STRIPE_CONTROL 0xf24 |
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#define | HDA_CMD_VERB_SET_STRIPE_CONTROL 0x724 |
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#define | HDA_CMD_GET_STRIPE_CONTROL(cad, nid) |
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#define | HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_CONV_CHAN_COUNT 0xf2d |
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#define | HDA_CMD_VERB_SET_CONV_CHAN_COUNT 0x72d |
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#define | HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid) |
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#define | HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_HDMI_DIP_SIZE 0xf2e |
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#define | HDA_CMD_GET_HDMI_DIP_SIZE(cad, nid, arg) |
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#define | HDA_CMD_VERB_GET_HDMI_ELDD 0xf2f |
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#define | HDA_CMD_GET_HDMI_ELDD(cad, nid, off) |
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#define | HDA_CMD_VERB_GET_HDMI_DIP_INDEX 0xf30 |
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#define | HDA_CMD_VERB_SET_HDMI_DIP_INDEX 0x730 |
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#define | HDA_CMD_GET_HDMI_DIP_INDEX(cad, nid) |
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#define | HDA_CMD_SET_HDMI_DIP_INDEX(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_HDMI_DIP_DATA 0xf31 |
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#define | HDA_CMD_VERB_SET_HDMI_DIP_DATA 0x731 |
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#define | HDA_CMD_GET_HDMI_DIP_DATA(cad, nid) |
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#define | HDA_CMD_SET_HDMI_DIP_DATA(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_HDMI_DIP_XMIT 0xf32 |
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#define | HDA_CMD_VERB_SET_HDMI_DIP_XMIT 0x732 |
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#define | HDA_CMD_GET_HDMI_DIP_XMIT(cad, nid) |
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#define | HDA_CMD_SET_HDMI_DIP_XMIT(cad, nid, payload) |
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#define | HDA_CMD_VERB_GET_HDMI_CP_CTRL 0xf33 |
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#define | HDA_CMD_VERB_SET_HDMI_CP_CTRL 0x733 |
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#define | HDA_CMD_VERB_GET_HDMI_CHAN_SLOT 0xf34 |
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#define | HDA_CMD_VERB_SET_HDMI_CHAN_SLOT 0x734 |
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#define | HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid) |
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#define | HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload) |
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#define | HDA_HDMI_CODING_TYPE_REF_STREAM_HEADER 0 |
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#define | HDA_HDMI_CODING_TYPE_LPCM 1 |
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#define | HDA_HDMI_CODING_TYPE_AC3 2 |
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#define | HDA_HDMI_CODING_TYPE_MPEG1 3 |
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#define | HDA_HDMI_CODING_TYPE_MP3 4 |
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#define | HDA_HDMI_CODING_TYPE_MPEG2 5 |
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#define | HDA_HDMI_CODING_TYPE_AACLC 6 |
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#define | HDA_HDMI_CODING_TYPE_DTS 7 |
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#define | HDA_HDMI_CODING_TYPE_ATRAC 8 |
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#define | HDA_HDMI_CODING_TYPE_SACD 9 |
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#define | HDA_HDMI_CODING_TYPE_EAC3 10 |
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#define | HDA_HDMI_CODING_TYPE_DTS_HD 11 |
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#define | HDA_HDMI_CODING_TYPE_MLP 12 |
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#define | HDA_HDMI_CODING_TYPE_DST 13 |
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#define | HDA_HDMI_CODING_TYPE_WMAPRO 14 |
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#define | HDA_HDMI_CODING_TYPE_REF_CTX 15 |
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#define | HDA_CMD_VERB_FUNCTION_RESET 0x7ff |
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#define | HDA_CMD_FUNCTION_RESET(cad, nid) |
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#define | HDA_PARAM_VENDOR_ID 0x00 |
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#define | HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK 0xffff0000 |
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#define | HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT 16 |
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#define | HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK 0x0000ffff |
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#define | HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT 0 |
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#define | HDA_PARAM_VENDOR_ID_VENDOR_ID(param) |
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#define | HDA_PARAM_VENDOR_ID_DEVICE_ID(param) |
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#define | HDA_PARAM_REVISION_ID 0x02 |
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#define | HDA_PARAM_REVISION_ID_MAJREV_MASK 0x00f00000 |
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#define | HDA_PARAM_REVISION_ID_MAJREV_SHIFT 20 |
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#define | HDA_PARAM_REVISION_ID_MINREV_MASK 0x000f0000 |
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#define | HDA_PARAM_REVISION_ID_MINREV_SHIFT 16 |
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#define | HDA_PARAM_REVISION_ID_REVISION_ID_MASK 0x0000ff00 |
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#define | HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT 8 |
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#define | HDA_PARAM_REVISION_ID_STEPPING_ID_MASK 0x000000ff |
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#define | HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT 0 |
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#define | HDA_PARAM_REVISION_ID_MAJREV(param) |
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#define | HDA_PARAM_REVISION_ID_MINREV(param) |
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#define | HDA_PARAM_REVISION_ID_REVISION_ID(param) |
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#define | HDA_PARAM_REVISION_ID_STEPPING_ID(param) |
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#define | HDA_PARAM_SUB_NODE_COUNT 0x04 |
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#define | HDA_PARAM_SUB_NODE_COUNT_START_MASK 0x00ff0000 |
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#define | HDA_PARAM_SUB_NODE_COUNT_START_SHIFT 16 |
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#define | HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK 0x000000ff |
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#define | HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT 0 |
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#define | HDA_PARAM_SUB_NODE_COUNT_START(param) |
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#define | HDA_PARAM_SUB_NODE_COUNT_TOTAL(param) |
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#define | HDA_PARAM_FCT_GRP_TYPE 0x05 |
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#define | HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK 0x00000100 |
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#define | HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT 8 |
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#define | HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK 0x000000ff |
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#define | HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT 0 |
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#define | HDA_PARAM_FCT_GRP_TYPE_UNSOL(param) |
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#define | HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param) |
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#define | HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO 0x01 |
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#define | HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM 0x02 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP 0x08 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK 0x00010000 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT 16 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK 0x00000f00 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT 8 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK 0x0000000f |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT 0 |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param) |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param) |
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#define | HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP 0x09 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK 0x00f00000 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT 20 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK 0x000f0000 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT 16 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK 0x0000e000 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT 13 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK 0x00001000 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT 12 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK 0x00000800 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT 11 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK 0x00000400 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT 10 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK 0x00000200 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT 9 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK 0x00000100 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT 8 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK 0x00000080 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT 7 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK 0x00000040 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT 6 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK 0x00000020 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT 5 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK 0x00000010 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT 4 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK 0x00000008 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT 3 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK 0x00000004 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT 2 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK 0x00000002 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT 1 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK 0x00000001 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT 0 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CC(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CP(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param) |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT 0x0 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT 0x1 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER 0x2 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR 0x3 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX 0x4 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET 0x5 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET 0x6 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET 0x7 |
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#define | HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET 0xf |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE 0x0a |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK 0x00100000 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT 20 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK 0x00080000 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT 19 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK 0x00040000 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT 18 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK 0x00020000 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT 17 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK 0x00010000 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT 16 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK 0x00000001 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT 0 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK 0x00000002 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT 1 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK 0x00000004 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT 2 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK 0x00000008 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT 3 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK 0x00000010 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT 4 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK 0x00000020 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT 5 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK 0x00000040 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT 6 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK 0x00000080 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT 7 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK 0x00000100 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT 8 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK 0x00000200 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT 9 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK 0x00000400 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT 10 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK 0x00000800 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT 11 |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param) |
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#define | HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param) |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS 0x0b |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK 0x00000004 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT 2 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK 0x00000002 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT 1 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK 0x00000001 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT 0 |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param) |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param) |
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#define | HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param) |
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#define | HDA_PARAM_PIN_CAP 0x0c |
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#define | HDA_PARAM_PIN_CAP_HBR_MASK 0x08000000 |
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#define | HDA_PARAM_PIN_CAP_HBR_SHIFT 27 |
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#define | HDA_PARAM_PIN_CAP_DP_MASK 0x01000000 |
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#define | HDA_PARAM_PIN_CAP_DP_SHIFT 24 |
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#define | HDA_PARAM_PIN_CAP_EAPD_CAP_MASK 0x00010000 |
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#define | HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT 16 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_MASK 0x0000ff00 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT 8 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK 0x00002000 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT 13 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK 0x00001000 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT 12 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK 0x00000400 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT 10 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK 0x00000200 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT 9 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK 0x00000100 |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT 8 |
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#define | HDA_PARAM_PIN_CAP_HDMI_MASK 0x00000080 |
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#define | HDA_PARAM_PIN_CAP_HDMI_SHIFT 7 |
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#define | HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK 0x00000040 |
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#define | HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT 6 |
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#define | HDA_PARAM_PIN_CAP_INPUT_CAP_MASK 0x00000020 |
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#define | HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT 5 |
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#define | HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK 0x00000010 |
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#define | HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT 4 |
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#define | HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK 0x00000008 |
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#define | HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT 3 |
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#define | HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK 0x00000004 |
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#define | HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT 2 |
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#define | HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK 0x00000002 |
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#define | HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT 1 |
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#define | HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK 0x00000001 |
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#define | HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT 0 |
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#define | HDA_PARAM_PIN_CAP_HBR(param) |
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#define | HDA_PARAM_PIN_CAP_DP(param) |
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#define | HDA_PARAM_PIN_CAP_EAPD_CAP(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_100(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_80(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_50(param) |
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#define | HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param) |
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#define | HDA_PARAM_PIN_CAP_HDMI(param) |
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#define | HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param) |
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#define | HDA_PARAM_PIN_CAP_INPUT_CAP(param) |
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#define | HDA_PARAM_PIN_CAP_OUTPUT_CAP(param) |
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#define | HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param) |
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#define | HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param) |
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#define | HDA_PARAM_PIN_CAP_TRIGGER_REQD(param) |
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#define | HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param) |
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#define | HDA_PARAM_INPUT_AMP_CAP 0x0d |
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#define | HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 |
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#define | HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT 31 |
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#define | HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 |
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#define | HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT 16 |
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#define | HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 |
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#define | HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT 8 |
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#define | HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK 0x0000007f |
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#define | HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT 0 |
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#define | HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param) |
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#define | HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param) |
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#define | HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param) |
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#define | HDA_PARAM_INPUT_AMP_CAP_OFFSET(param) |
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#define | HDA_PARAM_OUTPUT_AMP_CAP 0x12 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT 31 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT 16 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT 8 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK 0x0000007f |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT 0 |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param) |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param) |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param) |
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#define | HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param) |
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#define | HDA_PARAM_CONN_LIST_LENGTH 0x0e |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK 0x00000080 |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT 7 |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK 0x0000007f |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT 0 |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param) |
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#define | HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param) |
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#define | HDA_PARAM_SUPP_POWER_STATES 0x0f |
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#define | HDA_PARAM_SUPP_POWER_STATES_D3_MASK 0x00000008 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT 3 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D2_MASK 0x00000004 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT 2 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D1_MASK 0x00000002 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT 1 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D0_MASK 0x00000001 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT 0 |
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#define | HDA_PARAM_SUPP_POWER_STATES_D3(param) |
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#define | HDA_PARAM_SUPP_POWER_STATES_D2(param) |
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#define | HDA_PARAM_SUPP_POWER_STATES_D1(param) |
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#define | HDA_PARAM_SUPP_POWER_STATES_D0(param) |
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#define | HDA_PARAM_PROCESSING_CAP 0x10 |
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#define | HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK 0x0000ff00 |
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#define | HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT 8 |
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#define | HDA_PARAM_PROCESSING_CAP_BENIGN_MASK 0x00000001 |
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#define | HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT 0 |
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#define | HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param) |
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#define | HDA_PARAM_PROCESSING_CAP_BENIGN(param) |
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#define | HDA_PARAM_GPIO_COUNT 0x11 |
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#define | HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK 0x80000000 |
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#define | HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT 31 |
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#define | HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK 0x40000000 |
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#define | HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT 30 |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK 0x00ff0000 |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT 16 |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK 0x0000ff00 |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT 8 |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK 0x000000ff |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT 0 |
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#define | HDA_PARAM_GPIO_COUNT_GPI_WAKE(param) |
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#define | HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param) |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPI(param) |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPO(param) |
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#define | HDA_PARAM_GPIO_COUNT_NUM_GPIO(param) |
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#define | HDA_PARAM_VOLUME_KNOB_CAP 0x13 |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK 0x00000080 |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT 7 |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK 0x0000007f |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT 0 |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param) |
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#define | HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param) |
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#define | HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK 0x0000000f |
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#define | HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT 0 |
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#define | HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK 0x000000f0 |
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#define | HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT 4 |
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#define | HDA_CONFIG_DEFAULTCONF_MISC_MASK 0x00000f00 |
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#define | HDA_CONFIG_DEFAULTCONF_MISC_SHIFT 8 |
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#define | HDA_CONFIG_DEFAULTCONF_COLOR_MASK 0x0000f000 |
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#define | HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT 12 |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK 0x000f0000 |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT 16 |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_MASK 0x00f00000 |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT 20 |
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#define | HDA_CONFIG_DEFAULTCONF_LOCATION_MASK 0x3f000000 |
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#define | HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT 24 |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK 0xc0000000 |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT 30 |
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#define | HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_MISC(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_COLOR(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_LOCATION(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK (0<<30) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE (1<<30) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED (2<<30) |
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#define | HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH (3<<30) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT (0<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER (1<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT (2<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_CD (3<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT (4<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT (5<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE (6<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET (7<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN (8<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_AUX (9<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN (10<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY (11<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN (12<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN (13<<20) |
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#define | HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER (15<<20) |
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