FreeBSD kernel usb device Code
avr32dci.c
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1/* $FreeBSD$ */
2/*-
3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 *
5 * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * This file contains the driver for the AVR32 series USB Device
31 * Controller
32 */
33
34/*
35 * NOTE: When the chip detects BUS-reset it will also reset the
36 * endpoints, Function-address and more.
37 */
38#ifdef USB_GLOBAL_INCLUDE_FILE
39#include USB_GLOBAL_INCLUDE_FILE
40#else
41#include <sys/stdint.h>
42#include <sys/stddef.h>
43#include <sys/param.h>
44#include <sys/queue.h>
45#include <sys/types.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/bus.h>
49#include <sys/module.h>
50#include <sys/lock.h>
51#include <sys/mutex.h>
52#include <sys/condvar.h>
53#include <sys/sysctl.h>
54#include <sys/sx.h>
55#include <sys/unistd.h>
56#include <sys/callout.h>
57#include <sys/malloc.h>
58#include <sys/priv.h>
59
60#include <dev/usb/usb.h>
61#include <dev/usb/usbdi.h>
62
63#define USB_DEBUG_VAR avr32dci_debug
64
65#include <dev/usb/usb_core.h>
66#include <dev/usb/usb_debug.h>
67#include <dev/usb/usb_busdma.h>
68#include <dev/usb/usb_process.h>
70#include <dev/usb/usb_device.h>
71#include <dev/usb/usb_hub.h>
72#include <dev/usb/usb_util.h>
73
75#include <dev/usb/usb_bus.h>
76#endif /* USB_GLOBAL_INCLUDE_FILE */
77
79
80#define AVR32_BUS2SC(bus) \
81 __containerof(bus, struct avr32dci_softc, sc_bus)
82
83#define AVR32_PC2SC(pc) \
84 AVR32_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
85
86#ifdef USB_DEBUG
87static int avr32dci_debug = 0;
88
89static SYSCTL_NODE(_hw_usb, OID_AUTO, avr32dci,
90 CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
91 "USB AVR32 DCI");
92SYSCTL_INT(_hw_usb_avr32dci, OID_AUTO, debug, CTLFLAG_RWTUN,
93 &avr32dci_debug, 0, "AVR32 DCI debug level");
94#endif
95
96#define AVR32_INTR_ENDPT 1
97
98/* prototypes */
99
103
108static void avr32dci_device_done(struct usb_xfer *, usb_error_t);
109static void avr32dci_do_poll(struct usb_bus *);
110static void avr32dci_standard_done(struct usb_xfer *);
111static void avr32dci_root_intr(struct avr32dci_softc *sc);
112
113/*
114 * Here is a list of what the chip supports:
115 */
116static const struct usb_hw_ep_profile
118 [0] = {
119 .max_in_frame_size = 64,
120 .max_out_frame_size = 64,
121 .is_simplex = 1,
122 .support_control = 1,
123 },
124
125 [1] = {
126 .max_in_frame_size = 512,
127 .max_out_frame_size = 512,
128 .is_simplex = 1,
129 .support_bulk = 1,
130 .support_interrupt = 1,
131 .support_isochronous = 1,
132 .support_in = 1,
133 .support_out = 1,
134 },
135
136 [2] = {
137 .max_in_frame_size = 64,
138 .max_out_frame_size = 64,
139 .is_simplex = 1,
140 .support_bulk = 1,
141 .support_interrupt = 1,
142 .support_in = 1,
143 .support_out = 1,
144 },
145
146 [3] = {
147 .max_in_frame_size = 1024,
148 .max_out_frame_size = 1024,
149 .is_simplex = 1,
150 .support_bulk = 1,
151 .support_interrupt = 1,
152 .support_isochronous = 1,
153 .support_in = 1,
154 .support_out = 1,
155 },
156};
157
158static void
160 const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
161{
162 if (ep_addr == 0)
163 *ppf = avr32dci_ep_profile;
164 else if (ep_addr < 3)
165 *ppf = avr32dci_ep_profile + 1;
166 else if (ep_addr < 5)
167 *ppf = avr32dci_ep_profile + 2;
168 else if (ep_addr < 7)
169 *ppf = avr32dci_ep_profile + 3;
170 else
171 *ppf = NULL;
172}
173
174static void
175avr32dci_mod_ctrl(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
176{
177 uint32_t temp;
178
179 temp = AVR32_READ_4(sc, AVR32_CTRL);
180 temp |= set;
181 temp &= ~clear;
182 AVR32_WRITE_4(sc, AVR32_CTRL, temp);
183}
184
185static void
186avr32dci_mod_ien(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
187{
188 uint32_t temp;
189
190 temp = AVR32_READ_4(sc, AVR32_IEN);
191 temp |= set;
192 temp &= ~clear;
193 AVR32_WRITE_4(sc, AVR32_IEN, temp);
194}
195
196static void
198{
199 if (sc->sc_flags.clocks_off &&
201 DPRINTFN(5, "\n");
202
203 /* turn on clocks */
204 (sc->sc_clocks_on) (&sc->sc_bus);
205
207
208 sc->sc_flags.clocks_off = 0;
209 }
210}
211
212static void
214{
215 if (!sc->sc_flags.clocks_off) {
216 DPRINTFN(5, "\n");
217
219
220 /* turn clocks off */
221 (sc->sc_clocks_off) (&sc->sc_bus);
222
223 sc->sc_flags.clocks_off = 1;
224 }
225}
226
227static void
229{
230 /* pullup D+, if possible */
231
232 if (!sc->sc_flags.d_pulled_up &&
234 sc->sc_flags.d_pulled_up = 1;
236 }
237}
238
239static void
241{
242 /* pulldown D+, if possible */
243
244 if (sc->sc_flags.d_pulled_up) {
245 sc->sc_flags.d_pulled_up = 0;
247 }
248}
249
250static void
252{
253 if (!sc->sc_flags.status_suspend) {
254 return;
255 }
257
258 /* wait 8 milliseconds */
259 /* Wait for reset to complete. */
260 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 125);
261
262 /* hardware should have cleared RMWKUP bit */
263}
264
265static void
266avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
267{
268 DPRINTFN(5, "addr=%d\n", addr);
269
271}
272
273static uint8_t
275{
276 struct avr32dci_softc *sc;
277 struct usb_device_request req;
278 uint16_t count;
279 uint32_t temp;
280
281 /* get pointer to softc */
282 sc = AVR32_PC2SC(td->pc);
283
284 /* check endpoint status */
285 temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
286
287 DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
288
289 if (!(temp & AVR32_EPTSTA_RX_SETUP)) {
290 goto not_complete;
291 }
292 /* clear did stall */
293 td->did_stall = 0;
294 /* get the packet byte count */
296
297 /* verify data length */
298 if (count != td->remainder) {
299 DPRINTFN(0, "Invalid SETUP packet "
300 "length, %d bytes\n", count);
301 goto not_complete;
302 }
303 if (count != sizeof(req)) {
304 DPRINTFN(0, "Unsupported SETUP packet "
305 "length, %d bytes\n", count);
306 goto not_complete;
307 }
308 /* receive data */
309 memcpy(&req, sc->physdata, sizeof(req));
310
311 /* copy data into real buffer */
312 usbd_copy_in(td->pc, 0, &req, sizeof(req));
313
314 td->offset = sizeof(req);
315 td->remainder = 0;
316
317 /* sneak peek the set address */
318 if ((req.bmRequestType == UT_WRITE_DEVICE) &&
319 (req.bRequest == UR_SET_ADDRESS)) {
320 sc->sc_dv_addr = req.wValue[0] & 0x7F;
321 /* must write address before ZLP */
324 avr32dci_mod_ctrl(sc, sc->sc_dv_addr, 0);
325 } else {
326 sc->sc_dv_addr = 0xFF;
327 }
328
329 /* clear SETUP packet interrupt */
331 return (0); /* complete */
332
333not_complete:
334 if (temp & AVR32_EPTSTA_RX_SETUP) {
335 /* clear SETUP packet interrupt */
337 }
338 /* abort any ongoing transfer */
339 if (!td->did_stall) {
340 DPRINTFN(5, "stalling\n");
343 td->did_stall = 1;
344 }
345 return (1); /* not complete */
346}
347
348static uint8_t
350{
351 struct avr32dci_softc *sc;
352 struct usb_page_search buf_res;
353 uint16_t count;
354 uint32_t temp;
355 uint8_t to;
356 uint8_t got_short;
357
358 to = 4; /* don't loop forever! */
359 got_short = 0;
360
361 /* get pointer to softc */
362 sc = AVR32_PC2SC(td->pc);
363
364repeat:
365 /* check if any of the FIFO banks have data */
366 /* check endpoint status */
367 temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
368
369 DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
370
371 if (temp & AVR32_EPTSTA_RX_SETUP) {
372 if (td->remainder == 0) {
373 /*
374 * We are actually complete and have
375 * received the next SETUP
376 */
377 DPRINTFN(5, "faking complete\n");
378 return (0); /* complete */
379 }
380 /*
381 * USB Host Aborted the transfer.
382 */
383 td->error = 1;
384 return (0); /* complete */
385 }
386 /* check status */
387 if (!(temp & AVR32_EPTSTA_RX_BK_RDY)) {
388 /* no data */
389 goto not_complete;
390 }
391 /* get the packet byte count */
393
394 /* verify the packet byte count */
395 if (count != td->max_packet_size) {
396 if (count < td->max_packet_size) {
397 /* we have a short packet */
398 td->short_pkt = 1;
399 got_short = 1;
400 } else {
401 /* invalid USB packet */
402 td->error = 1;
403 return (0); /* we are complete */
404 }
405 }
406 /* verify the packet byte count */
407 if (count > td->remainder) {
408 /* invalid USB packet */
409 td->error = 1;
410 return (0); /* we are complete */
411 }
412 while (count > 0) {
413 usbd_get_page(td->pc, td->offset, &buf_res);
414
415 /* get correct length */
416 if (buf_res.length > count) {
417 buf_res.length = count;
418 }
419 /* receive data */
420 memcpy(buf_res.buffer, sc->physdata +
422 (td->ep_no << 16) + (td->offset % td->max_packet_size), buf_res.length);
423 /* update counters */
424 count -= buf_res.length;
425 td->offset += buf_res.length;
426 td->remainder -= buf_res.length;
427 }
428
429 /* clear OUT packet interrupt */
431
432 /* check if we are complete */
433 if ((td->remainder == 0) || got_short) {
434 if (td->short_pkt) {
435 /* we are complete */
436 return (0);
437 }
438 /* else need to receive a zero length packet */
439 }
440 if (--to) {
441 goto repeat;
442 }
443not_complete:
444 return (1); /* not complete */
445}
446
447static uint8_t
449{
450 struct avr32dci_softc *sc;
451 struct usb_page_search buf_res;
452 uint16_t count;
453 uint8_t to;
454 uint32_t temp;
455
456 to = 4; /* don't loop forever! */
457
458 /* get pointer to softc */
459 sc = AVR32_PC2SC(td->pc);
460
461repeat:
462
463 /* check endpoint status */
464 temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
465
466 DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
467
468 if (temp & AVR32_EPTSTA_RX_SETUP) {
469 /*
470 * The current transfer was aborted
471 * by the USB Host
472 */
473 td->error = 1;
474 return (0); /* complete */
475 }
476 if (temp & AVR32_EPTSTA_TX_PK_RDY) {
477 /* cannot write any data - all banks are busy */
478 goto not_complete;
479 }
481 if (td->remainder < count) {
482 /* we have a short packet */
483 td->short_pkt = 1;
484 count = td->remainder;
485 }
486 while (count > 0) {
487 usbd_get_page(td->pc, td->offset, &buf_res);
488
489 /* get correct length */
490 if (buf_res.length > count) {
491 buf_res.length = count;
492 }
493 /* transmit data */
494 memcpy(sc->physdata +
496 (td->ep_no << 16) + (td->offset % td->max_packet_size),
497 buf_res.buffer, buf_res.length);
498 /* update counters */
499 count -= buf_res.length;
500 td->offset += buf_res.length;
501 td->remainder -= buf_res.length;
502 }
503
504 /* allocate FIFO bank */
506
507 /* check remainder */
508 if (td->remainder == 0) {
509 if (td->short_pkt) {
510 return (0); /* complete */
511 }
512 /* else we need to transmit a short packet */
513 }
514 if (--to) {
515 goto repeat;
516 }
517not_complete:
518 return (1); /* not complete */
519}
520
521static uint8_t
523{
524 struct avr32dci_softc *sc;
525 uint32_t temp;
526
527 /* get pointer to softc */
528 sc = AVR32_PC2SC(td->pc);
529
530 /* check endpoint status */
531 temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
532
533 DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
534
535 if (temp & AVR32_EPTSTA_RX_SETUP) {
536 DPRINTFN(5, "faking complete\n");
537 /* Race condition */
538 return (0); /* complete */
539 }
540 /*
541 * The control endpoint has only got one bank, so if that bank
542 * is free the packet has been transferred!
543 */
544 if (AVR32_EPTSTA_BUSY_BANK_STA(temp) != 0) {
545 /* cannot write any data - a bank is busy */
546 goto not_complete;
547 }
548 if (sc->sc_dv_addr != 0xFF) {
549 /* set new address */
551 }
552 return (0); /* complete */
553
554not_complete:
555 return (1); /* not complete */
556}
557
558static uint8_t
560{
561 struct avr32dci_td *td;
562
563 DPRINTFN(9, "\n");
564
565 td = xfer->td_transfer_cache;
566 while (1) {
567 if ((td->func) (td)) {
568 /* operation in progress */
569 break;
570 }
571 if (((void *)td) == xfer->td_transfer_last) {
572 goto done;
573 }
574 if (td->error) {
575 goto done;
576 } else if (td->remainder > 0) {
577 /*
578 * We had a short transfer. If there is no alternate
579 * next, stop processing !
580 */
581 if (!td->alt_next) {
582 goto done;
583 }
584 }
585 /*
586 * Fetch the next transfer descriptor and transfer
587 * some flags to the next transfer descriptor
588 */
589 td = td->obj_next;
590 xfer->td_transfer_cache = td;
591 }
592 return (1); /* not complete */
593
594done:
595 /* compute all actual lengths */
596
598 return (0); /* complete */
599}
600
601static void
603{
604 struct usb_xfer *xfer;
605
606repeat:
607 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
608 if (!avr32dci_xfer_do_fifo(xfer)) {
609 /* queue has been modified */
610 goto repeat;
611 }
612 }
613}
614
615void
616avr32dci_vbus_interrupt(struct avr32dci_softc *sc, uint8_t is_on)
617{
618 DPRINTFN(5, "vbus = %u\n", is_on);
619
620 if (is_on) {
621 if (!sc->sc_flags.status_vbus) {
622 sc->sc_flags.status_vbus = 1;
623
624 /* complete root HUB interrupt endpoint */
625
627 }
628 } else {
629 if (sc->sc_flags.status_vbus) {
630 sc->sc_flags.status_vbus = 0;
632 sc->sc_flags.status_suspend = 0;
633 sc->sc_flags.change_suspend = 0;
634 sc->sc_flags.change_connect = 1;
635
636 /* complete root HUB interrupt endpoint */
637
639 }
640 }
641}
642
643void
645{
646 uint32_t status;
647
648 USB_BUS_LOCK(&sc->sc_bus);
649
650 /* read interrupt status */
652
653 /* clear all set interrupts */
655
656 DPRINTFN(14, "INTSTA=0x%08x\n", status);
657
658 /* check for any bus state change interrupts */
660 DPRINTFN(5, "end of reset\n");
661
662 /* set correct state */
664 sc->sc_flags.status_suspend = 0;
665 sc->sc_flags.change_suspend = 0;
666 sc->sc_flags.change_connect = 1;
667
668 /* disable resume interrupt */
671
672 /* complete root HUB interrupt endpoint */
674 }
675 /*
676 * If resume and suspend is set at the same time we interpret
677 * that like RESUME. Resume is set when there is at least 3
678 * milliseconds of inactivity on the USB BUS.
679 */
681 DPRINTFN(5, "resume interrupt\n");
682
683 if (sc->sc_flags.status_suspend) {
684 /* update status bits */
685 sc->sc_flags.status_suspend = 0;
686 sc->sc_flags.change_suspend = 1;
687
688 /* disable resume interrupt */
691
692 /* complete root HUB interrupt endpoint */
694 }
695 } else if (status & AVR32_INT_DET_SUSPD) {
696 DPRINTFN(5, "suspend interrupt\n");
697
698 if (!sc->sc_flags.status_suspend) {
699 /* update status bits */
700 sc->sc_flags.status_suspend = 1;
701 sc->sc_flags.change_suspend = 1;
702
703 /* disable suspend interrupt */
706
707 /* complete root HUB interrupt endpoint */
709 }
710 }
711 /* check for any endpoint interrupts */
712 if (status & -AVR32_INT_EPT_INT(0)) {
713 DPRINTFN(5, "real endpoint interrupt\n");
714
716 }
718}
719
720static void
722{
723 struct avr32dci_td *td;
724
725 /* get current Transfer Descriptor */
726 td = temp->td_next;
727 temp->td = td;
728
729 /* prepare for next TD */
730 temp->td_next = td->obj_next;
731
732 /* fill out the Transfer Descriptor */
733 td->func = temp->func;
734 td->pc = temp->pc;
735 td->offset = temp->offset;
736 td->remainder = temp->len;
737 td->error = 0;
738 td->did_stall = temp->did_stall;
739 td->short_pkt = temp->short_pkt;
740 td->alt_next = temp->setup_alt_next;
741}
742
743static void
745{
746 struct avr32dci_std_temp temp;
747 struct avr32dci_softc *sc;
748 struct avr32dci_td *td;
749 uint32_t x;
750 uint8_t ep_no;
751 uint8_t need_sync;
752
753 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
754 xfer->address, UE_GET_ADDR(xfer->endpointno),
755 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
756
757 temp.max_frame_size = xfer->max_frame_size;
758
759 td = xfer->td_start[0];
760 xfer->td_transfer_first = td;
761 xfer->td_transfer_cache = td;
762
763 /* setup temp */
764
765 temp.pc = NULL;
766 temp.td = NULL;
767 temp.td_next = xfer->td_start[0];
768 temp.offset = 0;
771 temp.did_stall = !xfer->flags_int.control_stall;
772
773 sc = AVR32_BUS2SC(xfer->xroot->bus);
774 ep_no = (xfer->endpointno & UE_ADDR);
775
776 /* check if we should prepend a setup message */
777
778 if (xfer->flags_int.control_xfr) {
779 if (xfer->flags_int.control_hdr) {
780 temp.func = &avr32dci_setup_rx;
781 temp.len = xfer->frlengths[0];
782 temp.pc = xfer->frbuffers + 0;
783 temp.short_pkt = temp.len ? 1 : 0;
784 /* check for last frame */
785 if (xfer->nframes == 1) {
786 /* no STATUS stage yet, SETUP is last */
787 if (xfer->flags_int.control_act)
788 temp.setup_alt_next = 0;
789 }
791 }
792 x = 1;
793 } else {
794 x = 0;
795 }
796
797 if (x != xfer->nframes) {
798 if (xfer->endpointno & UE_DIR_IN) {
799 temp.func = &avr32dci_data_tx;
800 need_sync = 1;
801 } else {
802 temp.func = &avr32dci_data_rx;
803 need_sync = 0;
804 }
805
806 /* setup "pc" pointer */
807 temp.pc = xfer->frbuffers + x;
808 } else {
809 need_sync = 0;
810 }
811 while (x != xfer->nframes) {
812 /* DATA0 / DATA1 message */
813
814 temp.len = xfer->frlengths[x];
815
816 x++;
817
818 if (x == xfer->nframes) {
819 if (xfer->flags_int.control_xfr) {
820 if (xfer->flags_int.control_act) {
821 temp.setup_alt_next = 0;
822 }
823 } else {
824 temp.setup_alt_next = 0;
825 }
826 }
827 if (temp.len == 0) {
828 /* make sure that we send an USB packet */
829
830 temp.short_pkt = 0;
831
832 } else {
833 /* regular data transfer */
834
835 temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
836 }
837
839
840 if (xfer->flags_int.isochronous_xfr) {
841 temp.offset += temp.len;
842 } else {
843 /* get next Page Cache pointer */
844 temp.pc = xfer->frbuffers + x;
845 }
846 }
847
848 if (xfer->flags_int.control_xfr) {
849 /* always setup a valid "pc" pointer for status and sync */
850 temp.pc = xfer->frbuffers + 0;
851 temp.len = 0;
852 temp.short_pkt = 0;
853 temp.setup_alt_next = 0;
854
855 /* check if we need to sync */
856 if (need_sync) {
857 /* we need a SYNC point after TX */
860 }
861 /* check if we should append a status stage */
862 if (!xfer->flags_int.control_act) {
863 /*
864 * Send a DATA1 message and invert the current
865 * endpoint direction.
866 */
867 if (xfer->endpointno & UE_DIR_IN) {
868 temp.func = &avr32dci_data_rx;
869 need_sync = 0;
870 } else {
871 temp.func = &avr32dci_data_tx;
872 need_sync = 1;
873 }
874
876 if (need_sync) {
877 /* we need a SYNC point after TX */
880 }
881 }
882 }
883 /* must have at least one frame! */
884 td = temp.td;
885 xfer->td_transfer_last = td;
886}
887
888static void
890{
891 struct usb_xfer *xfer = arg;
892
893 DPRINTF("xfer=%p\n", xfer);
894
895 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
896
897 /* transfer is transferred */
899}
900
901static void
903{
904 DPRINTFN(9, "\n");
905
906 /* poll one time - will turn on interrupts */
907 if (avr32dci_xfer_do_fifo(xfer)) {
908 uint8_t ep_no = xfer->endpointno & UE_ADDR;
909 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
910
911 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
912
913 /* put transfer on interrupt queue */
914 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
915
916 /* start timeout, if any */
917 if (xfer->timeout != 0) {
919 &avr32dci_timeout, xfer->timeout);
920 }
921 }
922}
923
924static void
926{
927 DPRINTFN(9, "\n");
928
929 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
930
931 /* set port bit */
932 sc->sc_hub_idata[0] = 0x02; /* we only have one port */
933
935 sizeof(sc->sc_hub_idata));
936}
937
938static usb_error_t
940{
941 struct avr32dci_td *td;
942 uint32_t len;
943 uint8_t error;
944
945 DPRINTFN(9, "\n");
946
947 td = xfer->td_transfer_cache;
948
949 do {
950 len = td->remainder;
951
952 if (xfer->aframes != xfer->nframes) {
953 /*
954 * Verify the length and subtract
955 * the remainder from "frlengths[]":
956 */
957 if (len > xfer->frlengths[xfer->aframes]) {
958 td->error = 1;
959 } else {
960 xfer->frlengths[xfer->aframes] -= len;
961 }
962 }
963 /* Check for transfer error */
964 if (td->error) {
965 /* the transfer is finished */
966 error = 1;
967 td = NULL;
968 break;
969 }
970 /* Check for short transfer */
971 if (len > 0) {
972 if (xfer->flags_int.short_frames_ok ||
974 /* follow alt next */
975 if (td->alt_next) {
976 td = td->obj_next;
977 } else {
978 td = NULL;
979 }
980 } else {
981 /* the transfer is finished */
982 td = NULL;
983 }
984 error = 0;
985 break;
986 }
987 td = td->obj_next;
988
989 /* this USB frame is complete */
990 error = 0;
991 break;
992
993 } while (0);
994
995 /* update transfer cache */
996
997 xfer->td_transfer_cache = td;
998
999 return (error ?
1001}
1002
1003static void
1005{
1006 usb_error_t err = 0;
1007
1008 DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1009 xfer, xfer->endpoint);
1010
1011 /* reset scanner */
1012
1014
1015 if (xfer->flags_int.control_xfr) {
1016 if (xfer->flags_int.control_hdr) {
1017 err = avr32dci_standard_done_sub(xfer);
1018 }
1019 xfer->aframes = 1;
1020
1021 if (xfer->td_transfer_cache == NULL) {
1022 goto done;
1023 }
1024 }
1025 while (xfer->aframes != xfer->nframes) {
1026 err = avr32dci_standard_done_sub(xfer);
1027 xfer->aframes++;
1028
1029 if (xfer->td_transfer_cache == NULL) {
1030 goto done;
1031 }
1032 }
1033
1034 if (xfer->flags_int.control_xfr &&
1035 !xfer->flags_int.control_act) {
1036 err = avr32dci_standard_done_sub(xfer);
1037 }
1038done:
1039 avr32dci_device_done(xfer, err);
1040}
1041
1042/*------------------------------------------------------------------------*
1043 * avr32dci_device_done
1044 *
1045 * NOTE: this function can be called more than one time on the
1046 * same USB transfer!
1047 *------------------------------------------------------------------------*/
1048static void
1050{
1051 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1052 uint8_t ep_no;
1053
1054 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1055
1056 DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1057 xfer, xfer->endpoint, error);
1058
1059 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1060 ep_no = (xfer->endpointno & UE_ADDR);
1061
1062 /* disable endpoint interrupt */
1063 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1064
1065 DPRINTFN(15, "disabled interrupts!\n");
1066 }
1067 /* dequeue transfer and start next transfer */
1069}
1070
1071static void
1073{
1075}
1076
1077static void
1079 struct usb_endpoint *pipe, uint8_t *did_stall)
1080{
1081 struct avr32dci_softc *sc;
1082 uint8_t ep_no;
1083
1084 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1085
1086 DPRINTFN(5, "pipe=%p\n", pipe);
1087
1088 sc = AVR32_BUS2SC(udev->bus);
1089 /* get endpoint number */
1090 ep_no = (pipe->edesc->bEndpointAddress & UE_ADDR);
1091 /* set stall */
1093}
1094
1095static void
1097 uint8_t ep_type, uint8_t ep_dir)
1098{
1099 const struct usb_hw_ep_profile *pf;
1100 uint32_t temp;
1101 uint32_t epsize;
1102 uint8_t n;
1103
1104 if (ep_type == UE_CONTROL) {
1105 /* clearing stall is not needed */
1106 return;
1107 }
1108 /* set endpoint reset */
1110
1111 /* set stall */
1113
1114 /* reset data toggle */
1116
1117 /* clear stall */
1119
1120 if (ep_type == UE_BULK) {
1122 } else if (ep_type == UE_INTERRUPT) {
1124 } else {
1125 temp = AVR32_EPTCFG_TYPE_ISOC |
1127 }
1128 if (ep_dir & UE_DIR_IN) {
1129 temp |= AVR32_EPTCFG_EPDIR_IN;
1130 }
1131 avr32dci_get_hw_ep_profile(NULL, &pf, ep_no);
1132
1133 /* compute endpoint size (use maximum) */
1134 epsize = pf->max_in_frame_size | pf->max_out_frame_size;
1135 n = 0;
1136 while ((epsize /= 2))
1137 n++;
1138 temp |= AVR32_EPTCFG_EPSIZE(n);
1139
1140 /* use the maximum number of banks supported */
1141 if (ep_no < 1)
1142 temp |= AVR32_EPTCFG_NBANK(1);
1143 else if (ep_no < 3)
1144 temp |= AVR32_EPTCFG_NBANK(2);
1145 else
1146 temp |= AVR32_EPTCFG_NBANK(3);
1147
1148 AVR32_WRITE_4(sc, AVR32_EPTCFG(ep_no), temp);
1149
1150 temp = AVR32_READ_4(sc, AVR32_EPTCFG(ep_no));
1151
1152 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1153 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1154 } else {
1155 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1157 }
1158}
1159
1160static void
1162{
1163 struct avr32dci_softc *sc;
1164 struct usb_endpoint_descriptor *ed;
1165
1166 DPRINTFN(5, "pipe=%p\n", pipe);
1167
1168 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1169
1170 /* check mode */
1171 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1172 /* not supported */
1173 return;
1174 }
1175 /* get softc */
1176 sc = AVR32_BUS2SC(udev->bus);
1177
1178 /* get endpoint descriptor */
1179 ed = pipe->edesc;
1180
1181 /* reset endpoint */
1183 (ed->bEndpointAddress & UE_ADDR),
1184 (ed->bmAttributes & UE_XFERTYPE),
1186}
1187
1190{
1191 uint8_t n;
1192
1193 DPRINTF("start\n");
1194
1195 /* set up the bus structure */
1198
1199 USB_BUS_LOCK(&sc->sc_bus);
1200
1201 /* make sure USB is enabled */
1203
1204 /* turn on clocks */
1205 (sc->sc_clocks_on) (&sc->sc_bus);
1206
1207 /* make sure device is re-enumerated */
1209
1210 /* wait a little for things to stabilise */
1211 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
1212
1213 /* disable interrupts */
1214 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1215
1216 /* enable interrupts */
1219
1220 /* reset all endpoints */
1221 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1222
1223 /* disable all endpoints */
1224 for (n = 0; n != AVR32_EP_MAX; n++) {
1225 /* disable endpoint */
1227 }
1228
1229 /* turn off clocks */
1230
1232
1233 USB_BUS_UNLOCK(&sc->sc_bus);
1234
1235 /* catch any lost interrupts */
1236
1238
1239 return (0); /* success */
1240}
1241
1242void
1244{
1245 uint8_t n;
1246
1247 USB_BUS_LOCK(&sc->sc_bus);
1248
1249 /* turn on clocks */
1250 (sc->sc_clocks_on) (&sc->sc_bus);
1251
1252 /* disable interrupts */
1253 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1254
1255 /* reset all endpoints */
1256 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1257
1258 /* disable all endpoints */
1259 for (n = 0; n != AVR32_EP_MAX; n++) {
1260 /* disable endpoint */
1262 }
1263
1264 sc->sc_flags.port_powered = 0;
1265 sc->sc_flags.status_vbus = 0;
1266 sc->sc_flags.status_bus_reset = 0;
1267 sc->sc_flags.status_suspend = 0;
1268 sc->sc_flags.change_suspend = 0;
1269 sc->sc_flags.change_connect = 1;
1270
1273
1274 USB_BUS_UNLOCK(&sc->sc_bus);
1275}
1276
1277static void
1279{
1280 /* TODO */
1281}
1282
1283static void
1285{
1286 /* TODO */
1287}
1288
1289static void
1291{
1292 struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1293
1294 USB_BUS_LOCK(&sc->sc_bus);
1296 USB_BUS_UNLOCK(&sc->sc_bus);
1297}
1298
1299/*------------------------------------------------------------------------*
1300 * avr32dci bulk support
1301 * avr32dci control support
1302 * avr32dci interrupt support
1303 *------------------------------------------------------------------------*/
1304static void
1306{
1307 return;
1308}
1309
1310static void
1312{
1314}
1315
1316static void
1318{
1319 return;
1320}
1321
1322static void
1324{
1325 /* setup TDs */
1328}
1329
1331{
1336};
1337
1338/*------------------------------------------------------------------------*
1339 * avr32dci full speed isochronous support
1340 *------------------------------------------------------------------------*/
1341static void
1343{
1344 return;
1345}
1346
1347static void
1349{
1351}
1352
1353static void
1355{
1356 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1357 uint32_t nframes;
1358 uint8_t ep_no;
1359
1360 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1361 xfer, xfer->endpoint->isoc_next, xfer->nframes);
1362
1363 /* get the current frame index */
1364 ep_no = xfer->endpointno & UE_ADDR;
1365 nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1366
1368 xfer, nframes, 0, 1, AVR32_FRAME_MASK, NULL))
1369 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1370
1371 /* setup TDs */
1373}
1374
1375static void
1377{
1378 /* start TD chain */
1380}
1381
1383{
1388};
1389
1390/*------------------------------------------------------------------------*
1391 * avr32dci root control support
1392 *------------------------------------------------------------------------*
1393 * Simulate a hardware HUB by handling all the necessary requests.
1394 *------------------------------------------------------------------------*/
1395
1397 .bLength = sizeof(struct usb_device_descriptor),
1399 .bcdUSB = {0x00, 0x02},
1400 .bDeviceClass = UDCLASS_HUB,
1401 .bDeviceSubClass = UDSUBCLASS_HUB,
1402 .bDeviceProtocol = UDPROTO_HSHUBSTT,
1403 .bMaxPacketSize = 64,
1404 .bcdDevice = {0x00, 0x01},
1405 .iManufacturer = 1,
1406 .iProduct = 2,
1407 .bNumConfigurations = 1,
1408};
1409
1411 .bLength = sizeof(struct usb_device_qualifier),
1413 .bcdUSB = {0x00, 0x02},
1414 .bDeviceClass = UDCLASS_HUB,
1415 .bDeviceSubClass = UDSUBCLASS_HUB,
1416 .bDeviceProtocol = UDPROTO_FSHUB,
1417 .bMaxPacketSize0 = 0,
1418 .bNumConfigurations = 0,
1419};
1420
1422 .confd = {
1423 .bLength = sizeof(struct usb_config_descriptor),
1425 .wTotalLength[0] = sizeof(avr32dci_confd),
1426 .bNumInterface = 1,
1428 .iConfiguration = 0,
1430 .bMaxPower = 0,
1431 },
1432 .ifcd = {
1433 .bLength = sizeof(struct usb_interface_descriptor),
1435 .bNumEndpoints = 1,
1436 .bInterfaceClass = UICLASS_HUB,
1437 .bInterfaceSubClass = UISUBCLASS_HUB,
1438 .bInterfaceProtocol = 0,
1439 },
1440 .endpd = {
1441 .bLength = sizeof(struct usb_endpoint_descriptor),
1443 .bEndpointAddress = (UE_DIR_IN | AVR32_INTR_ENDPT),
1445 .wMaxPacketSize[0] = 8,
1446 .bInterval = 255,
1447 },
1448};
1449#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
1450
1452 .bDescLength = sizeof(avr32dci_hubd),
1454 .bNbrPorts = 1,
1456 .bPwrOn2PwrGood = 50,
1457 .bHubContrCurrent = 0,
1458 .DeviceRemovable = {0}, /* port is removable */
1459};
1460
1461#define STRING_VENDOR \
1462 "A\0V\0R\0003\0002"
1463
1464#define STRING_PRODUCT \
1465 "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B"
1466
1469
1470static usb_error_t
1472 struct usb_device_request *req, const void **pptr, uint16_t *plength)
1473{
1474 struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
1475 const void *ptr;
1476 uint16_t len;
1477 uint16_t value;
1478 uint16_t index;
1479 uint32_t temp;
1480 usb_error_t err;
1481
1482 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1483
1484 /* buffer reset */
1485 ptr = (const void *)&sc->sc_hub_temp;
1486 len = 0;
1487 err = 0;
1488
1489 value = UGETW(req->wValue);
1490 index = UGETW(req->wIndex);
1491
1492 /* demultiplex the control request */
1493
1494 switch (req->bmRequestType) {
1495 case UT_READ_DEVICE:
1496 switch (req->bRequest) {
1497 case UR_GET_DESCRIPTOR:
1498 goto tr_handle_get_descriptor;
1499 case UR_GET_CONFIG:
1500 goto tr_handle_get_config;
1501 case UR_GET_STATUS:
1502 goto tr_handle_get_status;
1503 default:
1504 goto tr_stalled;
1505 }
1506 break;
1507
1508 case UT_WRITE_DEVICE:
1509 switch (req->bRequest) {
1510 case UR_SET_ADDRESS:
1511 goto tr_handle_set_address;
1512 case UR_SET_CONFIG:
1513 goto tr_handle_set_config;
1514 case UR_CLEAR_FEATURE:
1515 goto tr_valid; /* nop */
1516 case UR_SET_DESCRIPTOR:
1517 goto tr_valid; /* nop */
1518 case UR_SET_FEATURE:
1519 default:
1520 goto tr_stalled;
1521 }
1522 break;
1523
1524 case UT_WRITE_ENDPOINT:
1525 switch (req->bRequest) {
1526 case UR_CLEAR_FEATURE:
1527 switch (UGETW(req->wValue)) {
1528 case UF_ENDPOINT_HALT:
1529 goto tr_handle_clear_halt;
1531 goto tr_handle_clear_wakeup;
1532 default:
1533 goto tr_stalled;
1534 }
1535 break;
1536 case UR_SET_FEATURE:
1537 switch (UGETW(req->wValue)) {
1538 case UF_ENDPOINT_HALT:
1539 goto tr_handle_set_halt;
1541 goto tr_handle_set_wakeup;
1542 default:
1543 goto tr_stalled;
1544 }
1545 break;
1546 case UR_SYNCH_FRAME:
1547 goto tr_valid; /* nop */
1548 default:
1549 goto tr_stalled;
1550 }
1551 break;
1552
1553 case UT_READ_ENDPOINT:
1554 switch (req->bRequest) {
1555 case UR_GET_STATUS:
1556 goto tr_handle_get_ep_status;
1557 default:
1558 goto tr_stalled;
1559 }
1560 break;
1561
1562 case UT_WRITE_INTERFACE:
1563 switch (req->bRequest) {
1564 case UR_SET_INTERFACE:
1565 goto tr_handle_set_interface;
1566 case UR_CLEAR_FEATURE:
1567 goto tr_valid; /* nop */
1568 case UR_SET_FEATURE:
1569 default:
1570 goto tr_stalled;
1571 }
1572 break;
1573
1574 case UT_READ_INTERFACE:
1575 switch (req->bRequest) {
1576 case UR_GET_INTERFACE:
1577 goto tr_handle_get_interface;
1578 case UR_GET_STATUS:
1579 goto tr_handle_get_iface_status;
1580 default:
1581 goto tr_stalled;
1582 }
1583 break;
1584
1587 /* XXX forward */
1588 break;
1589
1592 /* XXX forward */
1593 break;
1594
1596 switch (req->bRequest) {
1597 case UR_CLEAR_FEATURE:
1598 goto tr_valid;
1599 case UR_SET_DESCRIPTOR:
1600 case UR_SET_FEATURE:
1601 break;
1602 default:
1603 goto tr_stalled;
1604 }
1605 break;
1606
1608 switch (req->bRequest) {
1609 case UR_CLEAR_FEATURE:
1610 goto tr_handle_clear_port_feature;
1611 case UR_SET_FEATURE:
1612 goto tr_handle_set_port_feature;
1613 case UR_CLEAR_TT_BUFFER:
1614 case UR_RESET_TT:
1615 case UR_STOP_TT:
1616 goto tr_valid;
1617
1618 default:
1619 goto tr_stalled;
1620 }
1621 break;
1622
1624 switch (req->bRequest) {
1625 case UR_GET_TT_STATE:
1626 goto tr_handle_get_tt_state;
1627 case UR_GET_STATUS:
1628 goto tr_handle_get_port_status;
1629 default:
1630 goto tr_stalled;
1631 }
1632 break;
1633
1635 switch (req->bRequest) {
1636 case UR_GET_DESCRIPTOR:
1637 goto tr_handle_get_class_descriptor;
1638 case UR_GET_STATUS:
1639 goto tr_handle_get_class_status;
1640
1641 default:
1642 goto tr_stalled;
1643 }
1644 break;
1645 default:
1646 goto tr_stalled;
1647 }
1648 goto tr_valid;
1649
1650tr_handle_get_descriptor:
1651 switch (value >> 8) {
1652 case UDESC_DEVICE:
1653 if (value & 0xff) {
1654 goto tr_stalled;
1655 }
1656 len = sizeof(avr32dci_devd);
1657 ptr = (const void *)&avr32dci_devd;
1658 goto tr_valid;
1660 if (value & 0xff)
1661 goto tr_stalled;
1662 len = sizeof(avr32dci_odevd);
1663 ptr = (const void *)&avr32dci_odevd;
1664 goto tr_valid;
1665 case UDESC_CONFIG:
1666 if (value & 0xff) {
1667 goto tr_stalled;
1668 }
1669 len = sizeof(avr32dci_confd);
1670 ptr = (const void *)&avr32dci_confd;
1671 goto tr_valid;
1672 case UDESC_STRING:
1673 switch (value & 0xff) {
1674 case 0: /* Language table */
1675 len = sizeof(usb_string_lang_en);
1676 ptr = (const void *)&usb_string_lang_en;
1677 goto tr_valid;
1678
1679 case 1: /* Vendor */
1680 len = sizeof(avr32dci_vendor);
1681 ptr = (const void *)&avr32dci_vendor;
1682 goto tr_valid;
1683
1684 case 2: /* Product */
1685 len = sizeof(avr32dci_product);
1686 ptr = (const void *)&avr32dci_product;
1687 goto tr_valid;
1688 default:
1689 break;
1690 }
1691 break;
1692 default:
1693 goto tr_stalled;
1694 }
1695 goto tr_stalled;
1696
1697tr_handle_get_config:
1698 len = 1;
1699 sc->sc_hub_temp.wValue[0] = sc->sc_conf;
1700 goto tr_valid;
1701
1702tr_handle_get_status:
1703 len = 2;
1705 goto tr_valid;
1706
1707tr_handle_set_address:
1708 if (value & 0xFF00) {
1709 goto tr_stalled;
1710 }
1711 sc->sc_rt_addr = value;
1712 goto tr_valid;
1713
1714tr_handle_set_config:
1715 if (value >= 2) {
1716 goto tr_stalled;
1717 }
1718 sc->sc_conf = value;
1719 goto tr_valid;
1720
1721tr_handle_get_interface:
1722 len = 1;
1723 sc->sc_hub_temp.wValue[0] = 0;
1724 goto tr_valid;
1725
1726tr_handle_get_tt_state:
1727tr_handle_get_class_status:
1728tr_handle_get_iface_status:
1729tr_handle_get_ep_status:
1730 len = 2;
1731 USETW(sc->sc_hub_temp.wValue, 0);
1732 goto tr_valid;
1733
1734tr_handle_set_halt:
1735tr_handle_set_interface:
1736tr_handle_set_wakeup:
1737tr_handle_clear_wakeup:
1738tr_handle_clear_halt:
1739 goto tr_valid;
1740
1741tr_handle_clear_port_feature:
1742 if (index != 1) {
1743 goto tr_stalled;
1744 }
1745 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
1746
1747 switch (value) {
1748 case UHF_PORT_SUSPEND:
1750 break;
1751
1752 case UHF_PORT_ENABLE:
1753 sc->sc_flags.port_enabled = 0;
1754 break;
1755
1756 case UHF_PORT_TEST:
1757 case UHF_PORT_INDICATOR:
1758 case UHF_C_PORT_ENABLE:
1760 case UHF_C_PORT_RESET:
1761 /* nops */
1762 break;
1763 case UHF_PORT_POWER:
1764 sc->sc_flags.port_powered = 0;
1767 break;
1769 /* clear connect change flag */
1770 sc->sc_flags.change_connect = 0;
1771
1772 if (!sc->sc_flags.status_bus_reset) {
1773 /* we are not connected */
1774 break;
1775 }
1776 /* configure the control endpoint */
1777 /* set endpoint reset */
1779
1780 /* set stall */
1782
1783 /* reset data toggle */
1785
1786 /* clear stall */
1788
1789 /* configure */
1792
1793 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1794
1795 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1796 device_printf(sc->sc_bus.bdev,
1797 "Chip rejected configuration\n");
1798 } else {
1801 }
1802 break;
1803 case UHF_C_PORT_SUSPEND:
1804 sc->sc_flags.change_suspend = 0;
1805 break;
1806 default:
1807 err = USB_ERR_IOERROR;
1808 goto done;
1809 }
1810 goto tr_valid;
1811
1812tr_handle_set_port_feature:
1813 if (index != 1) {
1814 goto tr_stalled;
1815 }
1816 DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
1817
1818 switch (value) {
1819 case UHF_PORT_ENABLE:
1820 sc->sc_flags.port_enabled = 1;
1821 break;
1822 case UHF_PORT_SUSPEND:
1823 case UHF_PORT_RESET:
1824 case UHF_PORT_TEST:
1825 case UHF_PORT_INDICATOR:
1826 /* nops */
1827 break;
1828 case UHF_PORT_POWER:
1829 sc->sc_flags.port_powered = 1;
1830 break;
1831 default:
1832 err = USB_ERR_IOERROR;
1833 goto done;
1834 }
1835 goto tr_valid;
1836
1837tr_handle_get_port_status:
1838
1839 DPRINTFN(9, "UR_GET_PORT_STATUS\n");
1840
1841 if (index != 1) {
1842 goto tr_stalled;
1843 }
1844 if (sc->sc_flags.status_vbus) {
1846 avr32dci_pull_up(sc);
1847 } else {
1850 }
1851
1852 /* Select Device Side Mode */
1853
1855
1856 /* Check for High Speed */
1859
1860 if (sc->sc_flags.port_powered) {
1862 }
1863 if (sc->sc_flags.port_enabled) {
1865 }
1866 if (sc->sc_flags.status_vbus &&
1869 }
1870 if (sc->sc_flags.status_suspend) {
1871 value |= UPS_SUSPEND;
1872 }
1874
1875 value = 0;
1876
1877 if (sc->sc_flags.change_connect) {
1879 }
1880 if (sc->sc_flags.change_suspend) {
1882 }
1884 len = sizeof(sc->sc_hub_temp.ps);
1885 goto tr_valid;
1886
1887tr_handle_get_class_descriptor:
1888 if (value & 0xFF) {
1889 goto tr_stalled;
1890 }
1891 ptr = (const void *)&avr32dci_hubd;
1892 len = sizeof(avr32dci_hubd);
1893 goto tr_valid;
1894
1895tr_stalled:
1896 err = USB_ERR_STALLED;
1897tr_valid:
1898done:
1899 *plength = len;
1900 *pptr = ptr;
1901 return (err);
1902}
1903
1904static void
1906{
1907 const struct usb_hw_ep_profile *pf;
1908 struct avr32dci_softc *sc;
1909 struct usb_xfer *xfer;
1910 void *last_obj;
1911 uint32_t ntd;
1912 uint32_t n;
1913 uint8_t ep_no;
1914
1915 sc = AVR32_BUS2SC(parm->udev->bus);
1916 xfer = parm->curr_xfer;
1917
1918 /*
1919 * NOTE: This driver does not use any of the parameters that
1920 * are computed from the following values. Just set some
1921 * reasonable dummies:
1922 */
1923 parm->hc_max_packet_size = 0x400;
1924 parm->hc_max_packet_count = 1;
1925 parm->hc_max_frame_size = 0x400;
1926
1928
1929 /*
1930 * compute maximum number of TDs
1931 */
1932 if ((xfer->endpoint->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1933 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC 1 */
1934 + 1 /* SYNC 2 */ ;
1935 } else {
1936 ntd = xfer->nframes + 1 /* SYNC */ ;
1937 }
1938
1939 /*
1940 * check if "usbd_transfer_setup_sub" set an error
1941 */
1942 if (parm->err)
1943 return;
1944
1945 /*
1946 * allocate transfer descriptors
1947 */
1948 last_obj = NULL;
1949
1950 /*
1951 * get profile stuff
1952 */
1953 ep_no = xfer->endpointno & UE_ADDR;
1954 avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
1955
1956 if (pf == NULL) {
1957 /* should not happen */
1958 parm->err = USB_ERR_INVAL;
1959 return;
1960 }
1961 /* align data */
1962 parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
1963
1964 for (n = 0; n != ntd; n++) {
1965 struct avr32dci_td *td;
1966
1967 if (parm->buf) {
1968 uint32_t temp;
1969
1970 td = USB_ADD_BYTES(parm->buf, parm->size[0]);
1971
1972 /* init TD */
1973 td->max_packet_size = xfer->max_packet_size;
1974 td->ep_no = ep_no;
1975 temp = pf->max_in_frame_size | pf->max_out_frame_size;
1976 td->bank_shift = 0;
1977 while ((temp /= 2))
1978 td->bank_shift++;
1979 if (pf->support_multi_buffer) {
1980 td->support_multi_buffer = 1;
1981 }
1982 td->obj_next = last_obj;
1983
1984 last_obj = td;
1985 }
1986 parm->size[0] += sizeof(*td);
1987 }
1988
1989 xfer->td_start[0] = last_obj;
1990}
1991
1992static void
1994{
1995 return;
1996}
1997
1998static void
2000 struct usb_endpoint *pipe)
2001{
2002 struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2003
2004 DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2005 pipe, udev->address,
2006 edesc->bEndpointAddress, udev->flags.usb_mode,
2007 sc->sc_rt_addr, udev->device_index);
2008
2009 if (udev->device_index != sc->sc_rt_addr) {
2010 if ((udev->speed != USB_SPEED_FULL) &&
2011 (udev->speed != USB_SPEED_HIGH)) {
2012 /* not supported */
2013 return;
2014 }
2015 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2017 else
2019 }
2020}
2021
2022static void
2023avr32dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2024{
2025 struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
2026
2027 switch (state) {
2029 avr32dci_suspend(sc);
2030 break;
2032 avr32dci_uninit(sc);
2033 break;
2035 avr32dci_resume(sc);
2036 break;
2037 default:
2038 break;
2039 }
2040}
2041
2042static const struct usb_bus_methods avr32dci_bus_methods =
2043{
2045 .xfer_setup = &avr32dci_xfer_setup,
2046 .xfer_unsetup = &avr32dci_xfer_unsetup,
2047 .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2048 .xfer_stall = &avr32dci_xfer_stall,
2049 .set_stall = &avr32dci_set_stall,
2050 .clear_stall = &avr32dci_clear_stall,
2051 .roothub_exec = &avr32dci_roothub_exec,
2052 .xfer_poll = &avr32dci_do_poll,
2053 .set_hw_power_sleep = &avr32dci_set_hw_power_sleep,
2054};
static void avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
Definition: avr32dci.c:1354
static avr32dci_cmd_t avr32dci_data_tx_sync
Definition: avr32dci.c:107
static void avr32dci_wakeup_peer(struct avr32dci_softc *sc)
Definition: avr32dci.c:251
static void avr32dci_xfer_stall(struct usb_xfer *xfer)
Definition: avr32dci.c:1072
#define STRING_VENDOR
Definition: avr32dci.c:1461
static void avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc, struct usb_endpoint *pipe)
Definition: avr32dci.c:1999
static void avr32dci_pull_down(struct avr32dci_softc *sc)
Definition: avr32dci.c:240
static void avr32dci_setup_standard_chain(struct usb_xfer *xfer)
Definition: avr32dci.c:744
static avr32dci_cmd_t avr32dci_data_rx
Definition: avr32dci.c:105
static void avr32dci_standard_done(struct usb_xfer *)
Definition: avr32dci.c:1004
static void avr32dci_clocks_off(struct avr32dci_softc *sc)
Definition: avr32dci.c:213
static void avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
Definition: avr32dci.c:1376
static void avr32dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
Definition: avr32dci.c:2023
static const struct usb_hw_ep_profile avr32dci_ep_profile[4]
Definition: avr32dci.c:117
static void avr32dci_device_isoc_fs_open(struct usb_xfer *xfer)
Definition: avr32dci.c:1342
static void avr32dci_device_non_isoc_enter(struct usb_xfer *xfer)
Definition: avr32dci.c:1317
static void avr32dci_device_non_isoc_start(struct usb_xfer *xfer)
Definition: avr32dci.c:1323
static void avr32dci_timeout(void *arg)
Definition: avr32dci.c:889
static void avr32dci_start_standard_chain(struct usb_xfer *xfer)
Definition: avr32dci.c:902
static void avr32dci_clear_stall_sub(struct avr32dci_softc *sc, uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir)
Definition: avr32dci.c:1096
void avr32dci_uninit(struct avr32dci_softc *sc)
Definition: avr32dci.c:1243
static avr32dci_cmd_t avr32dci_setup_rx
Definition: avr32dci.c:104
static void avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *pipe)
Definition: avr32dci.c:1161
static void avr32dci_device_done(struct usb_xfer *, usb_error_t)
Definition: avr32dci.c:1049
static void avr32dci_xfer_unsetup(struct usb_xfer *xfer)
Definition: avr32dci.c:1993
static void avr32dci_clocks_on(struct avr32dci_softc *sc)
Definition: avr32dci.c:197
USB_MAKE_STRING_DESC(STRING_VENDOR, avr32dci_vendor)
static void avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
Definition: avr32dci.c:266
static const struct usb_pipe_methods avr32dci_device_non_isoc_methods
Definition: avr32dci.c:101
static void avr32dci_interrupt_poll(struct avr32dci_softc *sc)
Definition: avr32dci.c:602
static void avr32dci_do_poll(struct usb_bus *)
Definition: avr32dci.c:1290
static const struct usb_bus_methods avr32dci_bus_methods
Definition: avr32dci.c:100
static const struct usb_device_descriptor avr32dci_devd
Definition: avr32dci.c:1396
static void avr32dci_root_intr(struct avr32dci_softc *sc)
Definition: avr32dci.c:925
static const struct usb_device_qualifier avr32dci_odevd
Definition: avr32dci.c:1410
static void avr32dci_device_non_isoc_close(struct usb_xfer *xfer)
Definition: avr32dci.c:1311
static void avr32dci_device_isoc_fs_close(struct usb_xfer *xfer)
Definition: avr32dci.c:1348
static void avr32dci_mod_ien(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
Definition: avr32dci.c:186
void avr32dci_vbus_interrupt(struct avr32dci_softc *sc, uint8_t is_on)
Definition: avr32dci.c:616
static void avr32dci_resume(struct avr32dci_softc *sc)
Definition: avr32dci.c:1284
static void avr32dci_xfer_setup(struct usb_setup_params *parm)
Definition: avr32dci.c:1905
#define STRING_PRODUCT
Definition: avr32dci.c:1464
static const struct usb_pipe_methods avr32dci_device_isoc_fs_methods
Definition: avr32dci.c:102
static usb_error_t avr32dci_standard_done_sub(struct usb_xfer *xfer)
Definition: avr32dci.c:939
#define HSETW(ptr, val)
Definition: avr32dci.c:1449
static const struct avr32dci_config_desc avr32dci_confd
Definition: avr32dci.c:1421
usb_error_t avr32dci_init(struct avr32dci_softc *sc)
Definition: avr32dci.c:1189
static usb_error_t avr32dci_roothub_exec(struct usb_device *udev, struct usb_device_request *req, const void **pptr, uint16_t *plength)
Definition: avr32dci.c:1471
static void avr32dci_device_non_isoc_open(struct usb_xfer *xfer)
Definition: avr32dci.c:1305
void avr32dci_interrupt(struct avr32dci_softc *sc)
Definition: avr32dci.c:644
static void avr32dci_suspend(struct avr32dci_softc *sc)
Definition: avr32dci.c:1278
static avr32dci_cmd_t avr32dci_data_tx
Definition: avr32dci.c:106
static void avr32dci_mod_ctrl(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
Definition: avr32dci.c:175
static const struct usb_hub_descriptor_min avr32dci_hubd
Definition: avr32dci.c:1451
#define AVR32_BUS2SC(bus)
Definition: avr32dci.c:80
static void avr32dci_set_stall(struct usb_device *udev, struct usb_endpoint *pipe, uint8_t *did_stall)
Definition: avr32dci.c:1078
#define AVR32_PC2SC(pc)
Definition: avr32dci.c:83
static void avr32dci_pull_up(struct avr32dci_softc *sc)
Definition: avr32dci.c:228
static void avr32dci_setup_standard_chain_sub(struct avr32dci_std_temp *temp)
Definition: avr32dci.c:721
static void avr32dci_get_hw_ep_profile(struct usb_device *udev, const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
Definition: avr32dci.c:159
static uint8_t avr32dci_xfer_do_fifo(struct usb_xfer *xfer)
Definition: avr32dci.c:559
#define AVR32_INTR_ENDPT
Definition: avr32dci.c:96
#define AVR32_INT_ENDRESET
Definition: avr32dci.h:56
uint8_t() avr32dci_cmd_t(struct avr32dci_td *td)
Definition: avr32dci.h:161
#define AVR32_EPTSTA_BUSY_BANK_STA(x)
Definition: avr32dci.h:134
#define AVR32_EPTCFG_TYPE_CTRL
Definition: avr32dci.h:90
#define AVR32_CTRL
Definition: avr32dci.h:36
#define AVR32_EPTSTA_RX_BK_RDY
Definition: avr32dci.h:126
#define AVR32_EPTCFG_TYPE_BULK
Definition: avr32dci.h:92
#define AVR32_INT_WAKE_UP
Definition: avr32dci.h:57
#define AVR32_EPTCTLENB(n)
Definition: avr32dci.h:98
#define AVR32_FRAME_MASK
Definition: avr32dci.h:45
#define AVR32_EPTSETSTA(n)
Definition: avr32dci.h:119
#define AVR32_EPTSTA_RX_SETUP
Definition: avr32dci.h:129
#define AVR32_CLRINT
Definition: avr32dci.h:50
#define AVR32_CTRL_DEV_REWAKEUP
Definition: avr32dci.h:41
#define AVR32_INT_SPEED
Definition: avr32dci.h:52
#define AVR32_EPTCFG_TYPE_INTR
Definition: avr32dci.h:93
#define AVR32_WRITE_4(sc, reg, data)
Definition: avr32dci.h:145
#define AVR32_EPTRST
Definition: avr32dci.h:63
#define AVR32_EPTSTA(n)
Definition: avr32dci.h:121
#define AVR32_EPTCFG_TYPE_ISOC
Definition: avr32dci.h:91
#define AVR32_EPTSTA_FRCESTALL
Definition: avr32dci.h:122
#define AVR32_FNUM
Definition: avr32dci.h:43
#define AVR32_EPTCTL(n)
Definition: avr32dci.h:100
#define AVR32_INT_EPT_INT(n)
Definition: avr32dci.h:60
#define AVR32_CTRL_DEV_FADDR_EN
Definition: avr32dci.h:38
#define AVR32_EPTCTL_TX_PK_RDY
Definition: avr32dci.h:110
#define AVR32_INTSTA
Definition: avr32dci.h:49
#define AVR32_EP_MAX
Definition: avr32dci.h:157
#define AVR32_EPTCFG(n)
Definition: avr32dci.h:86
#define AVR32_EPTCFG_EPDIR_IN
Definition: avr32dci.h:89
#define AVR32_EPTSTA_BYTE_COUNT(x)
Definition: avr32dci.h:135
#define AVR32_CTRL_DEV_EN_USBA
Definition: avr32dci.h:39
#define AVR32_EPTSTA_CURRENT_BANK(x)
Definition: avr32dci.h:133
#define AVR32_EPTSTA_TOGGLESQ
Definition: avr32dci.h:124
#define AVR32_EPTCLRSTA(n)
Definition: avr32dci.h:120
#define AVR32_EPTCTL_EPT_ENABL
Definition: avr32dci.h:101
#define AVR32_EPTRST_MASK(n)
Definition: avr32dci.h:64
#define AVR32_INT_DET_SUSPD
Definition: avr32dci.h:53
#define AVR32_EPTSTA_TX_PK_RDY
Definition: avr32dci.h:128
#define AVR32_CTRL_DEV_ADDR
Definition: avr32dci.h:37
#define AVR32_EPTCFG_EPSIZE(n)
Definition: avr32dci.h:87
#define AVR32_READ_4(sc, reg)
Definition: avr32dci.h:142
#define AVR32_EPTCFG_EPT_MAPD
Definition: avr32dci.h:96
#define AVR32_EPTCFG_NBANK(n)
Definition: avr32dci.h:94
#define AVR32_EPTCTLDIS(n)
Definition: avr32dci.h:99
#define AVR32_EPTCFG_NB_TRANS(n)
Definition: avr32dci.h:95
#define AVR32_IEN
Definition: avr32dci.h:48
#define AVR32_CTRL_DEV_DETACH
Definition: avr32dci.h:40
static int debug
Definition: cfumass.c:73
static SYSCTL_NODE(_hw_usb, OID_AUTO, dwc_otg, CTLFLAG_RW|CTLFLAG_MPSAFE, 0, "USB DWC OTG")
SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, phy_type, CTLFLAG_RDTUN, &dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2/3 - ULPI/HSIC/INTERNAL/UTMI+")
uint16_t len
Definition: ehci.h:41
uint8_t n
Definition: if_run.c:612
struct @109 error
uint32_t value
u_int index
device_t pf
int state
int * count
u_int bus
uint64_t * addr
struct usb_config_descriptor confd
Definition: avr32dci.h:199
uint8_t change_connect
Definition: avr32dci.h:210
uint8_t port_powered
Definition: avr32dci.h:218
uint8_t clocks_off
Definition: avr32dci.h:217
uint8_t status_vbus
Definition: avr32dci.h:213
uint8_t port_enabled
Definition: avr32dci.h:219
uint8_t status_bus_reset
Definition: avr32dci.h:214
uint8_t status_suspend
Definition: avr32dci.h:212
uint8_t change_suspend
Definition: avr32dci.h:211
uint8_t d_pulled_up
Definition: avr32dci.h:220
avr32dci_clocks_t * sc_clocks_on
Definition: avr32dci.h:228
struct avr32dci_flags sc_flags
Definition: avr32dci.h:245
struct usb_bus sc_bus
Definition: avr32dci.h:224
uint8_t sc_rt_addr
Definition: avr32dci.h:239
uint8_t sc_hub_idata[1]
Definition: avr32dci.h:243
uint8_t sc_dv_addr
Definition: avr32dci.h:240
avr32dci_clocks_t * sc_clocks_off
Definition: avr32dci.h:229
uint8_t sc_conf
Definition: avr32dci.h:241
uint8_t * physdata
Definition: avr32dci.h:237
union avr32dci_hub_temp sc_hub_temp
Definition: avr32dci.h:225
uint8_t short_pkt
Definition: avr32dci.h:189
struct avr32dci_td * td_next
Definition: avr32dci.h:184
struct avr32dci_td * td
Definition: avr32dci.h:183
uint16_t max_frame_size
Definition: avr32dci.h:187
uint8_t did_stall
Definition: avr32dci.h:195
struct usb_page_cache * pc
Definition: avr32dci.h:182
avr32dci_cmd_t * func
Definition: avr32dci.h:181
uint32_t len
Definition: avr32dci.h:185
uint32_t offset
Definition: avr32dci.h:186
uint8_t setup_alt_next
Definition: avr32dci.h:194
struct avr32dci_td * obj_next
Definition: avr32dci.h:165
uint8_t ep_no
Definition: avr32dci.h:177
uint32_t remainder
Definition: avr32dci.h:169
uint8_t short_pkt
Definition: avr32dci.h:174
struct usb_page_cache * pc
Definition: avr32dci.h:167
uint16_t max_packet_size
Definition: avr32dci.h:170
avr32dci_cmd_t * func
Definition: avr32dci.h:166
uint8_t bank_shift
Definition: avr32dci.h:171
uint8_t alt_next
Definition: avr32dci.h:173
uint8_t error
Definition: avr32dci.h:172
uint8_t did_stall
Definition: avr32dci.h:176
uint32_t offset
Definition: avr32dci.h:168
uint8_t support_multi_buffer
Definition: avr32dci.h:175
void(* endpoint_init)(struct usb_device *, struct usb_endpoint_descriptor *, struct usb_endpoint *)
enum usb_revision usbrev
Definition: usb_bus.h:119
device_t bdev
Definition: usb_bus.h:101
struct mtx bus_mtx
Definition: usb_bus.h:95
const struct usb_bus_methods * methods
Definition: usb_bus.h:107
struct usb_xfer_queue intr_q
Definition: usb_bus.h:97
uByte bDescriptorType
Definition: usb.h:387
uByte bNumInterface
Definition: usb.h:389
uByte bmAttributes
Definition: usb.h:393
uByte iConfiguration
Definition: usb.h:392
uByte bConfigurationValue
Definition: usb.h:390
uByte bDescriptorType
Definition: usb.h:290
enum usb_hc_mode usb_mode
Definition: usb_device.h:94
uByte bDescriptorType
Definition: usb.h:660
enum usb_dev_speed speed
Definition: usb_device.h:235
struct usb_bus * bus
Definition: usb_device.h:216
uint8_t device_index
Definition: usb_device.h:244
uint8_t address
Definition: usb_device.h:243
struct usb_device_flags flags
Definition: usb_device.h:266
uByte bEndpointAddress
Definition: usb.h:528
uByte bDescriptorType
Definition: usb.h:527
uWord wMaxPacketSize
Definition: usb.h:558
uint16_t isoc_next
Definition: usbdi.h:148
const struct usb_pipe_methods * methods
Definition: usbdi.h:146
struct usb_endpoint_descriptor * edesc
Definition: usbdi.h:144
uByte bPwrOn2PwrGood
Definition: usb.h:651
uByte bHubContrCurrent
Definition: usb.h:652
uWord wHubCharacteristics
Definition: usb.h:650
uByte DeviceRemovable[1]
Definition: usb.h:653
uByte bDescriptorType
Definition: usb.h:648
uint16_t max_in_frame_size
usb_size_t length
Definition: usb_busdma.h:82
void(* open)(struct usb_xfer *)
uWord wPortStatus
Definition: usb.h:704
uWord wPortChange
Definition: usb.h:735
uint32_t hc_max_frame_size
Definition: usb_transfer.h:115
usb_size_t size[7]
Definition: usb_transfer.h:111
uint8_t hc_max_packet_count
Definition: usb_transfer.h:117
struct usb_device * udev
Definition: usb_transfer.h:104
struct usb_xfer * curr_xfer
Definition: usb_transfer.h:105
uint16_t hc_max_packet_size
Definition: usb_transfer.h:116
usb_error_t err
Definition: usb_transfer.h:120
uint8_t control_hdr
Definition: usb_core.h:104
enum usb_hc_mode usb_mode
Definition: usb_core.h:91
uint8_t control_act
Definition: usb_core.h:106
uint8_t short_frames_ok
Definition: usb_core.h:110
uint8_t isochronous_xfr
Definition: usb_core.h:120
uint8_t control_stall
Definition: usb_core.h:107
uint8_t control_xfr
Definition: usb_core.h:103
uint8_t force_short_xfer
Definition: usbdi.h:196
struct usb_bus * bus
Definition: usb_transfer.h:78
struct usb_device * udev
Definition: usb_transfer.h:79
usb_frlength_t * frlengths
Definition: usb_core.h:150
usb_frcount_t nframes
Definition: usb_core.h:162
struct usb_page_cache * frbuffers
Definition: usb_core.h:151
void * td_start[2]
Definition: usb_core.h:143
usb_timeout_t timeout
Definition: usb_core.h:158
usb_frcount_t aframes
Definition: usb_core.h:163
struct usb_endpoint * endpoint
Definition: usb_core.h:140
struct usb_xfer_flags_int flags_int
Definition: usb_core.h:182
uint8_t address
Definition: usb_core.h:173
struct usb_xfer_flags flags
Definition: usb_core.h:181
void * td_transfer_cache
Definition: usb_core.h:146
struct usb_xfer_root * xroot
Definition: usb_core.h:141
uint16_t max_frame_size
Definition: usb_core.h:168
void * td_transfer_last
Definition: usb_core.h:145
void * td_transfer_first
Definition: usb_core.h:144
uint16_t max_packet_size
Definition: usb_core.h:167
usb_frlength_t sumlen
Definition: usb_core.h:156
uint8_t endpointno
Definition: usb_core.h:174
#define DPRINTF(...)
Definition: umass.c:179
struct usb_port_status ps
Definition: avr32dci.h:206
#define UE_INTERRUPT
Definition: usb.h:544
#define UR_SET_CONFIG
Definition: usb.h:219
#define UDSUBCLASS_HUB
Definition: usb.h:374
#define UC_SELF_POWERED
Definition: usb.h:395
#define UT_WRITE_INTERFACE
Definition: usb.h:170
#define UR_SET_DESCRIPTOR
Definition: usb.h:217
#define UE_ADDR
Definition: usb.h:536
#define UE_BULK
Definition: usb.h:543
#define UHF_PORT_POWER
Definition: usb.h:254
#define UF_ENDPOINT_HALT
Definition: usb.h:238
#define UR_GET_CONFIG
Definition: usb.h:218
#define UT_WRITE_CLASS_OTHER
Definition: usb.h:178
#define UISUBCLASS_HUB
Definition: usb.h:480
#define UT_WRITE_CLASS_DEVICE
Definition: usb.h:176
#define UR_SET_ADDRESS
Definition: usb.h:193
#define UT_WRITE_DEVICE
Definition: usb.h:169
#define UDESC_CONFIG
Definition: usb.h:196
#define UR_GET_INTERFACE
Definition: usb.h:220
#define UDCLASS_HUB
Definition: usb.h:373
#define UR_CLEAR_TT_BUFFER
Definition: usb.h:228
#define UR_GET_STATUS
Definition: usb.h:190
#define UHF_C_PORT_SUSPEND
Definition: usb.h:259
#define UR_CLEAR_FEATURE
Definition: usb.h:191
#define UDESC_ENDPOINT
Definition: usb.h:200
#define UT_READ_CLASS_INTERFACE
Definition: usb.h:173
#define UDESC_DEVICE_QUALIFIER
Definition: usb.h:201
#define UE_GET_ADDR(a)
Definition: usb.h:538
#define UDS_SELF_POWERED
Definition: usb.h:688
#define UHF_PORT_TEST
Definition: usb.h:262
#define UPS_PORT_POWER
Definition: usb.h:727
#define UDESC_HUB
Definition: usb.h:214
#define UF_DEVICE_REMOTE_WAKEUP
Definition: usb.h:239
#define UT_READ_VENDOR_INTERFACE
Definition: usb.h:181
#define UDESC_STRING
Definition: usb.h:197
#define UHF_C_PORT_OVER_CURRENT
Definition: usb.h:260
#define UHF_PORT_SUSPEND
Definition: usb.h:250
#define UR_STOP_TT
Definition: usb.h:231
#define UE_DIR_IN
Definition: usb.h:531
#define UR_SYNCH_FRAME
Definition: usb.h:222
#define UT_READ_DEVICE
Definition: usb.h:166
#define UDPROTO_HSHUBSTT
Definition: usb.h:376
#define UR_GET_TT_STATE
Definition: usb.h:230
#define UPS_PORT_MODE_DEVICE
Definition: usb.h:734
#define UE_XFERTYPE
Definition: usb.h:540
#define UHF_PORT_ENABLE
Definition: usb.h:249
#define UICLASS_HUB
Definition: usb.h:479
#define UDESC_DEVICE
Definition: usb.h:195
#define UDESC_INTERFACE
Definition: usb.h:199
#define UPS_HIGH_SPEED
Definition: usb.h:730
@ USB_SPEED_FULL
Definition: usb.h:754
@ USB_SPEED_HIGH
Definition: usb.h:755
#define UR_RESET_TT
Definition: usb.h:229
#define UE_DIR_OUT
Definition: usb.h:532
@ USB_MODE_DEVICE
Definition: usb.h:779
#define UHD_OC_INDIVIDUAL
Definition: usb.h:614
#define UPS_PORT_ENABLED
Definition: usb.h:706
#define UT_WRITE_ENDPOINT
Definition: usb.h:171
#define UT_READ_CLASS_DEVICE
Definition: usb.h:172
#define UHF_PORT_RESET
Definition: usb.h:252
#define UDPROTO_FSHUB
Definition: usb.h:375
#define UR_SET_INTERFACE
Definition: usb.h:221
#define UT_WRITE_CLASS_INTERFACE
Definition: usb.h:177
#define UT_READ_CLASS_OTHER
Definition: usb.h:174
#define UE_CONTROL
Definition: usb.h:541
#define UHF_PORT_INDICATOR
Definition: usb.h:263
#define UT_READ_ENDPOINT
Definition: usb.h:168
#define UHF_C_PORT_RESET
Definition: usb.h:261
@ USB_REV_1_1
Definition: usb.h:767
#define UPS_C_SUSPEND
Definition: usb.h:738
#define UHD_PWR_NO_SWITCH
Definition: usb.h:610
#define UPS_C_CONNECT_STATUS
Definition: usb.h:736
#define UPS_CURRENT_CONNECT_STATUS
Definition: usb.h:705
#define UE_ISOCHRONOUS
Definition: usb.h:542
#define UHF_C_PORT_ENABLE
Definition: usb.h:258
#define UT_WRITE_VENDOR_INTERFACE
Definition: usb.h:185
#define UR_SET_FEATURE
Definition: usb.h:192
#define UPS_SUSPEND
Definition: usb.h:707
#define UT_READ_INTERFACE
Definition: usb.h:167
#define UR_GET_DESCRIPTOR
Definition: usb.h:194
#define UHF_C_PORT_CONNECTION
Definition: usb.h:257
void usbd_get_page(struct usb_page_cache *pc, usb_frlength_t offset, struct usb_page_search *res)
Definition: usb_busdma.c:86
void usbd_copy_in(struct usb_page_cache *cache, usb_frlength_t offset, const void *ptr, usb_frlength_t len)
Definition: usb_busdma.c:166
#define USB_HW_POWER_RESUME
#define USB_HW_POWER_SUSPEND
#define USB_HW_POWER_SHUTDOWN
const struct usb_string_lang usb_string_lang_en
Definition: usb_core.c:63
#define USB_BUS_LOCK(_b)
Definition: usb_core.h:45
#define USB_ADD_BYTES(ptr, size)
Definition: usb_core.h:64
#define USB_BUS_UNLOCK(_b)
Definition: usb_core.h:46
#define USB_BUS_LOCK_ASSERT(_b, _t)
Definition: usb_core.h:47
enum usb_dev_speed usbd_get_speed(struct usb_device *udev)
Definition: usb_device.c:2589
#define USETW(w, v)
Definition: usb_endian.h:77
#define UGETW(w)
Definition: usb_endian.h:53
#define USB_HOST_ALIGN
Definition: usb_freebsd.h:70
void uhub_root_intr(struct usb_bus *bus, const uint8_t *ptr, uint8_t len)
Definition: usb_hub.c:960
void ** pptr
Definition: usb_if.m:52
const void * req
Definition: usb_if.m:51
void usbd_transfer_setup_sub(struct usb_setup_params *parm)
Definition: usb_transfer.c:457
void usbd_transfer_done(struct usb_xfer *xfer, usb_error_t error)
void usbd_transfer_enqueue(struct usb_xfer_queue *pq, struct usb_xfer *xfer)
uint8_t usbd_xfer_get_isochronous_start_frame(struct usb_xfer *xfer, uint32_t frame_curr, uint32_t frame_min, uint32_t frame_ms, uint32_t frame_mask, uint32_t *p_frame_start)
void usbd_transfer_timeout_ms(struct usb_xfer *xfer, void(*cb)(void *arg), usb_timeout_t ms)
void usb_pause_mtx(struct mtx *mtx, int timo)
Definition: usb_util.c:135
usb_error_t
Definition: usbdi.h:45
@ USB_ERR_NORMAL_COMPLETION
Definition: usbdi.h:46
@ USB_ERR_STALLED
Definition: usbdi.h:68
@ USB_ERR_IOERROR
Definition: usbdi.h:64
@ USB_ERR_CANCELLED
Definition: usbdi.h:51
@ USB_ERR_INVAL
Definition: usbdi.h:49
@ USB_ERR_TIMEOUT
Definition: usbdi.h:66
uint8_t status
Definition: xhci.h:14