Go to the source code of this file.
◆ BASE_IS_VIA_DXS_REG
◆ MC_SGD_16BIT
#define MC_SGD_16BIT 0x80 |
◆ MC_SGD_8BIT
◆ MC_SGD_CHANNELS
#define MC_SGD_CHANNELS |
( |
|
x | ) |
(((x)& 0x07) << 4) |
◆ SGD_CONTROL_AUTOSTART
#define SGD_CONTROL_AUTOSTART 0x20 |
◆ SGD_CONTROL_I_EOL
#define SGD_CONTROL_I_EOL 0x02 |
◆ SGD_CONTROL_I_FLAG
#define SGD_CONTROL_I_FLAG 0x01 |
◆ SGD_CONTROL_I_STOP
#define SGD_CONTROL_I_STOP 0x04 |
◆ SGD_CONTROL_PAUSE
#define SGD_CONTROL_PAUSE 0x08 |
◆ SGD_CONTROL_START
#define SGD_CONTROL_START 0x80 |
◆ SGD_CONTROL_STOP
#define SGD_CONTROL_STOP 0x40 |
◆ SGD_STATUS_ACTIVE
#define SGD_STATUS_ACTIVE 0x80 |
◆ SGD_STATUS_AT_STOP
#define SGD_STATUS_AT_STOP 0x40 |
◆ SGD_STATUS_EOL
#define SGD_STATUS_EOL 0x02 |
◆ SGD_STATUS_FLAG
#define SGD_STATUS_FLAG 0x01 |
◆ SGD_STATUS_INTR
◆ SGD_STATUS_STOP_I_S
#define SGD_STATUS_STOP_I_S 0x04 |
◆ SGD_STATUS_TRIGGER_Q
#define SGD_STATUS_TRIGGER_Q 0x08 |
◆ SLOT3
◆ SLOT4
#define SLOT4 |
( |
|
x | ) |
((x) << 4) |
◆ SLOT6
#define SLOT6 |
( |
|
x | ) |
((x) << 16) |
◆ SLOT7
#define SLOT7 |
( |
|
x | ) |
((x) << 8) |
◆ SLOT8
#define SLOT8 |
( |
|
x | ) |
((x) << 12) |
◆ SLOT9
#define SLOT9 |
( |
|
x | ) |
((x) << 20) |
◆ VIA8233_DXS_MUTE
#define VIA8233_DXS_MUTE 0x3f |
◆ VIA8233_DXS_RATEFMT_16BIT
#define VIA8233_DXS_RATEFMT_16BIT 0x00200000 |
◆ VIA8233_DXS_RATEFMT_48K
#define VIA8233_DXS_RATEFMT_48K 0x000fffff |
◆ VIA8233_DXS_RATEFMT_STEREO
#define VIA8233_DXS_RATEFMT_STEREO 0x00100000 |
◆ VIA8233_DXS_STOP_INDEX
#define VIA8233_DXS_STOP_INDEX 0xff000000 |
◆ VIA8233_RP_DXS_LVOL
#define VIA8233_RP_DXS_LVOL 0x02 |
◆ VIA8233_RP_DXS_RATEFMT
#define VIA8233_RP_DXS_RATEFMT 0x08 |
◆ VIA8233_RP_DXS_RVOL
#define VIA8233_RP_DXS_RVOL 0x03 |
◆ VIA_AC97_BUSY
#define VIA_AC97_BUSY 0x01000000 |
◆ VIA_AC97_CODEC00_VALID
#define VIA_AC97_CODEC00_VALID 0x02000000 |
◆ VIA_AC97_CODEC01_VALID
#define VIA_AC97_CODEC01_VALID 0x08000000 |
◆ VIA_AC97_CODEC10_VALID
#define VIA_AC97_CODEC10_VALID 0x10000000 |
◆ VIA_AC97_CODEC11_VALID
#define VIA_AC97_CODEC11_VALID 0x20000000 |
◆ VIA_AC97_CODECID01
#define VIA_AC97_CODECID01 0x40000000 |
◆ VIA_AC97_CODECID10
#define VIA_AC97_CODECID10 0x80000000 |
◆ VIA_AC97_CODECID11
#define VIA_AC97_CODECID11 0xc0000000 |
◆ VIA_AC97_CONTROL
#define VIA_AC97_CONTROL 0x80 |
◆ VIA_AC97_DATA
#define VIA_AC97_DATA |
( |
|
x | ) |
((x) & 0xffff) |
◆ VIA_AC97_INDEX
#define VIA_AC97_INDEX |
( |
|
x | ) |
((x) << 16) |
◆ VIA_AC97_READ
#define VIA_AC97_READ 0x00800000 |
◆ VIA_CODEC_BUSY
#define VIA_CODEC_BUSY 0x01000000 |
◆ VIA_CODEC_INDEX
#define VIA_CODEC_INDEX |
( |
|
x | ) |
((x)<<16) |
◆ VIA_CODEC_PRIVALID
#define VIA_CODEC_PRIVALID 0x02000000 |
◆ VIA_DXS0_BASE
#define VIA_DXS0_BASE 0x00 |
◆ VIA_DXS1_BASE
#define VIA_DXS1_BASE 0x10 |
◆ VIA_DXS2_BASE
#define VIA_DXS2_BASE 0x20 |
◆ VIA_DXS3_BASE
#define VIA_DXS3_BASE 0x30 |
◆ VIA_DXS_BASE
#define VIA_DXS_BASE |
( |
|
n | ) |
(0x10 * (n)) |
◆ VIA_MC_CURRENT_COUNT
#define VIA_MC_CURRENT_COUNT 0x4c |
◆ VIA_MC_SGD_CONTROL
#define VIA_MC_SGD_CONTROL 0x41 |
◆ VIA_MC_SGD_FORMAT
#define VIA_MC_SGD_FORMAT 0x42 |
◆ VIA_MC_SGD_STATUS
#define VIA_MC_SGD_STATUS 0x40 |
◆ VIA_MC_SLOT_SELECT
#define VIA_MC_SLOT_SELECT 0x48 |
◆ VIA_MC_TABLE_PTR_BASE
#define VIA_MC_TABLE_PTR_BASE 0x44 |
◆ VIA_PCI_ACLINK_C00_READY
#define VIA_PCI_ACLINK_C00_READY 0x01 |
◆ VIA_PCI_ACLINK_C01_READY
#define VIA_PCI_ACLINK_C01_READY 0x04 |
◆ VIA_PCI_ACLINK_C10_READY
#define VIA_PCI_ACLINK_C10_READY 0x10 |
◆ VIA_PCI_ACLINK_C11_READY
#define VIA_PCI_ACLINK_C11_READY 0x20 |
◆ VIA_PCI_ACLINK_CTRL
#define VIA_PCI_ACLINK_CTRL 0x41 |
◆ VIA_PCI_ACLINK_DESIRED
#define VIA_PCI_ACLINK_DESIRED |
Value:
VIA_PCI_ACLINK_NRST | \
VIA_PCI_ACLINK_VRATE | \
VIA_PCI_ACLINK_SGD)
#define VIA_PCI_ACLINK_EN
Definition at line 77 of file via8233.h.
◆ VIA_PCI_ACLINK_EN
#define VIA_PCI_ACLINK_EN 0x80 |
◆ VIA_PCI_ACLINK_LOW_POWER
#define VIA_PCI_ACLINK_LOW_POWER 0x02 |
◆ VIA_PCI_ACLINK_NRST
#define VIA_PCI_ACLINK_NRST 0x40 |
◆ VIA_PCI_ACLINK_SERIAL
#define VIA_PCI_ACLINK_SERIAL 0x10 |
◆ VIA_PCI_ACLINK_SGD
#define VIA_PCI_ACLINK_SGD 0x04 |
◆ VIA_PCI_ACLINK_STAT
#define VIA_PCI_ACLINK_STAT 0x40 |
◆ VIA_PCI_ACLINK_SYNC
#define VIA_PCI_ACLINK_SYNC 0x20 |
◆ VIA_PCI_ACLINK_VRATE
#define VIA_PCI_ACLINK_VRATE 0x08 |
◆ VIA_PCI_SPDIF
#define VIA_PCI_SPDIF 0x49 |
◆ VIA_RP_CONTROL
#define VIA_RP_CONTROL 0x01 |
◆ VIA_RP_CURRENT_COUNT
#define VIA_RP_CURRENT_COUNT 0x0c |
◆ VIA_RP_STATUS
#define VIA_RP_STATUS 0x00 |
◆ VIA_RP_TABLE_PTR
#define VIA_RP_TABLE_PTR 0x04 |
◆ VIA_SPDIF_EN
#define VIA_SPDIF_EN 0x08 |
◆ VIA_WR0_FORMAT
#define VIA_WR0_FORMAT 0x68 |
◆ VIA_WR0_SGD_CONTROL
#define VIA_WR0_SGD_CONTROL 0x61 |
◆ VIA_WR0_SGD_FORMAT
#define VIA_WR0_SGD_FORMAT 0x62 |
◆ VIA_WR0_SGD_INPUT
#define VIA_WR0_SGD_INPUT 0x63 |
◆ VIA_WR0_SGD_STATUS
#define VIA_WR0_SGD_STATUS 0x60 |
◆ VIA_WR0_TABLE_PTR_BASE
#define VIA_WR0_TABLE_PTR_BASE 0x64 |
◆ VIA_WR1_FORMAT
#define VIA_WR1_FORMAT 0x78 |
◆ VIA_WR1_SGD_CONTROL
#define VIA_WR1_SGD_CONTROL 0x71 |
◆ VIA_WR1_SGD_FORMAT
#define VIA_WR1_SGD_FORMAT 0x72 |
◆ VIA_WR1_SGD_INPUT
#define VIA_WR1_SGD_INPUT 0x73 |
◆ VIA_WR1_SGD_STATUS
#define VIA_WR1_SGD_STATUS 0x70 |
◆ VIA_WR1_TABLE_PTR_BASE
#define VIA_WR1_TABLE_PTR_BASE 0x74 |
◆ VIA_WR_BASE
#define VIA_WR_BASE |
( |
|
n | ) |
(0x60 + (n) * 0x10) |
◆ VIA_WR_RP_SGD_FORMAT
#define VIA_WR_RP_SGD_FORMAT 0x02 |
◆ WR_FIFO_ENABLE
#define WR_FIFO_ENABLE 0x40 |
◆ WR_FORMAT_16BIT
#define WR_FORMAT_16BIT 0x00200000 |
◆ WR_FORMAT_STEREO
#define WR_FORMAT_STEREO 0x00100000 |
◆ WR_FORMAT_STOP_INDEX
#define WR_FORMAT_STOP_INDEX 0xff000000 |
◆ WR_LINE_IN
◆ WR_MIC_IN
◆ WR_PRIMARY_CODEC
#define WR_PRIMARY_CODEC 0x00 |
◆ WR_SECONDARY_CODEC1
#define WR_SECONDARY_CODEC1 0x01 |
◆ WR_SECONDARY_CODEC2
#define WR_SECONDARY_CODEC2 0x02 |
◆ WR_SECONDARY_CODEC3
#define WR_SECONDARY_CODEC3 0x03 |