FreeBSD kernel pms device code
lxosapi.c
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1/*******************************************************************************
2*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
3*
4*Redistribution and use in source and binary forms, with or without modification, are permitted provided
5*that the following conditions are met:
6*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
7*following disclaimer.
8*2. Redistributions in binary form must reproduce the above copyright notice,
9*this list of conditions and the following disclaimer in the documentation and/or other materials provided
10*with the distribution.
11*
12*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
20
21*******************************************************************************/
22
23
24MALLOC_DEFINE( M_PMC_OSTI, "osti_cacheable", "allocated from ostiAllocMemory as cacheable memory" );
25
26
27/******************************************************************************
28ostiAllocMemory()
29Purpose:
30 TD layer calls to get dma memory
31Parameters:
32 tiRoot_t *ptiRoot (IN) Pointer refers to the current root
33 void **osMemHandle (IN_OUT) Pointer To OS Mem handle to fill in
34 void **agVirtAddr (IN_OUT) Pointer to allocated memory address
35 U32 *agPhysUpper32 (IN_OUT) Pointer to Up 32 bit mem phys addr.
36 U32 *agPhysLower32 (IN_OUT) Pointer to low 32 bit mem phys addr.
37 U32 alignment (IN) Alignment requirement
38 U32 allocLength (IN) Required memory length
39 agBOOLEAN isChacheable (IN) Required memory type
40Return:
41 tiSuccess - success
42 tiMemoryTooLarge - requested memory size too large
43 tiMemoryNotAvail - no dma memory available
44Note:
45 for sata use.
46 where a cacheable allocation inherently may be swapped, the values
47 agPhysUpper32 and agPhysLower32 are understood to mean nothing when the
48 value isCacheable is set to true. these phys values must not be used by
49 the caller.
50******************************************************************************/
52 void **osMemHandle,
53 void **agVirtAddr,
54 U32 *agPhysUpper32,
55 U32 *agPhysLower32,
56 U32 alignment,
57 U32 allocLength,
58 agBOOLEAN isCacheable )
59{
60 ag_card_info_t *pCardInfo = TIROOT_TO_CARDINFO( ptiRoot );
61 ag_dma_addr_t *pMem;
62 struct agtiapi_softc *pCard;
63 pCard = TIROOT_TO_CARD(ptiRoot);
64
65 AGTIAPI_PRINTK( "ostiAllocMemory: debug, cache? %d size %d alloc algn %d ### \n",
66 isCacheable, allocLength, alignment );
67
68 if( pCardInfo->topOfFreeDynamicMem == 0 ) {
69 AGTIAPI_PRINTK( "ostiAllocMemory: No space left, increase "
70 "AGTIAPI_DYNAMIC_MAX! ERROR\n" );
71 return tiMemoryNotAvail;
72 }
73
75
76 // where this memory has bee preallocated, be sure requirements do not
77 // exceed the limits of resources available
78 if( allocLength > 4096 ) {
79 AGTIAPI_PRINTK( "ostiAllocMemory: no-cache size 0x%x alloc NOT AVAILABLE\n",
80 allocLength );
81 return tiMemoryNotAvail;
82 }
83 if( alignment > 32 ) {
84 AGTIAPI_PRINTK( "ostiAllocMemory: no-cache alignment 0x%x NOT AVAILABLE\n",
85 alignment );
86 return tiMemoryNotAvail;
87 }
88
89 pMem->dmaPhysAddr = pMem->nocache_busaddr;
90 pMem->dmaVirtAddr = pMem->nocache_mem;
91 pMem->memSize = allocLength;
92 *agVirtAddr = pMem->dmaVirtAddr;
93
94 *agPhysUpper32 = HIGH_32_BITS( pMem->dmaPhysAddr );
95 *agPhysLower32 = LOW_32_BITS( pMem->dmaPhysAddr );
96
97 mtx_lock(&pCard->memLock);
99 *osMemHandle = (void *)pMem; // virtAddr;
100 mtx_unlock(&pCard->memLock);
101
102 return tiSuccess;
103}
104
105/******************************************************************************
106ostiIOCTLWaitForSignal()
107Purpose:
108 Function to wait semaphore during ioctl
109Parameters:
110 tiRoot_t *ptiRoot (IN) Pointer to the current HBA
111 void **agParam1 (IN_OUT) Pointer to context to be passed
112 void **agParam2 (IN_OUT) Pointer to context to be passed
113 void **agParam (IN_OUT) Pointer to context to be passed
114Return:
115Note:
116******************************************************************************/
117osGLOBAL void
119 void *agParam1,
120 void *agParam2,
121 void *agParam3)
122{
123 struct agtiapi_softc *pCard;
124 pCard = TIROOT_TO_CARD(ptiRoot);
125
126 pCard->down_count++;
127 sema_wait (pCard->pIoctlSem);
128}
129
130/* Below function has to be changed to use wait for completion */
131osGLOBAL void
133 void *agParam1,
134 void *agParam2,
135 void *agParam3)
136{
137 struct agtiapi_softc *pCard;
138 pCard = TIROOT_TO_CARD(ptiRoot);
139
140 pCard->down_count++;
141 sema_wait (pCard->pIoctlSem);
142}
143
144
145/******************************************************************************
146ostiChipConfigReadBit32()
147Purpose:
148 Read 32-bit value from PCI configuration register
149Parameters:
150 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
151 U32 chipConfigOffset (IN) Offset to PCI configuration register
152Return:
153 32 bit data
154******************************************************************************/
155U32 ostiChipConfigReadBit32( tiRoot_t *ptiRoot, U32 chipConfigOffset )
156{
157 device_t lDev = TIROOT_TO_PCIDEV(ptiRoot);
158 u_int32_t lData = 0;
159
160 lData = pci_read_config( lDev, chipConfigOffset, 4 );
161
162 return (U32)lData;
163}
164
165
166/******************************************************************************
167ostiChipConfigWriteBit32()
168Purpose:
169 Write 32-bit value to PCI configuration register
170Parameters:
171 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
172 U32 chipConfigOffset (IN) Offset to PCI configuration register
173 U32 chipConfigValue (IN) Value to be written
174Return: none
175******************************************************************************/
177 U32 chipConfigOffset,
178 U32 chipConfigValue )
179{
180 device_t lDev = TIROOT_TO_PCIDEV(ptiRoot);
181 pci_write_config( lDev, chipConfigOffset, chipConfigValue, 4 );
182}
183
184/******************************************************************************
185ostiChipReadBit32()
186Purpose:
187 Read 32-bit value from PCI address register
188Parameters:
189 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
190 U32 chipOffset (IN) Offset to PCI configuration register
191Return:
192 32 bit data
193******************************************************************************/
194U32 ostiChipReadBit32(tiRoot_t *ptiRoot, U32 chipOffset)
195{
196 U32 data;
198
199 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
200 data = *(U32 *)(pCardInfo->pciMemVirtAddr + chipOffset);
201 return data;
202}
203
204/******************************************************************************
205ostiChipWriteBit32()
206Purpose:
207 Write 32-bit value to PCI address register
208Parameters:
209 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
210 U32 chipOffset (IN) Offset to PCI configuration register
211 U32 chipValue (IN) Value to be written
212Return: none
213******************************************************************************/
214void ostiChipWriteBit32( tiRoot_t *ptiRoot, U32 chipOffset, U32 chipValue )
215{
217 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
218 *(U32 *)(pCardInfo->pciMemVirtAddr + chipOffset) = chipValue;
219}
220
221/******************************************************************************
222ostiChipReadBit32Ext()
223Purpose:
224 Read 32-bit value from PCI address register
225Parameters:
226 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
227 busBaseNumber PCI BAR number
228 U32 chipOffset (IN) Offset to PCI configuration register
229Return:
230 32 bit data
231******************************************************************************/
233 U32 busBaseNumber,
234 U32 chipOffset )
235{
236 U32 data;
238
239 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
240 data = *(U32 *)((pCardInfo->pciMemVirtAddrSpc[busBaseNumber]) + chipOffset );
241 return data;
242}
243
244/******************************************************************************
245ostiChipWriteBit32Ext()
246Purpose:
247 Write 32-bit value to PCI address register
248Parameters:
249 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
250 busBaseNumber PCI BAR number
251 U32 chipOffset (IN) Offset to PCI configuration register
252 U32 chipValue (IN) Value to be written
253Return: none
254******************************************************************************/
256 U32 busBaseNumber,
257 U32 chipOffset,
258 U32 aData )
259{
261 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
262 *(U32 *)((pCardInfo->pciMemVirtAddrSpc[busBaseNumber]) + chipOffset ) = aData;
263}
264
265/******************************************************************************
266ostiChipReadBit8()
267Purpose:
268 Read 8-bit value from PCI address register
269Parameters:
270 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
271 U32 chipOffset (IN) Offset to PCI configuration register
272Return:
273 8 bit data
274******************************************************************************/
275U08 ostiChipReadBit8( tiRoot_t *ptiRoot, U32 chipOffset )
276{
278 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
279 return *(U08 *)( pCardInfo->pciMemVirtAddr + chipOffset );
280}
281
282/******************************************************************************
283ostiChipWriteBit8()
284Purpose:
285 Write 8-bit value to PCI address register
286Parameters:
287 tiRoot_t *ptiRoot (IN) Pointer to tiRoot structure
288 U32 chipOffset (IN) Offset to PCI configuration register
289 U8 chipValue (IN) Value to be written
290Return: none
291******************************************************************************/
292void ostiChipWriteBit8( tiRoot_t *ptiRoot, U32 chipOffset, U08 chipValue )
293{
295 pCardInfo = TIROOT_TO_CARDINFO(ptiRoot);
296 *(U08 *)( pCardInfo->pciMemVirtAddr + chipOffset ) = chipValue;
297}
298
299
301 U32 offset,
302 void *bufPtr,
303 U32 nbytes)
304{
305 AGTIAPI_PRINTK( "ostiFlashReadBlock: No support for iscsi device\n" );
306}
307
308/******************************************************************************
309ostiFreeMemory()
310Purpose:
311 TD layer calls to free allocated dma memory
312Parameters:
313 tiRoot_t *ptiRoot (IN) Pointer refers to the current root
314 void *osMemHandle (IN) Pointer to OS mem handle to be released
315 u32 allocLength (IN) Aloocated memory length in byte
316Return:
317 tiSuccess - success
318 tiInvalidHandle - handle is invalid
319******************************************************************************/
321 void *osMemHandle,
322 U32 allocLength )
323{
325 ag_dma_addr_t *pMem = (ag_dma_addr_t*)osMemHandle;
326 struct agtiapi_softc *pCard;
327 pCard = TIROOT_TO_CARD(ptiRoot);
328
329 if( !osMemHandle ) {
330 AGTIAPI_PRINTK( "ostiFreeMemory: NULL handle ERROR\n" );
331 return tiInvalidHandle;
332 }
333
334 AGTIAPI_PRINTK( "ostiFreeMemory: debug messsage %p ### \n",
335 (void*)pMem->dmaPhysAddr );
336
337 // mark as unused
338 pMem->memSize = 0;
339 pMem->dmaVirtAddr = NULL;
340 pMem->dmaPhysAddr = 0;
341
343 AGTIAPI_PRINTK( "ostiFreeMemory: too many free slots ERROR\n" );
344 return tiInvalidHandle;
345 }
346
347 mtx_lock(&pCard->memLock);
349 mtx_unlock(&pCard->memLock);
350
351 return tiSuccess;
352}
353
354
355/******************************************************************************
356ostiMakeParamString()
357Purpose:
358 Utility function to simplify flow in ostiGetTransportParam(). Produces
359 a string handle constructed from ostiGetTransportParam() values:
360 key, subkey1, subkey2, subkey3, subkey4, subkey5, and valueName.
361Parameters:
362 S08 *aKey (IN) Pointer to 1st level parameter string
363 S08 *aSubkey1 (IN) Pointer to 2nd level parameter string
364 S08 *aSubkey2 (IN) Pointer to 3rd level parameter string
365 S08 *aSubkey3 (IN) Pointer to 4th level parameter string
366 S08 *aSubkey4 (IN) Pointer to 5th level parameter string
367 S08 *aSubkey5 (IN) Pointer to 6th level parameter string
368 S08 *aValueName (IN) Pointer to name string of the value under keys
369 S08 *aFullKey (OUT) Pointer to returned key-value-handle buffer
370 U32 *apLenFullKey (OUT) String length in the key-value-handle buffer
371Return:
372 tiSuccess - Success
373 tiError - Failed
374Note:
375 If all input strings are NULL, tiError will return with zero in apLenFullKey
376*****************************************************************************/
377inline static U32 ostiMakeParamString( S08 *aKey,
378 S08 *aSubkey1,
379 S08 *aSubkey2,
380 S08 *aSubkey3,
381 S08 *aSubkey4,
382 S08 *aSubkey5,
383 S08 *aValueName,
384 S08 *aFullKey,
385 U32 *apLenFullKey )
386{
387 // preliminary sanity checks
388 if( agNULL == aKey ) {
389 *apLenFullKey = 0;
390 printf( "ostiGetTransportParam called with no key. how odd.\n" );
391 return tiError;
392 }
393 if( agNULL == aValueName ) {
394 *apLenFullKey = 0;
395 printf( "ostiGetTransportParam called with no value-name. how odd.\n" );
396 return tiError;
397 }
398
399 strcpy( aFullKey, "DPMC_" ); // start at the beginning of the string
400 strcat( aFullKey, aKey );
401
402 int lIdx;
403 S08 *lStrIdx = agNULL;
404 for( lIdx = 1; lIdx <= 5; lIdx++ ) {
405 if( 1 == lIdx) lStrIdx = aSubkey1;
406 if( 2 == lIdx) lStrIdx = aSubkey2;
407 if( 3 == lIdx) lStrIdx = aSubkey3;
408 if( 4 == lIdx) lStrIdx = aSubkey4;
409 if( 5 == lIdx) lStrIdx = aSubkey5;
410 if( agNULL == lStrIdx ) break; // no more key information
411 // append key information
412 strcat( aFullKey, "_" );
413 strcat( aFullKey, lStrIdx );
414 }
415
416 // only the value name is left to append
417 strcat( aFullKey, "_" );
418 strcat( aFullKey, aValueName );
419
420 *apLenFullKey = strlen( aFullKey ); // 58 is max len seen; June 11, 2012
421 // printf( "ostiMakeParamString: x%d out-str:%s\n", // debug print
422 // *apLenFullKey, aFullKey );
423
424 return tiSuccess; // ship it chief
425}
426
427
428/******************************************************************************
429ostiGetTransportParam()
430Purpose:
431 Call back function from lower layer to get parameters.
432Parameters:
433 tiRoot_t *ptiRoot (IN) Pointer to driver root data structure
434 S08 *key (IN) Pointer to 1st level parameter
435 S08 *subkey1 (IN) Pointer to 2nd level parameter
436 S08 *subkey2 (IN) Pointer to 3rd level parameter
437 S08 *subkey3 (IN) Pointer to 4th level parameter
438 S08 *subkey4 (IN) Pointer to 5th level parameter
439 S08 *subkey5 (IN) Pointer to 6th level parameter
440 S08 *valueName (IN) Pointer to name of the value under keys
441 S08 *buffer (OUT) Pointer to returned information buffer
442 U32 bufferLen (OUT) Buffer length
443 U32 *lenReceived (OUT) String length in the buffer
444Return:
445 tiSuccess - Success
446 Other - Failed
447Note:
448 The scheme of searching adjustable parameter tree is the following:
449 key
450 - subkey1
451 - subkey2
452 - subkey3
453 - subkey4
454 - subkey5
455 - value
456 If no match in any case, tiError will return with zero length.
457
458 Where there is no indication of max key and subkey length,
459 an upper limit guess of 200 is used.
460 Perhaps a prudent revision would be to add some argument(s) to be
461 able to manage/check these "key" string lengths.
462 This function does no checking of buffer being a valid pointer.
463*****************************************************************************/
465 S08 *key,
466 S08 *subkey1,
467 S08 *subkey2,
468 S08 *subkey3,
469 S08 *subkey4,
470 S08 *subkey5,
471 S08 *valueName,
472 S08 *buffer,
473 U32 bufferLen,
474 U32 *lenReceived )
475{
476 S08 lFullKey[200];
477 U32 lLenFullKey = 0;
478 *lenReceived = 0;
479
480 if( bufferLen > 1 )
481 strcpy( buffer, "" );
482 else {
483 printf( "ostiGetTransportParam: buffer too small at only %d",
484 bufferLen );
485 return tiError; // not a reasonable buffer to work with
486 }
487 ostiMakeParamString( key, subkey1, subkey2, subkey3, subkey4, subkey5,
488 valueName, lFullKey, &lLenFullKey );
489 if( lLenFullKey ) // clean ParamString extraction
490 TUNABLE_STR_FETCH( lFullKey, buffer, bufferLen );
491 else
492 return tiError; // not working out, bail now
493
494 *lenReceived = strlen( buffer );
495
496 //if( *lenReceived ) // handy debug print
497 // printf( "ostiGetTransportParam: sz%d val:%s hdl-str:%s\n",
498 // *lenReceived, buffer, lFullKey );
499
500 return tiSuccess; // ship it chief
501}
502
503
504/******************************************************************************
505ostiIOCTLClearSignal()
506
507Purpose:
508 Function to clear or reset semaphore during ioctl
509Parameters:
510 tiRoot_t *ptiRoot (IN) Pointer to the current HBA
511 void **agParam1 (IN_OUT) Pointer to context to be passed
512 void **agParam2 (IN_OUT) Pointer to context to be passed
513 void **agParam (IN_OUT) Pointer to context to be passed
514Return:
515Note:
516 TBD, need more work for card based semaphore. Also needs to
517 consider the calling sequence.
518******************************************************************************/
519osGLOBAL void
521 void **agParam1,
522 void **agParam2,
523 void **agParam3)
524{
525}
526
527
528/******************************************************************************
529ostiIOCTLSetSignal() ### function currently stubbed out
530Purpose:
531 Function to set semaphore during ioctl
532Parameters:
533 tiRoot_t *ptiRoot (IN) Pointer to the current HBA
534 void **agParam1 (IN_OUT) Pointer to context to be passed
535 void **agParam2 (IN_OUT) Pointer to context to be passed
536 void **agParam (IN_OUT) Pointer to context to be passed
537Return:
538Note:
539******************************************************************************/
540osGLOBAL void
542 void *agParam1,
543 void *agParam2,
544 void *agParam3)
545{
546 struct agtiapi_softc *pCard;
547 pCard = TIROOT_TO_CARD(ptiRoot);
549 {
550 pCard->up_count++;
551 sema_post (pCard->pIoctlSem);
552 }
553}
554
555osGLOBAL void
557 void *agParam1,
558 void *agParam2,
559 void *agParam3)
560{
561 struct agtiapi_softc *pCard;
562 pCard = TIROOT_TO_CARD(ptiRoot);
564 {
565 pCard->up_count++;
566 sema_post (pCard->pIoctlSem);
567 }
568}
569
570/******************************************************************************
571ostiPortEvent()
572Purpose:
573 Call back function to inform OS the events of port state change.
574Parameters:
575 tiRoot_t *ptiRoot(IN) Pointer to driver root data structure
576 tiPortEvent_t eventType (IN) Type of port event:
577 tiPortPanic
578 tiPortResetComplete
579 tiPortNameServerDown
580 tiPortLinkDown
581 tiPortLinkUp
582 tiPortStarted
583 tiPortStopped
584 tiPortShutdown
585 tiPortInitComplete
586 void *pParm(IN) Pointer to event specific structure
587Return:
588 None
589******************************************************************************/
590void
592 tiPortEvent_t eventType,
593 U32 status,
594 void *pParm)
595{
596 struct agtiapi_softc *pCard;
598
599 AGTIAPI_PRINTK("ostiPortEvent: start eventType 0x%x\n", eventType);
600
601 pCard = TIROOT_TO_CARD(ptiRoot);
602
603 switch (eventType)
604 {
605 case tiPortStarted:
609 AGTIAPI_PRINTK("PortStarted - portal %p, status %x\n",
611 break;
612 case tiPortLinkDown:
614 PORTAL_STATUS(pPortalData) &= ~AGTIAPI_PORT_LINK_UP;
615 AGTIAPI_PRINTK("PortLinkDown - portal %p\n", pPortalData);
616 break;
617 case tiPortLinkUp:
620 AGTIAPI_PRINTK("PortLinkUp - portal %p\n", pPortalData);
621#ifdef INITIATOR_DRIVER
622#ifndef HOTPLUG_SUPPORT
623 if (!(pCard->flags & AGTIAPI_INIT_TIME))
624#endif
625// agtiapi_StartIO(pCard);
626#endif
627 break;
632 AGTIAPI_PRINTK("PortDiscoveryReady - portal %p, status 0x%x\n",
634#ifdef INITIATOR_DRIVER
635#ifndef HOTPLUG_SUPPORT
636 if (!(pCard->flags & AGTIAPI_INIT_TIME))
637#endif
641#endif
642 break;
644 AGTIAPI_PRINTK("PortNameSeverDown\n");
646 PORTAL_STATUS(pPortalData) &= ~AGTIAPI_NAME_SERVER_UP;
647 break;
648 case tiPortPanic:
649 AGTIAPI_PRINTK("PortPanic\n");
650 AGTIAPI_PRINTK( "## PortEvent\n" );
652 break;
654 AGTIAPI_PRINTK("PortResetComplete\n");
656 if (status == tiSuccess)
658 break;
659 case tiPortShutdown:
660 AGTIAPI_PRINTK("PortShutdown\n");
663 break;
664 case tiPortStopped:
668 AGTIAPI_PRINTK("PortStopped - portal %p\n", pPortalData);
669 break;
671 break;
673 break;
674 default:
675 AGTIAPI_PRINTK("PortEvent - %d (Unknown)\n", eventType);
676 break;
677 }
678 return;
679}
680
681
682/******************************************************************************
683ostiStallThread()
684Purpose:
685 Stall the thread (busy wait) for a number of microseconds.
686Parameters:
687 tiRoot_t *ptiRoot (IN) Pointer to the tiRoot data structure
688 U32 microseconds (IN) Micro-seconds to be hold
689Returns: none
690******************************************************************************/
691void ostiStallThread( tiRoot_t *ptiRoot, U32 microseconds )
692{
693 DELAY( microseconds );
694}
695
696
697/******************************************************************************
698ostiTimeStamp() ### stubbed out for now
699Purpose:
700 Time stamp
701Parameters:
702 tiRoot_t *ptiRoot (IN) Pointer to the tiRoot data structure
703Returns:
704 Time stamp in milisecond
705******************************************************************************/
706U32
708{
709 return 0;
710}
711
712// meant as stubbed out 64 bit version.
714{
715 U64 retVal;
716 retVal = ostiTimeStamp( ptiRoot );
717 return retVal;
718}
719
720/******************************************************************************
721ostiCacheFlush() ### stubbed out for now
722ostiCacheInvalidate()
723ostiCachePreFlush()
724
725Purpose:
726 Cache-coherency APIs
727Parameters:
728
729Returns:
730
731Note:
732 These 3 functions are to support new cache coherency applications.
733 Currently the APIs are implemented in FC for PPC platform. The
734 define CACHED_DMA enable for dma_cache_sync function call. However
735 this define is restricted for certain version of linux, such as
736 Linux 2.6.x and above, and certain platform such as PPC.
737
738 DO NOT define the CACHED_DMA if the cache coherency is not required
739 or the environment does not match.
740******************************************************************************/
742 tiRoot_t *ptiRoot,
743 void *osMemHandle,
744 void *virtPtr,
745 bit32 length
746 )
747{
748}
749
751 tiRoot_t *ptiRoot,
752 void *osMemHandle,
753 void *virtPtr,
754 bit32 length
755 )
756{
757}
758
761 void *osMemHandle,
762 void *virtPtr,
763 bit32 length
764 )
765{
766}
767
768
769/*
770 added for SAS/SATA
771 this is called by ossaInterrruptEnable
772*/
773GLOBAL void ostiInterruptEnable( tiRoot_t *ptiRoot, bit32 channelNum )
774{
775 // yep, really nothing.
776}
777
778/*
779 this is called by ossaInterrruptDisable
780*/
781GLOBAL void ostiInterruptDisable( tiRoot_t *ptiRoot, bit32 channelNum )
782{
783 // yep, really nothing.
784}
785
bit32 status
Definition: encrypt_ioctl.h:12
#define AGTIAPI_RESET_SUCCESS
Definition: lxcommon.h:106
#define LOW_32_BITS(addr)
Definition: lxcommon.h:571
#define AGTIAPI_CB_DONE
Definition: lxcommon.h:96
#define PORTAL_STATUS(pPortalData)
Definition: lxcommon.h:590
#define AGTIAPI_PORT_SHUTDOWN
Definition: lxcommon.h:109
#define AGTIAPI_PORT_DISC_READY
Definition: lxcommon.h:112
#define AGTIAPI_PORT_PANIC
Definition: lxcommon.h:105
#define TIROOT_TO_CARD(ptiRoot)
Definition: lxcommon.h:600
#define AGTIAPI_INIT_TIME
Definition: lxcommon.h:89
#define HIGH_32_BITS(addr)
Definition: lxcommon.h:572
#define AGTIAPI_PRINTK(format, a...)
Definition: lxcommon.h:517
#define AGTIAPI_PORT_START
Definition: lxcommon.h:107
#define TIROOT_TO_PCIDEV(ptiRoot)
Definition: lxcommon.h:602
#define TIROOT_TO_CARDINFO(ptiRoot)
Definition: lxcommon.h:601
#define AGTIAPI_PORT_STOPPED
Definition: lxcommon.h:108
#define AGTIAPI_DYNAMIC_MAX
Definition: lxcommon.h:78
#define AGTIAPI_PORT_LINK_UP
Definition: lxcommon.h:103
#define PORTAL_CONTEXT_TO_PORTALDATA(pPortalContext)
Definition: lxcommon.h:588
struct agtiapi_softc * pCard
Definition: lxencrypt.h:80
U32 ostiTimeStamp(tiRoot_t *ptiRoot)
Definition: lxosapi.c:707
GLOBAL void ostiInterruptEnable(tiRoot_t *ptiRoot, bit32 channelNum)
Definition: lxosapi.c:773
void ostiChipWriteBit32(tiRoot_t *ptiRoot, U32 chipOffset, U32 chipValue)
Definition: lxosapi.c:214
U32 ostiChipConfigReadBit32(tiRoot_t *ptiRoot, U32 chipConfigOffset)
Definition: lxosapi.c:155
U32 ostiChipReadBit32(tiRoot_t *ptiRoot, U32 chipOffset)
Definition: lxosapi.c:194
osGLOBAL U32 ostiFreeMemory(tiRoot_t *ptiRoot, void *osMemHandle, U32 allocLength)
Definition: lxosapi.c:320
void ostiChipConfigWriteBit32(tiRoot_t *ptiRoot, U32 chipConfigOffset, U32 chipConfigValue)
Definition: lxosapi.c:176
osGLOBAL U32 ostiAllocMemory(tiRoot_t *ptiRoot, void **osMemHandle, void **agVirtAddr, U32 *agPhysUpper32, U32 *agPhysLower32, U32 alignment, U32 allocLength, agBOOLEAN isCacheable)
Definition: lxosapi.c:51
void ostiChipWriteBit32Ext(tiRoot_t *ptiRoot, U32 busBaseNumber, U32 chipOffset, U32 aData)
Definition: lxosapi.c:255
osGLOBAL void ostiIOCTLWaitForSignal(tiRoot_t *ptiRoot, void *agParam1, void *agParam2, void *agParam3)
Definition: lxosapi.c:118
void ostiFlashReadBlock(tiRoot_t *ptiRoot, U32 offset, void *bufPtr, U32 nbytes)
Definition: lxosapi.c:300
osGLOBAL void ostiIOCTLSetSignal(tiRoot_t *ptiRoot, void *agParam1, void *agParam2, void *agParam3)
Definition: lxosapi.c:541
U32 ostiChipReadBit32Ext(tiRoot_t *ptiRoot, U32 busBaseNumber, U32 chipOffset)
Definition: lxosapi.c:232
GLOBAL void ostiInterruptDisable(tiRoot_t *ptiRoot, bit32 channelNum)
Definition: lxosapi.c:781
void ostiChipWriteBit8(tiRoot_t *ptiRoot, U32 chipOffset, U08 chipValue)
Definition: lxosapi.c:292
U32 ostiGetTransportParam(tiRoot_t *ptiRoot, S08 *key, S08 *subkey1, S08 *subkey2, S08 *subkey3, S08 *subkey4, S08 *subkey5, S08 *valueName, S08 *buffer, U32 bufferLen, U32 *lenReceived)
Definition: lxosapi.c:464
osGLOBAL void ostiIOCTLClearSignal(tiRoot_t *ptiRoot, void **agParam1, void **agParam2, void **agParam3)
Definition: lxosapi.c:520
osGLOBAL void ostiIOCTLComplete(tiRoot_t *ptiRoot, void *agParam1, void *agParam2, void *agParam3)
Definition: lxosapi.c:556
MALLOC_DEFINE(M_PMC_OSTI, "osti_cacheable", "allocated from ostiAllocMemory as cacheable memory")
osGLOBAL void ostiCacheInvalidate(tiRoot_t *ptiRoot, void *osMemHandle, void *virtPtr, bit32 length)
Definition: lxosapi.c:750
void ostiStallThread(tiRoot_t *ptiRoot, U32 microseconds)
Definition: lxosapi.c:691
osGLOBAL void ostiCacheFlush(tiRoot_t *ptiRoot, void *osMemHandle, void *virtPtr, bit32 length)
Definition: lxosapi.c:741
void ostiPortEvent(tiRoot_t *ptiRoot, tiPortEvent_t eventType, U32 status, void *pParm)
Definition: lxosapi.c:591
osGLOBAL void ostiCachePreFlush(tiRoot_t *tiRoot, void *osMemHandle, void *virtPtr, bit32 length)
Definition: lxosapi.c:759
U08 ostiChipReadBit8(tiRoot_t *ptiRoot, U32 chipOffset)
Definition: lxosapi.c:275
U64 ostiTimeStamp64(tiRoot_t *ptiRoot)
Definition: lxosapi.c:713
static U32 ostiMakeParamString(S08 *aKey, S08 *aSubkey1, S08 *aSubkey2, S08 *aSubkey3, S08 *aSubkey4, S08 *aSubkey5, S08 *aValueName, S08 *aFullKey, U32 *apLenFullKey)
Definition: lxosapi.c:377
osGLOBAL void ostiIOCTLWaitForComplete(tiRoot_t *ptiRoot, void *agParam1, void *agParam2, void *agParam3)
Definition: lxosapi.c:132
#define NULL
Definition: ostypes.h:142
#define osGLOBAL
Definition: ostypes.h:147
unsigned long long U64
Definition: ostypes.h:126
#define agNULL
Definition: ostypes.h:151
#define GLOBAL
Definition: ostypes.h:131
unsigned char U08
Definition: ostypes.h:122
unsigned int bit32
Definition: ostypes.h:99
#define agBOOLEAN
Definition: ostypes.h:146
unsigned int U32
Definition: ostypes.h:124
char S08
Definition: ostypes.h:116
ag_dma_addr_t * freeDynamicMem[AGTIAPI_DYNAMIC_MAX]
Definition: lxcommon.h:432
U16 topOfFreeDynamicMem
Definition: lxcommon.h:434
caddr_t pciMemVirtAddr
Definition: lxcommon.h:406
bus_addr_t nocache_busaddr
Definition: lxcommon.h:378
vm_paddr_t dmaPhysAddr
Definition: lxcommon.h:375
void * nocache_mem
Definition: lxcommon.h:379
void * dmaVirtAddr
Definition: lxcommon.h:374
ag_portal_info_t portalInfo
Definition: agtiapi.h:252
tiPortalContext_t tiPortalContext
Definition: lxcommon.h:483
tiRoot_t tiRoot
Definition: agtiapi.h:305
struct sema * pIoctlSem
Definition: agtiapi.h:375
ag_portal_data_t * pPortalData
Definition: agtiapi.h:342
U32 up_count
Definition: agtiapi.h:310
ag_card_info_t * pCardInfo
Definition: agtiapi.h:343
U32 down_count
Definition: agtiapi.h:311
Definition: titypes.h:61
osGLOBAL bit32 tiINIDiscoverTargets(tiRoot_t *tiRoot, tiPortalContext_t *portalContext, bit32 option)
Definition: itddisc.c:96
tiPortEvent_t
Definition: tidefs.h:128
@ tiModePageOperation
Definition: tidefs.h:140
@ tiPortLinkDown
Definition: tidefs.h:132
@ tiPortDiscoveryReady
Definition: tidefs.h:137
@ tiEncryptOperation
Definition: tidefs.h:139
@ tiPortStopped
Definition: tidefs.h:135
@ tiPortLinkUp
Definition: tidefs.h:133
@ tiPortNameServerDown
Definition: tidefs.h:131
@ tiPortPanic
Definition: tidefs.h:129
@ tiPortStarted
Definition: tidefs.h:134
@ tiPortShutdown
Definition: tidefs.h:136
@ tiPortResetComplete
Definition: tidefs.h:130
@ tiSuccess
Definition: tidefs.h:67
@ tiMemoryNotAvail
Definition: tidefs.h:72
@ tiError
Definition: tidefs.h:68
@ tiInvalidHandle
Definition: tidefs.h:73
#define FORCE_PERSISTENT_ASSIGN_MASK
Definition: tidefs.h:418