72#define MOS_MCAST_TABLE 0x00
75#define MOS_PHY_DATA0 0x0a
76#define MOS_PHY_DATA1 0x0b
77#define MOS_PHY_CTL 0x0c
78#define MOS_PHY_STS 0x0d
79#define MOS_PHY_DATA MOS_PHY_DATA0
87#define MOS_MAC MOS_MAC0
89#define MOS_FRAME_DROP_CNT 0x15
90#define MOS_PAUSE_TRHD 0x16
92#define MOS_PHYCTL_PHYADDR 0x1f
93#define MOS_PHYCTL_WRITE 0x20
94#define MOS_PHYCTL_READ 0x40
96#define MOS_PHYSTS_PHYREG 0x1f
97#define MOS_PHYSTS_READY 0x40
98#define MOS_PHYSTS_PENDING 0x80
100#define MOS_CTL_RX_PROMISC 0x01
101#define MOS_CTL_ALLMULTI 0x02
102#define MOS_CTL_SLEEP 0x04
103#define MOS_CTL_TX_ENB 0x08
108#define MOS_CTL_RX_ENB 0x10
109#define MOS_CTL_FDX_ENB 0x20
111#define MOS_CTL_SPEEDSEL 0x40
113#define MOS_CTL_BS_ENB 0x80
115#define MOS_RXSTS_SHORT_FRAME 0x01
116#define MOS_RXSTS_LENGTH_ERROR 0x02
117#define MOS_RXSTS_ALIGN_ERROR 0x04
118#define MOS_RXSTS_CRC_ERROR 0x08
119#define MOS_RXSTS_LARGE_FRAME 0x10
120#define MOS_RXSTS_VALID 0x20
125#define MOS_RXSTS_MASK 0x3d
127#define MOS_PAUSE_TRHD_DEFAULT 0
128#define MOS_PAUSE_REWRITES 3
130#define MOS_TIMEOUT 1000
132#define MOS_RX_LIST_CNT 1
133#define MOS_TX_LIST_CNT 1
136#define MOS_BUFSZ (ETHER_MAX_LEN+1)
141#define MOS_ENDPT_RX 0
142#define MOS_ENDPT_TX 1
143#define MOS_ENDPT_INTR 2
144#define MOS_ENDPT_MAX 3
149#define MOS_UR_READREG 0x0e
150#define MOS_UR_WRITEREG 0x0d
152#define MOS_CONFIG_IDX 0
153#define MOS_IFACE_IDX 0
155#define MCS7730 0x0001
156#define MCS7830 0x0002
157#define MCS7832 0x0004
159#define MOS_INC(x, y) (x) = (x + 1) % y
175#define GET_MII(sc) uether_getmii(&(sc)->sc_ue)
176#define MOS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
177#define MOS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
178#define MOS_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)
struct usb_xfer * sc_xfer[MOS_ENDPT_MAX]
unsigned char mos_phyaddrs[2]
unsigned char mos_ipgs[2]