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Data Structures | |
| struct | ure_intrpkt |
| struct | ure_rxpkt |
| struct | ure_txpkt |
| struct | ure_softc |
Macros | |
| #define | URE_CONFIG_IDX 0 /* config number 1 */ |
| #define | URE_IFACE_IDX 0 |
| #define | URE_CTL_READ 0x01 |
| #define | URE_CTL_WRITE 0x02 |
| #define | URE_TIMEOUT 1000 |
| #define | URE_PHY_TIMEOUT 2000 |
| #define | URE_BYTE_EN_DWORD 0xff |
| #define | URE_BYTE_EN_WORD 0x33 |
| #define | URE_BYTE_EN_BYTE 0x11 |
| #define | URE_BYTE_EN_SIX_BYTES 0x3f |
| #define | URE_FRAMELEN(mtu) ((mtu) + ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN) |
| #define | URE_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) |
| #define | URE_JUMBO_FRAMELEN (9*1024) |
| #define | URE_JUMBO_MTU (URE_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) |
| #define | URE_PLA_IDR 0xc000 |
| #define | URE_PLA_RCR 0xc010 |
| #define | URE_PLA_RMS 0xc016 |
| #define | URE_PLA_RXFIFO_CTRL0 0xc0a0 |
| #define | URE_PLA_RXFIFO_CTRL1 0xc0a4 |
| #define | URE_PLA_RXFIFO_CTRL2 0xc0a8 |
| #define | URE_PLA_DMY_REG0 0xc0b0 |
| #define | URE_PLA_FMC 0xc0b4 |
| #define | URE_PLA_CFG_WOL 0xc0b6 |
| #define | URE_PLA_TEREDO_CFG 0xc0bc |
| #define | URE_PLA_MAR0 0xcd00 |
| #define | URE_PLA_MAR4 0xcd04 |
| #define | URE_PLA_BACKUP 0xd000 |
| #define | URE_PAL_BDC_CR 0xd1a0 |
| #define | URE_PLA_TEREDO_TIMER 0xd2cc |
| #define | URE_PLA_REALWOW_TIMER 0xd2e8 |
| #define | URE_PLA_SUSPEND_FLAG 0xd38a |
| #define | URE_PLA_INDICATE_FALG 0xd38c |
| #define | URE_PLA_EXTRA_STATUS 0xd398 |
| #define | URE_PLA_LEDSEL 0xdd90 |
| #define | URE_PLA_LED_FEATURE 0xdd92 |
| #define | URE_PLA_PHYAR 0xde00 |
| #define | URE_PLA_BOOT_CTRL 0xe004 |
| #define | URE_PLA_GPHY_INTR_IMR 0xe022 |
| #define | URE_PLA_EEE_CR 0xe040 |
| #define | URE_PLA_EEEP_CR 0xe080 |
| #define | URE_PLA_MAC_PWR_CTRL 0xe0c0 |
| #define | URE_PLA_MAC_PWR_CTRL2 0xe0ca |
| #define | URE_PLA_MAC_PWR_CTRL3 0xe0cc |
| #define | URE_PLA_MAC_PWR_CTRL4 0xe0ce |
| #define | URE_PLA_WDT6_CTRL 0xe428 |
| #define | URE_PLA_TCR0 0xe610 |
| #define | URE_PLA_TCR1 0xe612 |
| #define | URE_PLA_MTPS 0xe615 |
| #define | URE_PLA_TXFIFO_CTRL 0xe618 |
| #define | URE_PLA_RSTTALLY 0xe800 |
| #define | URE_PLA_CR 0xe813 |
| #define | URE_PLA_CRWECR 0xe81c |
| #define | URE_PLA_CONFIG34 0xe820 |
| #define | URE_PLA_CONFIG5 0xe822 |
| #define | URE_PLA_PHY_PWR 0xe84c |
| #define | URE_PLA_OOB_CTRL 0xe84f |
| #define | URE_PLA_CPCR 0xe854 |
| #define | URE_PLA_MISC_0 0xe858 |
| #define | URE_PLA_MISC_1 0xe85a |
| #define | URE_PLA_OCP_GPHY_BASE 0xe86c |
| #define | URE_PLA_TELLYCNT 0xe890 |
| #define | URE_PLA_SFF_STS_7 0xe8de |
| #define | URE_PLA_PHYSTATUS 0xe908 |
| #define | URE_GMEDIASTAT 0xe908 |
| #define | URE_PLA_BP_BA 0xfc26 |
| #define | URE_PLA_BP_0 0xfc28 |
| #define | URE_PLA_BP_1 0xfc2a |
| #define | URE_PLA_BP_2 0xfc2c |
| #define | URE_PLA_BP_3 0xfc2e |
| #define | URE_PLA_BP_4 0xfc30 |
| #define | URE_PLA_BP_5 0xfc32 |
| #define | URE_PLA_BP_6 0xfc34 |
| #define | URE_PLA_BP_7 0xfc36 |
| #define | URE_PLA_BP_EN 0xfc38 |
| #define | URE_USB_USB2PHY 0xb41e |
| #define | URE_USB_SSPHYLINK2 0xb428 |
| #define | URE_USB_U2P3_CTRL 0xb460 |
| #define | URE_USB_CSR_DUMMY1 0xb464 |
| #define | URE_USB_CSR_DUMMY2 0xb466 |
| #define | URE_USB_DEV_STAT 0xb808 |
| #define | URE_USB_CONNECT_TIMER 0xcbf8 |
| #define | URE_USB_MSC_TIMER 0xcbfc |
| #define | URE_USB_BURST_SIZE 0xcfc0 |
| #define | URE_USB_LPM_CONFIG 0xcfd8 |
| #define | URE_USB_FW_CTRL 0xd334 /* RTL8153B */ |
| #define | URE_USB_USB_CTRL 0xd406 |
| #define | URE_USB_PHY_CTRL 0xd408 |
| #define | URE_USB_TX_AGG 0xd40a |
| #define | URE_USB_RX_BUF_TH 0xd40c |
| #define | URE_USB_FW_TASK 0xd4e8 /* RTL8153B */ |
| #define | URE_USB_USB_TIMER 0xd428 |
| #define | URE_USB_RX_EARLY_AGG 0xd42c |
| #define | URE_USB_RX_EARLY_SIZE 0xd42e |
| #define | URE_USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */ |
| #define | URE_USB_RX_EXTRA_AGG_TMR 0xd432 /* RTL8153B */ |
| #define | URE_USB_TX_DMA 0xd434 |
| #define | URE_USB_UPT_RXDMA_OWN 0xd437 |
| #define | URE_USB_FC_TIMER 0xd340 |
| #define | URE_USB_TOLERANCE 0xd490 |
| #define | URE_USB_LPM_CTRL 0xd41a |
| #define | URE_USB_BMU_RESET 0xd4b0 |
| #define | URE_USB_U1U2_TIMER 0xd4da |
| #define | URE_USB_UPS_CTRL 0xd800 |
| #define | URE_USB_POWER_CUT 0xd80a |
| #define | URE_USB_MISC_0 0xd81a |
| #define | URE_USB_AFE_CTRL2 0xd824 |
| #define | URE_USB_WDT11_CTRL 0xe43c |
| #define | URE_USB_BP_BA URE_PLA_BP_BA |
| #define | URE_USB_BP_0 URE_PLA_BP_0 |
| #define | URE_USB_BP_1 URE_PLA_BP_1 |
| #define | URE_USB_BP_2 URE_PLA_BP_2 |
| #define | URE_USB_BP_3 URE_PLA_BP_3 |
| #define | URE_USB_BP_4 URE_PLA_BP_4 |
| #define | URE_USB_BP_5 URE_PLA_BP_5 |
| #define | URE_USB_BP_6 URE_PLA_BP_6 |
| #define | URE_USB_BP_7 URE_PLA_BP_7 |
| #define | URE_USB_BP_EN URE_PLA_BP_EN /* RTL8153A */ |
| #define | URE_USB_BP_8 0xfc38 /* RTL8153B */ |
| #define | URE_USB_BP_9 0xfc3a |
| #define | URE_USB_BP_10 0xfc3c |
| #define | URE_USB_BP_11 0xfc3e |
| #define | URE_USB_BP_12 0xfc40 |
| #define | URE_USB_BP_13 0xfc42 |
| #define | URE_USB_BP_14 0xfc44 |
| #define | URE_USB_BP_15 0xfc46 |
| #define | URE_USB_BP2_EN 0xfc48 |
| #define | URE_OCP_ALDPS_CONFIG 0x2010 |
| #define | URE_OCP_EEE_CONFIG1 0x2080 |
| #define | URE_OCP_EEE_CONFIG2 0x2092 |
| #define | URE_OCP_EEE_CONFIG3 0x2094 |
| #define | URE_OCP_BASE_MII 0xa400 |
| #define | URE_OCP_EEE_AR 0xa41a |
| #define | URE_OCP_EEE_DATA 0xa41c |
| #define | URE_OCP_PHY_STATUS 0xa420 |
| #define | URE_OCP_POWER_CFG 0xa430 |
| #define | URE_OCP_EEE_CFG 0xa432 |
| #define | URE_OCP_SRAM_ADDR 0xa436 |
| #define | URE_OCP_SRAM_DATA 0xa438 |
| #define | URE_OCP_DOWN_SPEED 0xa442 |
| #define | URE_OCP_EEE_ABLE 0xa5c4 |
| #define | URE_OCP_EEE_ADV 0xa5d0 |
| #define | URE_OCP_EEE_LPABLE 0xa5d2 |
| #define | URE_OCP_PHY_STATE 0xa708 |
| #define | URE_OCP_PHY_PATCH_STAT 0xb800 |
| #define | URE_OCP_PHY_PATCH_CMD 0xb820 |
| #define | URE_OCP_PHY_LOCK 0xb82e |
| #define | URE_OCP_ADC_CFG 0xbc06 |
| #define | URE_SRAM_GREEN_CFG 0x8011 |
| #define | URE_SRAM_LPF_CFG 0x8012 |
| #define | URE_SRAM_GPHY_FW_VER 0x801e |
| #define | URE_SRAM_10M_AMP1 0x8080 |
| #define | URE_SRAM_10M_AMP2 0x8082 |
| #define | URE_SRAM_IMPEDANCE 0x8084 |
| #define | URE_SRAM_PHY_LOCK 0xb82e |
| #define | URE_RCR_AAP 0x00000001 |
| #define | URE_RCR_APM 0x00000002 |
| #define | URE_RCR_AM 0x00000004 |
| #define | URE_RCR_AB 0x00000008 |
| #define | URE_RCR_AR 0x00000010 /* runt */ |
| #define | URE_RCR_AER 0x00000020 /* error pkts */ |
| #define | URE_RCR_ACPTFLOW 0x00000080 |
| #define | URE_RCR_RXEMPTY 0x00020000 |
| #define | URE_RCR_ACPT_ALL (URE_RCR_AAP | URE_RCR_APM | URE_RCR_AM | URE_RCR_AB) |
| #define | URE_RXFIFO_THR1_NORMAL 0x00080002 |
| #define | URE_RXFIFO_THR1_OOB 0x01800003 |
| #define | URE_RXFIFO_THR2_FULL 0x00000060 |
| #define | URE_RXFIFO_THR2_HIGH 0x00000038 |
| #define | URE_RXFIFO_THR2_OOB 0x0000004a |
| #define | URE_RXFIFO_THR2_NORMAL 0x00a0 |
| #define | URE_RXFIFO_THR3_FULL 0x00000078 |
| #define | URE_RXFIFO_THR3_HIGH 0x00000048 |
| #define | URE_RXFIFO_THR3_OOB 0x0000005a |
| #define | URE_RXFIFO_THR3_NORMAL 0x0110 |
| #define | URE_TXFIFO_THR_NORMAL 0x00400008 |
| #define | URE_TXFIFO_THR_NORMAL2 0x01000008 |
| #define | URE_ECM_ALDPS 0x0002 |
| #define | URE_FMC_FCR_MCU_EN 0x0001 |
| #define | URE_EEEP_CR_EEEP_TX 0x0002 |
| #define | URE_WDT6_SET_MODE 0x0010 |
| #define | URE_TCR0_TX_EMPTY 0x0800 |
| #define | URE_TCR0_AUTO_FIFO 0x0080 |
| #define | URE_VERSION_MASK 0x7cf0 |
| #define | URE_MTPS_DEFAULT 96 |
| #define | URE_MTPS_JUMBO 192 |
| #define | URE_TALLY_RESET 0x0001 |
| #define | URE_CR_RST 0x10 |
| #define | URE_CR_RE 0x08 |
| #define | URE_CR_TE 0x04 |
| #define | URE_CRWECR_NORAML 0x00 |
| #define | URE_CRWECR_CONFIG 0xc0 |
| #define | URE_NOW_IS_OOB 0x80 |
| #define | URE_TXFIFO_EMPTY 0x20 |
| #define | URE_RXFIFO_EMPTY 0x10 |
| #define | URE_LINK_LIST_READY 0x02 |
| #define | URE_DIS_MCU_CLROOB 0x01 |
| #define | URE_FIFO_EMPTY (URE_TXFIFO_EMPTY | URE_RXFIFO_EMPTY) |
| #define | URE_RXDY_GATED_EN 0x0008 |
| #define | URE_RE_INIT_LL 0x8000 |
| #define | URE_MCU_BORW_EN 0x4000 |
| #define | URE_CPCR_RX_VLAN 0x0040 |
| #define | URE_TEREDO_SEL 0x8000 |
| #define | URE_TEREDO_WAKE_MASK 0x7f00 |
| #define | URE_TEREDO_RS_EVENT_MASK 0x00fe |
| #define | URE_OOB_TEREDO_EN 0x0001 |
| #define | URE_ALDPS_PROXY_MODE 0x0001 |
| #define | URE_LINK_OFF_WAKE_EN 0x0008 |
| #define | URE_LINK_ON_WAKE_EN 0x0010 |
| #define | URE_LAN_WAKE_EN 0x0002 |
| #define | URE_LED_MODE_MASK 0x0700 |
| #define | URE_TX_10M_IDLE_EN 0x0080 |
| #define | URE_PFM_PWM_SWITCH 0x0040 |
| #define | URE_D3_CLK_GATED_EN 0x00004000 |
| #define | URE_MCU_CLK_RATIO 0x07010f07 |
| #define | URE_MCU_CLK_RATIO_MASK 0x0f0f0f0f |
| #define | URE_ALDPS_SPDWN_RATIO 0x0f87 |
| #define | URE_MAC_CLK_SPDWN_EN 0x8000 |
| #define | URE_EEE_SPDWN_RATIO 0x8007 |
| #define | URE_PLA_MCU_SPDWN_EN 0x4000 |
| #define | URE_PKT_AVAIL_SPDWN_EN 0x0100 |
| #define | URE_SUSPEND_SPDWN_EN 0x0004 |
| #define | URE_U1U2_SPDWN_EN 0x0002 |
| #define | URE_L1_SPDWN_EN 0x0001 |
| #define | URE_PWRSAVE_SPDWN_EN 0x1000 |
| #define | URE_RXDV_SPDWN_EN 0x0800 |
| #define | URE_TX10MIDLE_EN 0x0100 |
| #define | URE_TP100_SPDWN_EN 0x0020 |
| #define | URE_TP500_SPDWN_EN 0x0010 |
| #define | URE_TP1000_SPDWN_EN 0x0008 |
| #define | URE_EEE_SPDWN_EN 0x0001 |
| #define | URE_GPHY_STS_MSK 0x0001 |
| #define | URE_SPEED_DOWN_MSK 0x0002 |
| #define | URE_SPDWN_RXDV_MSK 0x0004 |
| #define | URE_SPDWN_LINKCHG_MSK 0x0008 |
| #define | URE_PHYAR_PHYDATA 0x0000ffff |
| #define | URE_PHYAR_BUSY 0x80000000 |
| #define | URE_EEE_RX_EN 0x0001 |
| #define | URE_EEE_TX_EN 0x0002 |
| #define | URE_AUTOLOAD_DONE 0x0002 |
| #define | URE_LINK_CHG_EVENT 0x01 |
| #define | URE_UPCOMING_RUNTIME_D3 0x01 |
| #define | URE_POLL_LINK_CHG 0x0001 |
| #define | URE_LINK_CHANGE_FLAG 0x0100 |
| #define | URE_CUR_LINK_OK 0x8000 |
| #define | URE_PHYSTATUS_FDX 0x0001 |
| #define | URE_PHYSTATUS_LINK 0x0002 |
| #define | URE_PHYSTATUS_10MBPS 0x0004 |
| #define | URE_PHYSTATUS_100MBPS 0x0008 |
| #define | URE_PHYSTATUS_1000MBPS 0x0010 |
| #define | URE_PHYSTATUS_500MBPS 0x0100 |
| #define | URE_PHYSTATUS_1250MBPS 0x0200 |
| #define | URE_PHYSTATUS_2500MBPS 0x0400 |
| #define | URE_USB2PHY_SUSPEND 0x0001 |
| #define | URE_USB2PHY_L1 0x0002 |
| #define | URE_PWD_DN_SCALE_MASK 0x3ffe |
| #define | URE_PWD_DN_SCALE(x) ((x) << 1) |
| #define | URE_DYNAMIC_BURST 0x0001 |
| #define | URE_EP4_FULL_FC 0x0001 |
| #define | URE_STAT_SPEED_MASK 0x0006 |
| #define | URE_STAT_SPEED_HIGH 0x0000 |
| #define | URE_STAT_SPEED_FULL 0x0001 |
| #define | URE_LPM_U1U2_EN 0x0001 |
| #define | URE_TX_AGG_MAX_THRESHOLD 0x03 |
| #define | URE_RX_THR_SUPER 0x0c350180 |
| #define | URE_RX_THR_HIGH 0x7a120180 |
| #define | URE_RX_THR_SLOW 0xffff0180 |
| #define | URE_RX_THR_B 0x00010001 |
| #define | URE_TEST_MODE_DISABLE 0x00000001 |
| #define | URE_TX_SIZE_ADJUST1 0x00000100 |
| #define | URE_BMU_RESET_EP_IN 0x01 |
| #define | URE_BMU_RESET_EP_OUT 0x02 |
| #define | URE_OWN_UPDATE 0x01 |
| #define | URE_OWN_CLEAR 0x02 |
| #define | URE_FC_PATCH_TASK 0x0001 |
| #define | URE_POWER_CUT 0x0100 |
| #define | URE_RESUME_INDICATE 0x0001 |
| #define | URE_FLOW_CTRL_PATCH_OPT 0x01 |
| #define | URE_CTRL_TIMER_EN 0x8000 |
| #define | URE_RX_AGG_DISABLE 0x0010 |
| #define | URE_RX_ZERO_EN 0x0080 |
| #define | URE_U2P3_ENABLE 0x0001 |
| #define | URE_PWR_EN 0x0001 |
| #define | URE_PHASE2_EN 0x0008 |
| #define | URE_UPS_EN 0x0010 |
| #define | URE_USP_PREWAKE 0x0020 |
| #define | URE_PCUT_STATUS 0x0001 |
| #define | URE_COALESCE_SUPER 85000U |
| #define | URE_COALESCE_HIGH 250000U |
| #define | URE_COALESCE_SLOW 524280U |
| #define | URE_TIMER11_EN 0x0001 |
| #define | URE_FIFO_EMPTY_1FB 0x30 |
| #define | URE_LPM_TIMER_MASK 0x0c |
| #define | URE_LPM_TIMER_500MS 0x04 |
| #define | URE_LPM_TIMER_500US 0x0c |
| #define | URE_ROK_EXIT_LPM 0x02 |
| #define | URE_SEN_VAL_MASK 0xf800 |
| #define | URE_SEN_VAL_NORMAL 0xa000 |
| #define | URE_SEL_RXIDLE 0x0100 |
| #define | URE_ENPWRSAVE 0x8000 |
| #define | URE_ENPDNPS 0x0200 |
| #define | URE_LINKENA 0x0100 |
| #define | URE_DIS_SDSAVE 0x0010 |
| #define | URE_PHY_STAT_MASK 0x0007 |
| #define | URE_PHY_STAT_EXT_INIT 2 |
| #define | URE_PHY_STAT_LAN_ON 3 |
| #define | URE_PHY_STAT_PWRDN 5 |
| #define | URE_EEE_CLKDIV_EN 0x8000 |
| #define | URE_EN_ALDPS 0x0004 |
| #define | URE_EN_10M_PLLOFF 0x0001 |
| #define | URE_CTAP_SHORT_EN 0x0040 |
| #define | URE_EEE10_EN 0x0010 |
| #define | URE_EN_10M_BGOFF 0x0080 |
| #define | URE_EN_10M_CLKDIV 0x0800 |
| #define | URE_EN_EEE_100 0x1000 |
| #define | URE_EN_EEE_1000 0x2000 |
| #define | URE_EN_EEE_CMODE 0x4000 |
| #define | URE_TXDIS_STATE 0x01 |
| #define | URE_ABD_STATE 0x02 |
| #define | URE_PATCH_READY 0x40 |
| #define | URE_PATCH_REQUEST 0x10 |
| #define | URE_PATCH_LOCK 0x01 |
| #define | URE_CKADSEL_L 0x0100 |
| #define | URE_ADC_EN 0x0080 |
| #define | URE_EN_EMI_L 0x0040 |
| #define | URE_GREEN_ETH_EN 0x8000 |
| #define | URE_PHY_PATCH_LOCK 0x0001 |
| #define | URE_ADV_2500TFDX 0x0080 |
| #define | URE_MCU_TYPE_PLA 0x0100 |
| #define | URE_MCU_TYPE_USB 0x0000 |
| #define | GET_MII(sc) uether_getmii(&(sc)->sc_ue) |
| #define | URE_RXPKT_ALIGN 8 |
| #define | URE_RXPKT_LEN_MASK 0x7fff |
| #define | URE_RXPKT_VLAN_MASK 0xffff |
| #define | URE_RXPKT_RX_VLAN_TAG (1 << 16) |
| #define | URE_RXPKT_IPV4_CS (1 << 19) |
| #define | URE_RXPKT_IPV6_CS (1 << 20) |
| #define | URE_RXPKT_TCP_CS (1 << 22) |
| #define | URE_RXPKT_UDP_CS (1 << 23) |
| #define | URE_RXPKT_TCP_F (1 << 21) |
| #define | URE_RXPKT_UDP_F (1 << 22) |
| #define | URE_RXPKT_IP_F (1 << 23) |
| #define | URE_TXPKT_ALIGN 4 |
| #define | URE_TKPKT_TX_FS (1 << 31) |
| #define | URE_TKPKT_TX_LS (1 << 30) |
| #define | URE_TXPKT_LEN_MASK 0xffff |
| #define | URE_L4_OFFSET_MAX 0x7ff |
| #define | URE_L4_OFFSET_SHIFT 17 |
| #define | URE_TXPKT_VLAN_MASK 0xffff |
| #define | URE_TXPKT_VLAN (1 << 16) |
| #define | URE_TXPKT_IPV6_CS (1 << 28) |
| #define | URE_TXPKT_IPV4_CS (1 << 29) |
| #define | URE_TXPKT_TCP_CS (1 << 30) |
| #define | URE_TXPKT_UDP_CS (1 << 31) |
| #define | URE_MAX_TX 4 |
| #define | URE_MAX_RX 4 |
| #define | URE_TX_BUFSZ 16384 |
| #define | URE_8152_RX_BUFSZ (16 * 1024) |
| #define | URE_8153_RX_BUFSZ (32 * 1024) |
| #define | URE_8156_RX_BUFSZ (48 * 1024) |
| #define | URE_FLAG_LINK 0x0001 |
| #define | URE_FLAG_8152 0x0100 /* RTL8152 */ |
| #define | URE_FLAG_8153 0x0200 /* RTL8153 */ |
| #define | URE_FLAG_8153B 0x0400 /* RTL8153B */ |
| #define | URE_FLAG_8156 0x0800 /* RTL8156 */ |
| #define | URE_FLAG_8156B 0x1000 /* RTL8156B */ |
| #define | URE_CHIP_VER_4C00 0x0001 |
| #define | URE_CHIP_VER_4C10 0x0002 |
| #define | URE_CHIP_VER_5C00 0x0004 |
| #define | URE_CHIP_VER_5C10 0x0008 |
| #define | URE_CHIP_VER_5C20 0x0010 |
| #define | URE_CHIP_VER_5C30 0x0020 |
| #define | URE_CHIP_VER_6000 0x0040 |
| #define | URE_CHIP_VER_6010 0x0080 |
| #define | URE_CHIP_VER_7020 0x0100 |
| #define | URE_CHIP_VER_7030 0x0200 |
| #define | URE_CHIP_VER_7400 0x0400 |
| #define | URE_CHIP_VER_7410 0x0800 |
| #define | URE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) |
| #define | URE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) |
| #define | URE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) |
Variables | |
| struct ure_intrpkt | __packed |
Macro Definition Documentation
◆ GET_MII
| #define GET_MII | ( | sc | ) | uether_getmii(&(sc)->sc_ue) |
Definition at line 521 of file if_urereg.h.
◆ URE_8152_RX_BUFSZ
| #define URE_8152_RX_BUFSZ (16 * 1024) |
Definition at line 577 of file if_urereg.h.
◆ URE_8153_RX_BUFSZ
| #define URE_8153_RX_BUFSZ (32 * 1024) |
Definition at line 578 of file if_urereg.h.
◆ URE_8156_RX_BUFSZ
| #define URE_8156_RX_BUFSZ (48 * 1024) |
Definition at line 579 of file if_urereg.h.
◆ URE_ABD_STATE
| #define URE_ABD_STATE 0x02 |
Definition at line 494 of file if_urereg.h.
◆ URE_ADC_EN
| #define URE_ADC_EN 0x0080 |
Definition at line 507 of file if_urereg.h.
◆ URE_ADV_2500TFDX
| #define URE_ADV_2500TFDX 0x0080 |
Definition at line 516 of file if_urereg.h.
◆ URE_ALDPS_PROXY_MODE
| #define URE_ALDPS_PROXY_MODE 0x0001 |
Definition at line 290 of file if_urereg.h.
◆ URE_ALDPS_SPDWN_RATIO
| #define URE_ALDPS_SPDWN_RATIO 0x0f87 |
Definition at line 310 of file if_urereg.h.
◆ URE_AUTOLOAD_DONE
| #define URE_AUTOLOAD_DONE 0x0002 |
Definition at line 347 of file if_urereg.h.
◆ URE_BMU_RESET_EP_IN
| #define URE_BMU_RESET_EP_IN 0x01 |
Definition at line 406 of file if_urereg.h.
◆ URE_BMU_RESET_EP_OUT
| #define URE_BMU_RESET_EP_OUT 0x02 |
Definition at line 407 of file if_urereg.h.
◆ URE_BYTE_EN_BYTE
| #define URE_BYTE_EN_BYTE 0x11 |
Definition at line 43 of file if_urereg.h.
◆ URE_BYTE_EN_DWORD
| #define URE_BYTE_EN_DWORD 0xff |
Definition at line 41 of file if_urereg.h.
◆ URE_BYTE_EN_SIX_BYTES
| #define URE_BYTE_EN_SIX_BYTES 0x3f |
Definition at line 44 of file if_urereg.h.
◆ URE_BYTE_EN_WORD
| #define URE_BYTE_EN_WORD 0x33 |
Definition at line 42 of file if_urereg.h.
◆ URE_CHIP_VER_4C00
| #define URE_CHIP_VER_4C00 0x0001 |
Definition at line 604 of file if_urereg.h.
◆ URE_CHIP_VER_4C10
| #define URE_CHIP_VER_4C10 0x0002 |
Definition at line 605 of file if_urereg.h.
◆ URE_CHIP_VER_5C00
| #define URE_CHIP_VER_5C00 0x0004 |
Definition at line 606 of file if_urereg.h.
◆ URE_CHIP_VER_5C10
| #define URE_CHIP_VER_5C10 0x0008 |
Definition at line 607 of file if_urereg.h.
◆ URE_CHIP_VER_5C20
| #define URE_CHIP_VER_5C20 0x0010 |
Definition at line 608 of file if_urereg.h.
◆ URE_CHIP_VER_5C30
| #define URE_CHIP_VER_5C30 0x0020 |
Definition at line 609 of file if_urereg.h.
◆ URE_CHIP_VER_6000
| #define URE_CHIP_VER_6000 0x0040 |
Definition at line 610 of file if_urereg.h.
◆ URE_CHIP_VER_6010
| #define URE_CHIP_VER_6010 0x0080 |
Definition at line 611 of file if_urereg.h.
◆ URE_CHIP_VER_7020
| #define URE_CHIP_VER_7020 0x0100 |
Definition at line 612 of file if_urereg.h.
◆ URE_CHIP_VER_7030
| #define URE_CHIP_VER_7030 0x0200 |
Definition at line 613 of file if_urereg.h.
◆ URE_CHIP_VER_7400
| #define URE_CHIP_VER_7400 0x0400 |
Definition at line 614 of file if_urereg.h.
◆ URE_CHIP_VER_7410
| #define URE_CHIP_VER_7410 0x0800 |
Definition at line 615 of file if_urereg.h.
◆ URE_CKADSEL_L
| #define URE_CKADSEL_L 0x0100 |
Definition at line 506 of file if_urereg.h.
◆ URE_COALESCE_HIGH
| #define URE_COALESCE_HIGH 250000U |
Definition at line 446 of file if_urereg.h.
◆ URE_COALESCE_SLOW
| #define URE_COALESCE_SLOW 524280U |
Definition at line 447 of file if_urereg.h.
◆ URE_COALESCE_SUPER
| #define URE_COALESCE_SUPER 85000U |
Definition at line 445 of file if_urereg.h.
◆ URE_CONFIG_IDX
| #define URE_CONFIG_IDX 0 /* config number 1 */ |
Definition at line 32 of file if_urereg.h.
◆ URE_CPCR_RX_VLAN
| #define URE_CPCR_RX_VLAN 0x0040 |
Definition at line 281 of file if_urereg.h.
◆ URE_CR_RE
| #define URE_CR_RE 0x08 |
Definition at line 258 of file if_urereg.h.
◆ URE_CR_RST
| #define URE_CR_RST 0x10 |
Definition at line 257 of file if_urereg.h.
◆ URE_CR_TE
| #define URE_CR_TE 0x04 |
Definition at line 259 of file if_urereg.h.
◆ URE_CRWECR_CONFIG
| #define URE_CRWECR_CONFIG 0xc0 |
Definition at line 263 of file if_urereg.h.
◆ URE_CRWECR_NORAML
| #define URE_CRWECR_NORAML 0x00 |
Definition at line 262 of file if_urereg.h.
◆ URE_CTAP_SHORT_EN
| #define URE_CTAP_SHORT_EN 0x0040 |
Definition at line 482 of file if_urereg.h.
◆ URE_CTL_READ
| #define URE_CTL_READ 0x01 |
Definition at line 35 of file if_urereg.h.
◆ URE_CTL_WRITE
| #define URE_CTL_WRITE 0x02 |
Definition at line 36 of file if_urereg.h.
◆ URE_CTRL_TIMER_EN
| #define URE_CTRL_TIMER_EN 0x8000 |
Definition at line 426 of file if_urereg.h.
◆ URE_CUR_LINK_OK
| #define URE_CUR_LINK_OK 0x8000 |
Definition at line 358 of file if_urereg.h.
◆ URE_D3_CLK_GATED_EN
| #define URE_D3_CLK_GATED_EN 0x00004000 |
Definition at line 307 of file if_urereg.h.
◆ URE_DIS_MCU_CLROOB
| #define URE_DIS_MCU_CLROOB 0x01 |
Definition at line 270 of file if_urereg.h.
◆ URE_DIS_SDSAVE
| #define URE_DIS_SDSAVE 0x0010 |
Definition at line 468 of file if_urereg.h.
◆ URE_DYNAMIC_BURST
| #define URE_DYNAMIC_BURST 0x0001 |
Definition at line 379 of file if_urereg.h.
◆ URE_ECM_ALDPS
| #define URE_ECM_ALDPS 0x0002 |
Definition at line 231 of file if_urereg.h.
◆ URE_EEE10_EN
| #define URE_EEE10_EN 0x0010 |
Definition at line 483 of file if_urereg.h.
◆ URE_EEE_CLKDIV_EN
| #define URE_EEE_CLKDIV_EN 0x8000 |
Definition at line 477 of file if_urereg.h.
◆ URE_EEE_RX_EN
| #define URE_EEE_RX_EN 0x0001 |
Definition at line 343 of file if_urereg.h.
◆ URE_EEE_SPDWN_EN
| #define URE_EEE_SPDWN_EN 0x0001 |
Definition at line 330 of file if_urereg.h.
◆ URE_EEE_SPDWN_RATIO
| #define URE_EEE_SPDWN_RATIO 0x8007 |
Definition at line 314 of file if_urereg.h.
◆ URE_EEE_TX_EN
| #define URE_EEE_TX_EN 0x0002 |
Definition at line 344 of file if_urereg.h.
◆ URE_EEEP_CR_EEEP_TX
| #define URE_EEEP_CR_EEEP_TX 0x0002 |
Definition at line 237 of file if_urereg.h.
◆ URE_EN_10M_BGOFF
| #define URE_EN_10M_BGOFF 0x0080 |
Definition at line 486 of file if_urereg.h.
◆ URE_EN_10M_CLKDIV
| #define URE_EN_10M_CLKDIV 0x0800 |
Definition at line 487 of file if_urereg.h.
◆ URE_EN_10M_PLLOFF
| #define URE_EN_10M_PLLOFF 0x0001 |
Definition at line 479 of file if_urereg.h.
◆ URE_EN_ALDPS
| #define URE_EN_ALDPS 0x0004 |
Definition at line 478 of file if_urereg.h.
◆ URE_EN_EEE_100
| #define URE_EN_EEE_100 0x1000 |
Definition at line 488 of file if_urereg.h.
◆ URE_EN_EEE_1000
| #define URE_EN_EEE_1000 0x2000 |
Definition at line 489 of file if_urereg.h.
◆ URE_EN_EEE_CMODE
| #define URE_EN_EEE_CMODE 0x4000 |
Definition at line 490 of file if_urereg.h.
◆ URE_EN_EMI_L
| #define URE_EN_EMI_L 0x0040 |
Definition at line 508 of file if_urereg.h.
◆ URE_ENPDNPS
| #define URE_ENPDNPS 0x0200 |
Definition at line 466 of file if_urereg.h.
◆ URE_ENPWRSAVE
| #define URE_ENPWRSAVE 0x8000 |
Definition at line 465 of file if_urereg.h.
◆ URE_EP4_FULL_FC
| #define URE_EP4_FULL_FC 0x0001 |
Definition at line 382 of file if_urereg.h.
◆ URE_FC_PATCH_TASK
| #define URE_FC_PATCH_TASK 0x0001 |
Definition at line 414 of file if_urereg.h.
◆ URE_FIFO_EMPTY
| #define URE_FIFO_EMPTY (URE_TXFIFO_EMPTY | URE_RXFIFO_EMPTY) |
Definition at line 271 of file if_urereg.h.
◆ URE_FIFO_EMPTY_1FB
| #define URE_FIFO_EMPTY_1FB 0x30 |
Definition at line 453 of file if_urereg.h.
◆ URE_FLAG_8152
| #define URE_FLAG_8152 0x0100 /* RTL8152 */ |
Definition at line 596 of file if_urereg.h.
◆ URE_FLAG_8153
| #define URE_FLAG_8153 0x0200 /* RTL8153 */ |
Definition at line 597 of file if_urereg.h.
◆ URE_FLAG_8153B
| #define URE_FLAG_8153B 0x0400 /* RTL8153B */ |
Definition at line 598 of file if_urereg.h.
◆ URE_FLAG_8156
| #define URE_FLAG_8156 0x0800 /* RTL8156 */ |
Definition at line 599 of file if_urereg.h.
◆ URE_FLAG_8156B
| #define URE_FLAG_8156B 0x1000 /* RTL8156B */ |
Definition at line 600 of file if_urereg.h.
◆ URE_FLAG_LINK
| #define URE_FLAG_LINK 0x0001 |
Definition at line 595 of file if_urereg.h.
◆ URE_FLOW_CTRL_PATCH_OPT
| #define URE_FLOW_CTRL_PATCH_OPT 0x01 |
Definition at line 423 of file if_urereg.h.
◆ URE_FMC_FCR_MCU_EN
| #define URE_FMC_FCR_MCU_EN 0x0001 |
Definition at line 234 of file if_urereg.h.
◆ URE_FRAMELEN
| #define URE_FRAMELEN | ( | mtu | ) | ((mtu) + ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN) |
Definition at line 46 of file if_urereg.h.
◆ URE_GMEDIASTAT
| #define URE_GMEDIASTAT 0xe908 |
Definition at line 100 of file if_urereg.h.
◆ URE_GPHY_STS_MSK
| #define URE_GPHY_STS_MSK 0x0001 |
Definition at line 333 of file if_urereg.h.
◆ URE_GREEN_ETH_EN
| #define URE_GREEN_ETH_EN 0x8000 |
Definition at line 511 of file if_urereg.h.
◆ URE_IFACE_IDX
| #define URE_IFACE_IDX 0 |
Definition at line 33 of file if_urereg.h.
◆ URE_JUMBO_FRAMELEN
| #define URE_JUMBO_FRAMELEN (9*1024) |
Definition at line 48 of file if_urereg.h.
◆ URE_JUMBO_MTU
| #define URE_JUMBO_MTU (URE_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) |
Definition at line 49 of file if_urereg.h.
◆ URE_L1_SPDWN_EN
| #define URE_L1_SPDWN_EN 0x0001 |
Definition at line 321 of file if_urereg.h.
◆ URE_L4_OFFSET_MAX
| #define URE_L4_OFFSET_MAX 0x7ff |
Definition at line 562 of file if_urereg.h.
◆ URE_L4_OFFSET_SHIFT
| #define URE_L4_OFFSET_SHIFT 17 |
Definition at line 563 of file if_urereg.h.
◆ URE_LAN_WAKE_EN
| #define URE_LAN_WAKE_EN 0x0002 |
Definition at line 297 of file if_urereg.h.
◆ URE_LED_MODE_MASK
| #define URE_LED_MODE_MASK 0x0700 |
Definition at line 300 of file if_urereg.h.
◆ URE_LINK_CHANGE_FLAG
| #define URE_LINK_CHANGE_FLAG 0x0100 |
Definition at line 357 of file if_urereg.h.
◆ URE_LINK_CHG_EVENT
| #define URE_LINK_CHG_EVENT 0x01 |
Definition at line 350 of file if_urereg.h.
◆ URE_LINK_LIST_READY
| #define URE_LINK_LIST_READY 0x02 |
Definition at line 269 of file if_urereg.h.
◆ URE_LINK_OFF_WAKE_EN
| #define URE_LINK_OFF_WAKE_EN 0x0008 |
Definition at line 293 of file if_urereg.h.
◆ URE_LINK_ON_WAKE_EN
| #define URE_LINK_ON_WAKE_EN 0x0010 |
Definition at line 294 of file if_urereg.h.
◆ URE_LINKENA
| #define URE_LINKENA 0x0100 |
Definition at line 467 of file if_urereg.h.
◆ URE_LOCK
| #define URE_LOCK | ( | _sc | ) | mtx_lock(&(_sc)->sc_mtx) |
Definition at line 618 of file if_urereg.h.
◆ URE_LOCK_ASSERT
| #define URE_LOCK_ASSERT | ( | _sc, | |
| t | |||
| ) | mtx_assert(&(_sc)->sc_mtx, t) |
Definition at line 620 of file if_urereg.h.
◆ URE_LPM_TIMER_500MS
| #define URE_LPM_TIMER_500MS 0x04 |
Definition at line 455 of file if_urereg.h.
◆ URE_LPM_TIMER_500US
| #define URE_LPM_TIMER_500US 0x0c |
Definition at line 456 of file if_urereg.h.
◆ URE_LPM_TIMER_MASK
| #define URE_LPM_TIMER_MASK 0x0c |
Definition at line 454 of file if_urereg.h.
◆ URE_LPM_U1U2_EN
| #define URE_LPM_U1U2_EN 0x0001 |
Definition at line 390 of file if_urereg.h.
◆ URE_MAC_CLK_SPDWN_EN
| #define URE_MAC_CLK_SPDWN_EN 0x8000 |
Definition at line 313 of file if_urereg.h.
◆ URE_MAX_FRAMELEN
| #define URE_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) |
Definition at line 47 of file if_urereg.h.
◆ URE_MAX_RX
| #define URE_MAX_RX 4 |
Definition at line 574 of file if_urereg.h.
◆ URE_MAX_TX
| #define URE_MAX_TX 4 |
Definition at line 573 of file if_urereg.h.
◆ URE_MCU_BORW_EN
| #define URE_MCU_BORW_EN 0x4000 |
Definition at line 278 of file if_urereg.h.
◆ URE_MCU_CLK_RATIO
| #define URE_MCU_CLK_RATIO 0x07010f07 |
Definition at line 308 of file if_urereg.h.
◆ URE_MCU_CLK_RATIO_MASK
| #define URE_MCU_CLK_RATIO_MASK 0x0f0f0f0f |
Definition at line 309 of file if_urereg.h.
◆ URE_MCU_TYPE_PLA
| #define URE_MCU_TYPE_PLA 0x0100 |
Definition at line 518 of file if_urereg.h.
◆ URE_MCU_TYPE_USB
| #define URE_MCU_TYPE_USB 0x0000 |
Definition at line 519 of file if_urereg.h.
◆ URE_MTPS_DEFAULT
| #define URE_MTPS_DEFAULT 96 |
Definition at line 250 of file if_urereg.h.
◆ URE_MTPS_JUMBO
| #define URE_MTPS_JUMBO 192 |
Definition at line 251 of file if_urereg.h.
◆ URE_NOW_IS_OOB
| #define URE_NOW_IS_OOB 0x80 |
Definition at line 266 of file if_urereg.h.
◆ URE_OCP_ADC_CFG
| #define URE_OCP_ADC_CFG 0xbc06 |
Definition at line 187 of file if_urereg.h.
◆ URE_OCP_ALDPS_CONFIG
| #define URE_OCP_ALDPS_CONFIG 0x2010 |
Definition at line 167 of file if_urereg.h.
◆ URE_OCP_BASE_MII
| #define URE_OCP_BASE_MII 0xa400 |
Definition at line 171 of file if_urereg.h.
◆ URE_OCP_DOWN_SPEED
| #define URE_OCP_DOWN_SPEED 0xa442 |
Definition at line 179 of file if_urereg.h.
◆ URE_OCP_EEE_ABLE
| #define URE_OCP_EEE_ABLE 0xa5c4 |
Definition at line 180 of file if_urereg.h.
◆ URE_OCP_EEE_ADV
| #define URE_OCP_EEE_ADV 0xa5d0 |
Definition at line 181 of file if_urereg.h.
◆ URE_OCP_EEE_AR
| #define URE_OCP_EEE_AR 0xa41a |
Definition at line 172 of file if_urereg.h.
◆ URE_OCP_EEE_CFG
| #define URE_OCP_EEE_CFG 0xa432 |
Definition at line 176 of file if_urereg.h.
◆ URE_OCP_EEE_CONFIG1
| #define URE_OCP_EEE_CONFIG1 0x2080 |
Definition at line 168 of file if_urereg.h.
◆ URE_OCP_EEE_CONFIG2
| #define URE_OCP_EEE_CONFIG2 0x2092 |
Definition at line 169 of file if_urereg.h.
◆ URE_OCP_EEE_CONFIG3
| #define URE_OCP_EEE_CONFIG3 0x2094 |
Definition at line 170 of file if_urereg.h.
◆ URE_OCP_EEE_DATA
| #define URE_OCP_EEE_DATA 0xa41c |
Definition at line 173 of file if_urereg.h.
◆ URE_OCP_EEE_LPABLE
| #define URE_OCP_EEE_LPABLE 0xa5d2 |
Definition at line 182 of file if_urereg.h.
◆ URE_OCP_PHY_LOCK
| #define URE_OCP_PHY_LOCK 0xb82e |
Definition at line 186 of file if_urereg.h.
◆ URE_OCP_PHY_PATCH_CMD
| #define URE_OCP_PHY_PATCH_CMD 0xb820 |
Definition at line 185 of file if_urereg.h.
◆ URE_OCP_PHY_PATCH_STAT
| #define URE_OCP_PHY_PATCH_STAT 0xb800 |
Definition at line 184 of file if_urereg.h.
◆ URE_OCP_PHY_STATE
| #define URE_OCP_PHY_STATE 0xa708 |
Definition at line 183 of file if_urereg.h.
◆ URE_OCP_PHY_STATUS
| #define URE_OCP_PHY_STATUS 0xa420 |
Definition at line 174 of file if_urereg.h.
◆ URE_OCP_POWER_CFG
| #define URE_OCP_POWER_CFG 0xa430 |
Definition at line 175 of file if_urereg.h.
◆ URE_OCP_SRAM_ADDR
| #define URE_OCP_SRAM_ADDR 0xa436 |
Definition at line 177 of file if_urereg.h.
◆ URE_OCP_SRAM_DATA
| #define URE_OCP_SRAM_DATA 0xa438 |
Definition at line 178 of file if_urereg.h.
◆ URE_OOB_TEREDO_EN
| #define URE_OOB_TEREDO_EN 0x0001 |
Definition at line 287 of file if_urereg.h.
◆ URE_OWN_CLEAR
| #define URE_OWN_CLEAR 0x02 |
Definition at line 411 of file if_urereg.h.
◆ URE_OWN_UPDATE
| #define URE_OWN_UPDATE 0x01 |
Definition at line 410 of file if_urereg.h.
◆ URE_PAL_BDC_CR
| #define URE_PAL_BDC_CR 0xd1a0 |
Definition at line 64 of file if_urereg.h.
◆ URE_PATCH_LOCK
| #define URE_PATCH_LOCK 0x01 |
Definition at line 503 of file if_urereg.h.
◆ URE_PATCH_READY
| #define URE_PATCH_READY 0x40 |
Definition at line 497 of file if_urereg.h.
◆ URE_PATCH_REQUEST
| #define URE_PATCH_REQUEST 0x10 |
Definition at line 500 of file if_urereg.h.
◆ URE_PCUT_STATUS
| #define URE_PCUT_STATUS 0x0001 |
Definition at line 442 of file if_urereg.h.
◆ URE_PFM_PWM_SWITCH
| #define URE_PFM_PWM_SWITCH 0x0040 |
Definition at line 304 of file if_urereg.h.
◆ URE_PHASE2_EN
| #define URE_PHASE2_EN 0x0008 |
Definition at line 437 of file if_urereg.h.
◆ URE_PHY_PATCH_LOCK
| #define URE_PHY_PATCH_LOCK 0x0001 |
Definition at line 514 of file if_urereg.h.
◆ URE_PHY_STAT_EXT_INIT
| #define URE_PHY_STAT_EXT_INIT 2 |
Definition at line 472 of file if_urereg.h.
◆ URE_PHY_STAT_LAN_ON
| #define URE_PHY_STAT_LAN_ON 3 |
Definition at line 473 of file if_urereg.h.
◆ URE_PHY_STAT_MASK
| #define URE_PHY_STAT_MASK 0x0007 |
Definition at line 471 of file if_urereg.h.
◆ URE_PHY_STAT_PWRDN
| #define URE_PHY_STAT_PWRDN 5 |
Definition at line 474 of file if_urereg.h.
◆ URE_PHY_TIMEOUT
| #define URE_PHY_TIMEOUT 2000 |
Definition at line 39 of file if_urereg.h.
◆ URE_PHYAR_BUSY
| #define URE_PHYAR_BUSY 0x80000000 |
Definition at line 340 of file if_urereg.h.
◆ URE_PHYAR_PHYDATA
| #define URE_PHYAR_PHYDATA 0x0000ffff |
Definition at line 339 of file if_urereg.h.
◆ URE_PHYSTATUS_1000MBPS
| #define URE_PHYSTATUS_1000MBPS 0x0010 |
Definition at line 365 of file if_urereg.h.
◆ URE_PHYSTATUS_100MBPS
| #define URE_PHYSTATUS_100MBPS 0x0008 |
Definition at line 364 of file if_urereg.h.
◆ URE_PHYSTATUS_10MBPS
| #define URE_PHYSTATUS_10MBPS 0x0004 |
Definition at line 363 of file if_urereg.h.
◆ URE_PHYSTATUS_1250MBPS
| #define URE_PHYSTATUS_1250MBPS 0x0200 |
Definition at line 367 of file if_urereg.h.
◆ URE_PHYSTATUS_2500MBPS
| #define URE_PHYSTATUS_2500MBPS 0x0400 |
Definition at line 368 of file if_urereg.h.
◆ URE_PHYSTATUS_500MBPS
| #define URE_PHYSTATUS_500MBPS 0x0100 |
Definition at line 366 of file if_urereg.h.
◆ URE_PHYSTATUS_FDX
| #define URE_PHYSTATUS_FDX 0x0001 |
Definition at line 361 of file if_urereg.h.
◆ URE_PHYSTATUS_LINK
| #define URE_PHYSTATUS_LINK 0x0002 |
Definition at line 362 of file if_urereg.h.
◆ URE_PKT_AVAIL_SPDWN_EN
| #define URE_PKT_AVAIL_SPDWN_EN 0x0100 |
Definition at line 318 of file if_urereg.h.
◆ URE_PLA_BACKUP
| #define URE_PLA_BACKUP 0xd000 |
Definition at line 63 of file if_urereg.h.
◆ URE_PLA_BOOT_CTRL
| #define URE_PLA_BOOT_CTRL 0xe004 |
Definition at line 73 of file if_urereg.h.
◆ URE_PLA_BP_0
| #define URE_PLA_BP_0 0xfc28 |
Definition at line 102 of file if_urereg.h.
◆ URE_PLA_BP_1
| #define URE_PLA_BP_1 0xfc2a |
Definition at line 103 of file if_urereg.h.
◆ URE_PLA_BP_2
| #define URE_PLA_BP_2 0xfc2c |
Definition at line 104 of file if_urereg.h.
◆ URE_PLA_BP_3
| #define URE_PLA_BP_3 0xfc2e |
Definition at line 105 of file if_urereg.h.
◆ URE_PLA_BP_4
| #define URE_PLA_BP_4 0xfc30 |
Definition at line 106 of file if_urereg.h.
◆ URE_PLA_BP_5
| #define URE_PLA_BP_5 0xfc32 |
Definition at line 107 of file if_urereg.h.
◆ URE_PLA_BP_6
| #define URE_PLA_BP_6 0xfc34 |
Definition at line 108 of file if_urereg.h.
◆ URE_PLA_BP_7
| #define URE_PLA_BP_7 0xfc36 |
Definition at line 109 of file if_urereg.h.
◆ URE_PLA_BP_BA
| #define URE_PLA_BP_BA 0xfc26 |
Definition at line 101 of file if_urereg.h.
◆ URE_PLA_BP_EN
| #define URE_PLA_BP_EN 0xfc38 |
Definition at line 110 of file if_urereg.h.
◆ URE_PLA_CFG_WOL
| #define URE_PLA_CFG_WOL 0xc0b6 |
Definition at line 59 of file if_urereg.h.
◆ URE_PLA_CONFIG34
| #define URE_PLA_CONFIG34 0xe820 |
Definition at line 89 of file if_urereg.h.
◆ URE_PLA_CONFIG5
| #define URE_PLA_CONFIG5 0xe822 |
Definition at line 90 of file if_urereg.h.
◆ URE_PLA_CPCR
| #define URE_PLA_CPCR 0xe854 |
Definition at line 93 of file if_urereg.h.
◆ URE_PLA_CR
| #define URE_PLA_CR 0xe813 |
Definition at line 87 of file if_urereg.h.
◆ URE_PLA_CRWECR
| #define URE_PLA_CRWECR 0xe81c |
Definition at line 88 of file if_urereg.h.
◆ URE_PLA_DMY_REG0
| #define URE_PLA_DMY_REG0 0xc0b0 |
Definition at line 57 of file if_urereg.h.
◆ URE_PLA_EEE_CR
| #define URE_PLA_EEE_CR 0xe040 |
Definition at line 75 of file if_urereg.h.
◆ URE_PLA_EEEP_CR
| #define URE_PLA_EEEP_CR 0xe080 |
Definition at line 76 of file if_urereg.h.
◆ URE_PLA_EXTRA_STATUS
| #define URE_PLA_EXTRA_STATUS 0xd398 |
Definition at line 69 of file if_urereg.h.
◆ URE_PLA_FMC
| #define URE_PLA_FMC 0xc0b4 |
Definition at line 58 of file if_urereg.h.
◆ URE_PLA_GPHY_INTR_IMR
| #define URE_PLA_GPHY_INTR_IMR 0xe022 |
Definition at line 74 of file if_urereg.h.
◆ URE_PLA_IDR
| #define URE_PLA_IDR 0xc000 |
Definition at line 51 of file if_urereg.h.
◆ URE_PLA_INDICATE_FALG
| #define URE_PLA_INDICATE_FALG 0xd38c |
Definition at line 68 of file if_urereg.h.
◆ URE_PLA_LED_FEATURE
| #define URE_PLA_LED_FEATURE 0xdd92 |
Definition at line 71 of file if_urereg.h.
◆ URE_PLA_LEDSEL
| #define URE_PLA_LEDSEL 0xdd90 |
Definition at line 70 of file if_urereg.h.
◆ URE_PLA_MAC_PWR_CTRL
| #define URE_PLA_MAC_PWR_CTRL 0xe0c0 |
Definition at line 77 of file if_urereg.h.
◆ URE_PLA_MAC_PWR_CTRL2
| #define URE_PLA_MAC_PWR_CTRL2 0xe0ca |
Definition at line 78 of file if_urereg.h.
◆ URE_PLA_MAC_PWR_CTRL3
| #define URE_PLA_MAC_PWR_CTRL3 0xe0cc |
Definition at line 79 of file if_urereg.h.
◆ URE_PLA_MAC_PWR_CTRL4
| #define URE_PLA_MAC_PWR_CTRL4 0xe0ce |
Definition at line 80 of file if_urereg.h.
◆ URE_PLA_MAR0
| #define URE_PLA_MAR0 0xcd00 |
Definition at line 61 of file if_urereg.h.
◆ URE_PLA_MAR4
| #define URE_PLA_MAR4 0xcd04 |
Definition at line 62 of file if_urereg.h.
◆ URE_PLA_MCU_SPDWN_EN
| #define URE_PLA_MCU_SPDWN_EN 0x4000 |
Definition at line 317 of file if_urereg.h.
◆ URE_PLA_MISC_0
| #define URE_PLA_MISC_0 0xe858 |
Definition at line 94 of file if_urereg.h.
◆ URE_PLA_MISC_1
| #define URE_PLA_MISC_1 0xe85a |
Definition at line 95 of file if_urereg.h.
◆ URE_PLA_MTPS
| #define URE_PLA_MTPS 0xe615 |
Definition at line 84 of file if_urereg.h.
◆ URE_PLA_OCP_GPHY_BASE
| #define URE_PLA_OCP_GPHY_BASE 0xe86c |
Definition at line 96 of file if_urereg.h.
◆ URE_PLA_OOB_CTRL
| #define URE_PLA_OOB_CTRL 0xe84f |
Definition at line 92 of file if_urereg.h.
◆ URE_PLA_PHY_PWR
| #define URE_PLA_PHY_PWR 0xe84c |
Definition at line 91 of file if_urereg.h.
◆ URE_PLA_PHYAR
| #define URE_PLA_PHYAR 0xde00 |
Definition at line 72 of file if_urereg.h.
◆ URE_PLA_PHYSTATUS
| #define URE_PLA_PHYSTATUS 0xe908 |
Definition at line 99 of file if_urereg.h.
◆ URE_PLA_RCR
| #define URE_PLA_RCR 0xc010 |
Definition at line 52 of file if_urereg.h.
◆ URE_PLA_REALWOW_TIMER
| #define URE_PLA_REALWOW_TIMER 0xd2e8 |
Definition at line 66 of file if_urereg.h.
◆ URE_PLA_RMS
| #define URE_PLA_RMS 0xc016 |
Definition at line 53 of file if_urereg.h.
◆ URE_PLA_RSTTALLY
| #define URE_PLA_RSTTALLY 0xe800 |
Definition at line 86 of file if_urereg.h.
◆ URE_PLA_RXFIFO_CTRL0
| #define URE_PLA_RXFIFO_CTRL0 0xc0a0 |
Definition at line 54 of file if_urereg.h.
◆ URE_PLA_RXFIFO_CTRL1
| #define URE_PLA_RXFIFO_CTRL1 0xc0a4 |
Definition at line 55 of file if_urereg.h.
◆ URE_PLA_RXFIFO_CTRL2
| #define URE_PLA_RXFIFO_CTRL2 0xc0a8 |
Definition at line 56 of file if_urereg.h.
◆ URE_PLA_SFF_STS_7
| #define URE_PLA_SFF_STS_7 0xe8de |
Definition at line 98 of file if_urereg.h.
◆ URE_PLA_SUSPEND_FLAG
| #define URE_PLA_SUSPEND_FLAG 0xd38a |
Definition at line 67 of file if_urereg.h.
◆ URE_PLA_TCR0
| #define URE_PLA_TCR0 0xe610 |
Definition at line 82 of file if_urereg.h.
◆ URE_PLA_TCR1
| #define URE_PLA_TCR1 0xe612 |
Definition at line 83 of file if_urereg.h.
◆ URE_PLA_TELLYCNT
| #define URE_PLA_TELLYCNT 0xe890 |
Definition at line 97 of file if_urereg.h.
◆ URE_PLA_TEREDO_CFG
| #define URE_PLA_TEREDO_CFG 0xc0bc |
Definition at line 60 of file if_urereg.h.
◆ URE_PLA_TEREDO_TIMER
| #define URE_PLA_TEREDO_TIMER 0xd2cc |
Definition at line 65 of file if_urereg.h.
◆ URE_PLA_TXFIFO_CTRL
| #define URE_PLA_TXFIFO_CTRL 0xe618 |
Definition at line 85 of file if_urereg.h.
◆ URE_PLA_WDT6_CTRL
| #define URE_PLA_WDT6_CTRL 0xe428 |
Definition at line 81 of file if_urereg.h.
◆ URE_POLL_LINK_CHG
| #define URE_POLL_LINK_CHG 0x0001 |
Definition at line 356 of file if_urereg.h.
◆ URE_POWER_CUT
| #define URE_POWER_CUT 0x0100 |
Definition at line 417 of file if_urereg.h.
◆ URE_PWD_DN_SCALE
| #define URE_PWD_DN_SCALE | ( | x | ) | ((x) << 1) |
Definition at line 376 of file if_urereg.h.
◆ URE_PWD_DN_SCALE_MASK
| #define URE_PWD_DN_SCALE_MASK 0x3ffe |
Definition at line 375 of file if_urereg.h.
◆ URE_PWR_EN
| #define URE_PWR_EN 0x0001 |
Definition at line 436 of file if_urereg.h.
◆ URE_PWRSAVE_SPDWN_EN
| #define URE_PWRSAVE_SPDWN_EN 0x1000 |
Definition at line 324 of file if_urereg.h.
◆ URE_RCR_AAP
| #define URE_RCR_AAP 0x00000001 |
Definition at line 199 of file if_urereg.h.
◆ URE_RCR_AB
| #define URE_RCR_AB 0x00000008 |
Definition at line 202 of file if_urereg.h.
◆ URE_RCR_ACPT_ALL
| #define URE_RCR_ACPT_ALL (URE_RCR_AAP | URE_RCR_APM | URE_RCR_AM | URE_RCR_AB) |
Definition at line 207 of file if_urereg.h.
◆ URE_RCR_ACPTFLOW
| #define URE_RCR_ACPTFLOW 0x00000080 |
Definition at line 205 of file if_urereg.h.
◆ URE_RCR_AER
| #define URE_RCR_AER 0x00000020 /* error pkts */ |
Definition at line 204 of file if_urereg.h.
◆ URE_RCR_AM
| #define URE_RCR_AM 0x00000004 |
Definition at line 201 of file if_urereg.h.
◆ URE_RCR_APM
| #define URE_RCR_APM 0x00000002 |
Definition at line 200 of file if_urereg.h.
◆ URE_RCR_AR
| #define URE_RCR_AR 0x00000010 /* runt */ |
Definition at line 203 of file if_urereg.h.
◆ URE_RCR_RXEMPTY
| #define URE_RCR_RXEMPTY 0x00020000 |
Definition at line 206 of file if_urereg.h.
◆ URE_RE_INIT_LL
| #define URE_RE_INIT_LL 0x8000 |
Definition at line 277 of file if_urereg.h.
◆ URE_RESUME_INDICATE
| #define URE_RESUME_INDICATE 0x0001 |
Definition at line 420 of file if_urereg.h.
◆ URE_ROK_EXIT_LPM
| #define URE_ROK_EXIT_LPM 0x02 |
Definition at line 457 of file if_urereg.h.
◆ URE_RX_AGG_DISABLE
| #define URE_RX_AGG_DISABLE 0x0010 |
Definition at line 429 of file if_urereg.h.
◆ URE_RX_THR_B
| #define URE_RX_THR_B 0x00010001 |
Definition at line 399 of file if_urereg.h.
◆ URE_RX_THR_HIGH
| #define URE_RX_THR_HIGH 0x7a120180 |
Definition at line 397 of file if_urereg.h.
◆ URE_RX_THR_SLOW
| #define URE_RX_THR_SLOW 0xffff0180 |
Definition at line 398 of file if_urereg.h.
◆ URE_RX_THR_SUPER
| #define URE_RX_THR_SUPER 0x0c350180 |
Definition at line 396 of file if_urereg.h.
◆ URE_RX_ZERO_EN
| #define URE_RX_ZERO_EN 0x0080 |
Definition at line 430 of file if_urereg.h.
◆ URE_RXDV_SPDWN_EN
| #define URE_RXDV_SPDWN_EN 0x0800 |
Definition at line 325 of file if_urereg.h.
◆ URE_RXDY_GATED_EN
| #define URE_RXDY_GATED_EN 0x0008 |
Definition at line 274 of file if_urereg.h.
◆ URE_RXFIFO_EMPTY
| #define URE_RXFIFO_EMPTY 0x10 |
Definition at line 268 of file if_urereg.h.
◆ URE_RXFIFO_THR1_NORMAL
| #define URE_RXFIFO_THR1_NORMAL 0x00080002 |
Definition at line 211 of file if_urereg.h.
◆ URE_RXFIFO_THR1_OOB
| #define URE_RXFIFO_THR1_OOB 0x01800003 |
Definition at line 212 of file if_urereg.h.
◆ URE_RXFIFO_THR2_FULL
| #define URE_RXFIFO_THR2_FULL 0x00000060 |
Definition at line 215 of file if_urereg.h.
◆ URE_RXFIFO_THR2_HIGH
| #define URE_RXFIFO_THR2_HIGH 0x00000038 |
Definition at line 216 of file if_urereg.h.
◆ URE_RXFIFO_THR2_NORMAL
| #define URE_RXFIFO_THR2_NORMAL 0x00a0 |
Definition at line 218 of file if_urereg.h.
◆ URE_RXFIFO_THR2_OOB
| #define URE_RXFIFO_THR2_OOB 0x0000004a |
Definition at line 217 of file if_urereg.h.
◆ URE_RXFIFO_THR3_FULL
| #define URE_RXFIFO_THR3_FULL 0x00000078 |
Definition at line 221 of file if_urereg.h.
◆ URE_RXFIFO_THR3_HIGH
| #define URE_RXFIFO_THR3_HIGH 0x00000048 |
Definition at line 222 of file if_urereg.h.
◆ URE_RXFIFO_THR3_NORMAL
| #define URE_RXFIFO_THR3_NORMAL 0x0110 |
Definition at line 224 of file if_urereg.h.
◆ URE_RXFIFO_THR3_OOB
| #define URE_RXFIFO_THR3_OOB 0x0000005a |
Definition at line 223 of file if_urereg.h.
◆ URE_RXPKT_ALIGN
| #define URE_RXPKT_ALIGN 8 |
Definition at line 534 of file if_urereg.h.
◆ URE_RXPKT_IP_F
| #define URE_RXPKT_IP_F (1 << 23) |
Definition at line 549 of file if_urereg.h.
◆ URE_RXPKT_IPV4_CS
| #define URE_RXPKT_IPV4_CS (1 << 19) |
Definition at line 542 of file if_urereg.h.
◆ URE_RXPKT_IPV6_CS
| #define URE_RXPKT_IPV6_CS (1 << 20) |
Definition at line 543 of file if_urereg.h.
◆ URE_RXPKT_LEN_MASK
| #define URE_RXPKT_LEN_MASK 0x7fff |
Definition at line 537 of file if_urereg.h.
◆ URE_RXPKT_RX_VLAN_TAG
| #define URE_RXPKT_RX_VLAN_TAG (1 << 16) |
Definition at line 541 of file if_urereg.h.
◆ URE_RXPKT_TCP_CS
| #define URE_RXPKT_TCP_CS (1 << 22) |
Definition at line 544 of file if_urereg.h.
◆ URE_RXPKT_TCP_F
| #define URE_RXPKT_TCP_F (1 << 21) |
Definition at line 547 of file if_urereg.h.
◆ URE_RXPKT_UDP_CS
| #define URE_RXPKT_UDP_CS (1 << 23) |
Definition at line 545 of file if_urereg.h.
◆ URE_RXPKT_UDP_F
| #define URE_RXPKT_UDP_F (1 << 22) |
Definition at line 548 of file if_urereg.h.
◆ URE_RXPKT_VLAN_MASK
| #define URE_RXPKT_VLAN_MASK 0xffff |
Definition at line 540 of file if_urereg.h.
◆ URE_SEL_RXIDLE
| #define URE_SEL_RXIDLE 0x0100 |
Definition at line 462 of file if_urereg.h.
◆ URE_SEN_VAL_MASK
| #define URE_SEN_VAL_MASK 0xf800 |
Definition at line 460 of file if_urereg.h.
◆ URE_SEN_VAL_NORMAL
| #define URE_SEN_VAL_NORMAL 0xa000 |
Definition at line 461 of file if_urereg.h.
◆ URE_SPDWN_LINKCHG_MSK
| #define URE_SPDWN_LINKCHG_MSK 0x0008 |
Definition at line 336 of file if_urereg.h.
◆ URE_SPDWN_RXDV_MSK
| #define URE_SPDWN_RXDV_MSK 0x0004 |
Definition at line 335 of file if_urereg.h.
◆ URE_SPEED_DOWN_MSK
| #define URE_SPEED_DOWN_MSK 0x0002 |
Definition at line 334 of file if_urereg.h.
◆ URE_SRAM_10M_AMP1
| #define URE_SRAM_10M_AMP1 0x8080 |
Definition at line 193 of file if_urereg.h.
◆ URE_SRAM_10M_AMP2
| #define URE_SRAM_10M_AMP2 0x8082 |
Definition at line 194 of file if_urereg.h.
◆ URE_SRAM_GPHY_FW_VER
| #define URE_SRAM_GPHY_FW_VER 0x801e |
Definition at line 192 of file if_urereg.h.
◆ URE_SRAM_GREEN_CFG
| #define URE_SRAM_GREEN_CFG 0x8011 |
Definition at line 190 of file if_urereg.h.
◆ URE_SRAM_IMPEDANCE
| #define URE_SRAM_IMPEDANCE 0x8084 |
Definition at line 195 of file if_urereg.h.
◆ URE_SRAM_LPF_CFG
| #define URE_SRAM_LPF_CFG 0x8012 |
Definition at line 191 of file if_urereg.h.
◆ URE_SRAM_PHY_LOCK
| #define URE_SRAM_PHY_LOCK 0xb82e |
Definition at line 196 of file if_urereg.h.
◆ URE_STAT_SPEED_FULL
| #define URE_STAT_SPEED_FULL 0x0001 |
Definition at line 387 of file if_urereg.h.
◆ URE_STAT_SPEED_HIGH
| #define URE_STAT_SPEED_HIGH 0x0000 |
Definition at line 386 of file if_urereg.h.
◆ URE_STAT_SPEED_MASK
| #define URE_STAT_SPEED_MASK 0x0006 |
Definition at line 385 of file if_urereg.h.
◆ URE_SUSPEND_SPDWN_EN
| #define URE_SUSPEND_SPDWN_EN 0x0004 |
Definition at line 319 of file if_urereg.h.
◆ URE_TALLY_RESET
| #define URE_TALLY_RESET 0x0001 |
Definition at line 254 of file if_urereg.h.
◆ URE_TCR0_AUTO_FIFO
| #define URE_TCR0_AUTO_FIFO 0x0080 |
Definition at line 244 of file if_urereg.h.
◆ URE_TCR0_TX_EMPTY
| #define URE_TCR0_TX_EMPTY 0x0800 |
Definition at line 243 of file if_urereg.h.
◆ URE_TEREDO_RS_EVENT_MASK
| #define URE_TEREDO_RS_EVENT_MASK 0x00fe |
Definition at line 286 of file if_urereg.h.
◆ URE_TEREDO_SEL
| #define URE_TEREDO_SEL 0x8000 |
Definition at line 284 of file if_urereg.h.
◆ URE_TEREDO_WAKE_MASK
| #define URE_TEREDO_WAKE_MASK 0x7f00 |
Definition at line 285 of file if_urereg.h.
◆ URE_TEST_MODE_DISABLE
| #define URE_TEST_MODE_DISABLE 0x00000001 |
Definition at line 402 of file if_urereg.h.
◆ URE_TIMEOUT
| #define URE_TIMEOUT 1000 |
Definition at line 38 of file if_urereg.h.
◆ URE_TIMER11_EN
| #define URE_TIMER11_EN 0x0001 |
Definition at line 450 of file if_urereg.h.
◆ URE_TKPKT_TX_FS
| #define URE_TKPKT_TX_FS (1 << 31) |
Definition at line 558 of file if_urereg.h.
◆ URE_TKPKT_TX_LS
| #define URE_TKPKT_TX_LS (1 << 30) |
Definition at line 559 of file if_urereg.h.
◆ URE_TP1000_SPDWN_EN
| #define URE_TP1000_SPDWN_EN 0x0008 |
Definition at line 329 of file if_urereg.h.
◆ URE_TP100_SPDWN_EN
| #define URE_TP100_SPDWN_EN 0x0020 |
Definition at line 327 of file if_urereg.h.
◆ URE_TP500_SPDWN_EN
| #define URE_TP500_SPDWN_EN 0x0010 |
Definition at line 328 of file if_urereg.h.
◆ URE_TX10MIDLE_EN
| #define URE_TX10MIDLE_EN 0x0100 |
Definition at line 326 of file if_urereg.h.
◆ URE_TX_10M_IDLE_EN
| #define URE_TX_10M_IDLE_EN 0x0080 |
Definition at line 303 of file if_urereg.h.
◆ URE_TX_AGG_MAX_THRESHOLD
| #define URE_TX_AGG_MAX_THRESHOLD 0x03 |
Definition at line 393 of file if_urereg.h.
◆ URE_TX_BUFSZ
| #define URE_TX_BUFSZ 16384 |
Definition at line 576 of file if_urereg.h.
◆ URE_TX_SIZE_ADJUST1
| #define URE_TX_SIZE_ADJUST1 0x00000100 |
Definition at line 403 of file if_urereg.h.
◆ URE_TXDIS_STATE
| #define URE_TXDIS_STATE 0x01 |
Definition at line 493 of file if_urereg.h.
◆ URE_TXFIFO_EMPTY
| #define URE_TXFIFO_EMPTY 0x20 |
Definition at line 267 of file if_urereg.h.
◆ URE_TXFIFO_THR_NORMAL
| #define URE_TXFIFO_THR_NORMAL 0x00400008 |
Definition at line 227 of file if_urereg.h.
◆ URE_TXFIFO_THR_NORMAL2
| #define URE_TXFIFO_THR_NORMAL2 0x01000008 |
Definition at line 228 of file if_urereg.h.
◆ URE_TXPKT_ALIGN
| #define URE_TXPKT_ALIGN 4 |
Definition at line 555 of file if_urereg.h.
◆ URE_TXPKT_IPV4_CS
| #define URE_TXPKT_IPV4_CS (1 << 29) |
Definition at line 567 of file if_urereg.h.
◆ URE_TXPKT_IPV6_CS
| #define URE_TXPKT_IPV6_CS (1 << 28) |
Definition at line 566 of file if_urereg.h.
◆ URE_TXPKT_LEN_MASK
| #define URE_TXPKT_LEN_MASK 0xffff |
Definition at line 560 of file if_urereg.h.
◆ URE_TXPKT_TCP_CS
| #define URE_TXPKT_TCP_CS (1 << 30) |
Definition at line 568 of file if_urereg.h.
◆ URE_TXPKT_UDP_CS
| #define URE_TXPKT_UDP_CS (1 << 31) |
Definition at line 569 of file if_urereg.h.
◆ URE_TXPKT_VLAN
| #define URE_TXPKT_VLAN (1 << 16) |
Definition at line 565 of file if_urereg.h.
◆ URE_TXPKT_VLAN_MASK
| #define URE_TXPKT_VLAN_MASK 0xffff |
Definition at line 564 of file if_urereg.h.
◆ URE_U1U2_SPDWN_EN
| #define URE_U1U2_SPDWN_EN 0x0002 |
Definition at line 320 of file if_urereg.h.
◆ URE_U2P3_ENABLE
| #define URE_U2P3_ENABLE 0x0001 |
Definition at line 433 of file if_urereg.h.
◆ URE_UNLOCK
| #define URE_UNLOCK | ( | _sc | ) | mtx_unlock(&(_sc)->sc_mtx) |
Definition at line 619 of file if_urereg.h.
◆ URE_UPCOMING_RUNTIME_D3
| #define URE_UPCOMING_RUNTIME_D3 0x01 |
Definition at line 353 of file if_urereg.h.
◆ URE_UPS_EN
| #define URE_UPS_EN 0x0010 |
Definition at line 438 of file if_urereg.h.
◆ URE_USB2PHY_L1
| #define URE_USB2PHY_L1 0x0002 |
Definition at line 372 of file if_urereg.h.
◆ URE_USB2PHY_SUSPEND
| #define URE_USB2PHY_SUSPEND 0x0001 |
Definition at line 371 of file if_urereg.h.
◆ URE_USB_AFE_CTRL2
| #define URE_USB_AFE_CTRL2 0xd824 |
Definition at line 143 of file if_urereg.h.
◆ URE_USB_BMU_RESET
| #define URE_USB_BMU_RESET 0xd4b0 |
Definition at line 138 of file if_urereg.h.
◆ URE_USB_BP2_EN
| #define URE_USB_BP2_EN 0xfc48 |
Definition at line 163 of file if_urereg.h.
◆ URE_USB_BP_0
| #define URE_USB_BP_0 URE_PLA_BP_0 |
Definition at line 146 of file if_urereg.h.
◆ URE_USB_BP_1
| #define URE_USB_BP_1 URE_PLA_BP_1 |
Definition at line 147 of file if_urereg.h.
◆ URE_USB_BP_10
| #define URE_USB_BP_10 0xfc3c |
Definition at line 157 of file if_urereg.h.
◆ URE_USB_BP_11
| #define URE_USB_BP_11 0xfc3e |
Definition at line 158 of file if_urereg.h.
◆ URE_USB_BP_12
| #define URE_USB_BP_12 0xfc40 |
Definition at line 159 of file if_urereg.h.
◆ URE_USB_BP_13
| #define URE_USB_BP_13 0xfc42 |
Definition at line 160 of file if_urereg.h.
◆ URE_USB_BP_14
| #define URE_USB_BP_14 0xfc44 |
Definition at line 161 of file if_urereg.h.
◆ URE_USB_BP_15
| #define URE_USB_BP_15 0xfc46 |
Definition at line 162 of file if_urereg.h.
◆ URE_USB_BP_2
| #define URE_USB_BP_2 URE_PLA_BP_2 |
Definition at line 148 of file if_urereg.h.
◆ URE_USB_BP_3
| #define URE_USB_BP_3 URE_PLA_BP_3 |
Definition at line 149 of file if_urereg.h.
◆ URE_USB_BP_4
| #define URE_USB_BP_4 URE_PLA_BP_4 |
Definition at line 150 of file if_urereg.h.
◆ URE_USB_BP_5
| #define URE_USB_BP_5 URE_PLA_BP_5 |
Definition at line 151 of file if_urereg.h.
◆ URE_USB_BP_6
| #define URE_USB_BP_6 URE_PLA_BP_6 |
Definition at line 152 of file if_urereg.h.
◆ URE_USB_BP_7
| #define URE_USB_BP_7 URE_PLA_BP_7 |
Definition at line 153 of file if_urereg.h.
◆ URE_USB_BP_8
| #define URE_USB_BP_8 0xfc38 /* RTL8153B */ |
Definition at line 155 of file if_urereg.h.
◆ URE_USB_BP_9
| #define URE_USB_BP_9 0xfc3a |
Definition at line 156 of file if_urereg.h.
◆ URE_USB_BP_BA
| #define URE_USB_BP_BA URE_PLA_BP_BA |
Definition at line 145 of file if_urereg.h.
◆ URE_USB_BP_EN
| #define URE_USB_BP_EN URE_PLA_BP_EN /* RTL8153A */ |
Definition at line 154 of file if_urereg.h.
◆ URE_USB_BURST_SIZE
| #define URE_USB_BURST_SIZE 0xcfc0 |
Definition at line 120 of file if_urereg.h.
◆ URE_USB_CONNECT_TIMER
| #define URE_USB_CONNECT_TIMER 0xcbf8 |
Definition at line 118 of file if_urereg.h.
◆ URE_USB_CSR_DUMMY1
| #define URE_USB_CSR_DUMMY1 0xb464 |
Definition at line 115 of file if_urereg.h.
◆ URE_USB_CSR_DUMMY2
| #define URE_USB_CSR_DUMMY2 0xb466 |
Definition at line 116 of file if_urereg.h.
◆ URE_USB_DEV_STAT
| #define URE_USB_DEV_STAT 0xb808 |
Definition at line 117 of file if_urereg.h.
◆ URE_USB_FC_TIMER
| #define URE_USB_FC_TIMER 0xd340 |
Definition at line 135 of file if_urereg.h.
◆ URE_USB_FW_CTRL
| #define URE_USB_FW_CTRL 0xd334 /* RTL8153B */ |
Definition at line 122 of file if_urereg.h.
◆ URE_USB_FW_TASK
| #define URE_USB_FW_TASK 0xd4e8 /* RTL8153B */ |
Definition at line 127 of file if_urereg.h.
◆ URE_USB_LPM_CONFIG
| #define URE_USB_LPM_CONFIG 0xcfd8 |
Definition at line 121 of file if_urereg.h.
◆ URE_USB_LPM_CTRL
| #define URE_USB_LPM_CTRL 0xd41a |
Definition at line 137 of file if_urereg.h.
◆ URE_USB_MISC_0
| #define URE_USB_MISC_0 0xd81a |
Definition at line 142 of file if_urereg.h.
◆ URE_USB_MSC_TIMER
| #define URE_USB_MSC_TIMER 0xcbfc |
Definition at line 119 of file if_urereg.h.
◆ URE_USB_PHY_CTRL
| #define URE_USB_PHY_CTRL 0xd408 |
Definition at line 124 of file if_urereg.h.
◆ URE_USB_PM_CTRL_STATUS
| #define URE_USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */ |
Definition at line 131 of file if_urereg.h.
◆ URE_USB_POWER_CUT
| #define URE_USB_POWER_CUT 0xd80a |
Definition at line 141 of file if_urereg.h.
◆ URE_USB_RX_BUF_TH
| #define URE_USB_RX_BUF_TH 0xd40c |
Definition at line 126 of file if_urereg.h.
◆ URE_USB_RX_EARLY_AGG
| #define URE_USB_RX_EARLY_AGG 0xd42c |
Definition at line 129 of file if_urereg.h.
◆ URE_USB_RX_EARLY_SIZE
| #define URE_USB_RX_EARLY_SIZE 0xd42e |
Definition at line 130 of file if_urereg.h.
◆ URE_USB_RX_EXTRA_AGG_TMR
| #define URE_USB_RX_EXTRA_AGG_TMR 0xd432 /* RTL8153B */ |
Definition at line 132 of file if_urereg.h.
◆ URE_USB_SSPHYLINK2
| #define URE_USB_SSPHYLINK2 0xb428 |
Definition at line 113 of file if_urereg.h.
◆ URE_USB_TOLERANCE
| #define URE_USB_TOLERANCE 0xd490 |
Definition at line 136 of file if_urereg.h.
◆ URE_USB_TX_AGG
| #define URE_USB_TX_AGG 0xd40a |
Definition at line 125 of file if_urereg.h.
◆ URE_USB_TX_DMA
| #define URE_USB_TX_DMA 0xd434 |
Definition at line 133 of file if_urereg.h.
◆ URE_USB_U1U2_TIMER
| #define URE_USB_U1U2_TIMER 0xd4da |
Definition at line 139 of file if_urereg.h.
◆ URE_USB_U2P3_CTRL
| #define URE_USB_U2P3_CTRL 0xb460 |
Definition at line 114 of file if_urereg.h.
◆ URE_USB_UPS_CTRL
| #define URE_USB_UPS_CTRL 0xd800 |
Definition at line 140 of file if_urereg.h.
◆ URE_USB_UPT_RXDMA_OWN
| #define URE_USB_UPT_RXDMA_OWN 0xd437 |
Definition at line 134 of file if_urereg.h.
◆ URE_USB_USB2PHY
| #define URE_USB_USB2PHY 0xb41e |
Definition at line 112 of file if_urereg.h.
◆ URE_USB_USB_CTRL
| #define URE_USB_USB_CTRL 0xd406 |
Definition at line 123 of file if_urereg.h.
◆ URE_USB_USB_TIMER
| #define URE_USB_USB_TIMER 0xd428 |
Definition at line 128 of file if_urereg.h.
◆ URE_USB_WDT11_CTRL
| #define URE_USB_WDT11_CTRL 0xe43c |
Definition at line 144 of file if_urereg.h.
◆ URE_USP_PREWAKE
| #define URE_USP_PREWAKE 0x0020 |
Definition at line 439 of file if_urereg.h.
◆ URE_VERSION_MASK
| #define URE_VERSION_MASK 0x7cf0 |
Definition at line 247 of file if_urereg.h.
◆ URE_WDT6_SET_MODE
| #define URE_WDT6_SET_MODE 0x0010 |
Definition at line 240 of file if_urereg.h.
