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Data Structures
struct	uath_fwblock

struct	uath_cmd_hdr

struct	uath_chunk

struct	uath_rx_desc

struct	uath_tx_desc

struct	uath_cmd_host_available

struct	uath_cmd_bind

struct	uath_cmd_reset

struct	uath_read_mac

struct	uath_write_mac

struct	uath_cmd_join_bss

struct	uath_cmd_assoc_bss

struct	uath_cmd_start_bss

struct	uath_cmd_0c

struct	uath_cmd_ledsteady

struct	uath_cmd_ledblink

struct	uath_cmd_ledstate

struct	uath_connkey_rec

struct	uath_cmd_crypto

struct	uath_cmd_rateset

struct	uath_cmd_rates

struct	uath_cmd_connection_attr

struct	uath_cmd_create_connection

struct	uath_cmd_txq_setparams

struct	uath_cmd_txq_attr

struct	uath_cmd_txq_setup

struct	uath_cmd_stoptxdma

struct	uath_cmd_31

struct	uath_cmd_rx_filter

struct	uath_cmd_rx_mcast_filter

struct	uath_cmd_set_associd

struct	uath_cmd_set_stabeacon_timers

struct	uath_cmd_update_bss_attribute

struct	uath_cmd_update_bss_attribute_key

Macros
#define	UATH_CONFIG_INDEX 0

#define	UATH_IFACE_INDEX 0

#define	UATH_WRITE_BLOCK (1 << 4)

#define	UATH_MAX_FWBLOCK_SIZE 2048

#define	UATH_MAX_CMDSZ 512

#define	WDCMSG_HOST_AVAILABLE 0x01

#define	WDCMSG_BIND 0x02

#define	WDCMSG_TARGET_RESET 0x03

#define	WDCMSG_TARGET_GET_CAPABILITY 0x04

#define	WDCMSG_TARGET_SET_CONFIG 0x05

#define	WDCMSG_TARGET_GET_STATUS 0x06

#define	WDCMSG_TARGET_GET_STATS 0x07

#define	WDCMSG_TARGET_START 0x08

#define	WDCMSG_TARGET_STOP 0x09

#define	WDCMSG_TARGET_ENABLE 0x0a

#define	WDCMSG_TARGET_DISABLE 0x0b

#define	WDCMSG_CREATE_CONNECTION 0x0c

#define	WDCMSG_UPDATE_CONNECT_ATTR 0x0d

#define	WDCMSG_DELETE_CONNECT 0x0e

#define	WDCMSG_SEND 0x0f

#define	WDCMSG_FLUSH 0x10

#define	WDCMSG_STATS_UPDATE 0x11

#define	WDCMSG_BMISS 0x12

#define	WDCMSG_DEVICE_AVAIL 0x13

#define	WDCMSG_SEND_COMPLETE 0x14

#define	WDCMSG_DATA_AVAIL 0x15

#define	WDCMSG_SET_PWR_MODE 0x16

#define	WDCMSG_BMISS_ACK 0x17

#define	WDCMSG_SET_LED_STEADY 0x18

#define	WDCMSG_SET_LED_BLINK 0x19

#define	WDCMSG_SETUP_BEACON_DESC 0x1a

#define	WDCMSG_BEACON_INIT 0x1b

#define	WDCMSG_RESET_KEY_CACHE 0x1c

#define	WDCMSG_RESET_KEY_CACHE_ENTRY 0x1d

#define	WDCMSG_SET_KEY_CACHE_ENTRY 0x1e

#define	WDCMSG_SET_DECOMP_MASK 0x1f

#define	WDCMSG_SET_REGULATORY_DOMAIN 0x20

#define	WDCMSG_SET_LED_STATE 0x21

#define	WDCMSG_WRITE_ASSOCID 0x22

#define	WDCMSG_SET_STA_BEACON_TIMERS 0x23

#define	WDCMSG_GET_TSF 0x24

#define	WDCMSG_RESET_TSF 0x25

#define	WDCMSG_SET_ADHOC_MODE 0x26

#define	WDCMSG_SET_BASIC_RATE 0x27

#define	WDCMSG_MIB_CONTROL 0x28

#define	WDCMSG_GET_CHANNEL_DATA 0x29

#define	WDCMSG_GET_CUR_RSSI 0x2a

#define	WDCMSG_SET_ANTENNA_SWITCH 0x2b

#define	WDCMSG_USE_SHORT_SLOT_TIME 0x2f

#define	WDCMSG_SET_POWER_MODE 0x30

#define	WDCMSG_SETUP_PSPOLL_DESC 0x31

#define	WDCMSG_SET_RX_MULTICAST_FILTER 0x32

#define	WDCMSG_RX_FILTER 0x33

#define	WDCMSG_PER_CALIBRATION 0x34

#define	WDCMSG_RESET 0x35

#define	WDCMSG_DISABLE 0x36

#define	WDCMSG_PHY_DISABLE 0x37

#define	WDCMSG_SET_TX_POWER_LIMIT 0x38

#define	WDCMSG_SET_TX_QUEUE_PARAMS 0x39

#define	WDCMSG_SETUP_TX_QUEUE 0x3a

#define	WDCMSG_RELEASE_TX_QUEUE 0x3b

#define	WDCMSG_SET_DEFAULT_KEY 0x43

#define	UATH_CFLAGS_FINAL 0x01 /* final chunk of a msg */

#define	UATH_CFLAGS_RXMSG 0x02 /* chunk contains rx completion */

#define	UATH_CFLAGS_DEBUG 0x04 /* for debugging */

#define	UATH_RX_DUMMYSIZE 4

#define	UATH_STATUS_OK 0

#define	UATH_STATUS_STOP_IN_PROGRESS 1

#define	UATH_STATUS_CRC_ERR 2

#define	UATH_STATUS_PHY_ERR 3

#define	UATH_STATUS_DECRYPT_CRC_ERR 4

#define	UATH_STATUS_DECRYPT_MIC_ERR 5

#define	UATH_STATUS_DECOMP_ERR 6

#define	UATH_STATUS_KEY_ERR 7

#define	UATH_STATUS_ERR 8

#define	UATH_TXQID_MASK 0x0f

#define	UATH_TXQID_MINRATE 0x10 /* use min tx rate */

#define	UATH_TXQID_FF 0x20 /* content is fast frame */

#define	UATH_ID_INVALID 0xffffffff /* for sending prior to connection */

#define	UATH_TX_NOTIFY (1 << 24) /* f/w will send a UATH_NOTIF_TX */

#define	ATH_SW_VER_MAJOR 1

#define	ATH_SW_VER_MINOR 5

#define	ATH_SW_VER_PATCH 0

#define	ATH_SW_VER_BUILD 9999

#define	UATH_CHAN_TURBO 0x0100

#define	UATH_CHAN_CCK 0x0200

#define	UATH_CHAN_OFDM 0x0400

#define	UATH_CHAN_2GHZ 0x1000

#define	UATH_CHAN_5GHZ 0x2000

#define	UATH_LED_LINK 0

#define	UATH_LED_ACTIVITY 1

#define	UATH_LED_OFF 0

#define	UATH_LED_ON 1

#define	UATH_DEFAULT_KEY 6

#define	UATH_MAX_NRATES 32

#define	UATH_FILTER_RX_UCAST 0x00000001

#define	UATH_FILTER_RX_MCAST 0x00000002

#define	UATH_FILTER_RX_BCAST 0x00000004

#define	UATH_FILTER_RX_CONTROL 0x00000008

#define	UATH_FILTER_RX_BEACON 0x00000010 /* beacon frames */

#define	UATH_FILTER_RX_PROM 0x00000020 /* promiscuous mode */

#define	UATH_FILTER_RX_PHY_ERR 0x00000040 /* phy errors */

#define	UATH_FILTER_RX_PHY_RADAR 0x00000080 /* radar phy errors */

#define	UATH_FILTER_RX_XR_POOL 0x00000400 /* XR group polls */

#define	UATH_FILTER_RX_PROBE_REQ 0x00000800

#define	UATH_FILTER_OP_INIT 0x0

#define	UATH_FILTER_OP_SET 0x1

#define	UATH_FILTER_OP_CLEAR 0x2

#define	UATH_FILTER_OP_TEMP 0x3

#define	UATH_FILTER_OP_RESTORE 0x4

#define	UATH_MAX_TXBUFSZ

#define	UATH_MIN_RXBUFSZ (sizeof(struct uath_chunk))

Enumerations
enum	{ WLAN_MODE_NONE = 0 , WLAN_MODE_11b , WLAN_MODE_11a , WLAN_MODE_11g , WLAN_MODE_11a_TURBO , WLAN_MODE_11g_TURBO , WLAN_MODE_11a_TURBO_PRIME , WLAN_MODE_11g_TURBO_PRIME , WLAN_MODE_11a_XR , WLAN_MODE_11g_XR }

enum	{ CFG_NONE , CFG_REG_DOMAIN , CFG_RATE_CONTROL_ENABLE , CFG_DEF_XMIT_DATA_RATE , CFG_HW_TX_RETRIES , CFG_SW_TX_RETRIES , CFG_SLOW_CLOCK_ENABLE , CFG_COMP_PROC , CFG_USER_RTS_THRESHOLD , CFG_XR2NORM_RATE_THRESHOLD , CFG_XRMODE_SWITCH_COUNT , CFG_PROTECTION_TYPE , CFG_BURST_SEQ_THRESHOLD , CFG_ABOLT , CFG_IQ_LOG_COUNT_MAX , CFG_MODE_CTS , CFG_WME_ENABLED , CFG_GPRS_CBR_PERIOD , CFG_SERVICE_TYPE , CFG_MAC_ADDR , CFG_DEBUG_EAR , CFG_INIT_REGS , CFG_DEBUG_ID , CFG_COMP_WIN_SZ , CFG_DIVERSITY_CTL , CFG_TP_SCALE , CFG_TPC_HALF_DBM5 , CFG_TPC_HALF_DBM2 , CFG_OVERRD_TX_POWER , CFG_USE_32KHZ_CLOCK , CFG_GMODE_PROTECTION , CFG_GMODE_PROTECT_RATE_INDEX , CFG_GMODE_NON_ERP_PREAMBLE , CFG_WDC_TRANSPORT_CHUNK_SIZE }

enum	{ CAP_NONE , CAP_ALL , CAP_TARGET_VERSION , CAP_TARGET_REVISION , CAP_MAC_VERSION , CAP_MAC_REVISION , CAP_PHY_REVISION , CAP_ANALOG_5GHz_REVISION , CAP_ANALOG_2GHz_REVISION , CAP_DEBUG_WDCMSG_SUPPORT , CAP_REG_DOMAIN , CAP_COUNTRY_CODE , CAP_REG_CAP_BITS , CAP_WIRELESS_MODES , CAP_CHAN_SPREAD_SUPPORT , CAP_SLEEP_AFTER_BEACON_BROKEN , CAP_COMPRESS_SUPPORT , CAP_BURST_SUPPORT , CAP_FAST_FRAMES_SUPPORT , CAP_CHAP_TUNING_SUPPORT , CAP_TURBOG_SUPPORT , CAP_TURBO_PRIME_SUPPORT , CAP_DEVICE_TYPE , CAP_XR_SUPPORT , CAP_WME_SUPPORT , CAP_TOTAL_QUEUES , CAP_CONNECTION_ID_MAX , CAP_LOW_5GHZ_CHAN , CAP_HIGH_5GHZ_CHAN , CAP_LOW_2GHZ_CHAN , CAP_HIGH_2GHZ_CHAN , CAP_MIC_AES_CCM , CAP_MIC_CKIP , CAP_MIC_TKIP , CAP_MIC_TKIP_WME , CAP_CIPHER_AES_CCM , CAP_CIPHER_CKIP , CAP_CIPHER_TKIP , CAP_TWICE_ANTENNAGAIN_5G , CAP_TWICE_ANTENNAGAIN_2G }

enum	{ ST_NONE , ST_ALL , ST_SERVICE_TYPE , ST_WLAN_MODE , ST_FREQ , ST_BAND , ST_LAST_RSSI , ST_PS_FRAMES_DROPPED , ST_CACHED_DEF_ANT , ST_COUNT_OTHER_RX_ANT , ST_USE_FAST_DIVERSITY , ST_MAC_ADDR , ST_RX_GENERATION_NUM , ST_TX_QUEUE_DEPTH , ST_SERIAL_NUMBER , ST_WDC_TRANSPORT_CHUNK_SIZE }

enum	{ BSS_ATTR_BEACON_INTERVAL , BSS_ATTR_DTIM_INTERVAL , BSS_ATTR_CFP_INTERVAL , BSS_ATTR_CFP_MAX_DURATION , BSS_ATTR_ATIM_WINDOW , BSS_ATTR_DEFAULT_RATE_INDEX , BSS_ATTR_SHORT_SLOT_TIME_11g , BSS_ATTR_SLEEP_DURATION , BSS_ATTR_BMISS_THRESHOLD , BSS_ATTR_TPC_POWER_LIMIT , BSS_ATTR_BSS_KEY_UPDATE }

enum	{ TARGET_DEVICE_AWAKE , TARGET_DEVICE_SLEEP , TARGET_DEVICE_PWRDN , TARGET_DEVICE_PWRSAVE , TARGET_DEVICE_SUSPEND , TARGET_DEVICE_RESUME }

Variables
struct uath_fwblock	__packed

Macro Definition Documentation

◆ ATH_SW_VER_BUILD

#define ATH_SW_VER_BUILD 9999

Definition at line 195 of file if_uathreg.h.

◆ ATH_SW_VER_MAJOR

#define ATH_SW_VER_MAJOR 1

Definition at line 192 of file if_uathreg.h.

◆ ATH_SW_VER_MINOR

#define ATH_SW_VER_MINOR 5

Definition at line 193 of file if_uathreg.h.

◆ ATH_SW_VER_PATCH

#define ATH_SW_VER_PATCH 0

Definition at line 194 of file if_uathreg.h.

◆ UATH_CFLAGS_DEBUG

#define UATH_CFLAGS_DEBUG 0x04 /* for debugging */

Definition at line 133 of file if_uathreg.h.

◆ UATH_CFLAGS_FINAL

#define UATH_CFLAGS_FINAL 0x01 /* final chunk of a msg */

Definition at line 131 of file if_uathreg.h.

◆ UATH_CFLAGS_RXMSG

#define UATH_CFLAGS_RXMSG 0x02 /* chunk contains rx completion */

Definition at line 132 of file if_uathreg.h.

◆ UATH_CHAN_2GHZ

#define UATH_CHAN_2GHZ 0x1000

Definition at line 208 of file if_uathreg.h.

◆ UATH_CHAN_5GHZ

#define UATH_CHAN_5GHZ 0x2000

Definition at line 209 of file if_uathreg.h.

◆ UATH_CHAN_CCK

#define UATH_CHAN_CCK 0x0200

Definition at line 206 of file if_uathreg.h.

◆ UATH_CHAN_OFDM

#define UATH_CHAN_OFDM 0x0400

Definition at line 207 of file if_uathreg.h.

◆ UATH_CHAN_TURBO

#define UATH_CHAN_TURBO 0x0100

Definition at line 205 of file if_uathreg.h.

◆ UATH_CONFIG_INDEX

#define UATH_CONFIG_INDEX 0

Definition at line 22 of file if_uathreg.h.

◆ UATH_DEFAULT_KEY

#define UATH_DEFAULT_KEY 6

Definition at line 310 of file if_uathreg.h.

◆ UATH_FILTER_OP_CLEAR

#define UATH_FILTER_OP_CLEAR 0x2

Definition at line 408 of file if_uathreg.h.

◆ UATH_FILTER_OP_INIT

#define UATH_FILTER_OP_INIT 0x0

Definition at line 406 of file if_uathreg.h.

◆ UATH_FILTER_OP_RESTORE

#define UATH_FILTER_OP_RESTORE 0x4

Definition at line 410 of file if_uathreg.h.

◆ UATH_FILTER_OP_SET

#define UATH_FILTER_OP_SET 0x1

Definition at line 407 of file if_uathreg.h.

◆ UATH_FILTER_OP_TEMP

#define UATH_FILTER_OP_TEMP 0x3

Definition at line 409 of file if_uathreg.h.

◆ UATH_FILTER_RX_BCAST

#define UATH_FILTER_RX_BCAST 0x00000004

Definition at line 397 of file if_uathreg.h.

◆ UATH_FILTER_RX_BEACON

#define UATH_FILTER_RX_BEACON 0x00000010 /* beacon frames */

Definition at line 399 of file if_uathreg.h.

◆ UATH_FILTER_RX_CONTROL

#define UATH_FILTER_RX_CONTROL 0x00000008

Definition at line 398 of file if_uathreg.h.

◆ UATH_FILTER_RX_MCAST

#define UATH_FILTER_RX_MCAST 0x00000002

Definition at line 396 of file if_uathreg.h.

◆ UATH_FILTER_RX_PHY_ERR

#define UATH_FILTER_RX_PHY_ERR 0x00000040 /* phy errors */

Definition at line 401 of file if_uathreg.h.

◆ UATH_FILTER_RX_PHY_RADAR

#define UATH_FILTER_RX_PHY_RADAR 0x00000080 /* radar phy errors */

Definition at line 402 of file if_uathreg.h.

◆ UATH_FILTER_RX_PROBE_REQ

#define UATH_FILTER_RX_PROBE_REQ 0x00000800

Definition at line 404 of file if_uathreg.h.

◆ UATH_FILTER_RX_PROM

#define UATH_FILTER_RX_PROM 0x00000020 /* promiscuous mode */

Definition at line 400 of file if_uathreg.h.

◆ UATH_FILTER_RX_UCAST

#define UATH_FILTER_RX_UCAST 0x00000001

Definition at line 395 of file if_uathreg.h.

◆ UATH_FILTER_RX_XR_POOL

#define UATH_FILTER_RX_XR_POOL 0x00000400 /* XR group polls */

Definition at line 403 of file if_uathreg.h.

◆ UATH_ID_INVALID

#define UATH_ID_INVALID 0xffffffff /* for sending prior to connection */

Definition at line 180 of file if_uathreg.h.

◆ UATH_IFACE_INDEX

#define UATH_IFACE_INDEX 0

Definition at line 23 of file if_uathreg.h.

◆ UATH_LED_ACTIVITY

#define UATH_LED_ACTIVITY 1

Definition at line 271 of file if_uathreg.h.

◆ UATH_LED_LINK

#define UATH_LED_LINK 0

Definition at line 270 of file if_uathreg.h.

◆ UATH_LED_OFF

#define UATH_LED_OFF 0

Definition at line 273 of file if_uathreg.h.

◆ UATH_LED_ON

#define UATH_LED_ON 1

Definition at line 274 of file if_uathreg.h.

◆ UATH_MAX_CMDSZ

#define UATH_MAX_CMDSZ 512

Definition at line 39 of file if_uathreg.h.

◆ UATH_MAX_FWBLOCK_SIZE

#define UATH_MAX_FWBLOCK_SIZE 2048

Definition at line 31 of file if_uathreg.h.

◆ UATH_MAX_NRATES

#define UATH_MAX_NRATES 32

Definition at line 318 of file if_uathreg.h.

◆ UATH_MAX_TXBUFSZ

#define UATH_MAX_TXBUFSZ

Value:

(sizeof(struct uath_chunk) + sizeof(struct uath_tx_desc) + \

IEEE80211_MAX_LEN)

uath_chunk

Definition: if_uathreg.h:128

uath_tx_desc

Definition: if_uathreg.h:171

Definition at line 593 of file if_uathreg.h.

◆ UATH_MIN_RXBUFSZ

#define UATH_MIN_RXBUFSZ (sizeof(struct uath_chunk))

Definition at line 601 of file if_uathreg.h.

◆ UATH_RX_DUMMYSIZE

#define UATH_RX_DUMMYSIZE 4

Definition at line 138 of file if_uathreg.h.

◆ UATH_STATUS_CRC_ERR

#define UATH_STATUS_CRC_ERR 2

Definition at line 150 of file if_uathreg.h.

◆ UATH_STATUS_DECOMP_ERR

#define UATH_STATUS_DECOMP_ERR 6

Definition at line 154 of file if_uathreg.h.

◆ UATH_STATUS_DECRYPT_CRC_ERR

#define UATH_STATUS_DECRYPT_CRC_ERR 4

Definition at line 152 of file if_uathreg.h.

◆ UATH_STATUS_DECRYPT_MIC_ERR

#define UATH_STATUS_DECRYPT_MIC_ERR 5

Definition at line 153 of file if_uathreg.h.

◆ UATH_STATUS_ERR

#define UATH_STATUS_ERR 8

Definition at line 156 of file if_uathreg.h.

◆ UATH_STATUS_KEY_ERR

#define UATH_STATUS_KEY_ERR 7

Definition at line 155 of file if_uathreg.h.

◆ UATH_STATUS_OK

#define UATH_STATUS_OK 0

Definition at line 148 of file if_uathreg.h.

◆ UATH_STATUS_PHY_ERR

#define UATH_STATUS_PHY_ERR 3

Definition at line 151 of file if_uathreg.h.

◆ UATH_STATUS_STOP_IN_PROGRESS

#define UATH_STATUS_STOP_IN_PROGRESS 1

Definition at line 149 of file if_uathreg.h.

◆ UATH_TX_NOTIFY

#define UATH_TX_NOTIFY (1 << 24) /* f/w will send a UATH_NOTIF_TX */

Definition at line 182 of file if_uathreg.h.

◆ UATH_TXQID_FF

#define UATH_TXQID_FF 0x20 /* content is fast frame */

Definition at line 178 of file if_uathreg.h.

◆ UATH_TXQID_MASK

#define UATH_TXQID_MASK 0x0f

Definition at line 176 of file if_uathreg.h.

◆ UATH_TXQID_MINRATE

#define UATH_TXQID_MINRATE 0x10 /* use min tx rate */

Definition at line 177 of file if_uathreg.h.

◆ UATH_WRITE_BLOCK

#define UATH_WRITE_BLOCK (1 << 4)

Definition at line 28 of file if_uathreg.h.

◆ WDCMSG_BEACON_INIT

#define WDCMSG_BEACON_INIT 0x1b

Definition at line 91 of file if_uathreg.h.

◆ WDCMSG_BIND

#define WDCMSG_BIND 0x02

Definition at line 64 of file if_uathreg.h.

◆ WDCMSG_BMISS

#define WDCMSG_BMISS 0x12

Definition at line 81 of file if_uathreg.h.

◆ WDCMSG_BMISS_ACK

#define WDCMSG_BMISS_ACK 0x17

Definition at line 86 of file if_uathreg.h.

◆ WDCMSG_CREATE_CONNECTION

#define WDCMSG_CREATE_CONNECTION 0x0c

Definition at line 74 of file if_uathreg.h.

◆ WDCMSG_DATA_AVAIL

#define WDCMSG_DATA_AVAIL 0x15

Definition at line 84 of file if_uathreg.h.

◆ WDCMSG_DELETE_CONNECT

#define WDCMSG_DELETE_CONNECT 0x0e

Definition at line 76 of file if_uathreg.h.

◆ WDCMSG_DEVICE_AVAIL

#define WDCMSG_DEVICE_AVAIL 0x13

Definition at line 82 of file if_uathreg.h.

◆ WDCMSG_DISABLE

#define WDCMSG_DISABLE 0x36

Definition at line 115 of file if_uathreg.h.

◆ WDCMSG_FLUSH

#define WDCMSG_FLUSH 0x10

Definition at line 78 of file if_uathreg.h.

◆ WDCMSG_GET_CHANNEL_DATA

#define WDCMSG_GET_CHANNEL_DATA 0x29

Definition at line 105 of file if_uathreg.h.

◆ WDCMSG_GET_CUR_RSSI

#define WDCMSG_GET_CUR_RSSI 0x2a

Definition at line 106 of file if_uathreg.h.

◆ WDCMSG_GET_TSF

#define WDCMSG_GET_TSF 0x24

Definition at line 100 of file if_uathreg.h.

◆ WDCMSG_HOST_AVAILABLE

#define WDCMSG_HOST_AVAILABLE 0x01

Definition at line 63 of file if_uathreg.h.

◆ WDCMSG_MIB_CONTROL

#define WDCMSG_MIB_CONTROL 0x28

Definition at line 104 of file if_uathreg.h.

◆ WDCMSG_PER_CALIBRATION

#define WDCMSG_PER_CALIBRATION 0x34

Definition at line 113 of file if_uathreg.h.

◆ WDCMSG_PHY_DISABLE

#define WDCMSG_PHY_DISABLE 0x37

Definition at line 116 of file if_uathreg.h.

◆ WDCMSG_RELEASE_TX_QUEUE

#define WDCMSG_RELEASE_TX_QUEUE 0x3b

Definition at line 120 of file if_uathreg.h.

◆ WDCMSG_RESET

#define WDCMSG_RESET 0x35

Definition at line 114 of file if_uathreg.h.

◆ WDCMSG_RESET_KEY_CACHE

#define WDCMSG_RESET_KEY_CACHE 0x1c

Definition at line 92 of file if_uathreg.h.

◆ WDCMSG_RESET_KEY_CACHE_ENTRY

#define WDCMSG_RESET_KEY_CACHE_ENTRY 0x1d

Definition at line 93 of file if_uathreg.h.

◆ WDCMSG_RESET_TSF

#define WDCMSG_RESET_TSF 0x25

Definition at line 101 of file if_uathreg.h.

◆ WDCMSG_RX_FILTER

#define WDCMSG_RX_FILTER 0x33

Definition at line 112 of file if_uathreg.h.

◆ WDCMSG_SEND

#define WDCMSG_SEND 0x0f

Definition at line 77 of file if_uathreg.h.

◆ WDCMSG_SEND_COMPLETE

#define WDCMSG_SEND_COMPLETE 0x14

Definition at line 83 of file if_uathreg.h.

◆ WDCMSG_SET_ADHOC_MODE

#define WDCMSG_SET_ADHOC_MODE 0x26

Definition at line 102 of file if_uathreg.h.

◆ WDCMSG_SET_ANTENNA_SWITCH

#define WDCMSG_SET_ANTENNA_SWITCH 0x2b

Definition at line 107 of file if_uathreg.h.

◆ WDCMSG_SET_BASIC_RATE

#define WDCMSG_SET_BASIC_RATE 0x27

Definition at line 103 of file if_uathreg.h.

◆ WDCMSG_SET_DECOMP_MASK

#define WDCMSG_SET_DECOMP_MASK 0x1f

Definition at line 95 of file if_uathreg.h.

◆ WDCMSG_SET_DEFAULT_KEY

#define WDCMSG_SET_DEFAULT_KEY 0x43

Definition at line 121 of file if_uathreg.h.

◆ WDCMSG_SET_KEY_CACHE_ENTRY

#define WDCMSG_SET_KEY_CACHE_ENTRY 0x1e

Definition at line 94 of file if_uathreg.h.

◆ WDCMSG_SET_LED_BLINK

#define WDCMSG_SET_LED_BLINK 0x19

Definition at line 88 of file if_uathreg.h.

◆ WDCMSG_SET_LED_STATE

#define WDCMSG_SET_LED_STATE 0x21

Definition at line 97 of file if_uathreg.h.

◆ WDCMSG_SET_LED_STEADY

#define WDCMSG_SET_LED_STEADY 0x18

Definition at line 87 of file if_uathreg.h.

◆ WDCMSG_SET_POWER_MODE

#define WDCMSG_SET_POWER_MODE 0x30

Definition at line 109 of file if_uathreg.h.

◆ WDCMSG_SET_PWR_MODE

#define WDCMSG_SET_PWR_MODE 0x16

Definition at line 85 of file if_uathreg.h.

◆ WDCMSG_SET_REGULATORY_DOMAIN

#define WDCMSG_SET_REGULATORY_DOMAIN 0x20

Definition at line 96 of file if_uathreg.h.

◆ WDCMSG_SET_RX_MULTICAST_FILTER

#define WDCMSG_SET_RX_MULTICAST_FILTER 0x32

Definition at line 111 of file if_uathreg.h.

◆ WDCMSG_SET_STA_BEACON_TIMERS

#define WDCMSG_SET_STA_BEACON_TIMERS 0x23

Definition at line 99 of file if_uathreg.h.

◆ WDCMSG_SET_TX_POWER_LIMIT

#define WDCMSG_SET_TX_POWER_LIMIT 0x38

Definition at line 117 of file if_uathreg.h.

◆ WDCMSG_SET_TX_QUEUE_PARAMS

#define WDCMSG_SET_TX_QUEUE_PARAMS 0x39

Definition at line 118 of file if_uathreg.h.

◆ WDCMSG_SETUP_BEACON_DESC

#define WDCMSG_SETUP_BEACON_DESC 0x1a

Definition at line 90 of file if_uathreg.h.

◆ WDCMSG_SETUP_PSPOLL_DESC

#define WDCMSG_SETUP_PSPOLL_DESC 0x31

Definition at line 110 of file if_uathreg.h.

◆ WDCMSG_SETUP_TX_QUEUE

#define WDCMSG_SETUP_TX_QUEUE 0x3a

Definition at line 119 of file if_uathreg.h.

◆ WDCMSG_STATS_UPDATE

#define WDCMSG_STATS_UPDATE 0x11

Definition at line 80 of file if_uathreg.h.

◆ WDCMSG_TARGET_DISABLE

#define WDCMSG_TARGET_DISABLE 0x0b

Definition at line 73 of file if_uathreg.h.

◆ WDCMSG_TARGET_ENABLE

#define WDCMSG_TARGET_ENABLE 0x0a

Definition at line 72 of file if_uathreg.h.

◆ WDCMSG_TARGET_GET_CAPABILITY

#define WDCMSG_TARGET_GET_CAPABILITY 0x04

Definition at line 66 of file if_uathreg.h.

◆ WDCMSG_TARGET_GET_STATS

#define WDCMSG_TARGET_GET_STATS 0x07

Definition at line 69 of file if_uathreg.h.

◆ WDCMSG_TARGET_GET_STATUS

#define WDCMSG_TARGET_GET_STATUS 0x06

Definition at line 68 of file if_uathreg.h.

◆ WDCMSG_TARGET_RESET

#define WDCMSG_TARGET_RESET 0x03

Definition at line 65 of file if_uathreg.h.

◆ WDCMSG_TARGET_SET_CONFIG

#define WDCMSG_TARGET_SET_CONFIG 0x05

Definition at line 67 of file if_uathreg.h.

◆ WDCMSG_TARGET_START

#define WDCMSG_TARGET_START 0x08

Definition at line 70 of file if_uathreg.h.

◆ WDCMSG_TARGET_STOP

#define WDCMSG_TARGET_STOP 0x09

Definition at line 71 of file if_uathreg.h.

◆ WDCMSG_UPDATE_CONNECT_ATTR

#define WDCMSG_UPDATE_CONNECT_ATTR 0x0d

Definition at line 75 of file if_uathreg.h.

◆ WDCMSG_USE_SHORT_SLOT_TIME

#define WDCMSG_USE_SHORT_SLOT_TIME 0x2f

Definition at line 108 of file if_uathreg.h.

◆ WDCMSG_WRITE_ASSOCID

#define WDCMSG_WRITE_ASSOCID 0x22

Definition at line 98 of file if_uathreg.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
WLAN_MODE_NONE
WLAN_MODE_11b
WLAN_MODE_11a
WLAN_MODE_11g
WLAN_MODE_11a_TURBO
WLAN_MODE_11g_TURBO
WLAN_MODE_11a_TURBO_PRIME
WLAN_MODE_11g_TURBO_PRIME
WLAN_MODE_11a_XR
WLAN_MODE_11g_XR

Definition at line 330 of file if_uathreg.h.

◆ anonymous enum

anonymous enum

Enumerator
CFG_NONE
CFG_REG_DOMAIN
CFG_RATE_CONTROL_ENABLE
CFG_DEF_XMIT_DATA_RATE
CFG_HW_TX_RETRIES
CFG_SW_TX_RETRIES
CFG_SLOW_CLOCK_ENABLE
CFG_COMP_PROC
CFG_USER_RTS_THRESHOLD
CFG_XR2NORM_RATE_THRESHOLD
CFG_XRMODE_SWITCH_COUNT
CFG_PROTECTION_TYPE
CFG_BURST_SEQ_THRESHOLD
CFG_ABOLT
CFG_IQ_LOG_COUNT_MAX
CFG_MODE_CTS
CFG_WME_ENABLED
CFG_GPRS_CBR_PERIOD
CFG_SERVICE_TYPE
CFG_MAC_ADDR
CFG_DEBUG_EAR
CFG_INIT_REGS
CFG_DEBUG_ID
CFG_COMP_WIN_SZ
CFG_DIVERSITY_CTL
CFG_TP_SCALE
CFG_TPC_HALF_DBM5
CFG_TPC_HALF_DBM2
CFG_OVERRD_TX_POWER
CFG_USE_32KHZ_CLOCK
CFG_GMODE_PROTECTION
CFG_GMODE_PROTECT_RATE_INDEX
CFG_GMODE_NON_ERP_PREAMBLE
CFG_WDC_TRANSPORT_CHUNK_SIZE

Definition at line 438 of file if_uathreg.h.

◆ anonymous enum

anonymous enum

Enumerator
CAP_NONE
CAP_ALL
CAP_TARGET_VERSION
CAP_TARGET_REVISION
CAP_MAC_VERSION
CAP_MAC_REVISION
CAP_PHY_REVISION
CAP_ANALOG_5GHz_REVISION
CAP_ANALOG_2GHz_REVISION
CAP_DEBUG_WDCMSG_SUPPORT
CAP_REG_DOMAIN
CAP_COUNTRY_CODE
CAP_REG_CAP_BITS
CAP_WIRELESS_MODES
CAP_CHAN_SPREAD_SUPPORT
CAP_SLEEP_AFTER_BEACON_BROKEN
CAP_COMPRESS_SUPPORT
CAP_BURST_SUPPORT
CAP_FAST_FRAMES_SUPPORT
CAP_CHAP_TUNING_SUPPORT
CAP_TURBOG_SUPPORT
CAP_TURBO_PRIME_SUPPORT
CAP_DEVICE_TYPE
CAP_XR_SUPPORT
CAP_WME_SUPPORT
CAP_TOTAL_QUEUES
CAP_CONNECTION_ID_MAX
CAP_LOW_5GHZ_CHAN
CAP_HIGH_5GHZ_CHAN
CAP_LOW_2GHZ_CHAN
CAP_HIGH_2GHZ_CHAN
CAP_MIC_AES_CCM
CAP_MIC_CKIP
CAP_MIC_TKIP
CAP_MIC_TKIP_WME
CAP_CIPHER_AES_CCM
CAP_CIPHER_CKIP
CAP_CIPHER_TKIP
CAP_TWICE_ANTENNAGAIN_5G
CAP_TWICE_ANTENNAGAIN_2G

Definition at line 477 of file if_uathreg.h.

◆ anonymous enum

anonymous enum

Enumerator
ST_NONE
ST_ALL
ST_SERVICE_TYPE
ST_WLAN_MODE
ST_FREQ
ST_BAND
ST_LAST_RSSI
ST_PS_FRAMES_DROPPED
ST_CACHED_DEF_ANT
ST_COUNT_OTHER_RX_ANT
ST_USE_FAST_DIVERSITY
ST_MAC_ADDR
ST_RX_GENERATION_NUM
ST_TX_QUEUE_DEPTH
ST_SERIAL_NUMBER
ST_WDC_TRANSPORT_CHUNK_SIZE

Definition at line 527 of file if_uathreg.h.

◆ anonymous enum

anonymous enum

Enumerator
BSS_ATTR_BEACON_INTERVAL
BSS_ATTR_DTIM_INTERVAL
BSS_ATTR_CFP_INTERVAL
BSS_ATTR_CFP_MAX_DURATION
BSS_ATTR_ATIM_WINDOW
BSS_ATTR_DEFAULT_RATE_INDEX
BSS_ATTR_SHORT_SLOT_TIME_11g
BSS_ATTR_SLEEP_DURATION
BSS_ATTR_BMISS_THRESHOLD
BSS_ATTR_TPC_POWER_LIMIT
BSS_ATTR_BSS_KEY_UPDATE

Definition at line 546 of file if_uathreg.h.

◆ anonymous enum

anonymous enum

Enumerator
TARGET_DEVICE_AWAKE
TARGET_DEVICE_SLEEP
TARGET_DEVICE_PWRDN
TARGET_DEVICE_PWRSAVE
TARGET_DEVICE_SUSPEND
TARGET_DEVICE_RESUME

Definition at line 584 of file if_uathreg.h.

Variable Documentation

◆ __packed

struct uath_cmd_set_stabeacon_timers __packed

Data Structures

Macros

Enumerations

Variables

Macro Definition Documentation

◆ ATH_SW_VER_BUILD

◆ ATH_SW_VER_MAJOR

◆ ATH_SW_VER_MINOR

◆ ATH_SW_VER_PATCH

◆ UATH_CFLAGS_DEBUG

◆ UATH_CFLAGS_FINAL

◆ UATH_CFLAGS_RXMSG

◆ UATH_CHAN_2GHZ

◆ UATH_CHAN_5GHZ

◆ UATH_CHAN_CCK

◆ UATH_CHAN_OFDM

◆ UATH_CHAN_TURBO

◆ UATH_CONFIG_INDEX

◆ UATH_DEFAULT_KEY

◆ UATH_FILTER_OP_CLEAR

◆ UATH_FILTER_OP_INIT

◆ UATH_FILTER_OP_RESTORE

◆ UATH_FILTER_OP_SET

◆ UATH_FILTER_OP_TEMP

◆ UATH_FILTER_RX_BCAST

◆ UATH_FILTER_RX_BEACON

◆ UATH_FILTER_RX_CONTROL

◆ UATH_FILTER_RX_MCAST

◆ UATH_FILTER_RX_PHY_ERR

◆ UATH_FILTER_RX_PHY_RADAR

◆ UATH_FILTER_RX_PROBE_REQ

◆ UATH_FILTER_RX_PROM

◆ UATH_FILTER_RX_UCAST

◆ UATH_FILTER_RX_XR_POOL

◆ UATH_ID_INVALID

◆ UATH_IFACE_INDEX

◆ UATH_LED_ACTIVITY

◆ UATH_LED_LINK

◆ UATH_LED_OFF

◆ UATH_LED_ON

◆ UATH_MAX_CMDSZ

◆ UATH_MAX_FWBLOCK_SIZE

◆ UATH_MAX_NRATES

◆ UATH_MAX_TXBUFSZ

◆ UATH_MIN_RXBUFSZ

◆ UATH_RX_DUMMYSIZE

◆ UATH_STATUS_CRC_ERR

◆ UATH_STATUS_DECOMP_ERR

◆ UATH_STATUS_DECRYPT_CRC_ERR

◆ UATH_STATUS_DECRYPT_MIC_ERR

◆ UATH_STATUS_ERR

◆ UATH_STATUS_KEY_ERR

◆ UATH_STATUS_OK

◆ UATH_STATUS_PHY_ERR

◆ UATH_STATUS_STOP_IN_PROGRESS

◆ UATH_TX_NOTIFY

◆ UATH_TXQID_FF

◆ UATH_TXQID_MASK

◆ UATH_TXQID_MINRATE

◆ UATH_WRITE_BLOCK

◆ WDCMSG_BEACON_INIT

◆ WDCMSG_BIND

◆ WDCMSG_BMISS

◆ WDCMSG_BMISS_ACK

◆ WDCMSG_CREATE_CONNECTION

◆ WDCMSG_DATA_AVAIL

◆ WDCMSG_DELETE_CONNECT

◆ WDCMSG_DEVICE_AVAIL

◆ WDCMSG_DISABLE

◆ WDCMSG_FLUSH

◆ WDCMSG_GET_CHANNEL_DATA

◆ WDCMSG_GET_CUR_RSSI

◆ WDCMSG_GET_TSF

◆ WDCMSG_HOST_AVAILABLE

◆ WDCMSG_MIB_CONTROL

◆ WDCMSG_PER_CALIBRATION

◆ WDCMSG_PHY_DISABLE

◆ WDCMSG_RELEASE_TX_QUEUE

◆ WDCMSG_RESET

◆ WDCMSG_RESET_KEY_CACHE