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#define | DIRECT_SMP |
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#define | DM_ROOT_MEM_INDEX 0 |
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#define | DM_PORT_MEM_INDEX 1 |
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#define | DM_DEVICE_MEM_INDEX 2 |
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#define | DM_EXPANDER_MEM_INDEX 3 |
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#define | DM_SMP_MEM_INDEX 4 |
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#define | DM_INDIRECT_SMP_MEM_INDEX 5 |
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#define | DM_MAX_NUM_PHYS 16 |
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#define | DM_MAX_EXPANDER_PHYS 256 |
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#define | DM_MAX_DEV 2048 |
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#define | DM_MAX_EXPANDER_DEV 32 |
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#define | DM_MAX_PORT_CONTEXT 16 |
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#define | DM_MAX_SMP 32 |
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#define | DM_MAX_INDIRECT_SMP DM_MAX_SMP |
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#define | DM_USECS_PER_TICK 1000000 |
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#define | PIO_SETUP_DEV_TO_HOST_FIS 0x5F |
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#define | REG_DEV_TO_HOST_FIS 0x34 |
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#define | SET_DEV_BITS_FIS 0xA1 |
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#define | DEFAULT_KEY_BUFFER_SIZE 64 |
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#define | DEFAULT_SMP_TIMEOUT 0xFFFF |
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#define | SMP_DIRECT_PAYLOAD_LIMIT 44 |
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#define | SMP_INDIRECT_PAYLOAD 512 |
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#define | SMP_MAXIMUM_PAYLOAD 1024 |
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#define | MIN(a, b) ((a) < (b) ? (a) : (b)) |
| MIN macro. More...
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#define | MAX(a, b) ((a) < (b) ? (b) : (a)) |
| MAX macro. More...
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#define | agNULL ((void *)0) |
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#define | DM_DBG0(format) |
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#define | DM_DBG1(format) |
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#define | DM_DBG2(format) |
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#define | DM_DBG3(format) |
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#define | DM_DBG4(format) |
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#define | DM_DBG5(format) |
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#define | DM_DBG6(format) |
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#define | DM_DSTATE_NOT_STARTED 0 |
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#define | DM_DSTATE_STARTED 1 |
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#define | DM_DSTATE_COMPLETED 2 |
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#define | DM_DSTATE_COMPLETED_WITH_FAILURE 3 |
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#define | DISCOVERY_NOT_START 0 |
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#define | DISCOVERY_UP_STREAM 1 |
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#define | DISCOVERY_DOWN_STREAM 2 |
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#define | DISCOVERY_CONFIG_ROUTING 3 |
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#define | DISCOVERY_SAS_DONE 4 |
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#define | DISCOVERY_REPORT_PHY_SATA 5 |
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#define | SMP_REPORT_GENERAL 0x00 |
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#define | SMP_REPORT_MANUFACTURE_INFORMATION 0x01 |
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#define | SMP_READ_GPIO_REGISTER 0x02 |
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#define | SMP_DISCOVER 0x10 |
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#define | SMP_REPORT_PHY_ERROR_LOG 0x11 |
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#define | SMP_REPORT_PHY_SATA 0x12 |
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#define | SMP_REPORT_ROUTING_INFORMATION 0x13 |
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#define | SMP_WRITE_GPIO_REGISTER 0x82 |
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#define | SMP_CONFIGURE_ROUTING_INFORMATION 0x90 |
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#define | SMP_PHY_CONTROL 0x91 |
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#define | SMP_PHY_TEST_FUNCTION 0x92 |
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#define | SMP_PMC_SPECIFIC 0xC0 |
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#define | SMP_DISCOVER_LIST 0x20 |
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#define | SMP_FUNCTION_ACCEPTED 0x00 |
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#define | UNKNOWN_SMP_FUNCTION 0x01 |
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#define | SMP_FUNCTION_FAILED 0x02 |
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#define | INVALID_REQUEST_FRAME_LENGTH 0x03 |
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#define | INVALID_EXPANDER_CHANGE_COUNT 0x04 |
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#define | SMP_FN_BUSY 0x05 |
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#define | INCOMPLETE_DESCRIPTOR_LIST 0x06 |
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#define | PHY_DOES_NOT_EXIST 0x10 |
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#define | INDEX_DOES_NOT_EXIST 0x11 |
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#define | PHY_DOES_NOT_SUPPORT_SATA 0x12 |
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#define | UNKNOWN_PHY_OPERATION 0x13 |
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#define | UNKNOWN_PHY_TEST_FUNCTION 0x14 |
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#define | PHY_TEST_FUNCTION_IN_PROGRESS 0x15 |
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#define | PHY_VACANT 0x16 |
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#define | UNKNOWN_PHY_EVENT_SOURCE 0x17 |
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#define | UNKNOWN_DESCRIPTOT_TYPE 0x18 |
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#define | UNKNOWN_PHY_FILETER 0x19 |
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#define | AFFILIATION_VIOLATION 0x1A |
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#define | SMP_ZONE_VIOLATION 0x20 |
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#define | NO_MANAGEMENT_ACCESS_RIGHTS 0x21 |
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#define | UNKNOWN_ENABLE_DISABLE_ZONING_VALUE 0x22 |
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#define | ZONE_LOCK_VIOLATION 0x23 |
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#define | NOT_ACTIVATED 0x24 |
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#define | ZONE_GROUP_OUT_OF_RANGE 0x25 |
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#define | NO_PHYSICAL_PRESENCE 0x26 |
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#define | SAVING_NOT_SUPPORTED 0x27 |
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#define | SOURCE_ZONE_GROUP_DOES_NOT_EXIST 0x28 |
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#define | DISABLED_PASSWORD_NOT_SUPPORTED 0x29 |
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#define | SMP_PHY_CONTROL_NOP 0x00 |
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#define | SMP_PHY_CONTROL_LINK_RESET 0x01 |
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#define | SMP_PHY_CONTROL_HARD_RESET 0x02 |
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#define | SMP_PHY_CONTROL_DISABLE 0x03 |
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#define | SMP_PHY_CONTROL_CLEAR_ERROR_LOG 0x05 |
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#define | SMP_PHY_CONTROL_CLEAR_AFFILIATION 0x06 |
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#define | SMP_PHY_CONTROL_XMIT_SATA_PS_SIGNAL 0x07 |
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#define | DM_VEN_DEV_SPC 0x80010000 |
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#define | DM_VEN_DEV_ADAPSPC 0x80810000 |
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#define | DM_VEN_DEV_SPCv 0x80080000 |
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#define | DM_VEN_DEV_SPCve 0x80090000 |
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#define | DM_VEN_DEV_SPCvplus 0x80180000 |
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#define | DM_VEN_DEV_SPCveplus 0x80190000 |
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#define | DM_VEN_DEV_ADAPvplus 0x80880000 |
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#define | DM_VEN_DEV_ADAPveplus 0x80890000 |
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#define | DMIsSPC(agr) (DM_VEN_DEV_SPC == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPC */ |
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#define | DMIsSPCADAP(agr) (DM_VEN_DEV_SPC == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPC */ |
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#define | DMIsSPCv(agr) (DM_VEN_DEV_SPCv == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCv */ |
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#define | DMIsSPCve(agr) (DM_VEN_DEV_SPCve == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCve */ |
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#define | DMIsSPCvplus(agr) (DM_VEN_DEV_SPCvplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCv+ */ |
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#define | DMIsSPCveplus(agr) (DM_VEN_DEV_SPCveplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCve+ */ |
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#define | DMIsSPCADAPvplus(agr) (DM_VEN_DEV_ADAPvplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCv+ */ |
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#define | DMIsSPCADAPveplus(agr) (DM_VEN_DEV_ADAPveplus == (ossaHwRegReadConfig32(agr,0 ) & 0xFFFF0000) ? 1 : 0) /* returns true config space read is SPCve+ */ |
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#define | REPORT_GENERAL_CONFIGURING_BIT 0x2 |
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#define | REPORT_GENERAL_CONFIGURABLE_BIT 0x1 |
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#define | REPORT_GENERAL_LONG_RESPONSE_BIT 0x80 |
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#define | REPORT_GENERAL_IS_CONFIGURING(pResp) |
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#define | REPORT_GENERAL_IS_CONFIGURABLE(pResp) |
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#define | REPORT_GENERAL_GET_ROUTEINDEXES(pResp) DMA_BEBIT16_TO_BIT16(*(bit16 *)((pResp)->expanderRouteIndexes16)) |
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#define | REPORT_GENERAL_IS_LONG_RESPONSE(pResp) |
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#define | DISCRSP_SSP_BIT 0x08 |
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#define | DISCRSP_STP_BIT 0x04 |
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#define | DISCRSP_SMP_BIT 0x02 |
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#define | DISCRSP_SATA_BIT 0x01 |
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#define | DISCRSP_SATA_PS_BIT 0x80 |
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#define | DISCRSP_GET_ATTACHED_DEVTYPE(pResp) (((pResp)->attachedDeviceType & 0x70) >> 4) |
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#define | DISCRSP_GET_LINKRATE(pResp) ((pResp)->negotiatedPhyLinkRate & 0x0F) |
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#define | DISCRSP_IS_SSP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SSP_BIT) == DISCRSP_SSP_BIT) |
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#define | DISCRSP_IS_STP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_STP_BIT) == DISCRSP_STP_BIT) |
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#define | DISCRSP_IS_SMP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SMP_BIT) == DISCRSP_SMP_BIT) |
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#define | DISCRSP_IS_SATA_HOST(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SATA_BIT) == DISCRSP_SATA_BIT) |
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#define | DISCRSP_IS_SSP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SSP_BIT) == DISCRSP_SSP_BIT) |
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#define | DISCRSP_IS_STP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_STP_BIT) == DISCRSP_STP_BIT) |
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#define | DISCRSP_IS_SMP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SMP_BIT) == DISCRSP_SMP_BIT) |
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#define | DISCRSP_IS_SATA_DEVICE(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SATA_BIT) == DISCRSP_SATA_BIT) |
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#define | DISCRSP_IS_SATA_PORTSELECTOR(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SATA_PS_BIT) == DISCRSP_SATA_PS_BIT) |
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#define | DISCRSP_GET_SAS_ADDRESSHI(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressHi) |
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#define | DISCRSP_GET_SAS_ADDRESSLO(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressLo) |
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#define | DISCRSP_GET_ATTACHED_SAS_ADDRESSHI(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressHi) |
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#define | DISCRSP_GET_ATTACHED_SAS_ADDRESSLO(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressLo) |
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#define | DISCRSP_VIRTUALPHY_BIT 0x80 |
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#define | DISCRSP_IS_VIRTUALPHY(pResp) (((pResp)->virtualPhy_partialPathwayTimeout & DISCRSP_VIRTUALPHY_BIT) == DISCRSP_VIRTUALPHY_BIT) |
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#define | DISCRSP_GET_ROUTINGATTRIB(pResp) ((pResp)->routingAttribute & 0x0F) |
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#define | REPORT_GENERAL_TABLE_TO_TABLE_SUPPORTED_BIT 0x80 |
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#define | REPORT_GENERAL_CONFIGURES_OTHERS_BIT 0x04 |
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#define | SAS2_REPORT_GENERAL_GET_ROUTEINDEXES(pResp) DMA_BEBIT16_TO_BIT16(*(bit16 *)((pResp)->expanderRouteIndexes16)) |
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#define | SAS2_REPORT_GENERAL_IS_CONFIGURING(pResp) |
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#define | SAS2_REPORT_GENERAL_IS_CONFIGURABLE(pResp) |
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#define | SAS2_REPORT_GENERAL_IS_TABLE_TO_TABLE_SUPPORTED(pResp) |
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#define | SAS2_REPORT_GENERAL_IS_CONFIGURES_OTHERS(pResp) |
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#define | SAS2_DISCRSP_SSP_BIT 0x08 |
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#define | SAS2_DISCRSP_STP_BIT 0x04 |
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#define | SAS2_DISCRSP_SMP_BIT 0x02 |
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#define | SAS2_DISCRSP_SATA_BIT 0x01 |
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#define | SAS2_DISCRSP_SATA_PS_BIT 0x80 |
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#define | SAS2_MUXING_SUPPORTED 0x01 |
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#define | SAS2_DISCRSP_GET_ATTACHED_DEVTYPE(pResp) (((pResp)->attachedDeviceTypeReason & 0x70) >> 4) |
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#define | SAS2_DISCRSP_GET_LINKRATE(pResp) ((pResp)->ReasonNegotiatedPhysicalLinkRate & 0x0F) |
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#define | SAS2_DISCRSP_GET_LOGICAL_LINKRATE(pResp) ((pResp)->NegotiatedLogicalLinkRate & 0x0F) |
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#define | SAS2_DISCRSP_IS_SSP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SSP_BIT) == DISCRSP_SSP_BIT) |
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#define | SAS2_DISCRSP_IS_STP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_STP_BIT) == DISCRSP_STP_BIT) |
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#define | SAS2_DISCRSP_IS_SMP_INITIATOR(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SMP_BIT) == DISCRSP_SMP_BIT) |
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#define | SAS2_DISCRSP_IS_SATA_HOST(pResp) (((pResp)->attached_Ssp_Stp_Smp_Sata_Initiator & DISCRSP_SATA_BIT) == DISCRSP_SATA_BIT) |
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#define | SAS2_DISCRSP_IS_SSP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SSP_BIT) == DISCRSP_SSP_BIT) |
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#define | SAS2_DISCRSP_IS_STP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_STP_BIT) == DISCRSP_STP_BIT) |
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#define | SAS2_DISCRSP_IS_SMP_TARGET(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SMP_BIT) == DISCRSP_SMP_BIT) |
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#define | SAS2_DISCRSP_IS_SATA_DEVICE(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SATA_BIT) == DISCRSP_SATA_BIT) |
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#define | SAS2_DISCRSP_IS_SATA_PORTSELECTOR(pResp) (((pResp)->attached_SataPS_Ssp_Stp_Smp_Sata_Target & DISCRSP_SATA_PS_BIT) == DISCRSP_SATA_PS_BIT) |
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#define | SAS2_DISCRSP_GET_SAS_ADDRESSHI(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressHi) |
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#define | SAS2_DISCRSP_GET_SAS_ADDRESSLO(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->sasAddressLo) |
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#define | SAS2_DISCRSP_GET_ATTACHED_SAS_ADDRESSHI(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressHi) |
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#define | SAS2_DISCRSP_GET_ATTACHED_SAS_ADDRESSLO(pResp) DMA_BEBIT32_TO_BIT32(*(bit32 *)(pResp)->attachedSasAddressLo) |
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#define | SAS2_DISCRSP_VIRTUALPHY_BIT 0x80 |
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#define | SAS2_DISCRSP_IS_VIRTUALPHY(pResp) (((pResp)->virtualPhy_partialPathwayTimeout & DISCRSP_VIRTUALPHY_BIT) == DISCRSP_VIRTUALPHY_BIT) |
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#define | SAS2_DISCRSP_GET_ROUTINGATTRIB(pResp) ((pResp)->routingAttribute & 0x0F) |
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#define | SAS2_DISCRSP_IS_MUXING_SUPPORTED(pResp) (((pResp)->NegotiatedSSCHWMuxingSupported & SAS2_MUXING_SUPPORTED) == SAS2_MUXING_SUPPORTED) |
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#define | SMP_REQUEST 0x40 |
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#define | SMP_RESPONSE 0x41 |
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#define | DM_GET_SAS_ADDRESSLO(sasAddressLo) DMA_BEBIT32_TO_BIT32(*(bit32 *)sasAddressLo) |
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#define | DM_GET_SAS_ADDRESSHI(sasAddressHi) DMA_BEBIT32_TO_BIT32(*(bit32 *)sasAddressHi) |
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#define | DM_GET_LINK_RATE(input) (input & 0x0F) |
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#define | DM_SAS_CONNECTION_RATE_1_5G 0x08 |
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#define | DM_SAS_CONNECTION_RATE_3_0G 0x09 |
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#define | DM_SAS_CONNECTION_RATE_6_0G 0x0A |
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#define | DM_SAS_CONNECTION_RATE_12_0G 0x0B |
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#define | DISCOVERY_CONFIGURING_TIMER_VALUE (3 * 1000 * 1000) /* 3 seconds */ |
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#define | DISCOVERY_RETRIES 3 |
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#define | CONFIGURE_ROUTE_TIMER_VALUE (1 * 1000 * 1000) /* 1 seconds */ |
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#define | DEVICE_REGISTRATION_TIMER_VALUE (2 * 1000 * 1000) /* 2 seconds */ |
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#define | SMP_RETRIES 5 |
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#define | SMP_BUSY_TIMER_VALUE (1 * 1000 * 1000) /* 1 second */ |
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#define | SMP_BUSY_RETRIES 5 |
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#define | SATA_ID_DEVICE_DATA_TIMER_VALUE (3 * 1000 * 1000) /* 3 second */ |
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#define | SATA_ID_DEVICE_DATA_RETRIES 3 |
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#define | BC_TIMER_VALUE (5 * 1000 * 1000) /* 5 second */ |
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#define | SMP_TIMER_VALUE (30 * 1000 * 1000) /* 30 second */ |
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#define | STP_DEVICE_TYPE 0 /* SATA behind expander 00*/ |
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#define | SAS_DEVICE_TYPE 1 /* SSP or SMP 01 */ |
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#define | SATA_DEVICE_TYPE 2 /* direct SATA 10 */ |
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#define | ATAPI_DEVICE_FLAG 0x200000 /* ATAPI device flag*/ |
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#define | SATA_ATA_DEVICE 0x01 |
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#define | SATA_ATAPI_DEVICE 0x02 |
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#define | SATA_PM_DEVICE 0x03 |
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#define | SATA_SEMB_DEVICE 0x04 |
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#define | SATA_SEMB_WO_SEP_DEVICE 0x05 |
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#define | UNKNOWN_DEVICE 0xFF |
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#define | SAS_NO_DEVICE 0 |
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#define | SAS_END_DEVICE 1 |
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#define | SAS_EDGE_EXPANDER_DEVICE 2 |
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#define | SAS_FANOUT_EXPANDER_DEVICE 3 |
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#define | SAS_ROUTING_DIRECT 0x00 |
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#define | SAS_ROUTING_SUBTRACTIVE 0x01 |
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#define | SAS_ROUTING_TABLE 0x02 |
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#define | SAS_CONNECTION_RATE_1_5G 0x08 |
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#define | SAS_CONNECTION_RATE_3_0G 0x09 |
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#define | SAS_CONNECTION_RATE_6_0G 0x0A |
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#define | SAS_CONNECTION_RATE_12_0G 0x0B |
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#define | IT_NEXUS_TIMEOUT 0x7D0 /* 2000 ms; old value was 0xFFFF */ |
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#define | DEVINFO_GET_SAS_ADDRESSLO(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressLo) |
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#define | DEVINFO_GET_SAS_ADDRESSHI(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressHi) |
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#define | DEVINFO_GET_DEVICETTYPE(devInfo) (((devInfo)->devType_S_Rate & 0xC0) >> 6) |
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#define | DEVINFO_GET_LINKRATE(devInfo) ((devInfo)->devType_S_Rate & 0x0F) |
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#define | DM_DEFAULT_DEVICE 0 |
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#define | DM_SAS_DEVICE 1 |
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#define | DM_SATA_DEVICE 2 |
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#define | DEVICE_SSP_BIT 0x8 /* SSP Initiator port */ |
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#define | DEVICE_STP_BIT 0x4 /* STP Initiator port */ |
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#define | DEVICE_SMP_BIT 0x2 /* SMP Initiator port */ |
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#define | DEVICE_SATA_BIT 0x1 /* SATA device, valid in the discovery response only */ |
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#define | DEVICE_IS_SSP_INITIATOR(DeviceData) (((DeviceData)->initiator_ssp_stp_smp & DEVICE_SSP_BIT) == DEVICE_SSP_BIT) |
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#define | DEVICE_IS_STP_INITIATOR(DeviceData) (((DeviceData)->initiator_ssp_stp_smp & DEVICE_STP_BIT) == DEVICE_STP_BIT) |
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#define | DEVICE_IS_SMP_INITIATOR(DeviceData) (((DeviceData)->initiator_ssp_stp_smp & DEVICE_SMP_BIT) == DEVICE_SMP_BIT) |
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#define | DEVICE_IS_SSP_TARGET(DeviceData) (((DeviceData)->target_ssp_stp_smp & DEVICE_SSP_BIT) == DEVICE_SSP_BIT) |
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#define | DEVICE_IS_STP_TARGET(DeviceData) (((DeviceData)->target_ssp_stp_smp & DEVICE_STP_BIT) == DEVICE_STP_BIT) |
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#define | DEVICE_IS_SMP_TARGET(DeviceData) (((DeviceData)->target_ssp_stp_smp & DEVICE_SMP_BIT) == DEVICE_SMP_BIT) |
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#define | DEVICE_IS_SATA_DEVICE(DeviceData) (((DeviceData)->target_ssp_stp_smp & DEVICE_SATA_BIT) == DEVICE_SATA_BIT) |
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#define | DEVINFO_GET_SAS_ADDRESSLO(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressLo) |
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#define | DEVINFO_GET_SAS_ADDRESSHI(devInfo) DMA_BEBIT32_TO_BIT32(*(bit32 *)(devInfo)->sasAddressHi) |
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#define | DEVINFO_GET_DEVICETTYPE(devInfo) (((devInfo)->devType_S_Rate & 0xC0) >> 6) |
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#define | DEVINFO_GET_LINKRATE(devInfo) ((devInfo)->devType_S_Rate & 0x0F) |
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#define | DEVINFO_GET_EXT_SMP(devInfo) (((devInfo)->ext & 0x100) >> 8) |
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#define | DEVINFO_GET_EXT_EXPANDER_TYPE(devInfo) (((devInfo)->ext & 0x600) >> 9) |
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#define | DEVINFO_GET_EXT_MCN(devInfo) (((devInfo)->ext & 0x7800) >> 11) |
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#define | DEVINFO_PUT_SMPTO(devInfo, smpto) ((devInfo)->smpTimeout) = smpto |
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#define | DEVINFO_PUT_ITNEXUSTO(devInfo, itnexusto) ((devInfo)->it_NexusTimeout) = itnexusto |
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#define | DEVINFO_PUT_FBS(devInfo, fbs) ((devInfo)->firstBurstSize) = fbs |
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#define | DEVINFO_PUT_FLAG(devInfo, tlr) ((devInfo)->flag) = tlr |
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#define | DEVINFO_PUT_DEV_S_RATE(devInfo, dev_s_rate) ((devInfo)->devType_S_Rate) = dev_s_rate |
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#define | DEVINFO_PUT_SAS_ADDRESSLO(devInfo, src32) *(bit32 *)((devInfo)->sasAddressLo) = BIT32_TO_DMA_BEBIT32(src32) |
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#define | DEVINFO_PUT_SAS_ADDRESSHI(devInfo, src32) *(bit32 *)((devInfo)->sasAddressHi) = BIT32_TO_DMA_BEBIT32(src32) |
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#define | DEVINFO_PUT_INITIATOR_SSP_STP_SMP(devInfo, ini_ssp_stp_smp) ((devInfo)->initiator_ssp_stp_smp) = ini_ssp_stp_smp |
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#define | DEVINFO_PUT_TARGET_SSP_STP_SMP(devInfo, tgt_ssp_stp_smp) ((devInfo)->target_ssp_stp_smp) = tgt_ssp_stp_smp |
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#define | DEVINFO_PUT_EXT(devInfo, extension) ((devInfo)->ext) = extension |
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