The file defines the MPI Application Programming Interface (API) More...

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Data Structures
struct	mpiMsgHeader_s
	MPI message header. More...

struct	spc_configMainDescriptor_s

struct	spc_GSTableDescriptor_s
	This structure is used for SPC MPI General Status Table. More...

struct	spc_SPASTable_s
	SAS Phy Analog Setup Table. More...

struct	spc_inboundQueueDescriptor_s
	This structure is used to configure inbound queues. More...

struct	spc_outboundQueueDescriptor_s
	This structure is used to configure outbound queues. More...

struct	InterruptVT_s

struct	mpiInterruptVT_s

struct	phyAttrb_s

struct	sasPhyAttribute_s

struct	fwMSGUConfig_s

Macros
#define	SPC_MSGU_CFG_TABLE_UPDATE 0x001 /* Inbound doorbell bit0 */

#define	SPC_MSGU_CFG_TABLE_RESET 0x002 /* Inbound doorbell bit1 */

#define	SPC_MSGU_CFG_TABLE_FREEZE 0x004 /* Inbound doorbell bit2 */

#define	SPC_MSGU_CFG_TABLE_UNFREEZE 0x008 /* Inbound doorbell bit4 */

#define	SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO 0x080 /* Inbound doorbell bit7 SPCV */

#define	SPCV_MSGU_HALT_CPUS 0x100 /* Inbound doorbell bit8 SPCV */

#define	V_BIT 0x1

#define	V_MASK 0x1

#define	BC_MASK 0x1F

#define	OBID_MASK 0x3F

#define	CAT_MASK 0x0F

#define	OPCODE_MASK 0xFFF

#define	HEADER_V_MASK 0x80000000

#define	HEADER_BC_MASK 0x1f000000

#define	MAIN_SIGNATURE_OFFSET 0x00 /* DWORD 0x00 (R) */

#define	MAIN_INTERFACE_REVISION 0x04 /* DWORD 0x01 (R) */

#define	MAIN_FW_REVISION 0x08 /* DWORD 0x02 (R) */

#define	MAIN_MAX_OUTSTANDING_IO_OFFSET 0x0C /* DWORD 0x03 (R) */

#define	MAIN_MAX_SGL_OFFSET 0x10 /* DWORD 0x04 (R) */

#define	MAIN_CNTRL_CAP_OFFSET 0x14 /* DWORD 0x05 (R) */

#define	MAIN_GST_OFFSET 0x18 /* DWORD 0x06 (R) */

#define	MAIN_IBQ_OFFSET 0x1C /* DWORD 0x07 (R) */

#define	MAIN_OBQ_OFFSET 0x20 /* DWORD 0x08 (R) */

#define	MAIN_IQNPPD_HPPD_OFFSET 0x24 /* DWORD 0x09 (W) */

#define	MAIN_OB_HW_EVENT_PID03_OFFSET 0x28 /* DWORD 0x0A (W) / / reserved for SPCV */

#define	MAIN_OB_HW_EVENT_PID47_OFFSET 0x2C /* DWORD 0x0B (W) / / reserved for SPCV */

#define	MAIN_OB_NCQ_EVENT_PID03_OFFSET 0x30 /* DWORD 0x0C (W) / / reserved for SPCV */

#define	MAIN_OB_NCQ_EVENT_PID47_OFFSET 0x34 /* DWORD 0x0D (W) / / reserved for SPCV */

#define	MAIN_TITNX_EVENT_PID03_OFFSET 0x38 /* DWORD 0x0E (W) / / reserved for SPCV */

#define	MAIN_TITNX_EVENT_PID47_OFFSET 0x3C /* DWORD 0x0F (W) / / reserved for SPCV */

#define	MAIN_OB_SSP_EVENT_PID03_OFFSET 0x40 /* DWORD 0x10 (W) / / reserved for SPCV */

#define	MAIN_OB_SSP_EVENT_PID47_OFFSET 0x44 /* DWORD 0x11 (W) / / reserved for SPCV */

#define	MAIN_IO_ABORT_DELAY 0x48 /* DWORD 0x12 (W) / / reserved for SPCV */

#define	MAIN_CUSTOMER_SETTING 0x4C /* DWORD 0x13 (W) / / reserved for SPCV */

#define	MAIN_EVENT_LOG_ADDR_HI 0x50 /* DWORD 0x14 (W) */

#define	MAIN_EVENT_LOG_ADDR_LO 0x54 /* DWORD 0x15 (W) */

#define	MAIN_EVENT_LOG_BUFF_SIZE 0x58 /* DWORD 0x16 (W) */

#define	MAIN_EVENT_LOG_OPTION 0x5C /* DWORD 0x17 (W) */

#define	MAIN_IOP_EVENT_LOG_ADDR_HI 0x60 /* DWORD 0x18 (W) */

#define	MAIN_IOP_EVENT_LOG_ADDR_LO 0x64 /* DWORD 0x19 (W) */

#define	MAIN_IOP_EVENT_LOG_BUFF_SIZE 0x68 /* DWORD 0x1A (W) */

#define	MAIN_IOP_EVENT_LOG_OPTION 0x6C /* DWORD 0x1B (W) */

#define	MAIN_FATAL_ERROR_INTERRUPT 0x70 /* DWORD 0x1C (W) */

#define	MAIN_FATAL_ERROR_RDUMP0_OFFSET 0x74 /* DWORD 0x1D (R) */

#define	MAIN_FATAL_ERROR_RDUMP0_LENGTH 0x78 /* DWORD 0x1E (R) */

#define	MAIN_FATAL_ERROR_RDUMP1_OFFSET 0x7C /* DWORD 0x1F (R) */

#define	MAIN_FATAL_ERROR_RDUMP1_LENGTH 0x80 /* DWORD 0x20 (R) */

#define	MAIN_HDA_FLAGS_OFFSET 0x84 /* DWORD 0x21 (R) / / reserved for SPCV */

#define	MAIN_ANALOG_SETUP_OFFSET 0x88 /* DWORD 0x22 (R) */

#define	MAIN_INT_VEC_TABLE_OFFSET 0x8C /* DWORD 0x23 (W) / / for SPCV */

#define	MAIN_PHY_ATTRIBUTE_OFFSET 0x90 /* DWORD 0x24 (W) / / for SPCV */

#define	MAIN_PRECTD_PRESETD 0x94 /* DWORD 0x25 (W) / / for SPCV */

#define	MAIN_IRAD_RESERVED 0x98 /* DWORD 0x26 (W) / / for SPCV */

#define	MAIN_MOQFOT_MOQFOES 0x9C /* DWORD 0x27 (W) / / for SPCV */

#define	MAIN_MERRDCTO_MERRDCES 0xA0 /* DWORD 0x28 (W) / / for SPCV */

#define	MAIN_ILAT_ILAV_ILASMRN_ILAMRN_ILAMJN 0xA4 /* DWORD 0x29 (W) / / for SPCV */

#define	MAIN_INACTIVE_ILA_REVSION 0xA8 /* DWORD 0x2A (W) / / for SPCV V 3.02 */

#define	MAIN_SEEPROM_REVSION 0xAC /* DWORD 0x2B (W) / / for SPCV V 3.02 */

#define	MAIN_UNKNOWN1 0xB0 /* DWORD 0x2C (W) / / for SPCV V 3.03 */

#define	MAIN_UNKNOWN2 0xB4 /* DWORD 0x2D (W) / / for SPCV V 3.03 */

#define	MAIN_UNKNOWN3 0xB8 /* DWORD 0x2E (W) / / for SPCV V 3.03 */

#define	MAIN_XCBI_REF_TAG_PAT 0xBC /* DWORD 0x2F (W) / / for SPCV V 3.03 */

#define	MAIN_AWT_MIDRANGE 0xC0 /* DWORD 0x30 (W) / / for SPCV V 3.03 */

#define	SPC_CONFIG

#define	MAIN_IO_ABORT_DELAY_END_TO_END_CRC_DISABLE 0x00010000

#define	MAIN_MAX_IB_MASK 0x000000ff /* bit7-0 */

#define	MAIN_MAX_OB_MASK 0x0000ff00 /* bit15-8 */

#define	MAIN_PHY_COUNT_MASK 0x01f80000 /* bit24-19 */

#define	MAIN_QSUPPORT_BITS 0x0007ffff

#define	MAIN_SAS_SUPPORT_BITS 0xfe000000

#define	MAIN_MAX_SGL_BITS 0xFFFF

#define	MAIN_MAX_DEV_BITS 0xFFFF0000

#define	MAIN_HDA_FLAG_BITS 0x000000FF

#define	FATAL_ERROR_INT_BITS 0xFF

#define	INT_REASRT_ENABLE 0x00020000

#define	INT_REASRT_MS_ENABLE 0x00040000

#define	INT_REASRT_DELAY_BITS 0xFFF80000

#define	MAX_VALID_PHYS 8

#define	IB_QUEUE_CFGSIZE 64

#define	OB_QUEUE_CFGSIZE 64

#define	IB_PROPERITY_OFFSET 0x00

#define	IB_BASE_ADDR_HI_OFFSET 0x04

#define	IB_BASE_ADDR_LO_OFFSET 0x08

#define	IB_CI_BASE_ADDR_HI_OFFSET 0x0C

#define	IB_CI_BASE_ADDR_LO_OFFSET 0x10

#define	IB_PIPCI_BAR 0x14

#define	IB_PIPCI_BAR_OFFSET 0x18

#define	IB_RESERVED_OFFSET 0x1C

#define	OB_PROPERITY_OFFSET 0x00

#define	OB_BASE_ADDR_HI_OFFSET 0x04

#define	OB_BASE_ADDR_LO_OFFSET 0x08

#define	OB_PI_BASE_ADDR_HI_OFFSET 0x0C

#define	OB_PI_BASE_ADDR_LO_OFFSET 0x10

#define	OB_CIPCI_BAR 0x14

#define	OB_CIPCI_BAR_OFFSET 0x18

#define	OB_INTERRUPT_COALES_OFFSET 0x1C

#define	OB_DYNAMIC_COALES_OFFSET 0x20

#define	OB_PROPERTY_INT_ENABLE 0x40000000

#define	GST_GSTLEN_MPIS_OFFSET 0x00

#define	GST_IQ_FREEZE_STATE0_OFFSET 0x04

#define	GST_IQ_FREEZE_STATE1_OFFSET 0x08

#define	GST_MSGUTCNT_OFFSET 0x0C

#define	GST_IOPTCNT_OFFSET 0x10

#define	GST_IOP1TCNT_OFFSET 0x14

#define	GST_PHYSTATE_OFFSET 0x18 /* SPCV reserved */

#define	GST_PHYSTATE0_OFFSET 0x18 /* SPCV reserved */

#define	GST_PHYSTATE1_OFFSET 0x1C /* SPCV reserved */

#define	GST_PHYSTATE2_OFFSET 0x20 /* SPCV reserved */

#define	GST_PHYSTATE3_OFFSET 0x24 /* SPCV reserved */

#define	GST_PHYSTATE4_OFFSET 0x28 /* SPCV reserved */

#define	GST_PHYSTATE5_OFFSET 0x2C /* SPCV reserved */

#define	GST_PHYSTATE6_OFFSET 0x30 /* SPCV reserved */

#define	GST_PHYSTATE7_OFFSET 0x34 /* SPCV reserved */

#define	GST_GPIO_PINS_OFFSET 0x38

#define	GST_RERRINFO_OFFSET 0x44

#define	GST_MPI_STATE_UNINIT 0x00

#define	GST_MPI_STATE_INIT 0x01

#define	GST_MPI_STATE_TERMINATION 0x02

#define	GST_MPI_STATE_ERROR 0x03

#define	GST_MPI_STATE_MASK 0x07

#define	GST_INF_STATE_BITS 0xfffe0007

#define	MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF

#define	MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24) /* for SPCV */

#define	MPI_FATAL_EDUMP_TABLE_LO_OFFSET 0x00 /* HNFBUFL */

#define	MPI_FATAL_EDUMP_TABLE_HI_OFFSET 0x04 /* HNFBUFH */

#define	MPI_FATAL_EDUMP_TABLE_LENGTH 0x08 /* HNFBLEN */

#define	MPI_FATAL_EDUMP_TABLE_HANDSHAKE 0x0C /* FDDHSHK */

#define	MPI_FATAL_EDUMP_TABLE_STATUS 0x10 /* FDDTSTAT */

#define	MPI_FATAL_EDUMP_TABLE_ACCUM_LEN 0x14 /* ACCDDLEN */

#define	MPI_FATAL_EDUMP_HANDSHAKE_RDY 0x1

#define	MPI_FATAL_EDUMP_HANDSHAKE_BUSY 0x0

#define	MPI_FATAL_EDUMP_TABLE_STAT_RSVD 0x0

#define	MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED 0x1

#define	MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2

#define	MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE 0x3

#define	IOCTL_ERROR_NO_FATAL_ERROR 0x77

#define	INT_VT_Coal_CNT_TO 0

#define	INT_VT_Coal_ReAssert_Enab 4

#define	PHY_STATE 0

#define	PHY_EVENT_OQ 4

Typedefs
typedef struct mpiMsgHeader_s	mpiMsgHeader_t

typedef struct spc_configMainDescriptor_s	spc_configMainDescriptor_t

typedef struct spc_GSTableDescriptor_s	spc_GSTableDescriptor_t

typedef struct spc_SPASTable_s	spc_SPASTable_t

typedef struct spc_inboundQueueDescriptor_s	spc_inboundQueueDescriptor_t

typedef struct spc_outboundQueueDescriptor_s	spc_outboundQueueDescriptor_t

typedef struct InterruptVT_s	InterruptVT_t

typedef struct mpiInterruptVT_s	mpiInterruptVT_t

typedef struct phyAttrb_s	phyAttrb_t

typedef struct sasPhyAttribute_s	sasPhyAttribute_t

typedef struct fwMSGUConfig_s	fwMSGUConfig_t

typedef void(*	EnadDisabHandler_t) (agsaRoot_t *agRoot, bit32 interruptVectorIndex)

typedef bit32(*	InterruptOurs_t) (agsaRoot_t *agRoot, bit32 interruptVectorIndex)

Detailed Description

The file defines the MPI Application Programming Interface (API)

The file defines the MPI Application Programming Interfacde (API)

Definition in file spcdefs.h.

Macro Definition Documentation

◆ BC_MASK

#define BC_MASK 0x1F

Definition at line 79 of file spcdefs.h.

◆ CAT_MASK

#define CAT_MASK 0x0F

Definition at line 81 of file spcdefs.h.

◆ FATAL_ERROR_INT_BITS

#define FATAL_ERROR_INT_BITS 0xFF

Definition at line 296 of file spcdefs.h.

◆ GST_GPIO_PINS_OFFSET

#define GST_GPIO_PINS_OFFSET 0x38

Definition at line 344 of file spcdefs.h.

◆ GST_GSTLEN_MPIS_OFFSET

#define GST_GSTLEN_MPIS_OFFSET 0x00

Definition at line 329 of file spcdefs.h.

◆ GST_INF_STATE_BITS

#define GST_INF_STATE_BITS 0xfffe0007

Definition at line 354 of file spcdefs.h.

◆ GST_IOP1TCNT_OFFSET

#define GST_IOP1TCNT_OFFSET 0x14

Definition at line 334 of file spcdefs.h.

◆ GST_IOPTCNT_OFFSET

#define GST_IOPTCNT_OFFSET 0x10

Definition at line 333 of file spcdefs.h.

◆ GST_IQ_FREEZE_STATE0_OFFSET

#define GST_IQ_FREEZE_STATE0_OFFSET 0x04

Definition at line 330 of file spcdefs.h.

◆ GST_IQ_FREEZE_STATE1_OFFSET

#define GST_IQ_FREEZE_STATE1_OFFSET 0x08

Definition at line 331 of file spcdefs.h.

◆ GST_MPI_STATE_ERROR

#define GST_MPI_STATE_ERROR 0x03

Definition at line 351 of file spcdefs.h.

◆ GST_MPI_STATE_INIT

#define GST_MPI_STATE_INIT 0x01

Definition at line 349 of file spcdefs.h.

◆ GST_MPI_STATE_MASK

#define GST_MPI_STATE_MASK 0x07

Definition at line 352 of file spcdefs.h.

◆ GST_MPI_STATE_TERMINATION

#define GST_MPI_STATE_TERMINATION 0x02

Definition at line 350 of file spcdefs.h.

◆ GST_MPI_STATE_UNINIT

#define GST_MPI_STATE_UNINIT 0x00

Definition at line 348 of file spcdefs.h.

◆ GST_MSGUTCNT_OFFSET

#define GST_MSGUTCNT_OFFSET 0x0C

Definition at line 332 of file spcdefs.h.

◆ GST_PHYSTATE0_OFFSET

#define GST_PHYSTATE0_OFFSET 0x18 /* SPCV reserved */

Definition at line 336 of file spcdefs.h.

◆ GST_PHYSTATE1_OFFSET

#define GST_PHYSTATE1_OFFSET 0x1C /* SPCV reserved */

Definition at line 337 of file spcdefs.h.

◆ GST_PHYSTATE2_OFFSET

#define GST_PHYSTATE2_OFFSET 0x20 /* SPCV reserved */

Definition at line 338 of file spcdefs.h.

◆ GST_PHYSTATE3_OFFSET

#define GST_PHYSTATE3_OFFSET 0x24 /* SPCV reserved */

Definition at line 339 of file spcdefs.h.

◆ GST_PHYSTATE4_OFFSET

#define GST_PHYSTATE4_OFFSET 0x28 /* SPCV reserved */

Definition at line 340 of file spcdefs.h.

◆ GST_PHYSTATE5_OFFSET

#define GST_PHYSTATE5_OFFSET 0x2C /* SPCV reserved */

Definition at line 341 of file spcdefs.h.

◆ GST_PHYSTATE6_OFFSET

#define GST_PHYSTATE6_OFFSET 0x30 /* SPCV reserved */

Definition at line 342 of file spcdefs.h.

◆ GST_PHYSTATE7_OFFSET

#define GST_PHYSTATE7_OFFSET 0x34 /* SPCV reserved */

Definition at line 343 of file spcdefs.h.

◆ GST_PHYSTATE_OFFSET

#define GST_PHYSTATE_OFFSET 0x18 /* SPCV reserved */

Definition at line 335 of file spcdefs.h.

◆ GST_RERRINFO_OFFSET

#define GST_RERRINFO_OFFSET 0x44

Definition at line 345 of file spcdefs.h.

◆ HEADER_BC_MASK

#define HEADER_BC_MASK 0x1f000000

Definition at line 84 of file spcdefs.h.

◆ HEADER_V_MASK

#define HEADER_V_MASK 0x80000000

Definition at line 83 of file spcdefs.h.

◆ IB_BASE_ADDR_HI_OFFSET

#define IB_BASE_ADDR_HI_OFFSET 0x04

Definition at line 307 of file spcdefs.h.

◆ IB_BASE_ADDR_LO_OFFSET

#define IB_BASE_ADDR_LO_OFFSET 0x08

Definition at line 308 of file spcdefs.h.

◆ IB_CI_BASE_ADDR_HI_OFFSET

#define IB_CI_BASE_ADDR_HI_OFFSET 0x0C

Definition at line 309 of file spcdefs.h.

◆ IB_CI_BASE_ADDR_LO_OFFSET

#define IB_CI_BASE_ADDR_LO_OFFSET 0x10

Definition at line 310 of file spcdefs.h.

◆ IB_PIPCI_BAR

#define IB_PIPCI_BAR 0x14

Definition at line 311 of file spcdefs.h.

◆ IB_PIPCI_BAR_OFFSET

#define IB_PIPCI_BAR_OFFSET 0x18

Definition at line 312 of file spcdefs.h.

◆ IB_PROPERITY_OFFSET

#define IB_PROPERITY_OFFSET 0x00

Definition at line 306 of file spcdefs.h.

◆ IB_QUEUE_CFGSIZE

#define IB_QUEUE_CFGSIZE 64

Definition at line 302 of file spcdefs.h.

◆ IB_RESERVED_OFFSET

#define IB_RESERVED_OFFSET 0x1C

Definition at line 313 of file spcdefs.h.

◆ INT_REASRT_DELAY_BITS

#define INT_REASRT_DELAY_BITS 0xFFF80000

Definition at line 299 of file spcdefs.h.

◆ INT_REASRT_ENABLE

#define INT_REASRT_ENABLE 0x00020000

Definition at line 297 of file spcdefs.h.

◆ INT_REASRT_MS_ENABLE

#define INT_REASRT_MS_ENABLE 0x00040000

Definition at line 298 of file spcdefs.h.

◆ INT_VT_Coal_CNT_TO

#define INT_VT_Coal_CNT_TO 0

Definition at line 508 of file spcdefs.h.

◆ INT_VT_Coal_ReAssert_Enab

#define INT_VT_Coal_ReAssert_Enab 4

Definition at line 509 of file spcdefs.h.

◆ IOCTL_ERROR_NO_FATAL_ERROR

#define IOCTL_ERROR_NO_FATAL_ERROR 0x77

Definition at line 377 of file spcdefs.h.

◆ MAIN_ANALOG_SETUP_OFFSET

#define MAIN_ANALOG_SETUP_OFFSET 0x88 /* DWORD 0x22 (R) */

Definition at line 258 of file spcdefs.h.

◆ MAIN_AWT_MIDRANGE

#define MAIN_AWT_MIDRANGE 0xC0 /* DWORD 0x30 (W) */ /* for SPCV V 3.03 */

Definition at line 272 of file spcdefs.h.

◆ MAIN_CNTRL_CAP_OFFSET

#define MAIN_CNTRL_CAP_OFFSET 0x14 /* DWORD 0x05 (R) */

Definition at line 229 of file spcdefs.h.

◆ MAIN_CUSTOMER_SETTING

#define MAIN_CUSTOMER_SETTING 0x4C /* DWORD 0x13 (W) */ /* reserved for SPCV */

Definition at line 243 of file spcdefs.h.

◆ MAIN_EVENT_LOG_ADDR_HI

#define MAIN_EVENT_LOG_ADDR_HI 0x50 /* DWORD 0x14 (W) */

Definition at line 244 of file spcdefs.h.

◆ MAIN_EVENT_LOG_ADDR_LO

#define MAIN_EVENT_LOG_ADDR_LO 0x54 /* DWORD 0x15 (W) */

Definition at line 245 of file spcdefs.h.

◆ MAIN_EVENT_LOG_BUFF_SIZE

#define MAIN_EVENT_LOG_BUFF_SIZE 0x58 /* DWORD 0x16 (W) */

Definition at line 246 of file spcdefs.h.

◆ MAIN_EVENT_LOG_OPTION

#define MAIN_EVENT_LOG_OPTION 0x5C /* DWORD 0x17 (W) */

Definition at line 247 of file spcdefs.h.

◆ MAIN_FATAL_ERROR_INTERRUPT

#define MAIN_FATAL_ERROR_INTERRUPT 0x70 /* DWORD 0x1C (W) */

Definition at line 252 of file spcdefs.h.

◆ MAIN_FATAL_ERROR_RDUMP0_LENGTH

#define MAIN_FATAL_ERROR_RDUMP0_LENGTH 0x78 /* DWORD 0x1E (R) */

Definition at line 254 of file spcdefs.h.

◆ MAIN_FATAL_ERROR_RDUMP0_OFFSET

#define MAIN_FATAL_ERROR_RDUMP0_OFFSET 0x74 /* DWORD 0x1D (R) */

Definition at line 253 of file spcdefs.h.

◆ MAIN_FATAL_ERROR_RDUMP1_LENGTH

#define MAIN_FATAL_ERROR_RDUMP1_LENGTH 0x80 /* DWORD 0x20 (R) */

Definition at line 256 of file spcdefs.h.

◆ MAIN_FATAL_ERROR_RDUMP1_OFFSET

#define MAIN_FATAL_ERROR_RDUMP1_OFFSET 0x7C /* DWORD 0x1F (R) */

Definition at line 255 of file spcdefs.h.

◆ MAIN_FW_REVISION

#define MAIN_FW_REVISION 0x08 /* DWORD 0x02 (R) */

Definition at line 226 of file spcdefs.h.

◆ MAIN_GST_OFFSET

#define MAIN_GST_OFFSET 0x18 /* DWORD 0x06 (R) */

Definition at line 230 of file spcdefs.h.

◆ MAIN_HDA_FLAG_BITS

#define MAIN_HDA_FLAG_BITS 0x000000FF

Definition at line 294 of file spcdefs.h.

◆ MAIN_HDA_FLAGS_OFFSET

#define MAIN_HDA_FLAGS_OFFSET 0x84 /* DWORD 0x21 (R) */ /* reserved for SPCV */

Definition at line 257 of file spcdefs.h.

◆ MAIN_IBQ_OFFSET

#define MAIN_IBQ_OFFSET 0x1C /* DWORD 0x07 (R) */

Definition at line 231 of file spcdefs.h.

◆ MAIN_ILAT_ILAV_ILASMRN_ILAMRN_ILAMJN

#define MAIN_ILAT_ILAV_ILASMRN_ILAMRN_ILAMJN 0xA4 /* DWORD 0x29 (W) */ /* for SPCV */

Definition at line 265 of file spcdefs.h.

◆ MAIN_INACTIVE_ILA_REVSION

#define MAIN_INACTIVE_ILA_REVSION 0xA8 /* DWORD 0x2A (W) */ /* for SPCV V 3.02 */

Definition at line 266 of file spcdefs.h.

◆ MAIN_INT_VEC_TABLE_OFFSET

#define MAIN_INT_VEC_TABLE_OFFSET 0x8C /* DWORD 0x23 (W) */ /* for SPCV */

Definition at line 259 of file spcdefs.h.

◆ MAIN_INTERFACE_REVISION

#define MAIN_INTERFACE_REVISION 0x04 /* DWORD 0x01 (R) */

Definition at line 225 of file spcdefs.h.

◆ MAIN_IO_ABORT_DELAY

#define MAIN_IO_ABORT_DELAY 0x48 /* DWORD 0x12 (W) */ /* reserved for SPCV */

Definition at line 242 of file spcdefs.h.

◆ MAIN_IO_ABORT_DELAY_END_TO_END_CRC_DISABLE

#define MAIN_IO_ABORT_DELAY_END_TO_END_CRC_DISABLE 0x00010000

Definition at line 280 of file spcdefs.h.

◆ MAIN_IOP_EVENT_LOG_ADDR_HI

#define MAIN_IOP_EVENT_LOG_ADDR_HI 0x60 /* DWORD 0x18 (W) */

Definition at line 248 of file spcdefs.h.

◆ MAIN_IOP_EVENT_LOG_ADDR_LO

#define MAIN_IOP_EVENT_LOG_ADDR_LO 0x64 /* DWORD 0x19 (W) */

Definition at line 249 of file spcdefs.h.

◆ MAIN_IOP_EVENT_LOG_BUFF_SIZE

#define MAIN_IOP_EVENT_LOG_BUFF_SIZE 0x68 /* DWORD 0x1A (W) */

Definition at line 250 of file spcdefs.h.

◆ MAIN_IOP_EVENT_LOG_OPTION

#define MAIN_IOP_EVENT_LOG_OPTION 0x6C /* DWORD 0x1B (W) */

Definition at line 251 of file spcdefs.h.

◆ MAIN_IQNPPD_HPPD_OFFSET

#define MAIN_IQNPPD_HPPD_OFFSET 0x24 /* DWORD 0x09 (W) */

Definition at line 233 of file spcdefs.h.

◆ MAIN_IRAD_RESERVED

#define MAIN_IRAD_RESERVED 0x98 /* DWORD 0x26 (W) */ /* for SPCV */

Definition at line 262 of file spcdefs.h.

◆ MAIN_MAX_DEV_BITS

#define MAIN_MAX_DEV_BITS 0xFFFF0000

Definition at line 291 of file spcdefs.h.

◆ MAIN_MAX_IB_MASK

#define MAIN_MAX_IB_MASK 0x000000ff /* bit7-0 */

Definition at line 283 of file spcdefs.h.

◆ MAIN_MAX_OB_MASK

#define MAIN_MAX_OB_MASK 0x0000ff00 /* bit15-8 */

Definition at line 284 of file spcdefs.h.

◆ MAIN_MAX_OUTSTANDING_IO_OFFSET

#define MAIN_MAX_OUTSTANDING_IO_OFFSET 0x0C /* DWORD 0x03 (R) */

Definition at line 227 of file spcdefs.h.

◆ MAIN_MAX_SGL_BITS

#define MAIN_MAX_SGL_BITS 0xFFFF

Definition at line 290 of file spcdefs.h.

◆ MAIN_MAX_SGL_OFFSET

#define MAIN_MAX_SGL_OFFSET 0x10 /* DWORD 0x04 (R) */

Definition at line 228 of file spcdefs.h.

◆ MAIN_MERRDCTO_MERRDCES

#define MAIN_MERRDCTO_MERRDCES 0xA0 /* DWORD 0x28 (W) */ /* for SPCV */

Definition at line 264 of file spcdefs.h.

◆ MAIN_MOQFOT_MOQFOES

#define MAIN_MOQFOT_MOQFOES 0x9C /* DWORD 0x27 (W) */ /* for SPCV */

Definition at line 263 of file spcdefs.h.

◆ MAIN_OB_HW_EVENT_PID03_OFFSET

#define MAIN_OB_HW_EVENT_PID03_OFFSET 0x28 /* DWORD 0x0A (W) */ /* reserved for SPCV */

Definition at line 234 of file spcdefs.h.

◆ MAIN_OB_HW_EVENT_PID47_OFFSET

#define MAIN_OB_HW_EVENT_PID47_OFFSET 0x2C /* DWORD 0x0B (W) */ /* reserved for SPCV */

Definition at line 235 of file spcdefs.h.

◆ MAIN_OB_NCQ_EVENT_PID03_OFFSET

#define MAIN_OB_NCQ_EVENT_PID03_OFFSET 0x30 /* DWORD 0x0C (W) */ /* reserved for SPCV */

Definition at line 236 of file spcdefs.h.

◆ MAIN_OB_NCQ_EVENT_PID47_OFFSET

#define MAIN_OB_NCQ_EVENT_PID47_OFFSET 0x34 /* DWORD 0x0D (W) */ /* reserved for SPCV */

Definition at line 237 of file spcdefs.h.

◆ MAIN_OB_SSP_EVENT_PID03_OFFSET

#define MAIN_OB_SSP_EVENT_PID03_OFFSET 0x40 /* DWORD 0x10 (W) */ /* reserved for SPCV */

Definition at line 240 of file spcdefs.h.

◆ MAIN_OB_SSP_EVENT_PID47_OFFSET

#define MAIN_OB_SSP_EVENT_PID47_OFFSET 0x44 /* DWORD 0x11 (W) */ /* reserved for SPCV */

Definition at line 241 of file spcdefs.h.

◆ MAIN_OBQ_OFFSET

#define MAIN_OBQ_OFFSET 0x20 /* DWORD 0x08 (R) */

Definition at line 232 of file spcdefs.h.

◆ MAIN_PHY_ATTRIBUTE_OFFSET

#define MAIN_PHY_ATTRIBUTE_OFFSET 0x90 /* DWORD 0x24 (W) */ /* for SPCV */

Definition at line 260 of file spcdefs.h.

◆ MAIN_PHY_COUNT_MASK

#define MAIN_PHY_COUNT_MASK 0x01f80000 /* bit24-19 */

Definition at line 285 of file spcdefs.h.

◆ MAIN_PRECTD_PRESETD

#define MAIN_PRECTD_PRESETD 0x94 /* DWORD 0x25 (W) */ /* for SPCV */

Definition at line 261 of file spcdefs.h.

◆ MAIN_QSUPPORT_BITS

#define MAIN_QSUPPORT_BITS 0x0007ffff

Definition at line 286 of file spcdefs.h.

◆ MAIN_SAS_SUPPORT_BITS

#define MAIN_SAS_SUPPORT_BITS 0xfe000000

Definition at line 287 of file spcdefs.h.

◆ MAIN_SEEPROM_REVSION

#define MAIN_SEEPROM_REVSION 0xAC /* DWORD 0x2B (W) */ /* for SPCV V 3.02 */

Definition at line 267 of file spcdefs.h.

◆ MAIN_SIGNATURE_OFFSET

#define MAIN_SIGNATURE_OFFSET 0x00 /* DWORD 0x00 (R) */

Definition at line 224 of file spcdefs.h.

◆ MAIN_TITNX_EVENT_PID03_OFFSET

#define MAIN_TITNX_EVENT_PID03_OFFSET 0x38 /* DWORD 0x0E (W) */ /* reserved for SPCV */

Definition at line 238 of file spcdefs.h.

◆ MAIN_TITNX_EVENT_PID47_OFFSET

#define MAIN_TITNX_EVENT_PID47_OFFSET 0x3C /* DWORD 0x0F (W) */ /* reserved for SPCV */

Definition at line 239 of file spcdefs.h.

◆ MAIN_UNKNOWN1

#define MAIN_UNKNOWN1 0xB0 /* DWORD 0x2C (W) */ /* for SPCV V 3.03 */

Definition at line 268 of file spcdefs.h.

◆ MAIN_UNKNOWN2

#define MAIN_UNKNOWN2 0xB4 /* DWORD 0x2D (W) */ /* for SPCV V 3.03 */

Definition at line 269 of file spcdefs.h.

◆ MAIN_UNKNOWN3

#define MAIN_UNKNOWN3 0xB8 /* DWORD 0x2E (W) */ /* for SPCV V 3.03 */

Definition at line 270 of file spcdefs.h.

◆ MAIN_XCBI_REF_TAG_PAT

#define MAIN_XCBI_REF_TAG_PAT 0xBC /* DWORD 0x2F (W) */ /* for SPCV V 3.03 */

Definition at line 271 of file spcdefs.h.

◆ MAX_VALID_PHYS

#define MAX_VALID_PHYS 8

Definition at line 301 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_HANDSHAKE_BUSY

#define MPI_FATAL_EDUMP_HANDSHAKE_BUSY 0x0

Definition at line 370 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_HANDSHAKE_RDY

#define MPI_FATAL_EDUMP_HANDSHAKE_RDY 0x1

Definition at line 369 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_ACCUM_LEN

#define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN 0x14 /* ACCDDLEN */

Definition at line 367 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_HANDSHAKE

#define MPI_FATAL_EDUMP_TABLE_HANDSHAKE 0x0C /* FDDHSHK */

Definition at line 365 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_HI_OFFSET

#define MPI_FATAL_EDUMP_TABLE_HI_OFFSET 0x04 /* HNFBUFH */

Definition at line 363 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_LENGTH

#define MPI_FATAL_EDUMP_TABLE_LENGTH 0x08 /* HNFBLEN */

Definition at line 364 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_LO_OFFSET

#define MPI_FATAL_EDUMP_TABLE_LO_OFFSET 0x00 /* HNFBUFL */

Definition at line 362 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED

#define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED 0x1

Definition at line 373 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE

#define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE 0x3

Definition at line 375 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA

#define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2

Definition at line 374 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_STAT_RSVD

#define MPI_FATAL_EDUMP_TABLE_STAT_RSVD 0x0

Definition at line 372 of file spcdefs.h.

◆ MPI_FATAL_EDUMP_TABLE_STATUS

#define MPI_FATAL_EDUMP_TABLE_STATUS 0x10 /* FDDTSTAT */

Definition at line 366 of file spcdefs.h.

◆ MPI_FATAL_ERROR_TABLE_OFFSET_MASK

#define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF

Definition at line 358 of file spcdefs.h.

◆ MPI_FATAL_ERROR_TABLE_SIZE

#define MPI_FATAL_ERROR_TABLE_SIZE ( value ) ((0xFF000000 & value) >> SHIFT24) /* for SPCV */

Definition at line 359 of file spcdefs.h.

◆ OB_BASE_ADDR_HI_OFFSET

#define OB_BASE_ADDR_HI_OFFSET 0x04

Definition at line 317 of file spcdefs.h.

◆ OB_BASE_ADDR_LO_OFFSET

#define OB_BASE_ADDR_LO_OFFSET 0x08

Definition at line 318 of file spcdefs.h.

◆ OB_CIPCI_BAR

#define OB_CIPCI_BAR 0x14

Definition at line 321 of file spcdefs.h.

◆ OB_CIPCI_BAR_OFFSET

#define OB_CIPCI_BAR_OFFSET 0x18

Definition at line 322 of file spcdefs.h.

◆ OB_DYNAMIC_COALES_OFFSET

#define OB_DYNAMIC_COALES_OFFSET 0x20

Definition at line 324 of file spcdefs.h.

◆ OB_INTERRUPT_COALES_OFFSET

#define OB_INTERRUPT_COALES_OFFSET 0x1C

Definition at line 323 of file spcdefs.h.

◆ OB_PI_BASE_ADDR_HI_OFFSET

#define OB_PI_BASE_ADDR_HI_OFFSET 0x0C

Definition at line 319 of file spcdefs.h.

◆ OB_PI_BASE_ADDR_LO_OFFSET

#define OB_PI_BASE_ADDR_LO_OFFSET 0x10

Definition at line 320 of file spcdefs.h.

◆ OB_PROPERITY_OFFSET

#define OB_PROPERITY_OFFSET 0x00

Definition at line 316 of file spcdefs.h.

◆ OB_PROPERTY_INT_ENABLE

#define OB_PROPERTY_INT_ENABLE 0x40000000

Definition at line 326 of file spcdefs.h.

◆ OB_QUEUE_CFGSIZE

#define OB_QUEUE_CFGSIZE 64

Definition at line 303 of file spcdefs.h.

◆ OBID_MASK

#define OBID_MASK 0x3F

Definition at line 80 of file spcdefs.h.

◆ OPCODE_MASK

#define OPCODE_MASK 0xFFF

Definition at line 82 of file spcdefs.h.

◆ PHY_EVENT_OQ

#define PHY_EVENT_OQ 4

Definition at line 524 of file spcdefs.h.

◆ PHY_STATE

#define PHY_STATE 0

Definition at line 523 of file spcdefs.h.

◆ SPC_CONFIG

#define SPC_CONFIG

Definition at line 276 of file spcdefs.h.

◆ SPC_MSGU_CFG_TABLE_FREEZE

#define SPC_MSGU_CFG_TABLE_FREEZE 0x004 /* Inbound doorbell bit2 */

Definition at line 45 of file spcdefs.h.

◆ SPC_MSGU_CFG_TABLE_RESET

#define SPC_MSGU_CFG_TABLE_RESET 0x002 /* Inbound doorbell bit1 */

Definition at line 44 of file spcdefs.h.

◆ SPC_MSGU_CFG_TABLE_UNFREEZE

#define SPC_MSGU_CFG_TABLE_UNFREEZE 0x008 /* Inbound doorbell bit4 */

Definition at line 46 of file spcdefs.h.

◆ SPC_MSGU_CFG_TABLE_UPDATE

#define SPC_MSGU_CFG_TABLE_UPDATE 0x001 /* Inbound doorbell bit0 */

Definition at line 43 of file spcdefs.h.

◆ SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO

#define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO 0x080 /* Inbound doorbell bit7 SPCV */

Definition at line 47 of file spcdefs.h.

◆ SPCV_MSGU_HALT_CPUS

#define SPCV_MSGU_HALT_CPUS 0x100 /* Inbound doorbell bit8 SPCV */

Definition at line 48 of file spcdefs.h.

◆ V_BIT

#define V_BIT 0x1

Definition at line 76 of file spcdefs.h.

◆ V_MASK

#define V_MASK 0x1

Definition at line 78 of file spcdefs.h.

Typedef Documentation

◆ EnadDisabHandler_t

typedef void(* EnadDisabHandler_t) (agsaRoot_t *agRoot, bit32 interruptVectorIndex)

Definition at line 544 of file spcdefs.h.

◆ fwMSGUConfig_t

typedef struct fwMSGUConfig_s fwMSGUConfig_t

◆ InterruptOurs_t

typedef bit32(* InterruptOurs_t) (agsaRoot_t *agRoot, bit32 interruptVectorIndex)

Definition at line 549 of file spcdefs.h.

◆ InterruptVT_t

typedef struct InterruptVT_s InterruptVT_t

◆ mpiInterruptVT_t

typedef struct mpiInterruptVT_s mpiInterruptVT_t

◆ mpiMsgHeader_t

typedef struct mpiMsgHeader_s mpiMsgHeader_t

Definition at line 74 of file spcdefs.h.

◆ phyAttrb_t

typedef struct phyAttrb_s phyAttrb_t

◆ sasPhyAttribute_t

typedef struct sasPhyAttribute_s sasPhyAttribute_t

◆ spc_configMainDescriptor_t

typedef struct spc_configMainDescriptor_s spc_configMainDescriptor_t

Definition at line 275 of file spcdefs.h.

◆ spc_GSTableDescriptor_t

typedef struct spc_GSTableDescriptor_s spc_GSTableDescriptor_t

Definition at line 411 of file spcdefs.h.

◆ spc_inboundQueueDescriptor_t

typedef struct spc_inboundQueueDescriptor_s spc_inboundQueueDescriptor_t

Definition at line 459 of file spcdefs.h.

◆ spc_outboundQueueDescriptor_t

typedef struct spc_outboundQueueDescriptor_s spc_outboundQueueDescriptor_t

Definition at line 495 of file spcdefs.h.

◆ spc_SPASTable_t

typedef struct spc_SPASTable_s spc_SPASTable_t

Definition at line 434 of file spcdefs.h.

Data Structures

Macros

Typedefs