FreeBSD kernel ATH device code
amrr.h
Go to the documentation of this file.
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/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2004 INRIA
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* Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_ATH_RATE_AMRR_H
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#define _DEV_ATH_RATE_AMRR_H
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/* per-device state */
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struct
amrr_softc
{
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struct
ath_ratectrl
arc
;
/* base state */
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};
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/* per-node state */
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struct
amrr_node
{
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int
amn_rix
;
/* current rate index */
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int
amn_ticks
;
/* time of last update */
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int
amn_interval
;
/* update interval (ticks) */
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/* AMRR statistics for this node */
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u_int
amn_tx_try0_cnt
;
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u_int
amn_tx_try1_cnt
;
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u_int
amn_tx_try2_cnt
;
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u_int
amn_tx_try3_cnt
;
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u_int
amn_tx_failure_cnt
;
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/* AMRR algorithm state for this node */
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u_int
amn_success_threshold
;
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u_int
amn_success
;
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u_int
amn_recovery
;
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/* rate index et al. */
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u_int8_t
amn_tx_rix0
;
/* series 0 rate index */
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u_int8_t
amn_tx_rate0
;
/* series 0 h/w rate */
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u_int8_t
amn_tx_rate1
;
/* series 1 h/w rate */
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u_int8_t
amn_tx_rate2
;
/* series 2 h/w rate */
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u_int8_t
amn_tx_rate3
;
/* series 3 h/w rate */
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u_int8_t
amn_tx_rate0sp
;
/* series 0 short preamble h/w rate */
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u_int8_t
amn_tx_rate1sp
;
/* series 1 short preamble h/w rate */
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u_int8_t
amn_tx_rate2sp
;
/* series 2 short preamble h/w rate */
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u_int8_t
amn_tx_rate3sp
;
/* series 3 short preamble h/w rate */
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u_int8_t
amn_tx_try0
;
/* series 0 try count */
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u_int
amn_tx_try1
;
/* series 1 try count */
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u_int
amn_tx_try2
;
/* series 2 try count */
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u_int
amn_tx_try3
;
/* series 3 try count */
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};
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#define ATH_NODE_AMRR(an) ((struct amrr_node *)&an[1])
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#endif
/* _DEV_ATH_RATE_AMRR_H */
amrr_node
Definition:
amrr.h:51
amrr_node::amn_tx_try0
u_int8_t amn_tx_try0
Definition:
amrr.h:75
amrr_node::amn_tx_try2
u_int amn_tx_try2
Definition:
amrr.h:77
amrr_node::amn_success
u_int amn_success
Definition:
amrr.h:63
amrr_node::amn_tx_rate0sp
u_int8_t amn_tx_rate0sp
Definition:
amrr.h:71
amrr_node::amn_tx_rate3
u_int8_t amn_tx_rate3
Definition:
amrr.h:70
amrr_node::amn_recovery
u_int amn_recovery
Definition:
amrr.h:64
amrr_node::amn_tx_rate2
u_int8_t amn_tx_rate2
Definition:
amrr.h:69
amrr_node::amn_tx_try1
u_int amn_tx_try1
Definition:
amrr.h:76
amrr_node::amn_tx_try2_cnt
u_int amn_tx_try2_cnt
Definition:
amrr.h:58
amrr_node::amn_tx_rate1
u_int8_t amn_tx_rate1
Definition:
amrr.h:68
amrr_node::amn_tx_try3_cnt
u_int amn_tx_try3_cnt
Definition:
amrr.h:59
amrr_node::amn_tx_rate1sp
u_int8_t amn_tx_rate1sp
Definition:
amrr.h:72
amrr_node::amn_ticks
int amn_ticks
Definition:
amrr.h:53
amrr_node::amn_tx_try0_cnt
u_int amn_tx_try0_cnt
Definition:
amrr.h:56
amrr_node::amn_tx_failure_cnt
u_int amn_tx_failure_cnt
Definition:
amrr.h:60
amrr_node::amn_tx_rix0
u_int8_t amn_tx_rix0
Definition:
amrr.h:66
amrr_node::amn_rix
int amn_rix
Definition:
amrr.h:52
amrr_node::amn_success_threshold
u_int amn_success_threshold
Definition:
amrr.h:62
amrr_node::amn_tx_try3
u_int amn_tx_try3
Definition:
amrr.h:78
amrr_node::amn_interval
int amn_interval
Definition:
amrr.h:54
amrr_node::amn_tx_rate3sp
u_int8_t amn_tx_rate3sp
Definition:
amrr.h:74
amrr_node::amn_tx_rate2sp
u_int8_t amn_tx_rate2sp
Definition:
amrr.h:73
amrr_node::amn_tx_rate0
u_int8_t amn_tx_rate0
Definition:
amrr.h:67
amrr_node::amn_tx_try1_cnt
u_int amn_tx_try1_cnt
Definition:
amrr.h:57
amrr_softc
Definition:
amrr.h:46
amrr_softc::arc
struct ath_ratectrl arc
Definition:
amrr.h:47
ath_ratectrl
Definition:
if_athrate.h:73
dev
ath
ath_rate
amrr
amrr.h
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