\hypertarget{cn23xx__pf__regs_8h_source}{}\doxysection{cn23xx\+\_\+pf\+\_\+regs.\+h}
\label{cn23xx__pf__regs_8h_source}\index{dev/liquidio/base/cn23xx\_pf\_regs.h@{dev/liquidio/base/cn23xx\_pf\_regs.h}}
\mbox{\hyperlink{cn23xx__pf__regs_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00001}00001 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00002}00002 \textcolor{comment}{ *   BSD LICENSE}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00003}00003 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00004}00004 \textcolor{comment}{ *   Copyright(c) 2017 Cavium, Inc.. All rights reserved.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00005}00005 \textcolor{comment}{ *   All rights reserved.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00006}00006 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00007}00007 \textcolor{comment}{ *   Redistribution and use in source and binary forms, with or without}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00008}00008 \textcolor{comment}{ *   modification, are permitted provided that the following conditions}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00009}00009 \textcolor{comment}{ *   are met:}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00010}00010 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00011}00011 \textcolor{comment}{ *     * Redistributions of source code must retain the above copyright}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00012}00012 \textcolor{comment}{ *       notice, this list of conditions and the following disclaimer.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00013}00013 \textcolor{comment}{ *     * Redistributions in binary form must reproduce the above copyright}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00014}00014 \textcolor{comment}{ *       notice, this list of conditions and the following disclaimer in}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00015}00015 \textcolor{comment}{ *       the documentation and/or other materials provided with the}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00016}00016 \textcolor{comment}{ *       distribution.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00017}00017 \textcolor{comment}{ *     * Neither the name of Cavium, Inc. nor the names of its}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00018}00018 \textcolor{comment}{ *       contributors may be used to endorse or promote products derived}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00019}00019 \textcolor{comment}{ *       from this software without specific prior written permission.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00020}00020 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00021}00021 \textcolor{comment}{ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00022}00022 \textcolor{comment}{ *   "{}AS IS"{} AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00023}00023 \textcolor{comment}{ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00024}00024 \textcolor{comment}{ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00025}00025 \textcolor{comment}{ *   OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00026}00026 \textcolor{comment}{ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00027}00027 \textcolor{comment}{ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00028}00028 \textcolor{comment}{ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00029}00029 \textcolor{comment}{ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00030}00030 \textcolor{comment}{ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00031}00031 \textcolor{comment}{ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00032}00032 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00033}00033 \textcolor{comment}{/*\$FreeBSD\$*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00034}00034 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00035}00035 \textcolor{comment}{/* \(\backslash\)file cn23xx\_pf\_regs.h}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00036}00036 \textcolor{comment}{ * \(\backslash\)brief Host Driver: Register Address and Register Mask values for}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00037}00037 \textcolor{comment}{ * CN23XX devices.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00038}00038 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00039}00039 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00040}00040 \textcolor{preprocessor}{\#ifndef \_\_CN23XX\_PF\_REGS\_H\_\_}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00041}00041 \textcolor{preprocessor}{\#define \_\_CN23XX\_PF\_REGS\_H\_\_}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00042}00042 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00043}\mbox{\hyperlink{cn23xx__pf__regs_8h_af4d5186e47aab9b755535796bd987342}{00043}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_CFG\_PCIE\_DEVCTL              0x78}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00044}\mbox{\hyperlink{cn23xx__pf__regs_8h_a50df2a2e4efbb0a671fe1436ab2c7ed6}{00044}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_CFG\_PCIE\_UNCORRECT\_ERR\_MASK  0x108}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00045}\mbox{\hyperlink{cn23xx__pf__regs_8h_af048f0e72d9370231df360745c50e5ab}{00045}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_CFG\_PCIE\_CORRECT\_ERR\_STATUS  0x110}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00046}\mbox{\hyperlink{cn23xx__pf__regs_8h_a04807899c2f5542de273f2f8dbd7edbb}{00046}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_CFG\_PCIE\_DEVCTL\_MASK         0x00040000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00047}00047 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00048}\mbox{\hyperlink{cn23xx__pf__regs_8h_aaa1e72536458b4b42ad3a7e2e52a9ffe}{00048}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PCIE\_SRIOV\_FDL               0x188}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00049}\mbox{\hyperlink{cn23xx__pf__regs_8h_a944783dc97b92e6da4df25b4bd1dab56}{00049}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PCIE\_SRIOV\_FDL\_BIT\_POS       0x10}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00050}\mbox{\hyperlink{cn23xx__pf__regs_8h_a2b0da5acd6d9c425d7ad53029252e654}{00050}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PCIE\_SRIOV\_FDL\_MASK          0xFF}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00051}00051 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00052}00052 \textcolor{comment}{/* \#\#\#\#\#\#\#\#\#\#\#\#\#\#  BAR0 Registers \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00053}00053 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00054}\mbox{\hyperlink{cn23xx__pf__regs_8h_adb351aa1120cc0dc7d6b95c2704757c2}{00054}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_CTL\_PORT\_START           0x286E0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00055}\mbox{\hyperlink{cn23xx__pf__regs_8h_a2164843cb1d32e1e32db31e3c46956a0}{00055}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PORT\_OFFSET                  0x10}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00056}00056 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00057}\mbox{\hyperlink{cn23xx__pf__regs_8h_af296e088f58517c21236f153eef8ee8c}{00057}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_CTL\_PORT(p)                      \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00058}00058 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_CTL\_PORT\_START +        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00059}00059 \textcolor{preprocessor}{                 ((p) * LIO\_CN23XX\_PORT\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00060}00060 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00061}00061 \textcolor{comment}{/* 2 scatch registers (64-\/bit)  */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00062}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae2066b252f32e38e1cdd80e5849cc6a9}{00062}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WINDOW\_CTL               0x282E0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00063}\mbox{\hyperlink{cn23xx__pf__regs_8h_a97c16be313ad055386190df62f27dbb7}{00063}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_SCRATCH1                 0x283C0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00064}\mbox{\hyperlink{cn23xx__pf__regs_8h_a48e0c369e62e01fe11801c80b35ac59d}{00064}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_SCRATCH2                 0x283D0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00065}\mbox{\hyperlink{cn23xx__pf__regs_8h_ad3e8b59f0cf67d04086d5bf2dfca2ca2}{00065}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WINDOW\_CTL\_DEFAULT       0x200000ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00066}00066 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00067}00067 \textcolor{comment}{/* 1 registers (64-\/bit)  -\/ SLI\_CTL\_STATUS */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00068}\mbox{\hyperlink{cn23xx__pf__regs_8h_a5cdeb7bf7743fca490678d328e488f07}{00068}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_CTL\_STATUS               0x28570}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00069}00069 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00070}00070 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00071}00071 \textcolor{comment}{ * SLI Packet Input Jabber Register (64 bit register)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00072}00072 \textcolor{comment}{ * <31:0> for Byte count for limiting sizes of packet sizes}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00073}00073 \textcolor{comment}{ * that are allowed for sli packet inbound packets.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00074}00074 \textcolor{comment}{ * the default value is 0xFA00(=64000).}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00075}00075 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00076}\mbox{\hyperlink{cn23xx__pf__regs_8h_abc4d3768ba67d10d8137892bf736b8af}{00076}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_IN\_JABBER    0x29170}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00077}00077 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00078}\mbox{\hyperlink{cn23xx__pf__regs_8h_a5b2d42ee076b1afeaa1d48528d3d39e8}{00078}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_ADDR\_LO   0x20000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00079}\mbox{\hyperlink{cn23xx__pf__regs_8h_a3497faeb5c5ea301edd1b9c286f8693f}{00079}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_ADDR64    LIO\_CN23XX\_SLI\_WIN\_WR\_ADDR\_LO}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00080}00080 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00081}\mbox{\hyperlink{cn23xx__pf__regs_8h_a0116daa734559e6f21e25a8046ae0cc3}{00081}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_ADDR\_LO   0x20010}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00082}\mbox{\hyperlink{cn23xx__pf__regs_8h_af9294d89e4007320dc68d322a61d7c12}{00082}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_ADDR\_HI   0x20014}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00083}\mbox{\hyperlink{cn23xx__pf__regs_8h_a53d7d0625a7f9c66a27e2ce5c9351685}{00083}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_ADDR64    LIO\_CN23XX\_SLI\_WIN\_RD\_ADDR\_LO}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00084}00084 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00085}\mbox{\hyperlink{cn23xx__pf__regs_8h_a77b72c66fb170720b15aa8c0ada4712a}{00085}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_DATA\_LO   0x20020}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00086}\mbox{\hyperlink{cn23xx__pf__regs_8h_a47b2b6d86edd9d6abac1609b9f11eae2}{00086}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_DATA\_HI   0x20024}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00087}\mbox{\hyperlink{cn23xx__pf__regs_8h_a5c352a987ba4aa4b89b810af0cd8a569}{00087}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_DATA64    LIO\_CN23XX\_SLI\_WIN\_WR\_DATA\_LO}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00088}00088 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00089}\mbox{\hyperlink{cn23xx__pf__regs_8h_acec175fb82a7bd78dfaf55df0bc85f9f}{00089}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_DATA\_LO   0x20040}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00090}\mbox{\hyperlink{cn23xx__pf__regs_8h_a54f06da4e3edf3cc515157e5f51fda2c}{00090}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_DATA\_HI   0x20044}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00091}\mbox{\hyperlink{cn23xx__pf__regs_8h_a7d5d7339595f5ab4e1d9d072ca28d720}{00091}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_RD\_DATA64    LIO\_CN23XX\_SLI\_WIN\_RD\_DATA\_LO}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00092}00092 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00093}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac87b3b5b4d9d806ac0c515e137071289}{00093}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_WIN\_WR\_MASK\_REG  0x20030}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00094}\mbox{\hyperlink{cn23xx__pf__regs_8h_aabc2c8b23d5fcb3882622ec8503fed5c}{00094}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_MAC\_CREDIT\_CNT   0x23D70}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00095}00095 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00096}00096 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00097}00097 \textcolor{comment}{ * 4 registers (64-\/bit) for mapping IOQs to MACs(PEMs)-\/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00098}00098 \textcolor{comment}{ * SLI\_PKT\_MAC(0..3)\_PF(0..1)\_RINFO}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00099}00099 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00100}\mbox{\hyperlink{cn23xx__pf__regs_8h_aea395ffc3fb194aa808341b38c805c11}{00100}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_MAC\_RINFO\_START64    0x29030}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00101}00101 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00102}00102 \textcolor{comment}{/*1 register (64-\/bit) to determine whether IOQs are in reset. */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00103}\mbox{\hyperlink{cn23xx__pf__regs_8h_a2fe16ab3097c8e622d065f1c8ff04eb0}{00103}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_IOQ\_RING\_RST         0x291E0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00104}00104 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00105}00105 \textcolor{comment}{/* Each Input Queue register is at a 16-\/byte Offset in BAR0 */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00106}\mbox{\hyperlink{cn23xx__pf__regs_8h_a434ca6f11c63fff3425f4c69d69905f6}{00106}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_IQ\_OFFSET                    0x20000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00107}00107 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00108}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac0f382a0936e47cb02ae90d756decbba}{00108}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_MAC\_RINFO\_OFFSET             0x20}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00109}\mbox{\hyperlink{cn23xx__pf__regs_8h_a3ee987cc1037707e206dd2baf044356c}{00109}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PF\_RINFO\_OFFSET              0x10}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00110}00110 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00111}\mbox{\hyperlink{cn23xx__pf__regs_8h_a8c3c4a5c2e5af130173ad0c74ee3d10e}{00111}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_MAC\_RINFO64(mac, pf)                 \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00112}00112 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_MAC\_RINFO\_START64 +         \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00113}00113 \textcolor{preprocessor}{                 ((mac) * LIO\_CN23XX\_MAC\_RINFO\_OFFSET) +        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00114}00114 \textcolor{preprocessor}{                 ((pf) * LIO\_CN23XX\_PF\_RINFO\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00115}00115 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00116}00116 \textcolor{comment}{/* mask for total rings, setting TRS to base */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00117}\mbox{\hyperlink{cn23xx__pf__regs_8h_a75cac77f29526d092ed74e402663599f}{00117}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_MAC\_CTL\_RINFO\_TRS        BIT\_ULL(16)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00118}00118 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00119}00119 \textcolor{comment}{/* Starting bit of the TRS field in LIO\_CN23XX\_SLI\_PKT\_MAC\_RINFO64 register */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00120}\mbox{\hyperlink{cn23xx__pf__regs_8h_a4dcde67a57021a5672076865dc12694e}{00120}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_MAC\_CTL\_RINFO\_TRS\_BIT\_POS        16}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00121}00121 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00122}00122 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# REQUEST QUEUE \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00123}00123 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00124}00124 \textcolor{comment}{/* 64 registers for Input Queue Instr Count -\/ SLI\_PKT\_IN\_DONE0\_CNTS */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00125}\mbox{\hyperlink{cn23xx__pf__regs_8h_aa82ad65bd8856c4997a541034bcfb8a2}{00125}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_IN\_DONE\_CNTS\_START64 0x10040}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00126}00126 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00127}00127 \textcolor{comment}{/* 64 registers for Input Queues Start Addr -\/ SLI\_PKT0\_INSTR\_BADDR */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00128}\mbox{\hyperlink{cn23xx__pf__regs_8h_a3e37e5ba71f75cf713a43ba95a72c139}{00128}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_INSTR\_BADDR\_START64  0x10010}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00129}00129 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00130}00130 \textcolor{comment}{/* 64 registers for Input Doorbell -\/ SLI\_PKT0\_INSTR\_BAOFF\_DBELL */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00131}\mbox{\hyperlink{cn23xx__pf__regs_8h_ab095a3e1a16a3e9b3fc02c7f3f426ccf}{00131}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_INSTR\_BADDR\_DBELL\_START      0x10020}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00132}00132 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00133}00133 \textcolor{comment}{/* 64 registers for Input Queue size -\/ SLI\_PKT0\_INSTR\_FIFO\_RSIZE */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00134}\mbox{\hyperlink{cn23xx__pf__regs_8h_a8d332594a5878e14eb0967d71b0934e1}{00134}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_INSTR\_FIFO\_RSIZE\_START       0x10030}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00135}00135 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00136}00136 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00137}00137 \textcolor{comment}{ * 64 registers (64-\/bit) -\/ ES, RO, NS, Arbitration for Input Queue Data \&}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00138}00138 \textcolor{comment}{ * gather list fetches. SLI\_PKT(0..63)\_INPUT\_CONTROL.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00139}00139 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00140}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae10dc9b90c4eea00ef53cf8f210a93f3}{00140}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_INPUT\_CONTROL\_START64        0x10000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00141}00141 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00142}00142 \textcolor{comment}{/*-\/-\/-\/-\/-\/-\/-\/ Request Queue Macros -\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00143}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae7b90c7ef7a6a0f52cd8ec2d861bf9b1}{00143}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_IQ\_PKT\_CONTROL64(iq)                             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00144}00144 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_INPUT\_CONTROL\_START64 +             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00145}00145 \textcolor{preprocessor}{                 ((iq) * LIO\_CN23XX\_IQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00146}00146 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00147}\mbox{\hyperlink{cn23xx__pf__regs_8h_a4b8ccfc8475f2778e9304004cf997b13}{00147}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_IQ\_BASE\_ADDR64(iq)                               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00148}00148 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_INSTR\_BADDR\_START64 +               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00149}00149 \textcolor{preprocessor}{                 ((iq) * LIO\_CN23XX\_IQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00150}00150 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00151}\mbox{\hyperlink{cn23xx__pf__regs_8h_aa6d7cc40ee9dc22afb1dfcf05c098497}{00151}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_IQ\_SIZE(iq)                                      \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00152}00152 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_INSTR\_FIFO\_RSIZE\_START +            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00153}00153 \textcolor{preprocessor}{                 ((iq) * LIO\_CN23XX\_IQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00154}00154 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00155}\mbox{\hyperlink{cn23xx__pf__regs_8h_a70ff211bb2d70361adc596deb2c41bed}{00155}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_IQ\_DOORBELL(iq)                                  \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00156}00156 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_INSTR\_BADDR\_DBELL\_START +           \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00157}00157 \textcolor{preprocessor}{                 ((iq) * LIO\_CN23XX\_IQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00158}00158 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00159}\mbox{\hyperlink{cn23xx__pf__regs_8h_a5769997084366955fa0138ee2afd29b3}{00159}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_IQ\_INSTR\_COUNT64(iq)                             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00160}00160 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_IN\_DONE\_CNTS\_START64 +              \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00161}00161 \textcolor{preprocessor}{                 ((iq) * LIO\_CN23XX\_IQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00162}00162 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00163}00163 \textcolor{comment}{/*-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/ Masks -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00164}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac15edb02584b432e3ed9058ccc09e82d}{00164}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_VF\_NUM BIT\_ULL(32)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00165}\mbox{\hyperlink{cn23xx__pf__regs_8h_a9798045ba27854a3937e61b29a11f8fd}{00165}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_MAC\_NUM        BIT(29)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00166}00166 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00167}00167 \textcolor{comment}{ * Number of instructions to be read in one MAC read request.}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00168}00168 \textcolor{comment}{ * setting to Max value(4)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00169}00169 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00170}\mbox{\hyperlink{cn23xx__pf__regs_8h_adebf2f3e211360745d069b11c5dd89c6}{00170}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_RDSIZE         (3 << 25)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00171}\mbox{\hyperlink{cn23xx__pf__regs_8h_af58bf6600713aa0263761c286cc5a7e8}{00171}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_IS\_64B         BIT(24)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00172}\mbox{\hyperlink{cn23xx__pf__regs_8h_a3c178415f208a595b9226a8d03d13c60}{00172}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_RST            BIT(23)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00173}\mbox{\hyperlink{cn23xx__pf__regs_8h_a52acbc0fe6a6b992f9ca87d536ab6a8e}{00173}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_QUIET          BIT(28)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00174}\mbox{\hyperlink{cn23xx__pf__regs_8h_a84b2cabd8139fccf887a85ca2c971993}{00174}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_RING\_ENB       BIT(22)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00175}\mbox{\hyperlink{cn23xx__pf__regs_8h_a82561018a7997680a51e44a3b0309867}{00175}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_DATA\_ES\_64B\_SWAP       BIT(6)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00176}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac5b96831af4c331eeb5d845a844da081}{00176}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_USE\_CSR        BIT(4)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00177}\mbox{\hyperlink{cn23xx__pf__regs_8h_a9c5a28c43f7cddbcf9699abcc1986c74}{00177}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_GATHER\_ES\_64B\_SWAP     (2)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00178}00178 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00179}\mbox{\hyperlink{cn23xx__pf__regs_8h_a08798a3b58a9f855f82436c72c7f1a55}{00179}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_PF\_NUM\_POS     (45)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00180}00180 \textcolor{comment}{/* These bits[43:32] select the function number within the PF */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00181}\mbox{\hyperlink{cn23xx__pf__regs_8h_ab77b44cfa0e1d46602993473700323d7}{00181}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_MAC\_NUM\_POS    (29)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00182}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac6be03fe6bf84ee297d8d4887d9e8341}{00182}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_IN\_DONE\_WMARK\_MASK       (0xFFFFULL)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00183}\mbox{\hyperlink{cn23xx__pf__regs_8h_a193f5b6ad8c726c0ffc837ed4a22a4ac}{00183}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_IN\_DONE\_WMARK\_BIT\_POS    (32)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00184}\mbox{\hyperlink{cn23xx__pf__regs_8h_adb444122b44c6b9cb5a320e8375edaac}{00184}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_IN\_DONE\_CNT\_MASK         0x00000000FFFFFFFFULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00185}00185 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00186}00186 \textcolor{preprocessor}{\#if BYTE\_ORDER == LITTLE\_ENDIAN}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00187}\mbox{\hyperlink{cn23xx__pf__regs_8h_a6b0bd1a6ad804f724268dca7b239baad}{00187}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_MASK                                   \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00188}00188 \textcolor{preprocessor}{                (LIO\_CN23XX\_PKT\_INPUT\_CTL\_RDSIZE                |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00189}00189 \textcolor{preprocessor}{                 LIO\_CN23XX\_PKT\_INPUT\_CTL\_DATA\_ES\_64B\_SWAP      |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00190}00190 \textcolor{preprocessor}{                 LIO\_CN23XX\_PKT\_INPUT\_CTL\_USE\_CSR)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00191}00191 \textcolor{preprocessor}{\#else   }\textcolor{comment}{/* BYTE\_ORDER != LITTLE\_ENDIAN */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00192}00192 \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_INPUT\_CTL\_MASK                                   \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00193}00193 \textcolor{preprocessor}{                (LIO\_CN23XX\_PKT\_INPUT\_CTL\_RDSIZE                |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00194}00194 \textcolor{preprocessor}{                 LIO\_CN23XX\_PKT\_INPUT\_CTL\_DATA\_ES\_64B\_SWAP      |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00195}00195 \textcolor{preprocessor}{                 LIO\_CN23XX\_PKT\_INPUT\_CTL\_USE\_CSR               |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00196}00196 \textcolor{preprocessor}{                 LIO\_CN23XX\_PKT\_INPUT\_CTL\_GATHER\_ES\_64B\_SWAP)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00197}00197 \textcolor{preprocessor}{\#endif  }\textcolor{comment}{/* BYTE\_ORDER == LITTLE\_ENDIAN */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00198}00198 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00199}00199 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# OUTPUT QUEUE \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00200}00200 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00201}00201 \textcolor{comment}{/* 64 registers for Output queue control -\/ SLI\_PKT(0..63)\_OUTPUT\_CONTROL */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00202}\mbox{\hyperlink{cn23xx__pf__regs_8h_a54a644356aac61c6955bf28bdcb81e23}{00202}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_OUTPUT\_CONTROL\_START 0x10050}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00203}00203 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00204}00204 \textcolor{comment}{/* 64 registers for Output queue buffer and info size -\/ SLI\_PKT0\_OUT\_SIZE */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00205}\mbox{\hyperlink{cn23xx__pf__regs_8h_ad4d0374850d312192eeb97ce3f52fb58}{00205}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_OUT\_SIZE     0x10060}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00206}00206 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00207}00207 \textcolor{comment}{/* 64 registers for Output Queue Start Addr -\/ SLI\_PKT0\_SLIST\_BADDR */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00208}\mbox{\hyperlink{cn23xx__pf__regs_8h_aa3fe2582b93c6d7e786f4da250141110}{00208}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_SLIST\_BADDR\_START64      0x10070}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00209}00209 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00210}00210 \textcolor{comment}{/* 64 registers for Output Queue Packet Credits -\/ SLI\_PKT0\_SLIST\_BAOFF\_DBELL */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00211}\mbox{\hyperlink{cn23xx__pf__regs_8h_afbd6062c33477d01c6a66218a61b4b38}{00211}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_SLIST\_BAOFF\_DBELL\_START      0x10080}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00212}00212 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00213}00213 \textcolor{comment}{/* 64 registers for Output Queue size -\/ SLI\_PKT0\_SLIST\_FIFO\_RSIZE */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00214}\mbox{\hyperlink{cn23xx__pf__regs_8h_aa2083c76c5655c07e51408495eca5c73}{00214}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_SLIST\_FIFO\_RSIZE\_START       0x10090}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00215}00215 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00216}00216 \textcolor{comment}{/* 64 registers for Output Queue Packet Count -\/ SLI\_PKT0\_CNTS */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00217}\mbox{\hyperlink{cn23xx__pf__regs_8h_a7e3ba2a49c33ffd7df40129a8e95bb7d}{00217}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_CNTS\_START   0x100B0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00218}00218 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00219}00219 \textcolor{comment}{/* 64 registers for Output Queue INT Levels -\/ SLI\_PKT0\_INT\_LEVELS */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00220}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1e810d87180afdaf34b6f7b4684e65a3}{00220}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_INT\_LEVELS\_START64   0x100A0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00221}00221 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00222}00222 \textcolor{comment}{/* Each Output Queue register is at a 16-\/byte Offset in BAR0 */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00223}\mbox{\hyperlink{cn23xx__pf__regs_8h_af6c5e03b58df4a8c4d73f44641395b61}{00223}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_OQ\_OFFSET    0x20000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00224}00224 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00225}00225 \textcolor{comment}{/* 1 (64-\/bit register) for Output Queue backpressure across all rings. */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00226}\mbox{\hyperlink{cn23xx__pf__regs_8h_a0c343c7bfe6fc046f9c47e7e646d2aae}{00226}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_WMARK 0x29180}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00227}00227 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00228}00228 \textcolor{comment}{/* Global pkt control register */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00229}\mbox{\hyperlink{cn23xx__pf__regs_8h_af7c8c7b154e2786b39e7fdf9a4578d18}{00229}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_GBL\_CONTROL      0x29210}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00230}00230 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00231}00231 \textcolor{comment}{/* Backpressure enable register for PF0  */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00232}\mbox{\hyperlink{cn23xx__pf__regs_8h_a6b02bce71910acd42c32b30e3819030e}{00232}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OUT\_BP\_EN\_W1S    0x29260}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00233}00233 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00234}00234 \textcolor{comment}{/* Backpressure enable register for PF1  */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00235}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac156e394fe492b13047fa8c554f380b9}{00235}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OUT\_BP\_EN2\_W1S   0x29270}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00236}00236 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00237}00237 \textcolor{comment}{/*-\/-\/-\/-\/-\/-\/-\/ Output Queue Macros -\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00238}00238 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00239}\mbox{\hyperlink{cn23xx__pf__regs_8h_a21edbf3eb4ae62e9a678e54ec6f4b496}{00239}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_PKT\_CONTROL(oq)                               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00240}00240 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_OUTPUT\_CONTROL\_START +              \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00241}00241 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00242}00242 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00243}\mbox{\hyperlink{cn23xx__pf__regs_8h_a741b9a671edf8ae19fe83a7b7adb0ffc}{00243}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_BASE\_ADDR64(oq)                               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00244}00244 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_SLIST\_BADDR\_START64 +                   \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00245}00245 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00246}00246 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00247}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac978d0efe2fed80925b9da4bef424faf}{00247}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_SIZE(oq)                                      \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00248}00248 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_SLIST\_FIFO\_RSIZE\_START +            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00249}00249 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00250}00250 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00251}\mbox{\hyperlink{cn23xx__pf__regs_8h_af60846b23fa9bdab26631bc6ea2ad870}{00251}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_BUFF\_INFO\_SIZE(oq)                            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00252}00252 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_OUT\_SIZE +                          \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00253}00253 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00254}00254 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00255}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae615dd0c14d5538776df5894ac6955d7}{00255}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_PKTS\_SENT(oq)                                 \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00256}00256 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_CNTS\_START +                        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00257}00257 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00258}00258 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00259}\mbox{\hyperlink{cn23xx__pf__regs_8h_a196be7e42b6b5312f3ba6a22f517f345}{00259}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_PKTS\_CREDIT(oq)                               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00260}00260 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_SLIST\_BAOFF\_DBELL\_START +           \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00261}00261 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00262}00262 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00263}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1751669a6e0ce876da750036657909b7}{00263}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_OQ\_PKT\_INT\_LEVELS(oq)                            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00264}00264 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_PKT\_INT\_LEVELS\_START64 +                \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00265}00265 \textcolor{preprocessor}{                 ((oq) * LIO\_CN23XX\_OQ\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00266}00266 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00267}00267 \textcolor{comment}{/*-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/ Masks -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00268}\mbox{\hyperlink{cn23xx__pf__regs_8h_af7902133cb07fce51b078688f9a693c2}{00268}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_TENB          BIT(13)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00269}\mbox{\hyperlink{cn23xx__pf__regs_8h_af9808001918532965749b7f7c6af9aa8}{00269}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_CENB          BIT(12)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00270}\mbox{\hyperlink{cn23xx__pf__regs_8h_a7fbb0fff6fc5ccf67ce5cf0338ca0efe}{00270}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_IPTR          BIT(11)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00271}\mbox{\hyperlink{cn23xx__pf__regs_8h_a04dff837c6afda7039154af882d88324}{00271}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_ES            BIT(9)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00272}\mbox{\hyperlink{cn23xx__pf__regs_8h_a47a81f4c696e529916145d1ef42e6a9e}{00272}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_NSR           BIT(8)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00273}\mbox{\hyperlink{cn23xx__pf__regs_8h_a16a22087963bfc4f0d43129d9cc25069}{00273}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_ROR           BIT(7)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00274}\mbox{\hyperlink{cn23xx__pf__regs_8h_af924208537a7c39154f893d1af17a44b}{00274}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_DPTR          BIT(6)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00275}\mbox{\hyperlink{cn23xx__pf__regs_8h_a4a84e05aa0bc482bfbaa53fc86861ada}{00275}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_BMODE         BIT(5)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00276}\mbox{\hyperlink{cn23xx__pf__regs_8h_aff03171644dd628cc124a0048875ef4d}{00276}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_ES\_P          BIT(3)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00277}\mbox{\hyperlink{cn23xx__pf__regs_8h_aecfc336b7bf909954ab7feab74bbffb2}{00277}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_NSR\_P         BIT(2)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00278}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae77afce1390ff2a75f12786c40d7e127}{00278}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_ROR\_P         BIT(1)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00279}\mbox{\hyperlink{cn23xx__pf__regs_8h_a96e4348e3419d7d47e265aba53b5322e}{00279}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PKT\_OUTPUT\_CTL\_RING\_ENB      BIT(0)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00280}00280 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00281}00281 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# MSIX TABLE \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00282}00282 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00283}\mbox{\hyperlink{cn23xx__pf__regs_8h_a852c7211538b1218eb18cb3faa8d385b}{00283}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_MSIX\_TABLE\_ADDR\_START        0x0}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00284}\mbox{\hyperlink{cn23xx__pf__regs_8h_a2fdfb15f7030b90329bce549d6bf02d6}{00284}} \textcolor{preprocessor}{\#define CN23XX\_MSIX\_TABLE\_DATA\_START            0x8}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00285}\mbox{\hyperlink{cn23xx__pf__regs_8h_af6f12db395b325cbb75d977a45a9572f}{00285}} \textcolor{preprocessor}{\#define CN23XX\_MSIX\_TABLE\_SIZE                  0x10}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00286}00286 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00287}\mbox{\hyperlink{cn23xx__pf__regs_8h_a4a3d02853eb0d1315e73ced43908f6e9}{00287}} \textcolor{preprocessor}{\#define CN23XX\_MSIX\_TABLE\_ADDR(idx)             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00288}00288 \textcolor{preprocessor}{        (LIO\_CN23XX\_MSIX\_TABLE\_ADDR\_START +     \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00289}00289 \textcolor{preprocessor}{         ((idx) * LIO\_CN23XX\_MSIX\_TABLE\_SIZE))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00290}00290 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00291}\mbox{\hyperlink{cn23xx__pf__regs_8h_afd6d1ef9f964b7dd290e0d79325e3a0a}{00291}} \textcolor{preprocessor}{\#define CN23XX\_MSIX\_TABLE\_DATA(idx)             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00292}00292 \textcolor{preprocessor}{        (LIO\_CN23XX\_MSIX\_TABLE\_DATA\_START +     \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00293}00293 \textcolor{preprocessor}{         ((idx) * LIO\_CN23XX\_MSIX\_TABLE\_SIZE))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00294}00294 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00295}00295 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# INTERRUPTS \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00296}\mbox{\hyperlink{cn23xx__pf__regs_8h_a9473c00b356e4b7c830446d061d10bb9}{00296}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_MAC\_INT\_OFFSET       0x20}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00297}\mbox{\hyperlink{cn23xx__pf__regs_8h_abd918745754730cfea4e61cad437dd00}{00297}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PF\_INT\_OFFSET        0x10}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00298}00298 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00299}00299 \textcolor{comment}{/* 1 register (64-\/bit) for Interrupt Summary */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00300}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae68d3596b64c479eacd21ca835ff95b0}{00300}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_INT\_SUM64        0x27000}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00301}00301 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00302}00302 \textcolor{comment}{/* 4 registers (64-\/bit) for Interrupt Enable for each Port */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00303}\mbox{\hyperlink{cn23xx__pf__regs_8h_ab99a3b988d0ff7726bf458ad42639ade}{00303}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_INT\_ENB64        0x27080}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00304}00304 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00305}\mbox{\hyperlink{cn23xx__pf__regs_8h_acd5fcb11539ab979224fd472c05cf3c1}{00305}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_MAC\_PF\_INT\_SUM64(mac, pf)                        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00306}00306 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_INT\_SUM64 +                             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00307}00307 \textcolor{preprocessor}{                 ((mac) * LIO\_CN23XX\_MAC\_INT\_OFFSET) +                  \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00308}00308 \textcolor{preprocessor}{                 ((pf) * LIO\_CN23XX\_PF\_INT\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00309}00309 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00310}\mbox{\hyperlink{cn23xx__pf__regs_8h_a61d14e7a61fe11b1a75990a1c29d7743}{00310}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_MAC\_PF\_INT\_ENB64(mac, pf)                        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00311}00311 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_INT\_ENB64 +                             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00312}00312 \textcolor{preprocessor}{                 ((mac) * LIO\_CN23XX\_MAC\_INT\_OFFSET) +                  \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00313}00313 \textcolor{preprocessor}{                 ((pf) * LIO\_CN23XX\_PF\_INT\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00314}00314 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00315}00315 \textcolor{comment}{/* 1 register (64-\/bit) to indicate which Output Queue reached pkt threshold */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00316}\mbox{\hyperlink{cn23xx__pf__regs_8h_aeb9771f383c1e37b9deca1bbb6c7e3b3}{00316}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_CNT\_INT      0x29130}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00317}00317 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00318}00318 \textcolor{comment}{/* 1 register (64-\/bit) to indicate which Output Queue reached time threshold */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00319}\mbox{\hyperlink{cn23xx__pf__regs_8h_aad21f1440e4f7c3b426ae94daf1b2cbf}{00319}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_PKT\_TIME\_INT     0x29140}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00320}00320 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00321}00321 \textcolor{comment}{/*-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/ Interrupt Masks -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00322}00322 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00323}\mbox{\hyperlink{cn23xx__pf__regs_8h_a6219e79ab685c7357451f3537edbe64a}{00323}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PO\_INT  BIT\_ULL(63)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00324}\mbox{\hyperlink{cn23xx__pf__regs_8h_a4f949d0d379ffb451b96783c740ffe4c}{00324}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PI\_INT  BIT\_ULL(62)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00325}\mbox{\hyperlink{cn23xx__pf__regs_8h_aa2129b72cd298674faca606218d222ea}{00325}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_RESEND          BIT\_ULL(60)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00326}00326 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00327}\mbox{\hyperlink{cn23xx__pf__regs_8h_aec529c8a640c4ca4e7a5cd3d1ac5ccdc}{00327}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_CINT\_ENB        BIT\_ULL(48)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00328}00328 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00329}\mbox{\hyperlink{cn23xx__pf__regs_8h_a543574dee891f6bffbece79d71b00679}{00329}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_MIO\_INT         BIT(1)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00330}\mbox{\hyperlink{cn23xx__pf__regs_8h_a26198d1490bdaffa786f36edd5cd48f1}{00330}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PKT\_TIME        BIT(5)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00331}\mbox{\hyperlink{cn23xx__pf__regs_8h_af0904ddbbd9461164c8f512cf1cc0321}{00331}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_M0UPB0\_ERR      BIT(8)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00332}\mbox{\hyperlink{cn23xx__pf__regs_8h_a51d2238a8e0843fb62bcbb5b9c173281}{00332}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_M0UPWI\_ERR      BIT(9)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00333}\mbox{\hyperlink{cn23xx__pf__regs_8h_ab46b4dad80b8cd25ca032265dba3ea9e}{00333}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_M0UNB0\_ERR      BIT(10)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00334}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1532be9759c6a1ba62272ebba6824fd4}{00334}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_M0UNWI\_ERR      BIT(11)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00335}00335 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00336}\mbox{\hyperlink{cn23xx__pf__regs_8h_adadd011587cb2fadbc170fe8596c5023}{00336}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA0\_FORCE      BIT\_ULL(32)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00337}\mbox{\hyperlink{cn23xx__pf__regs_8h_af7116096c0d3b9fd89aa3537a8472855}{00337}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA1\_FORCE      BIT\_ULL(33)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00338}00338 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00339}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1892bf6c5abe85ab6440b6ef543daa6f}{00339}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA0\_TIME       BIT\_ULL(36)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00340}\mbox{\hyperlink{cn23xx__pf__regs_8h_a43eb57a0116204686fb7fa5f470611dd}{00340}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA1\_TIME       BIT\_ULL(37)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00341}00341 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00342}\mbox{\hyperlink{cn23xx__pf__regs_8h_aeccdaac16de79f5ec601f0fbd8834c78}{00342}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMAPF\_ERR       BIT\_ULL(59)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00343}00343 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00344}\mbox{\hyperlink{cn23xx__pf__regs_8h_a432f152749e029ec8ed97571702df83d}{00344}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PKTPF\_ERR       BIT\_ULL(61)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00345}\mbox{\hyperlink{cn23xx__pf__regs_8h_a44ef760d090fcfd201354a4356aa0431}{00345}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PPPF\_ERR        BIT\_ULL(63)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00346}00346 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00347}\mbox{\hyperlink{cn23xx__pf__regs_8h_a87524372698bc6b1d9f4eccc309662e4}{00347}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA0\_DATA       (LIO\_CN23XX\_INTR\_DMA0\_TIME)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00348}\mbox{\hyperlink{cn23xx__pf__regs_8h_ac10aa80492122f1843e269a5d2ad00ff}{00348}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA1\_DATA       (LIO\_CN23XX\_INTR\_DMA1\_TIME)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00349}00349 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00350}\mbox{\hyperlink{cn23xx__pf__regs_8h_aad06c5e006e8ec4b2387b71c849c2dc6}{00350}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_DMA\_DATA                        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00351}00351 \textcolor{preprocessor}{                (LIO\_CN23XX\_INTR\_DMA0\_DATA | LIO\_CN23XX\_INTR\_DMA1\_DATA)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00352}00352 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00353}00353 \textcolor{comment}{/* By fault only TIME based */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00354}\mbox{\hyperlink{cn23xx__pf__regs_8h_acf0a777ea55d2af14551155beadfc5cc}{00354}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_PKT\_DATA        (LIO\_CN23XX\_INTR\_PKT\_TIME)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00355}00355 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00356}00356 \textcolor{comment}{/* Sum of interrupts for error events */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00357}\mbox{\hyperlink{cn23xx__pf__regs_8h_a8b045592d8499b18136d76436c528e9b}{00357}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_ERR                             \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00358}00358 \textcolor{preprocessor}{                (LIO\_CN23XX\_INTR\_M0UPB0\_ERR     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00359}00359 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_M0UPWI\_ERR     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00360}00360 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_M0UNB0\_ERR     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00361}00361 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_M0UNWI\_ERR     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00362}00362 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_DMAPF\_ERR      |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00363}00363 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_PKTPF\_ERR      |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00364}00364 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_PPPF\_ERR)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00365}00365 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00366}00366 \textcolor{comment}{/* Programmed Mask for Interrupt Sum */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00367}\mbox{\hyperlink{cn23xx__pf__regs_8h_af5866047972ff7fb20efae9c35ecbad0}{00367}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_INTR\_MASK                            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00368}00368 \textcolor{preprocessor}{                (LIO\_CN23XX\_INTR\_DMA\_DATA       |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00369}00369 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_DMA0\_FORCE     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00370}00370 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_DMA1\_FORCE     |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00371}00371 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_MIO\_INT        |       \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00372}00372 \textcolor{preprocessor}{                 LIO\_CN23XX\_INTR\_ERR)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00373}00373 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00374}00374 \textcolor{comment}{/* 4 Registers (64 -\/ bit) */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00375}\mbox{\hyperlink{cn23xx__pf__regs_8h_ae39d99c5be8c7368067c57150cb79ff0}{00375}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_S2M\_PORT\_CTL\_START       0x23D80}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00376}\mbox{\hyperlink{cn23xx__pf__regs_8h_a3efe707526d5355193fad3c3c819064c}{00376}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_S2M\_PORTX\_CTL(port)              \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00377}00377 \textcolor{preprocessor}{                (LIO\_CN23XX\_SLI\_S2M\_PORT\_CTL\_START +    \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00378}00378 \textcolor{preprocessor}{                 ((port) * 0x10))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00379}00379 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00380}\mbox{\hyperlink{cn23xx__pf__regs_8h_a5a4a041ff38cacc6868fee1fe38bfdc5}{00380}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_SLI\_MAC\_NUMBER       0x20050}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00381}00381 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00382}00382 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00383}00383 \textcolor{comment}{ *  PEM(0..3)\_BAR1\_INDEX(0..15)address is defined as}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00384}00384 \textcolor{comment}{ *  addr = (0x00011800C0000100  |port <<24 |idx <<3 )}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00385}00385 \textcolor{comment}{ *  Here, port is PEM(0..3) \& idx is INDEX(0..15)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00386}00386 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00387}\mbox{\hyperlink{cn23xx__pf__regs_8h_acfd60b82009797ba966f9a24c0157877}{00387}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PEM\_BAR1\_INDEX\_START 0x00011800C0000100ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00388}\mbox{\hyperlink{cn23xx__pf__regs_8h_ab6a0d1e874703259ecfd0fa28a414636}{00388}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PEM\_OFFSET           24}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00389}\mbox{\hyperlink{cn23xx__pf__regs_8h_a09c0dab69d01a467cf1448a9895f21d4}{00389}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_BAR1\_INDEX\_OFFSET    3}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00390}00390 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00391}\mbox{\hyperlink{cn23xx__pf__regs_8h_a48145f84dfd89ea4b069fb84a87cbe61}{00391}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_PEM\_BAR1\_INDEX\_REG(port, idx)                \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00392}00392 \textcolor{preprocessor}{                (LIO\_CN23XX\_PEM\_BAR1\_INDEX\_START +              \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00393}00393 \textcolor{preprocessor}{                 ((port) << LIO\_CN23XX\_PEM\_OFFSET) +            \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00394}00394 \textcolor{preprocessor}{                 ((idx) << LIO\_CN23XX\_BAR1\_INDEX\_OFFSET))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00395}00395 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00396}00396 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# DPI \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00397}00397 \textcolor{comment}{/* 4 Registers (64-\/bit) */}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00398}\mbox{\hyperlink{cn23xx__pf__regs_8h_adc55a185413428ac1bcf91b83ed82f06}{00398}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_DPI\_SLI\_PRT\_CFG\_START        0x0001df0000000900ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00399}\mbox{\hyperlink{cn23xx__pf__regs_8h_a56c4fdff26bd9d2642352772b5ff255c}{00399}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_DPI\_SLI\_PRTX\_CFG(port)               \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00400}00400 \textcolor{preprocessor}{                ((IO\_CN23XX\_DPI\_SLI\_PRT\_CFG\_START +     \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00401}00401 \textcolor{preprocessor}{                 ((port) * 0x8))}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00402}00402 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00403}00403 \textcolor{comment}{/*\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\# RST \#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#\#*/}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00404}00404 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00405}\mbox{\hyperlink{cn23xx__pf__regs_8h_a91849f90eb8133f03a3f3cc41ccfef91}{00405}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_RST\_BOOT                     0x0001180006001600ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00406}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1bc86781e7b9408358813e798f3c2651}{00406}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_RST\_SOFT\_RST                 0x0001180006001680ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00407}00407 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00408}\mbox{\hyperlink{cn23xx__pf__regs_8h_a1a276f22e2cea2a2522d4ffcc7259714}{00408}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_LMC0\_RESET\_CTL               0x0001180088000180ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00409}\mbox{\hyperlink{cn23xx__pf__regs_8h_a70c6fb6a0ec65fa9b3cf33e87a1b73d8}{00409}} \textcolor{preprocessor}{\#define LIO\_CN23XX\_LMC0\_RESET\_CTL\_DDR3RST\_MASK  0x0000000000000001ULL}}
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00410}00410 }
\DoxyCodeLine{\Hypertarget{cn23xx__pf__regs_8h_source_l00411}00411 \textcolor{preprocessor}{\#endif  }\textcolor{comment}{/* \_\_CN23XX\_PF\_REGS\_H\_\_ */}\textcolor{preprocessor}{}}

\end{DoxyCode}
