FreeBSD kernel IICBUS device code
ds3231reg.h
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1/*-
2 * Copyright (c) 2014-2015 Luiz Otavio O Souza <loos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29/*
30 * Maxim DS3231 RTC registers.
31 */
32
33#ifndef _DS3231REG_H_
34#define _DS3231REG_H_
35
36#define DS3231_SECS 0x00
37#define DS3231_SECS_MASK 0x7f
38#define DS3231_MINS 0x01
39#define DS3231_MINS_MASK 0x7f
40#define DS3231_HOUR 0x02
41#define DS3231_HOUR_MASK_12HR 0x1f
42#define DS3231_HOUR_MASK_24HR 0x3f
43#define DS3231_HOUR_IS_PM 0x20
44#define DS3231_HOUR_USE_AMPM 0x40
45#define DS3231_WEEKDAY 0x03
46#define DS3231_WEEKDAY_MASK 0x07
47#define DS3231_DATE 0x04
48#define DS3231_DATE_MASK 0x3f
49#define DS3231_MONTH 0x05
50#define DS3231_MONTH_MASK 0x1f
51#define DS3231_C_MASK 0x80
52#define DS3231_YEAR 0x06
53#define DS3231_YEAR_MASK 0xff
54#define DS3231_CONTROL 0x0e
55#define DS3231_CTRL_EOSC (1 << 7)
56#define DS3231_CTRL_BBSQW (1 << 6)
57#define DS3231_CTRL_CONV (1 << 5)
58#define DS3231_CTRL_RS2 (1 << 4)
59#define DS3231_CTRL_RS1 (1 << 3)
60#define DS3231_CTRL_RS_MASK (DS3231_CTRL_RS2 | DS3231_CTRL_RS1)
61#define DS3231_CTRL_RS_SHIFT 3
62#define DS3231_CTRL_INTCN (1 << 2)
63#define DS3231_CTRL_A2IE (1 << 1)
64#define DS3231_CTRL_A1IE (1 << 0)
65#define DS3231_CTRL_MASK \
66 (DS3231_CTRL_EOSC | DS3231_CTRL_A1IE | DS3231_CTRL_A2IE)
67#define DS3231_STATUS 0x0f
68#define DS3231_STATUS_OSF (1 << 7)
69#define DS3231_STATUS_EN32KHZ (1 << 3)
70#define DS3231_STATUS_BUSY (1 << 2)
71#define DS3231_STATUS_A2F (1 << 1)
72#define DS3231_STATUS_A1F (1 << 0)
73#define DS3231_TEMP 0x11
74#define DS3231_TEMP_MASK 0xffc0
75#define DS3231_0500C 0x80
76#define DS3231_0250C 0x40
77#define DS3231_MSB 0x8000
78#define DS3231_NEG_BIT DS3231_MSB
79#define TZ_ZEROC 2731
80
81#endif /* _DS3231REG_H_ */