\hypertarget{axi__quad__spi_8c_source}{}\doxysection{axi\+\_\+quad\+\_\+spi.\+c}
\label{axi__quad__spi_8c_source}\index{dev/xilinx/axi\_quad\_spi.c@{dev/xilinx/axi\_quad\_spi.c}}
\mbox{\hyperlink{axi__quad__spi_8c}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00001}00001 \textcolor{comment}{/*-\/}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00002}00002 \textcolor{comment}{ * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00003}00003 \textcolor{comment}{ * All rights reserved.}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00004}00004 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00005}00005 \textcolor{comment}{ * Portions of this software were developed by SRI International and the}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00006}00006 \textcolor{comment}{ * University of Cambridge Computer Laboratory under DARPA/AFRL contract}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00007}00007 \textcolor{comment}{ * FA8750-\/10-\/C-\/0237 ("{}CTSRD"{}), as part of the DARPA CRASH research programme.}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00008}00008 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00009}00009 \textcolor{comment}{ * Portions of this software were developed by the University of Cambridge}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00010}00010 \textcolor{comment}{ * Computer Laboratory as part of the CTSRD Project, with support from the}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00011}00011 \textcolor{comment}{ * UK Higher Education Innovation Fund (HEIF).}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00012}00012 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00013}00013 \textcolor{comment}{ * Redistribution and use in source and binary forms, with or without}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00014}00014 \textcolor{comment}{ * modification, are permitted provided that the following conditions}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00015}00015 \textcolor{comment}{ * are met:}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00016}00016 \textcolor{comment}{ * 1. Redistributions of source code must retain the above copyright}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00017}00017 \textcolor{comment}{ *    notice, this list of conditions and the following disclaimer.}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00018}00018 \textcolor{comment}{ * 2. Redistributions in binary form must reproduce the above copyright}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00019}00019 \textcolor{comment}{ *    notice, this list of conditions and the following disclaimer in the}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00020}00020 \textcolor{comment}{ *    documentation and/or other materials provided with the distribution.}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00021}00021 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00022}00022 \textcolor{comment}{ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00023}00023 \textcolor{comment}{ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00024}00024 \textcolor{comment}{ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00025}00025 \textcolor{comment}{ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00026}00026 \textcolor{comment}{ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00027}00027 \textcolor{comment}{ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00028}00028 \textcolor{comment}{ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00029}00029 \textcolor{comment}{ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00030}00030 \textcolor{comment}{ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00031}00031 \textcolor{comment}{ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00032}00032 \textcolor{comment}{ * SUCH DAMAGE.}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00033}00033 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00034}00034 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00035}00035 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00036}00036 \textcolor{comment}{ * Xilinx AXI\_QUAD\_SPI}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00037}00037 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00038}00038 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00039}00039 \textcolor{preprocessor}{\#include <sys/cdefs.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00040}\mbox{\hyperlink{axi__quad__spi_8c_a8c3ef283470a68cd30afe9b8a72cb60f}{00040}} \mbox{\hyperlink{axi__quad__spi_8c_a8c3ef283470a68cd30afe9b8a72cb60f}{\_\_FBSDID}}(\textcolor{stringliteral}{"{}\$FreeBSD\$"{}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00041}00041 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00042}00042 \textcolor{preprocessor}{\#include <sys/param.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00043}00043 \textcolor{preprocessor}{\#include <sys/systm.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00044}00044 \textcolor{preprocessor}{\#include <sys/bus.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00045}00045 \textcolor{preprocessor}{\#include <sys/kernel.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00046}00046 \textcolor{preprocessor}{\#include <sys/module.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00047}00047 \textcolor{preprocessor}{\#include <sys/malloc.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00048}00048 \textcolor{preprocessor}{\#include <sys/rman.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00049}00049 \textcolor{preprocessor}{\#include <sys/timeet.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00050}00050 \textcolor{preprocessor}{\#include <sys/timetc.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00051}00051 \textcolor{preprocessor}{\#include <sys/watchdog.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00052}00052 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00053}00053 \textcolor{preprocessor}{\#include <dev/spibus/spi.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00054}00054 \textcolor{preprocessor}{\#include <dev/spibus/spibusvar.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00055}00055 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00056}00056 \textcolor{preprocessor}{\#include "{}spibus\_if.h"{}}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00057}00057 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00058}00058 \textcolor{preprocessor}{\#include <dev/fdt/fdt\_common.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00059}00059 \textcolor{preprocessor}{\#include <dev/ofw/openfirm.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00060}00060 \textcolor{preprocessor}{\#include <dev/ofw/ofw\_bus.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00061}00061 \textcolor{preprocessor}{\#include <dev/ofw/ofw\_bus\_subr.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00062}00062 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00063}00063 \textcolor{preprocessor}{\#include <machine/bus.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00064}00064 \textcolor{preprocessor}{\#include <machine/cpu.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00065}00065 \textcolor{preprocessor}{\#include <machine/intr.h>}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00066}00066 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00067}\mbox{\hyperlink{axi__quad__spi_8c_a26db9894cb8f31733db71eb61eb0ac1f}{00067}} \textcolor{preprocessor}{\#define READ4(\_sc, \_reg)        \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00068}00068 \textcolor{preprocessor}{        bus\_space\_read\_4(\_sc-\/>bst, \_sc-\/>bsh, \_reg)}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00069}\mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{00069}} \textcolor{preprocessor}{\#define WRITE4(\_sc, \_reg, \_val) \(\backslash\)}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00070}00070 \textcolor{preprocessor}{        bus\_space\_write\_4(\_sc-\/>bst, \_sc-\/>bsh, \_reg, \_val)}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00071}00071 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00072}\mbox{\hyperlink{axi__quad__spi_8c_a4923b8cfbaebd62e6f14a2b22f1ff621}{00072}} \textcolor{preprocessor}{\#define SPI\_SRR         0x40            }\textcolor{comment}{/* Software reset register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00073}\mbox{\hyperlink{axi__quad__spi_8c_a21b998657d357bf7d37330e20f962a4e}{00073}} \textcolor{preprocessor}{\#define  SRR\_RESET      0x0A            }\textcolor{comment}{/* The only reset value */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00074}\mbox{\hyperlink{axi__quad__spi_8c_a3ecc73f7a1477b6815f7f7937eebaefc}{00074}} \textcolor{preprocessor}{\#define SPI\_CR          0x60            }\textcolor{comment}{/* Control register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00075}\mbox{\hyperlink{axi__quad__spi_8c_af8a6a7ab6f641e2c80f48a0a394f60c6}{00075}} \textcolor{preprocessor}{\#define  CR\_LSB\_FIRST   (1 << 9)        }\textcolor{comment}{/* LSB first */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00076}\mbox{\hyperlink{axi__quad__spi_8c_a32b09503ddaba084743bd99abdcb04c3}{00076}} \textcolor{preprocessor}{\#define  CR\_MASTER\_TI   (1 << 8)        }\textcolor{comment}{/* Master Transaction Inhibit */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00077}\mbox{\hyperlink{axi__quad__spi_8c_a3e13ede699f022243286fab793ebc795}{00077}} \textcolor{preprocessor}{\#define  CR\_MSS         (1 << 7)        }\textcolor{comment}{/* Manual Slave Select */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00078}\mbox{\hyperlink{axi__quad__spi_8c_a72b829faff6ffa64c7757f8752051544}{00078}} \textcolor{preprocessor}{\#define  CR\_RST\_RX      (1 << 6)        }\textcolor{comment}{/* RX FIFO Reset */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00079}\mbox{\hyperlink{axi__quad__spi_8c_a423ff95d94279d383cac50d2c3818cdb}{00079}} \textcolor{preprocessor}{\#define  CR\_RST\_TX      (1 << 5)        }\textcolor{comment}{/* TX FIFO Reset */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00080}\mbox{\hyperlink{axi__quad__spi_8c_a72be986dfc548126a49268dd9c0b9e07}{00080}} \textcolor{preprocessor}{\#define  CR\_CPHA        (1 << 4)        }\textcolor{comment}{/* Clock phase */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00081}\mbox{\hyperlink{axi__quad__spi_8c_abce2a84979332348d137e0c534f5de34}{00081}} \textcolor{preprocessor}{\#define  CR\_CPOL        (1 << 3)        }\textcolor{comment}{/* Clock polarity */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00082}\mbox{\hyperlink{axi__quad__spi_8c_a64e94fa86079b63746501ebb9f8f96b8}{00082}} \textcolor{preprocessor}{\#define  CR\_MASTER      (1 << 2)        }\textcolor{comment}{/* Master (SPI master mode) */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00083}\mbox{\hyperlink{axi__quad__spi_8c_a47e63735deffd6ee1555129e70b125b9}{00083}} \textcolor{preprocessor}{\#define  CR\_SPE         (1 << 1)        }\textcolor{comment}{/* SPI system enable */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00084}\mbox{\hyperlink{axi__quad__spi_8c_ae03d198f029a5cebc548f50b856f1849}{00084}} \textcolor{preprocessor}{\#define  CR\_LOOP        (1 << 0)        }\textcolor{comment}{/* Local loopback mode */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00085}\mbox{\hyperlink{axi__quad__spi_8c_ac2725a893e2f98de37d81e119fa56799}{00085}} \textcolor{preprocessor}{\#define SPI\_SR          0x64            }\textcolor{comment}{/* Status register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00086}\mbox{\hyperlink{axi__quad__spi_8c_a0822d2531571c401e5d4b9aeb278aaf5}{00086}} \textcolor{preprocessor}{\#define  SR\_TX\_FULL     (1 << 3)        }\textcolor{comment}{/* Transmit full */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00087}\mbox{\hyperlink{axi__quad__spi_8c_af0f0ad7c61bb8e337bd0d29c998978d1}{00087}} \textcolor{preprocessor}{\#define  SR\_TX\_EMPTY    (1 << 2)        }\textcolor{comment}{/* Transmit empty */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00088}\mbox{\hyperlink{axi__quad__spi_8c_ae9cd1ab2c0c5343a31649d053a1e37f7}{00088}} \textcolor{preprocessor}{\#define  SR\_RX\_FULL     (1 << 1)        }\textcolor{comment}{/* Receive full */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00089}\mbox{\hyperlink{axi__quad__spi_8c_a03506d5bdb9739139d05370bc168e777}{00089}} \textcolor{preprocessor}{\#define  SR\_RX\_EMPTY    (1 << 0)        }\textcolor{comment}{/* Receive empty */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00090}\mbox{\hyperlink{axi__quad__spi_8c_ab79e7b0457cc29f9ce1eaf8674105ab1}{00090}} \textcolor{preprocessor}{\#define SPI\_DTR         0x68            }\textcolor{comment}{/* Data transmit register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00091}\mbox{\hyperlink{axi__quad__spi_8c_ad6a8fda9872e83a8d7f35b31f6d7f3e7}{00091}} \textcolor{preprocessor}{\#define SPI\_DRR         0x6C            }\textcolor{comment}{/* Data receive register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00092}\mbox{\hyperlink{axi__quad__spi_8c_a5d3176b9bda302df863f74319125036d}{00092}} \textcolor{preprocessor}{\#define SPI\_SSR         0x70            }\textcolor{comment}{/* Slave select register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00093}\mbox{\hyperlink{axi__quad__spi_8c_a4f53a02458e758d42b6228aaf9f857f1}{00093}} \textcolor{preprocessor}{\#define SPI\_TFOR        0x74            }\textcolor{comment}{/* Transmit FIFO Occupancy Register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00094}\mbox{\hyperlink{axi__quad__spi_8c_ab26580262bf86d2219c03160d75d8dfe}{00094}} \textcolor{preprocessor}{\#define SPI\_RFOR        0x78            }\textcolor{comment}{/* Receive FIFO Occupancy Register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00095}\mbox{\hyperlink{axi__quad__spi_8c_aadd1d19fe5b0553532729bd79eb03e70}{00095}} \textcolor{preprocessor}{\#define SPI\_DGIER       0x1C            }\textcolor{comment}{/* Device global interrupt enable register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00096}\mbox{\hyperlink{axi__quad__spi_8c_ab83867b812c2496134e27addaee91b85}{00096}} \textcolor{preprocessor}{\#define SPI\_IPISR       0x20            }\textcolor{comment}{/* IP interrupt status register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00097}\mbox{\hyperlink{axi__quad__spi_8c_a1dcb58bb9ea6431d3d0287772574e9c0}{00097}} \textcolor{preprocessor}{\#define SPI\_IPIER       0x28            }\textcolor{comment}{/* IP interrupt enable register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00098}00098 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00099}\mbox{\hyperlink{structspi__softc}{00099}} \textcolor{keyword}{struct }\mbox{\hyperlink{structspi__softc}{spi\_softc}} \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00100}\mbox{\hyperlink{structspi__softc_a6d235a4880f99fdd2db0db4d623097c7}{00100}}         \textcolor{keyword}{struct }resource         *\mbox{\hyperlink{structspi__softc_a6d235a4880f99fdd2db0db4d623097c7}{res}}[1];}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00101}\mbox{\hyperlink{structspi__softc_a0b9e933f5d7639a04c2b458e1f8fabca}{00101}}         bus\_space\_tag\_t         \mbox{\hyperlink{structspi__softc_a0b9e933f5d7639a04c2b458e1f8fabca}{bst}};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00102}\mbox{\hyperlink{structspi__softc_a258bcf99a04281fae4b338fb00803391}{00102}}         bus\_space\_handle\_t      \mbox{\hyperlink{structspi__softc_a258bcf99a04281fae4b338fb00803391}{bsh}};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00103}\mbox{\hyperlink{structspi__softc_aae6f309ae00fe4c33a23115c7b124857}{00103}}         \textcolor{keywordtype}{void}                    *\mbox{\hyperlink{structspi__softc_aae6f309ae00fe4c33a23115c7b124857}{ih}};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00104}00104 \};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00105}00105 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00106}\mbox{\hyperlink{axi__quad__spi_8c_ae041b4fdafd34a6c6281605e686fab17}{00106}} \textcolor{keyword}{static} \textcolor{keyword}{struct }resource\_spec \mbox{\hyperlink{axi__quad__spi_8c_ae041b4fdafd34a6c6281605e686fab17}{spi\_spec}}[] = \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00107}00107         \{ SYS\_RES\_MEMORY,       0,      RF\_ACTIVE \},}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00108}00108         \{ -\/1, 0 \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00109}00109 \};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00110}00110 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00111}00111 \textcolor{keyword}{static} \textcolor{keywordtype}{int}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00112}\mbox{\hyperlink{axi__quad__spi_8c_a3cfdd6867ec34460a672d3dd4a73cae2}{00112}} \mbox{\hyperlink{axi__quad__spi_8c_a3cfdd6867ec34460a672d3dd4a73cae2}{spi\_probe}}(device\_t dev)}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00113}00113 \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00114}00114 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00115}00115         \textcolor{keywordflow}{if} (!ofw\_bus\_status\_okay(dev))}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00116}00116                 \textcolor{keywordflow}{return} (ENXIO);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00117}00117 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00118}00118         \textcolor{keywordflow}{if} (!ofw\_bus\_is\_compatible(dev, \textcolor{stringliteral}{"{}xlnx,xps-\/spi-\/3.2"{}}))}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00119}00119                 \textcolor{keywordflow}{return} (ENXIO);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00120}00120 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00121}00121         device\_set\_desc(dev, \textcolor{stringliteral}{"{}Xilinx Quad SPI"{}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00122}00122         \textcolor{keywordflow}{return} (BUS\_PROBE\_DEFAULT);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00123}00123 \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00124}00124 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00125}00125 \textcolor{keyword}{static} \textcolor{keywordtype}{int}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00126}\mbox{\hyperlink{axi__quad__spi_8c_a6532a57f13b07a24787b00d8892c99f8}{00126}} \mbox{\hyperlink{axi__quad__spi_8c_a6532a57f13b07a24787b00d8892c99f8}{spi\_attach}}(device\_t dev)}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00127}00127 \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00128}00128         \textcolor{keyword}{struct }\mbox{\hyperlink{structspi__softc}{spi\_softc}} *sc;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00129}00129         uint32\_t reg;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00130}00130 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00131}00131         sc = device\_get\_softc(dev);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00132}00132 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00133}00133         \textcolor{keywordflow}{if} (bus\_alloc\_resources(dev, \mbox{\hyperlink{axi__quad__spi_8c_ae041b4fdafd34a6c6281605e686fab17}{spi\_spec}}, sc-\/>\mbox{\hyperlink{structspi__softc_a6d235a4880f99fdd2db0db4d623097c7}{res}})) \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00134}00134                 device\_printf(dev, \textcolor{stringliteral}{"{}could not allocate resources\(\backslash\)n"{}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00135}00135                 \textcolor{keywordflow}{return} (ENXIO);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00136}00136         \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00137}00137 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00138}00138         \textcolor{comment}{/* Memory interface */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00139}00139         sc-\/>\mbox{\hyperlink{structspi__softc_a0b9e933f5d7639a04c2b458e1f8fabca}{bst}} = rman\_get\_bustag(sc-\/>\mbox{\hyperlink{structspi__softc_a6d235a4880f99fdd2db0db4d623097c7}{res}}[0]);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00140}00140         sc-\/>\mbox{\hyperlink{structspi__softc_a258bcf99a04281fae4b338fb00803391}{bsh}} = rman\_get\_bushandle(sc-\/>\mbox{\hyperlink{structspi__softc_a6d235a4880f99fdd2db0db4d623097c7}{res}}[0]);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00141}00141 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00142}00142         \textcolor{comment}{/* Reset */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00143}00143         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a4923b8cfbaebd62e6f14a2b22f1ff621}{SPI\_SRR}}, \mbox{\hyperlink{axi__quad__spi_8c_a21b998657d357bf7d37330e20f962a4e}{SRR\_RESET}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00144}00144 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00145}00145         DELAY(1000);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00146}00146 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00147}00147         reg = (\mbox{\hyperlink{axi__quad__spi_8c_a64e94fa86079b63746501ebb9f8f96b8}{CR\_MASTER}} | \mbox{\hyperlink{axi__quad__spi_8c_a3e13ede699f022243286fab793ebc795}{CR\_MSS}} | \mbox{\hyperlink{axi__quad__spi_8c_a72b829faff6ffa64c7757f8752051544}{CR\_RST\_RX}} | \mbox{\hyperlink{axi__quad__spi_8c_a423ff95d94279d383cac50d2c3818cdb}{CR\_RST\_TX}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00148}00148         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a3ecc73f7a1477b6815f7f7937eebaefc}{SPI\_CR}}, reg);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00149}00149         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_aadd1d19fe5b0553532729bd79eb03e70}{SPI\_DGIER}}, 0);        \textcolor{comment}{/* Disable interrupts */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00150}00150 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00151}00151         reg = (\mbox{\hyperlink{axi__quad__spi_8c_a64e94fa86079b63746501ebb9f8f96b8}{CR\_MASTER}} | \mbox{\hyperlink{axi__quad__spi_8c_a3e13ede699f022243286fab793ebc795}{CR\_MSS}} | \mbox{\hyperlink{axi__quad__spi_8c_a47e63735deffd6ee1555129e70b125b9}{CR\_SPE}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00152}00152         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a3ecc73f7a1477b6815f7f7937eebaefc}{SPI\_CR}}, reg);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00153}00153 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00154}00154         device\_add\_child(dev, \textcolor{stringliteral}{"{}spibus"{}}, 0);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00155}00155         \textcolor{keywordflow}{return} (bus\_generic\_attach(dev));}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00156}00156 \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00157}00157 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00158}00158 \textcolor{keyword}{static} \textcolor{keywordtype}{int}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00159}\mbox{\hyperlink{axi__quad__spi_8c_ae358aaf87cbd9042bb3f6c1f1142df66}{00159}} \mbox{\hyperlink{axi__quad__spi_8c_ae358aaf87cbd9042bb3f6c1f1142df66}{spi\_txrx}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structspi__softc}{spi\_softc}} *sc, uint8\_t *out\_buf,}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00160}00160     uint8\_t *in\_buf, \textcolor{keywordtype}{int} bufsz, \textcolor{keywordtype}{int} cs)}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00161}00161 \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00162}00162         uint32\_t data;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00163}00163         uint32\_t i;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00164}00164 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00165}00165         \textcolor{keywordflow}{for} (i = 0; i < bufsz; i++) \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00166}00166                 \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_ab79e7b0457cc29f9ce1eaf8674105ab1}{SPI\_DTR}}, out\_buf[i]);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00167}00167 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00168}00168                 \textcolor{keywordflow}{while}(!(\mbox{\hyperlink{axi__quad__spi_8c_a26db9894cb8f31733db71eb61eb0ac1f}{READ4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_ac2725a893e2f98de37d81e119fa56799}{SPI\_SR}}) \& \mbox{\hyperlink{axi__quad__spi_8c_af0f0ad7c61bb8e337bd0d29c998978d1}{SR\_TX\_EMPTY}}))}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00169}00169                         \textcolor{keywordflow}{continue};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00170}00170 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00171}00171                 data = \mbox{\hyperlink{axi__quad__spi_8c_a26db9894cb8f31733db71eb61eb0ac1f}{READ4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_ad6a8fda9872e83a8d7f35b31f6d7f3e7}{SPI\_DRR}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00172}00172                 \textcolor{keywordflow}{if} (in\_buf)}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00173}00173                         in\_buf[i] = (data \& 0xff);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00174}00174         \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00175}00175 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00176}00176         \textcolor{keywordflow}{return} (0);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00177}00177 \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00178}00178 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00179}00179 \textcolor{keyword}{static} \textcolor{keywordtype}{int}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00180}\mbox{\hyperlink{axi__quad__spi_8c_a21ae9c007965408b5f10e21e81632e93}{00180}} \mbox{\hyperlink{axi__quad__spi_8c_a21ae9c007965408b5f10e21e81632e93}{spi\_transfer}}(device\_t dev, device\_t child, \textcolor{keyword}{struct} spi\_command *cmd)}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00181}00181 \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00182}00182         \textcolor{keyword}{struct }\mbox{\hyperlink{structspi__softc}{spi\_softc}} *sc;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00183}00183         uint32\_t reg;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00184}00184         uint32\_t cs;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00185}00185 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00186}00186         sc = device\_get\_softc(dev);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00187}00187 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00188}00188         KASSERT(cmd-\/>tx\_cmd\_sz == cmd-\/>rx\_cmd\_sz,}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00189}00189             (\textcolor{stringliteral}{"{}\%s: TX/RX command sizes should be equal"{}}, \_\_func\_\_));}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00190}00190         KASSERT(cmd-\/>tx\_data\_sz == cmd-\/>rx\_data\_sz,}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00191}00191             (\textcolor{stringliteral}{"{}\%s: TX/RX data sizes should be equal"{}}, \_\_func\_\_));}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00192}00192 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00193}00193         \textcolor{comment}{/* get the proper chip select */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00194}00194         spibus\_get\_cs(child, \&cs);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00195}00195 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00196}00196         cs \&= \string~SPIBUS\_CS\_HIGH;}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00197}00197 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00198}00198         \textcolor{comment}{/* Assert CS */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00199}00199         reg = \mbox{\hyperlink{axi__quad__spi_8c_a26db9894cb8f31733db71eb61eb0ac1f}{READ4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a5d3176b9bda302df863f74319125036d}{SPI\_SSR}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00200}00200         reg \&= \string~(1 << cs);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00201}00201         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a5d3176b9bda302df863f74319125036d}{SPI\_SSR}}, reg);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00202}00202 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00203}00203         \textcolor{comment}{/* Command */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00204}00204         \mbox{\hyperlink{axi__quad__spi_8c_ae358aaf87cbd9042bb3f6c1f1142df66}{spi\_txrx}}(sc, cmd-\/>tx\_cmd, cmd-\/>rx\_cmd, cmd-\/>tx\_cmd\_sz, cs);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00205}00205 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00206}00206         \textcolor{comment}{/* Data */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00207}00207         \mbox{\hyperlink{axi__quad__spi_8c_ae358aaf87cbd9042bb3f6c1f1142df66}{spi\_txrx}}(sc, cmd-\/>tx\_data, cmd-\/>rx\_data, cmd-\/>tx\_data\_sz, cs);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00208}00208 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00209}00209         \textcolor{comment}{/* Deassert CS */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00210}00210         reg = \mbox{\hyperlink{axi__quad__spi_8c_a26db9894cb8f31733db71eb61eb0ac1f}{READ4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a5d3176b9bda302df863f74319125036d}{SPI\_SSR}});}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00211}00211         reg |= (1 << cs);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00212}00212         \mbox{\hyperlink{axi__quad__spi_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(sc, \mbox{\hyperlink{axi__quad__spi_8c_a5d3176b9bda302df863f74319125036d}{SPI\_SSR}}, reg);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00213}00213 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00214}00214         \textcolor{keywordflow}{return} (0);}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00215}00215 \}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00216}00216 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00217}\mbox{\hyperlink{axi__quad__spi_8c_aed38e92eb2625db7f51b902bf4b4edb9}{00217}} \textcolor{keyword}{static} device\_method\_t \mbox{\hyperlink{axi__quad__spi_8c_aed38e92eb2625db7f51b902bf4b4edb9}{spi\_methods}}[] = \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00218}00218         \textcolor{comment}{/* Device interface */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00219}00219         DEVMETHOD(device\_probe,         \mbox{\hyperlink{axi__quad__spi_8c_a3cfdd6867ec34460a672d3dd4a73cae2}{spi\_probe}}),}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00220}00220         DEVMETHOD(device\_attach,        \mbox{\hyperlink{axi__quad__spi_8c_a6532a57f13b07a24787b00d8892c99f8}{spi\_attach}}),}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00221}00221 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00222}00222         \textcolor{comment}{/* SPI interface */}}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00223}00223         DEVMETHOD(spibus\_transfer,      \mbox{\hyperlink{axi__quad__spi_8c_a21ae9c007965408b5f10e21e81632e93}{spi\_transfer}}),}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00224}00224         DEVMETHOD\_END}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00225}00225 \};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00226}00226 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00227}\mbox{\hyperlink{axi__quad__spi_8c_aad67df772b8b21b399da880b4f0fc81d}{00227}} \textcolor{keyword}{static} driver\_t \mbox{\hyperlink{axi__quad__spi_8c_aad67df772b8b21b399da880b4f0fc81d}{spi\_driver}} = \{}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00228}00228         \textcolor{stringliteral}{"{}spi"{}},}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00229}00229         \mbox{\hyperlink{axi__quad__spi_8c_aed38e92eb2625db7f51b902bf4b4edb9}{spi\_methods}},}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00230}00230         \textcolor{keyword}{sizeof}(\textcolor{keyword}{struct }\mbox{\hyperlink{structspi__softc}{spi\_softc}}),}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00231}00231 \};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00232}00232 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00233}\mbox{\hyperlink{axi__quad__spi_8c_adfc9d6e8c8b1e870eee22fd5fd4e911d}{00233}} \textcolor{keyword}{static} devclass\_t \mbox{\hyperlink{axi__quad__spi_8c_adfc9d6e8c8b1e870eee22fd5fd4e911d}{spi\_devclass}};}
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00234}00234 }
\DoxyCodeLine{\Hypertarget{axi__quad__spi_8c_source_l00235}\mbox{\hyperlink{axi__quad__spi_8c_a747a8b5ff2bd938713d5e5cd256f7763}{00235}} \mbox{\hyperlink{axi__quad__spi_8c_a747a8b5ff2bd938713d5e5cd256f7763}{DRIVER\_MODULE}}(spi, simplebus, \mbox{\hyperlink{axi__quad__spi_8c_aad67df772b8b21b399da880b4f0fc81d}{spi\_driver}}, \mbox{\hyperlink{axi__quad__spi_8c_adfc9d6e8c8b1e870eee22fd5fd4e911d}{spi\_devclass}}, 0, 0);}

\end{DoxyCode}
