\hypertarget{uftdi__reg_8h_source}{}\doxysection{uftdi\+\_\+reg.\+h}
\label{uftdi__reg_8h_source}\index{dev/usb/serial/uftdi\_reg.h@{dev/usb/serial/uftdi\_reg.h}}
\mbox{\hyperlink{uftdi__reg_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00001}00001 \textcolor{comment}{/*      \$NetBSD: uftdireg.h,v 1.6 2002/07/11 21:14:28 augustss Exp \$ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00002}00002 \textcolor{comment}{/*      \$FreeBSD\$       */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00003}00003 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00004}00004 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00005}00005 \textcolor{comment}{ * Definitions for the FTDI USB Single Port Serial Converter -\/}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00006}00006 \textcolor{comment}{ * known as FTDI\_SIO (Serial Input/Output application of the chipset)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00007}00007 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00008}00008 \textcolor{comment}{ * The device is based on the FTDI FT8U100AX chip. It has a DB25 on one side,}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00009}00009 \textcolor{comment}{ * USB on the other.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00010}00010 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00011}00011 \textcolor{comment}{ * Thanx to FTDI (http://www.ftdi.co.uk) for so kindly providing details}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00012}00012 \textcolor{comment}{ * of the protocol required to talk to the device and ongoing assistence}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00013}00013 \textcolor{comment}{ * during development.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00014}00014 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00015}00015 \textcolor{comment}{ * Bill Ryder -\/ bryder@sgi.com of Silicon Graphics, Inc. is the original}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00016}00016 \textcolor{comment}{ * author of this file.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00017}00017 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00018}00018 \textcolor{comment}{/* Modified by Lennart Augustsson */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00019}00019 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00020}00020 \textcolor{comment}{/* Vendor Request Interface */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00021}\mbox{\hyperlink{uftdi__reg_8h_a0c4ac1b95162aa3c959931bc46aa762c}{00021}} \textcolor{preprocessor}{\#define FTDI\_SIO\_RESET          0       }\textcolor{comment}{/* Reset the port */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00022}\mbox{\hyperlink{uftdi__reg_8h_a0a5515eba4af8c37b71db51de289b3b4}{00022}} \textcolor{preprocessor}{\#define FTDI\_SIO\_MODEM\_CTRL     1       }\textcolor{comment}{/* Set the modem control register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00023}\mbox{\hyperlink{uftdi__reg_8h_abdb21a829e0aca82178834602e34be7f}{00023}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_FLOW\_CTRL  2       }\textcolor{comment}{/* Set flow control register */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00024}\mbox{\hyperlink{uftdi__reg_8h_aeb562ba85606fa0e08fc188705098f0d}{00024}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_BAUD\_RATE  3       }\textcolor{comment}{/* Set baud rate */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00025}\mbox{\hyperlink{uftdi__reg_8h_ac7603bf715c4b1281f8e5907d0a61e0f}{00025}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_DATA       4       }\textcolor{comment}{/* Set the data characteristics of the}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00026}\mbox{\hyperlink{uftdi__reg_8h_a655b59efe8b82c7f6d975f7586e9ed61}{00026}} \textcolor{comment}{                                         * port */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00027}\mbox{\hyperlink{uftdi__reg_8h_af9f8c0df356ae4c9cf44656ea7c9ed5d}{00027}} \textcolor{preprocessor}{\#define FTDI\_SIO\_GET\_STATUS     5       }\textcolor{comment}{/* Retrieve current value of status}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00028}\mbox{\hyperlink{uftdi__reg_8h_adf6c6c6c120d42411c243936e177f3f7}{00028}} \textcolor{comment}{                                         * reg */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00029}\mbox{\hyperlink{uftdi__reg_8h_a8019ff04c9cf2d797904e2e955fd34cb}{00029}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_EVENT\_CHAR 6       }\textcolor{comment}{/* Set the event character */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00030}\mbox{\hyperlink{uftdi__reg_8h_a168a39dd4477d03b7378e43550a216e7}{00030}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_ERROR\_CHAR 7       }\textcolor{comment}{/* Set the error character */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00031}\mbox{\hyperlink{uftdi__reg_8h_a9c75935cec435127eb07a629e1ecbdd0}{00031}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_LATENCY    9       }\textcolor{comment}{/* Set the latency timer */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00032}\mbox{\hyperlink{uftdi__reg_8h_a5590286b8a9be1ef3fb08e993c273b8b}{00032}} \textcolor{preprocessor}{\#define FTDI\_SIO\_GET\_LATENCY    10      }\textcolor{comment}{/* Read the latency timer */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00033}\mbox{\hyperlink{uftdi__reg_8h_a0b8f8919f64cbbf825487d678d2b6d86}{00033}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_BITMODE    11      }\textcolor{comment}{/* Set the bit bang I/O mode */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00034}\mbox{\hyperlink{uftdi__reg_8h_a5c13a34819e5cae1640c22f02061caad}{00034}} \textcolor{preprocessor}{\#define FTDI\_SIO\_GET\_BITMODE    12      }\textcolor{comment}{/* Read pin states from any mode */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00035}\mbox{\hyperlink{uftdi__reg_8h_a79bbb7d2bb56739819d5961f1e80c98c}{00035}} \textcolor{preprocessor}{\#define FTDI\_SIO\_READ\_EEPROM    144     }\textcolor{comment}{/* Read eeprom word */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00036}00036 \textcolor{preprocessor}{\#define FTDI\_SIO\_WRITE\_EEPROM   145     }\textcolor{comment}{/* Write eeprom word */}\textcolor{preprocessor}{}}
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\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00039}\mbox{\hyperlink{uftdi__reg_8h_aa5e4271bcf2a509968946e029958809d}{00039}} \textcolor{comment}{/* Port Identifier Table */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00040}\mbox{\hyperlink{uftdi__reg_8h_ab8978f193e195b8dff119b69d585a7a5}{00040}} \textcolor{preprocessor}{\#define FTDI\_PIT\_DEFAULT        0       }\textcolor{comment}{/* SIOA */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00041}\mbox{\hyperlink{uftdi__reg_8h_a912055248b81b07835b2b6be53646dc0}{00041}} \textcolor{preprocessor}{\#define FTDI\_PIT\_SIOA           1       }\textcolor{comment}{/* SIOA */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00042}00042 \textcolor{preprocessor}{\#define FTDI\_PIT\_SIOB           2       }\textcolor{comment}{/* SIOB */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00043}00043 \textcolor{preprocessor}{\#define FTDI\_PIT\_PARALLEL       3       }\textcolor{comment}{/* Parallel */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00044}\mbox{\hyperlink{uftdi__reg_8h_a6862e87c6eb1b53a168ad01d43c55e2b}{00044}} }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00045}\mbox{\hyperlink{uftdi__reg_8h_ac4254aa09cb2773871a1517a7930141b}{00045}} \textcolor{comment}{/* Values for driver\_info */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00046}\mbox{\hyperlink{uftdi__reg_8h_aa7819233ceb6d5d2393b3f3ff01d0f73}{00046}} \textcolor{preprocessor}{\#define UFTDI\_JTAG\_IFACE(i)     (1 << i)        }\textcolor{comment}{/* Flag interface as jtag */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00047}\mbox{\hyperlink{uftdi__reg_8h_abfbb530825452a352e2297a10f372cbb}{00047}} \textcolor{preprocessor}{\#define UFTDI\_JTAG\_IFACES\_MAX   8               }\textcolor{comment}{/* Allow up to 8 jtag intfs */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00048}00048 \textcolor{preprocessor}{\#define UFTDI\_JTAG\_CHECK\_STRING 0xff            }\textcolor{comment}{/* Check product names table */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00049}00049 \textcolor{preprocessor}{\#define UFTDI\_JTAG\_MASK         0xff}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00050}00050 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00051}00051 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00052}00052 \textcolor{comment}{ * BmRequestType:  0100 0000B}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00053}00053 \textcolor{comment}{ * bRequest:       FTDI\_SIO\_RESET}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00054}00054 \textcolor{comment}{ * wValue:         Control Value}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00055}00055 \textcolor{comment}{ *                   0 = Reset SIO}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00056}00056 \textcolor{comment}{ *                   1 = Purge RX buffer}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00057}00057 \textcolor{comment}{ *                   2 = Purge TX buffer}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00058}00058 \textcolor{comment}{ * wIndex:         Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00059}00059 \textcolor{comment}{ * wLength:        0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00060}00060 \textcolor{comment}{ * Data:           None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00061}00061 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00062}00062 \textcolor{comment}{ * The Reset SIO command has this effect:}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00063}00063 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00064}00064 \textcolor{comment}{ *    Sets flow control set to 'none'}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00065}00065 \textcolor{comment}{ *    Event char = 0x0d}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00066}00066 \textcolor{comment}{ *    Event trigger = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00067}00067 \textcolor{comment}{ *    Purge RX buffer}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00068}00068 \textcolor{comment}{ *    Purge TX buffer}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00069}00069 \textcolor{comment}{ *    Clear DTR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00070}00070 \textcolor{comment}{ *    Clear RTS}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00071}00071 \textcolor{comment}{ *    baud and data format not reset}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00072}00072 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00073}00073 \textcolor{comment}{ * The Purge RX and TX buffer commands affect nothing except the buffers}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00074}\mbox{\hyperlink{uftdi__reg_8h_a184292199f79a3982b4a563504afe7c4}{00074}} \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00075}\mbox{\hyperlink{uftdi__reg_8h_a89e71c8a21d2a6fdddcec8c3447b8cb0}{00075}} \textcolor{comment}{/* FTDI\_SIO\_RESET */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00076}\mbox{\hyperlink{uftdi__reg_8h_aef90c1417ef6f4d59753c876a0057545}{00076}} \textcolor{preprocessor}{\#define FTDI\_SIO\_RESET\_SIO 0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00077}00077 \textcolor{preprocessor}{\#define FTDI\_SIO\_RESET\_PURGE\_RX 1}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00078}00078 \textcolor{preprocessor}{\#define FTDI\_SIO\_RESET\_PURGE\_TX 2}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00079}00079 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00080}00080 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00081}00081 \textcolor{comment}{ * BmRequestType:  0100 0000B}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00082}00082 \textcolor{comment}{ * bRequest:       FTDI\_SIO\_SET\_BAUDRATE}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00083}00083 \textcolor{comment}{ * wValue:         BaudRate low bits}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00084}00084 \textcolor{comment}{ * wIndex:         Port and BaudRate high bits }}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00085}00085 \textcolor{comment}{ * wLength:        0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00086}00086 \textcolor{comment}{ * Data:           None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00087}00087 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00088}00088 \textcolor{comment}{/* FTDI\_SIO\_SET\_BAUDRATE */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00089}00089 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00090}00090 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00091}00091 \textcolor{comment}{ * BmRequestType:  0100 0000B}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00092}00092 \textcolor{comment}{ * bRequest:       FTDI\_SIO\_SET\_DATA}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00093}00093 \textcolor{comment}{ * wValue:         Data characteristics (see below)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00094}00094 \textcolor{comment}{ * wIndex:         Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00095}00095 \textcolor{comment}{ * wLength:        0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00096}00096 \textcolor{comment}{ * Data:           No}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00097}00097 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00098}00098 \textcolor{comment}{ * Data characteristics}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00099}00099 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00100}00100 \textcolor{comment}{ *   B0..7   Number of data bits}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00101}00101 \textcolor{comment}{ *   B8..10  Parity}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00102}00102 \textcolor{comment}{ *           0 = None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00103}00103 \textcolor{comment}{ *           1 = Odd}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00104}00104 \textcolor{comment}{ *           2 = Even}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00105}00105 \textcolor{comment}{ *           3 = Mark}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00106}00106 \textcolor{comment}{ *           4 = Space}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00107}00107 \textcolor{comment}{ *   B11..13 Stop Bits}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00108}00108 \textcolor{comment}{ *           0 = 1}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00109}00109 \textcolor{comment}{ *           1 = 1.5}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00110}00110 \textcolor{comment}{ *           2 = 2}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00111}00111 \textcolor{comment}{ *   B14..15 Reserved}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00112}00112 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00113}\mbox{\hyperlink{uftdi__reg_8h_a99c4727608a4621f934c2a74c6ba8199}{00113}} \textcolor{comment}{ */}}
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\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00124}00124 \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_BREAK (0x1 << 14)}}
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\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00126}00126 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00127}00127 \textcolor{comment}{ * BmRequestType:   0100 0000B}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00128}00128 \textcolor{comment}{ * bRequest:        FTDI\_SIO\_MODEM\_CTRL}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00129}00129 \textcolor{comment}{ * wValue:          ControlValue (see below)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00130}00130 \textcolor{comment}{ * wIndex:          Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00131}00131 \textcolor{comment}{ * wLength:         0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00132}00132 \textcolor{comment}{ * Data:            None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00133}00133 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00134}00134 \textcolor{comment}{ * NOTE: If the device is in RTS/CTS flow control, the RTS set by this}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00135}00135 \textcolor{comment}{ * command will be IGNORED without an error being returned}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00136}00136 \textcolor{comment}{ * Also -\/ you can not set DTR and RTS with one control message}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00137}00137 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00138}00138 \textcolor{comment}{ * ControlValue}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00139}00139 \textcolor{comment}{ * B0    DTR state}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00140}00140 \textcolor{comment}{ *          0 = reset}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00141}00141 \textcolor{comment}{ *          1 = set}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00142}00142 \textcolor{comment}{ * B1    RTS state}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00143}00143 \textcolor{comment}{ *          0 = reset}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00144}00144 \textcolor{comment}{ *          1 = set}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00145}00145 \textcolor{comment}{ * B2..7 Reserved}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00146}00146 \textcolor{comment}{ * B8    DTR state enable}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00147}00147 \textcolor{comment}{ *          0 = ignore}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00148}00148 \textcolor{comment}{ *          1 = use DTR state}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00149}00149 \textcolor{comment}{ * B9    RTS state enable}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00150}00150 \textcolor{comment}{ *          0 = ignore}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00151}00151 \textcolor{comment}{ *          1 = use RTS state}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00152}00152 \textcolor{comment}{ * B10..15 Reserved}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00153}\mbox{\hyperlink{uftdi__reg_8h_adf02c870aee2747263e4bad434f3ee92}{00153}} \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00154}\mbox{\hyperlink{uftdi__reg_8h_a6f781cb804f9754fe91ca90b78821482}{00154}} \textcolor{comment}{/* FTDI\_SIO\_MODEM\_CTRL */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00155}\mbox{\hyperlink{uftdi__reg_8h_ab6ff468afcf80b382582d04633767f11}{00155}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_DTR\_MASK 0x1}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00156}\mbox{\hyperlink{uftdi__reg_8h_affb7aa2801805beaa49dbc5ca8793fd8}{00156}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_DTR\_HIGH (1 | ( FTDI\_SIO\_SET\_DTR\_MASK  << 8))}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00157}\mbox{\hyperlink{uftdi__reg_8h_a5b6822103572e1d583c7587103406eec}{00157}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_DTR\_LOW  (0 | ( FTDI\_SIO\_SET\_DTR\_MASK  << 8))}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00158}\mbox{\hyperlink{uftdi__reg_8h_a4990d64ac8d725be89527a6dc21bd6c5}{00158}} \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_RTS\_MASK 0x2}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00159}00159 \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_RTS\_HIGH (2 | ( FTDI\_SIO\_SET\_RTS\_MASK << 8))}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00160}00160 \textcolor{preprocessor}{\#define FTDI\_SIO\_SET\_RTS\_LOW (0 | ( FTDI\_SIO\_SET\_RTS\_MASK << 8))}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00161}00161 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00162}00162 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00163}00163 \textcolor{comment}{ *   BmRequestType:  0100 0000b}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00164}00164 \textcolor{comment}{ *   bRequest:       FTDI\_SIO\_SET\_FLOW\_CTRL}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00165}00165 \textcolor{comment}{ *   wValue:         Xoff/Xon}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00166}00166 \textcolor{comment}{ *   wIndex:         Protocol/Port -\/ hIndex is protocol / lIndex is port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00167}00167 \textcolor{comment}{ *   wLength:        0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00168}00168 \textcolor{comment}{ *   Data:           None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00169}00169 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00170}00170 \textcolor{comment}{ * hIndex protocol is:}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00171}00171 \textcolor{comment}{ *   B0 Output handshaking using RTS/CTS}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00172}00172 \textcolor{comment}{ *       0 = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00173}00173 \textcolor{comment}{ *       1 = enabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00174}00174 \textcolor{comment}{ *   B1 Output handshaking using DTR/DSR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00175}00175 \textcolor{comment}{ *       0 = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00176}00176 \textcolor{comment}{ *       1 = enabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00177}00177 \textcolor{comment}{ *   B2 Xon/Xoff handshaking}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00178}00178 \textcolor{comment}{ *       0 = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00179}00179 \textcolor{comment}{ *       1 = enabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00180}00180 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00181}00181 \textcolor{comment}{ * A value of zero in the hIndex field disables handshaking}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00182}00182 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00183}00183 \textcolor{comment}{ * If Xon/Xoff handshaking is specified, the hValue field should contain the}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00184}00184 \textcolor{comment}{ * XOFF character and the lValue field contains the XON character.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00185}\mbox{\hyperlink{uftdi__reg_8h_a7d0d35ef22b504afd608531c8e5275a0}{00185}} \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00186}\mbox{\hyperlink{uftdi__reg_8h_af5cdb59ccbb8eba190eca16cb74bddcb}{00186}} \textcolor{comment}{/* FTDI\_SIO\_SET\_FLOW\_CTRL */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00187}\mbox{\hyperlink{uftdi__reg_8h_a6e9fa56460716bc7bd0beea4d7a3fe19}{00187}} \textcolor{preprocessor}{\#define FTDI\_SIO\_DISABLE\_FLOW\_CTRL 0x0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00188}\mbox{\hyperlink{uftdi__reg_8h_a082065ffd54c708f8c632d3454045809}{00188}} \textcolor{preprocessor}{\#define FTDI\_SIO\_RTS\_CTS\_HS 0x1}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00189}00189 \textcolor{preprocessor}{\#define FTDI\_SIO\_DTR\_DSR\_HS 0x2}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00190}00190 \textcolor{preprocessor}{\#define FTDI\_SIO\_XON\_XOFF\_HS 0x4}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00191}00191 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00192}00192 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00193}00193 \textcolor{comment}{ *  BmRequestType:   0100 0000b}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00194}00194 \textcolor{comment}{ *  bRequest:        FTDI\_SIO\_SET\_EVENT\_CHAR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00195}00195 \textcolor{comment}{ *  wValue:          Event Char}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00196}00196 \textcolor{comment}{ *  wIndex:          Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00197}00197 \textcolor{comment}{ *  wLength:         0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00198}00198 \textcolor{comment}{ *  Data:            None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00199}00199 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00200}00200 \textcolor{comment}{ * wValue:}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00201}00201 \textcolor{comment}{ *   B0..7   Event Character}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00202}00202 \textcolor{comment}{ *   B8      Event Character Processing}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00203}00203 \textcolor{comment}{ *             0 = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00204}00204 \textcolor{comment}{ *             1 = enabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00205}00205 \textcolor{comment}{ *   B9..15  Reserved}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00206}00206 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00207}00207 \textcolor{comment}{ * FTDI\_SIO\_SET\_EVENT\_CHAR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00208}00208 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00209}00209 \textcolor{comment}{ * Set the special event character for the specified communications port.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00210}00210 \textcolor{comment}{ * If the device sees this character it will immediately return the}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00211}00211 \textcolor{comment}{ * data read so far -\/ rather than wait 40ms or until 62 bytes are read}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00212}00212 \textcolor{comment}{ * which is what normally happens.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00213}00213 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00214}00214 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00215}00215 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00216}00216 \textcolor{comment}{ *  BmRequestType:  0100 0000b}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00217}00217 \textcolor{comment}{ *  bRequest:       FTDI\_SIO\_SET\_ERROR\_CHAR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00218}00218 \textcolor{comment}{ *  wValue:         Error Char}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00219}00219 \textcolor{comment}{ *  wIndex:         Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00220}00220 \textcolor{comment}{ *  wLength:        0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00221}00221 \textcolor{comment}{ *  Data:           None}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00222}00222 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00223}00223 \textcolor{comment}{ *  Error Char}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00224}00224 \textcolor{comment}{ *  B0..7  Error Character}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00225}00225 \textcolor{comment}{ *  B8     Error Character Processing}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00226}00226 \textcolor{comment}{ *           0 = disabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00227}00227 \textcolor{comment}{ *           1 = enabled}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00228}00228 \textcolor{comment}{ *  B9..15 Reserved}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00229}00229 \textcolor{comment}{ * FTDI\_SIO\_SET\_ERROR\_CHAR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00230}00230 \textcolor{comment}{ * Set the parity error replacement character for the specified communications}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00231}00231 \textcolor{comment}{ * port.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00232}00232 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00233}00233 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00234}00234 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00235}00235 \textcolor{comment}{ *   BmRequestType:   1100 0000b}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00236}00236 \textcolor{comment}{ *   bRequest:        FTDI\_SIO\_GET\_MODEM\_STATUS}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00237}00237 \textcolor{comment}{ *   wValue:          zero}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00238}00238 \textcolor{comment}{ *   wIndex:          Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00239}00239 \textcolor{comment}{ *   wLength:         1}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00240}00240 \textcolor{comment}{ *   Data:            Status}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00241}00241 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00242}00242 \textcolor{comment}{ * One byte of data is returned}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00243}00243 \textcolor{comment}{ * B0..3 0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00244}00244 \textcolor{comment}{ * B4    CTS}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00245}00245 \textcolor{comment}{ *         0 = inactive}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00246}00246 \textcolor{comment}{ *         1 = active}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00247}00247 \textcolor{comment}{ * B5    DSR}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00248}00248 \textcolor{comment}{ *         0 = inactive}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00249}00249 \textcolor{comment}{ *         1 = active}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00250}00250 \textcolor{comment}{ * B6    Ring Indicator (RI)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00251}00251 \textcolor{comment}{ *         0 = inactive}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00252}00252 \textcolor{comment}{ *         1 = active}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00253}00253 \textcolor{comment}{ * B7    Receive Line Signal Detect (RLSD)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00254}00254 \textcolor{comment}{ *         0 = inactive}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00255}00255 \textcolor{comment}{ *         1 = active}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00256}00256 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00257}00257 \textcolor{comment}{ * FTDI\_SIO\_GET\_MODEM\_STATUS}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00258}\mbox{\hyperlink{uftdi__reg_8h_a91bed54fb7aa0e99449effed2e330822}{00258}} \textcolor{comment}{ * Retrieve the current value of the modem status register.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00259}\mbox{\hyperlink{uftdi__reg_8h_a3c495d7b1e010aa66a68066307c636dd}{00259}} \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00260}\mbox{\hyperlink{uftdi__reg_8h_ad817d85eb0f62257585caf7bb556aafb}{00260}} \textcolor{preprocessor}{\#define FTDI\_SIO\_CTS\_MASK 0x10}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00261}\mbox{\hyperlink{uftdi__reg_8h_aeb09e7783acb50bd02981ce387ef8e7e}{00261}} \textcolor{preprocessor}{\#define FTDI\_SIO\_DSR\_MASK 0x20}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00262}00262 \textcolor{preprocessor}{\#define FTDI\_SIO\_RI\_MASK  0x40}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00263}00263 \textcolor{preprocessor}{\#define FTDI\_SIO\_RLSD\_MASK 0x80}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00264}00264 }
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00265}00265 \textcolor{comment}{/*}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00266}00266 \textcolor{comment}{ * DATA FORMAT}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00267}00267 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00268}00268 \textcolor{comment}{ * IN Endpoint}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00269}00269 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00270}00270 \textcolor{comment}{ * The device reserves the first two bytes of data on this endpoint to contain}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00271}00271 \textcolor{comment}{ * the current values of the modem and line status registers. In the absence of}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00272}00272 \textcolor{comment}{ * data, the device generates a message consisting of these two status bytes}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00273}00273 \textcolor{comment}{ * every 40 ms.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00274}00274 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00275}00275 \textcolor{comment}{ * Byte 0: Modem Status}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00276}00276 \textcolor{comment}{ *   NOTE: 4 upper bits have same layout as the MSR register in a 16550}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00277}00277 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00278}00278 \textcolor{comment}{ * Offset       Description}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00279}00279 \textcolor{comment}{ * B0..3        Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00280}00280 \textcolor{comment}{ * B4           Clear to Send (CTS)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00281}00281 \textcolor{comment}{ * B5           Data Set Ready (DSR)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00282}00282 \textcolor{comment}{ * B6           Ring Indicator (RI)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00283}00283 \textcolor{comment}{ * B7           Receive Line Signal Detect (RLSD)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00284}00284 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00285}00285 \textcolor{comment}{ * Byte 1: Line Status}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00286}00286 \textcolor{comment}{ *   NOTE: same layout as the LSR register in a 16550}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00287}00287 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00288}00288 \textcolor{comment}{ * Offset       Description}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00289}00289 \textcolor{comment}{ * B0   Data Ready (DR)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00290}00290 \textcolor{comment}{ * B1   Overrun Error (OE)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00291}00291 \textcolor{comment}{ * B2   Parity Error (PE)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00292}00292 \textcolor{comment}{ * B3   Framing Error (FE)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00293}00293 \textcolor{comment}{ * B4   Break Interrupt (BI)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00294}00294 \textcolor{comment}{ * B5   Transmitter Holding Register (THRE)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00295}00295 \textcolor{comment}{ * B6   Transmitter Empty (TEMT)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00296}00296 \textcolor{comment}{ * B7   Error in RCVR FIFO}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00297}00297 \textcolor{comment}{ * OUT Endpoint}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00298}00298 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00299}00299 \textcolor{comment}{ * This device reserves the first bytes of data on this endpoint contain the}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00300}00300 \textcolor{comment}{ * length and port identifier of the message. For the FTDI USB Serial converter}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00301}00301 \textcolor{comment}{ * the port identifier is always 1.}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00302}00302 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00303}00303 \textcolor{comment}{ * Byte 0: Port \& length}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00304}00304 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00305}00305 \textcolor{comment}{ * Offset       Description}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00306}00306 \textcolor{comment}{ * B0..1        Port}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00307}\mbox{\hyperlink{uftdi__reg_8h_a12753af76591d7e1b0f20557f394612e}{00307}} \textcolor{comment}{ * B2..7        Length of message -\/ (not including Byte 0)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00308}\mbox{\hyperlink{uftdi__reg_8h_aa37c09635cab956b3586fef37a8a1228}{00308}} \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00309}\mbox{\hyperlink{uftdi__reg_8h_a4e85e5a8ae4a7f2823104e8032cce675}{00309}} \textcolor{preprocessor}{\#define FTDI\_PORT\_MASK 0x0f}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00310}\mbox{\hyperlink{uftdi__reg_8h_a783f5bdcbf8f80df031dd506c415ae54}{00310}} \textcolor{preprocessor}{\#define FTDI\_MSR\_MASK 0xf0}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00311}\mbox{\hyperlink{uftdi__reg_8h_a1c8b612511822ccccd66eb7a7a8b372b}{00311}} \textcolor{preprocessor}{\#define FTDI\_GET\_MSR(p) (((p)[0]) \& FTDI\_MSR\_MASK)}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00312}\mbox{\hyperlink{uftdi__reg_8h_a9d9264286c4da3a95e1bcc0b2a785307}{00312}} \textcolor{preprocessor}{\#define FTDI\_GET\_LSR(p) ((p)[1])}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00313}00313 \textcolor{preprocessor}{\#define FTDI\_LSR\_MASK (\string~0x60)           }\textcolor{comment}{/* interesting bits */}\textcolor{preprocessor}{}}
\DoxyCodeLine{\Hypertarget{uftdi__reg_8h_source_l00314}00314 \textcolor{preprocessor}{\#define FTDI\_OUT\_TAG(len, port) (((len) << 2) | (port))}}

\end{DoxyCode}
