\hypertarget{pci_8c}{}\doxysection{dev/pci/pci.c File Reference}
\label{pci_8c}\index{dev/pci/pci.c@{dev/pci/pci.c}}
{\ttfamily \#include $<$sys/cdefs.\+h$>$}\newline
{\ttfamily \#include \char`\"{}opt\+\_\+acpi.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}opt\+\_\+iommu.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}opt\+\_\+bus.\+h\char`\"{}}\newline
{\ttfamily \#include $<$sys/param.\+h$>$}\newline
{\ttfamily \#include $<$sys/conf.\+h$>$}\newline
{\ttfamily \#include $<$sys/endian.\+h$>$}\newline
{\ttfamily \#include $<$sys/eventhandler.\+h$>$}\newline
{\ttfamily \#include $<$sys/fcntl.\+h$>$}\newline
{\ttfamily \#include $<$sys/kernel.\+h$>$}\newline
{\ttfamily \#include $<$sys/limits.\+h$>$}\newline
{\ttfamily \#include $<$sys/linker.\+h$>$}\newline
{\ttfamily \#include $<$sys/malloc.\+h$>$}\newline
{\ttfamily \#include $<$sys/module.\+h$>$}\newline
{\ttfamily \#include $<$sys/queue.\+h$>$}\newline
{\ttfamily \#include $<$sys/sbuf.\+h$>$}\newline
{\ttfamily \#include $<$sys/sysctl.\+h$>$}\newline
{\ttfamily \#include $<$sys/systm.\+h$>$}\newline
{\ttfamily \#include $<$sys/taskqueue.\+h$>$}\newline
{\ttfamily \#include $<$sys/tree.\+h$>$}\newline
{\ttfamily \#include $<$vm/vm.\+h$>$}\newline
{\ttfamily \#include $<$vm/pmap.\+h$>$}\newline
{\ttfamily \#include $<$vm/vm\+\_\+extern.\+h$>$}\newline
{\ttfamily \#include $<$sys/bus.\+h$>$}\newline
{\ttfamily \#include $<$machine/bus.\+h$>$}\newline
{\ttfamily \#include $<$sys/rman.\+h$>$}\newline
{\ttfamily \#include $<$machine/resource.\+h$>$}\newline
{\ttfamily \#include $<$machine/stdarg.\+h$>$}\newline
{\ttfamily \#include $<$sys/pciio.\+h$>$}\newline
{\ttfamily \#include $<$dev/pci/pcireg.\+h$>$}\newline
{\ttfamily \#include $<$dev/pci/pcivar.\+h$>$}\newline
{\ttfamily \#include $<$dev/pci/pci\+\_\+private.\+h$>$}\newline
{\ttfamily \#include $<$dev/usb/controller/xhcireg.\+h$>$}\newline
{\ttfamily \#include $<$dev/usb/controller/ehcireg.\+h$>$}\newline
{\ttfamily \#include $<$dev/usb/controller/ohcireg.\+h$>$}\newline
{\ttfamily \#include $<$dev/usb/controller/uhcireg.\+h$>$}\newline
{\ttfamily \#include $<$dev/iommu/iommu.\+h$>$}\newline
{\ttfamily \#include \char`\"{}pcib\+\_\+if.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}pci\+\_\+if.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}opt\+\_\+ddb.\+h\char`\"{}}\newline
Include dependency graph for pci.\+c\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d5/d83/pci_8c__incl}
\end{center}
\end{figure}
\doxysubsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{structpci__quirk}{pci\+\_\+quirk}}
\item 
struct \mbox{\hyperlink{structvpd__readstate}{vpd\+\_\+readstate}}
\end{DoxyCompactItemize}
\doxysubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{pci_8c_a2cb325135ae3ba5e4c8782fd9f8a62d2}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}(cfg,  \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}})
\item 
\#define \mbox{\hyperlink{pci_8c_ad71c71d232a16cdbec969c7350dbcbf2}{PCI\+\_\+\+QUIRK\+\_\+\+MAP\+\_\+\+REG}}~1 /$\ast$ PCI map register in weird place $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a4dc5105715a79cd99f1098bd2b876700}{PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSI}}~2 /$\ast$ Neither MSI nor MSI-\/X work $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_ad92f00d3144be12793f761a36c69d2eb}{PCI\+\_\+\+QUIRK\+\_\+\+ENABLE\+\_\+\+MSI\+\_\+\+VM}}~3 /$\ast$ Older chipset in VM where MSI works $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a9d0548c6a7da361cb1001c3c0f6c15db}{PCI\+\_\+\+QUIRK\+\_\+\+UNMAP\+\_\+\+REG}}~4 /$\ast$ Ignore PCI map register $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a981d2f6522c2e4ac7e2a843b9bac3abf}{PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSIX}}~5 /$\ast$ MSI-\/X doesn\textquotesingle{}t work $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a3c6160216b4f7802ffe3dbb9a7216025}{PCI\+\_\+\+QUIRK\+\_\+\+MSI\+\_\+\+INTX\+\_\+\+BUG}}~6 /$\ast$ \mbox{\hyperlink{pcireg_8h_a99e8dd5836219982660a0081c06abbd3}{PCIM\+\_\+\+CMD\+\_\+\+INTx\+DIS}} disables MSI $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_ad9e5211041653c08ae1046fc0147c970}{PCI\+\_\+\+QUIRK\+\_\+\+REALLOC\+\_\+\+BAR}}~7 /$\ast$ Can\textquotesingle{}t allocate memory at the default \mbox{\hyperlink{pci__if_8m_ab6b52376c1b9d81e6ea6f95a1225f832}{address}} $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a1674815ca2d033d68ef43d23a40e124d}{PCI\+\_\+\+MAPMEM}}~0x01 /$\ast$ memory map $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a121577e590355f4248bf1fdf98d39010}{PCI\+\_\+\+MAPMEMP}}~0x02 /$\ast$ prefetchable memory map $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a5a6f20ed6afca3ad59e90615898b2493}{PCI\+\_\+\+MAPPORT}}~0x04 /$\ast$ port map $\ast$/
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, b, s, f, n, w)
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, b, s, f, n, w)
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}}, n, w)
\item 
\#define \mbox{\hyperlink{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}{WREG}}(n,  v,  w)~PCIB\+\_\+\+WRITE\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}}, n, v, w)
\item 
\#define \mbox{\hyperlink{pci_8c_acd448edde2c1df9b086df7747fe8c264}{PCI\+\_\+\+VPD\+\_\+\+TIMEOUT}}~1000000
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, busno, s, f, n, w)
\item 
\#define \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}(n,  w)~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, busno, s, f, n, w)
\item 
\#define \mbox{\hyperlink{pci_8c_a2e2d07e7bf394ce023ef5ee9f4dc0c2a}{WREG}}(n,  v)~pci\+\_\+write\+\_\+config(\mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, pos + (n), (v), 2)
\item 
\#define \mbox{\hyperlink{pci_8c_a7e60ce204a13df01860248ad62014b81}{RREG}}(n)~pci\+\_\+read\+\_\+config(\mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, pos + (n), 2)
\end{DoxyCompactItemize}
\doxysubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{pci_8c_a8c3ef283470a68cd30afe9b8a72cb60f}{\+\_\+\+\_\+\+FBSDID}} (\char`\"{}\$Free\+BSD\$\char`\"{})
\item 
static int \mbox{\hyperlink{pci_8c_a44848107ccf1d7bab049e971c0d04170}{pci\+\_\+has\+\_\+quirk}} (uint32\+\_\+t devid, int quirk)
\item 
static \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} \mbox{\hyperlink{pci_8c_a3785d14fcd3e7c0dac56ad7165627783}{pci\+\_\+mapbase}} (uint64\+\_\+t mapreg)
\item 
static const char $\ast$ \mbox{\hyperlink{pci_8c_af223a7ac70786dff6609f45cfd718ac8}{pci\+\_\+maptype}} (uint64\+\_\+t mapreg)
\item 
static int \mbox{\hyperlink{pci_8c_ac6a13619b6ada519295eaecb726625e1}{pci\+\_\+maprange}} (uint64\+\_\+t mapreg)
\item 
static \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} \mbox{\hyperlink{pci_8c_aa090cb700da57816a6bc85532ed8fc52}{pci\+\_\+rombase}} (uint64\+\_\+t mapreg)
\item 
static int \mbox{\hyperlink{pci_8c_ac485421c79ff5c476b96c50fd8e634d7}{pci\+\_\+romsize}} (uint64\+\_\+t testval)
\item 
static void \mbox{\hyperlink{pci_8c_aa126158ea610682a7290c919588bdd29}{pci\+\_\+fixancient}} (\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg)
\item 
static int \mbox{\hyperlink{pci_8c_abadbf043b16b3fd045a67723cd30a70c}{pci\+\_\+printf}} (\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg, const char $\ast$fmt,...)
\item 
static int \mbox{\hyperlink{pci_8c_a139c8cc02beb3bb443fc36da4046c94c}{pci\+\_\+porten}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static int \mbox{\hyperlink{pci_8c_ab21a5faf9ac66f7ac0c0e24869c25849}{pci\+\_\+memen}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_a1c1054e322fe5966cc55d907fcb91ced}{pci\+\_\+assign\+\_\+interrupt}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int force\+\_\+route)
\item 
static int \mbox{\hyperlink{pci_8c_ad8cc613f9bc3cf6bd81c90510240b67a}{pci\+\_\+add\+\_\+map}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, struct resource\+\_\+list $\ast$rl, int force, int prefetch)
\item 
static int \mbox{\hyperlink{pci_8c_af66a91ed02fd763097636264aed16dd2}{pci\+\_\+probe}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_addfc7380b10e667b8b7a1d9c4bcc5f88}{pci\+\_\+load\+\_\+vendor\+\_\+data}} (void)
\item 
static int \mbox{\hyperlink{pci_8c_a9cf3ce75072bdf3ea645b824c42239ec}{pci\+\_\+describe\+\_\+parse\+\_\+line}} (char $\ast$$\ast$ptr, int $\ast$vendor, int $\ast$device, char $\ast$$\ast$\mbox{\hyperlink{pci_8c_a710bce51374aba96ab04912897666c35}{desc}})
\item 
static char $\ast$ \mbox{\hyperlink{pci_8c_a502c8a2ad9591c012b4d8d92288ca4de}{pci\+\_\+describe\+\_\+device}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static int \mbox{\hyperlink{pci_8c_abfeb3e04b96d2c915a90cb25296d7802}{pci\+\_\+modevent}} (module\+\_\+t mod, int what, void $\ast$arg)
\item 
static void \mbox{\hyperlink{pci_8c_afe8b116b2ca59407853acfdb983076e5}{pci\+\_\+hdrtypedata}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, int b, int s, int f, \mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg)
\item 
static void \mbox{\hyperlink{pci_8c_a9cc9d31a2b7ebd56cf9fe47eb64b60b2}{pci\+\_\+read\+\_\+cap}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, \mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg)
\item 
static int \mbox{\hyperlink{pci_8c_a206056af0a51ecda22999c8624578960}{pci\+\_\+read\+\_\+vpd\+\_\+reg}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, \mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, uint32\+\_\+t $\ast$\mbox{\hyperlink{pcib__if_8m_aa1cf91039f621340f15bcd4c95f582ef}{data}})
\item 
static void \mbox{\hyperlink{pci_8c_a84f3bbefe6743cd339105ab6fe8d14ad}{pci\+\_\+read\+\_\+vpd}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, \mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg)
\item 
static void \mbox{\hyperlink{pci_8c_a46b9beaf9bbb19656aa660f06c34f3b4}{pci\+\_\+mask\+\_\+msix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int \mbox{\hyperlink{pci__if_8m_a1f1413a959a617beceb7e84d8e6e7534}{index}})
\item 
static void \mbox{\hyperlink{pci_8c_af545598928776e8771053c76a3a66492}{pci\+\_\+unmask\+\_\+msix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int \mbox{\hyperlink{pci__if_8m_a1f1413a959a617beceb7e84d8e6e7534}{index}})
\item 
static int \mbox{\hyperlink{pci_8c_a0458cdddce625bfd8b2858cb46dc9b12}{pci\+\_\+msi\+\_\+blacklisted}} (void)
\item 
static int \mbox{\hyperlink{pci_8c_a1d97bc22c3980045405d3f50264c15b8}{pci\+\_\+msix\+\_\+blacklisted}} (void)
\item 
static void \mbox{\hyperlink{pci_8c_aaa0ecb80a213e78e163acb8682a1d45e}{pci\+\_\+resume\+\_\+msi}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_a85011c1600ee4c8268691bf397f3d4bc}{pci\+\_\+resume\+\_\+msix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static int \mbox{\hyperlink{pci_8c_ad457d44a48fd53c958d2d3dc84321ab5}{pci\+\_\+remap\+\_\+intr\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int \mbox{\hyperlink{pcib__if_8m_aea22ec27eb52d3e0d744184067cbca3a}{irq}})
\item 
static void \mbox{\hyperlink{pci_8c_a2a572cf7b81d9316cdce91d5fd782bea}{pci\+\_\+hint\+\_\+device\+\_\+unit}} (device\+\_\+t acdev, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, const char $\ast$\mbox{\hyperlink{pci__if_8m_a8f8f80d37794cde9472343e4487ba3eb}{name}}, int $\ast$unitp)
\item 
static int \mbox{\hyperlink{pci_8c_a0d0e2b172faddddf80103540038fe0c8}{pci\+\_\+reset\+\_\+post}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
static int \mbox{\hyperlink{pci_8c_a35b63e459f4244008af9e056538b5dac}{pci\+\_\+reset\+\_\+prepare}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
static int \mbox{\hyperlink{pci_8c_a998c29fb25189ed4da74d9f84bf83473}{pci\+\_\+reset\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int flags)
\item 
static int \mbox{\hyperlink{pci_8c_a1548c1cbc3af76dbc61535802d13a1ce}{pci\+\_\+get\+\_\+id\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, enum \mbox{\hyperlink{pci__if_8m_ae1632668e86b936e88cc39cadd71d161}{pci\+\_\+id\+\_\+type}} \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, uintptr\+\_\+t $\ast$\mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}})
\item 
static struct pci\+\_\+devinfo $\ast$ \mbox{\hyperlink{pci_8c_a1076914926d10dd4dab66477bab0c9b3}{pci\+\_\+fill\+\_\+devinfo}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, int d, int b, int s, int f, uint16\+\_\+t \mbox{\hyperlink{pci__if_8m_aac5ffad7f07bfef80deaef77e0eeca69}{vid}}, uint16\+\_\+t \mbox{\hyperlink{pci__if_8m_ac06fda3b50fd63d7e0d2f47b4bf8761e}{did}})
\item 
\mbox{\hyperlink{pci_8c_a08a1d36f828344ec30c627d2e821de38}{DEFINE\+\_\+\+CLASS\+\_\+0}} (\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}, pci\+\_\+driver, \mbox{\hyperlink{pci_8c_a2fc2bb59df114cd2363b2d52a9182996}{pci\+\_\+methods}}, sizeof(struct \mbox{\hyperlink{structpci__softc}{pci\+\_\+softc}}))
\item 
\mbox{\hyperlink{pci_8c_ab5d3df4fe95bec16c96314db1c3a55e0}{EARLY\+\_\+\+DRIVER\+\_\+\+MODULE}} (\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}, \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, pci\+\_\+driver, \mbox{\hyperlink{pci_8c_a0d8b3600e8129d7d0011246546ebe06a}{pci\+\_\+devclass}}, \mbox{\hyperlink{pci_8c_abfeb3e04b96d2c915a90cb25296d7802}{pci\+\_\+modevent}}, NULL, BUS\+\_\+\+PASS\+\_\+\+BUS)
\item 
\mbox{\hyperlink{pci_8c_a2cad6fe383167d4c247fca44aac71490}{MODULE\+\_\+\+VERSION}} (\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}, 1)
\item 
\mbox{\hyperlink{pci_8c_a8e6d6e4090a99c0d969046f4bb75ccc5}{SYSCTL\+\_\+\+NODE}} (\+\_\+hw, OID\+\_\+\+AUTO, \mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}, CTLFLAG\+\_\+\+RD$\vert$CTLFLAG\+\_\+\+MPSAFE, 0, \char`\"{}PCI \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}} tuning parameters\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_af9073548bb69c29d5fb5c1cf9b810747}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, enable\+\_\+io\+\_\+modes, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_ac26444344726a1e9acde4ad9015ab094}{pci\+\_\+enable\+\_\+io\+\_\+modes}}, 1, \char`\"{}Enable I/O and memory bits in the \mbox{\hyperlink{pci__iov__if_8m_a6d28928fc54ea8c772521fd4c7eb45a7}{config}} register.  Some BIOSes do not\char`\"{} \char`\"{} enable these bits correctly.  We\textquotesingle{}d like to do this all the time, but\char`\"{} \char`\"{} there are some peripherals that this causes problems with.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a19fddd36a7c2d7d9008bd050bd092146}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, realloc\+\_\+bars, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_af707ec0d2f1e3a544c13febe656a67a3}{pci\+\_\+do\+\_\+realloc\+\_\+bars}}, 0, \char`\"{}Attempt to allocate a new range for any BARs whose original \char`\"{} \char`\"{}firmware-\/assigned ranges fail to allocate during the initial device scan.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a9b2025a79421c17f7a3223010bd0fed3}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, do\+\_\+power\+\_\+nodriver, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_accb134df1f88ac586aeff236d0264601}{pci\+\_\+do\+\_\+power\+\_\+nodriver}}, 0, \char`\"{}Place a function into D3 \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}} when no driver attaches to it.  0 means\char`\"{} \char`\"{} disable.  1 means conservatively place devices into D3 state.  2 means\char`\"{} \char`\"{} aggressively place devices into D3 state.  3 means put absolutely\char`\"{} \char`\"{} everything in D3 state.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a1345521fbe128a13989db8162ac32a96}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, do\+\_\+power\+\_\+resume, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci__private_8h_a2cacf9ca1d91ab0a4c5af03d811b7e81}{pci\+\_\+do\+\_\+power\+\_\+resume}}, 1, \char`\"{}Transition from D3 -\/$>$ D0 on resume.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a93d2406756d8b114e68244bc7240a676}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, do\+\_\+power\+\_\+suspend, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci__private_8h_a26facb574b1a5760131c429ccef62672}{pci\+\_\+do\+\_\+power\+\_\+suspend}}, 1, \char`\"{}Transition from D0 -\/$>$ D3 on suspend.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a43986b7c52a425a1800076f23283bd13}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, \mbox{\hyperlink{pci__if_8m_add11cc1e0e4f784e46b4df608f5721c9}{enable\+\_\+msi}}, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_a60237f093995ca7d580674bf14913c69}{pci\+\_\+do\+\_\+msi}}, 1, \char`\"{}Enable support for MSI interrupts\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a4ca5c2eb7cc6168bcd96653c4cc9cc70}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, \mbox{\hyperlink{pci__if_8m_a42fe6f08b5e241812aa9f785a38acae1}{enable\+\_\+msix}}, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_a613e346deae8926498ef9d6275468cc5}{pci\+\_\+do\+\_\+msix}}, 1, \char`\"{}Enable support for MSI-\/X interrupts\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a329b085fda2be9b79803e3cae85739bc}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, msix\+\_\+rewrite\+\_\+table, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_aeb0db1584aab21dce108fecf9bb2bd5c}{pci\+\_\+msix\+\_\+rewrite\+\_\+table}}, 0, \char`\"{}Rewrite entire MSI-\/X table when updating MSI-\/X entries\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_aa1a5bb093f7101ed04e3ac9ea4496cf7}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, honor\+\_\+msi\+\_\+blacklist, CTLFLAG\+\_\+\+RDTUN, \&\mbox{\hyperlink{pci_8c_ac3e59b14ef825dc4c45434de3720b9cf}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}}, 1, \char`\"{}Honor chipset blacklist for MSI/MSI-\/X\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a0d15bce2505eefb04eeb00c8df679f8e}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, usb\+\_\+early\+\_\+takeover, CTLFLAG\+\_\+\+RDTUN, \&\mbox{\hyperlink{pci_8c_a1617f0f571bd9cfc3c8b3a9e9a54a225}{pci\+\_\+usb\+\_\+takeover}}, 1, \char`\"{}Enable early takeover of USB controllers. Disable this if you depend on\char`\"{} \char`\"{} BIOS emulation of USB devices, that is you use USB devices (like\char`\"{} \char`\"{} keyboard or mouse) but do not load USB drivers\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a3bca2a3e7bd0515fdd18ca6f4a216f3f}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, clear\+\_\+bars, CTLFLAG\+\_\+\+RDTUN, \&\mbox{\hyperlink{pci_8c_afda6175fd03d67b2834d458f6778ee27}{pci\+\_\+clear\+\_\+bars}}, 0, \char`\"{}Ignore firmware-\/assigned resources for BARs.\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_aea0198771f4ee3d10710adb6e9a9feec}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, enable\+\_\+ari, CTLFLAG\+\_\+\+RDTUN, \&\mbox{\hyperlink{pci_8c_a9d135fd552a75c2a04590b9b347bdd85}{pci\+\_\+enable\+\_\+ari}}, 0, \char`\"{}Enable support for PCIe Alternative RID Interpretation\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_ac0b7eb24e9ed553c6fce4f1d7b7888ea}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, enable\+\_\+aspm, CTLFLAG\+\_\+\+RDTUN, \&\mbox{\hyperlink{pcivar_8h_a8469a3711f398ccb4bd1bef5491c7151}{pci\+\_\+enable\+\_\+aspm}}, 0, \char`\"{}Enable support for PCIe Active State Power Management\char`\"{})
\item 
\mbox{\hyperlink{pci_8c_a3ecccf663be8ba0739e1602f2fdde9d5}{SYSCTL\+\_\+\+INT}} (\+\_\+hw\+\_\+pci, OID\+\_\+\+AUTO, clear\+\_\+aer\+\_\+on\+\_\+attach, CTLFLAG\+\_\+\+RWTUN, \&\mbox{\hyperlink{pci_8c_a56f06a192ee328dd4f382964f1373635}{pci\+\_\+clear\+\_\+aer\+\_\+on\+\_\+attach}}, 0, \char`\"{}Clear port and device AER \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}} on driver attach\char`\"{})
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_ad51277642b8bd55cae069c52431022dc}{pci\+\_\+find\+\_\+bsf}} (uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}})
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_a3461348b63f80de8b62f3b01813b9268}{pci\+\_\+find\+\_\+dbsf}} (uint32\+\_\+t domain, uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, uint8\+\_\+t \mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}})
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_a8df2273beb0f21a6a8c7942f249fda39}{pci\+\_\+find\+\_\+device}} (uint16\+\_\+t vendor, uint16\+\_\+t device)
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_a367b8a636e5bc54704a229668d472c1a}{pci\+\_\+find\+\_\+class}} (uint8\+\_\+t \mbox{\hyperlink{pci_8c_a40f3e25fe8c516c8026cc6c3b6908e12}{class}}, uint8\+\_\+t \mbox{\hyperlink{pci_8c_a8690cd2e4b0ef8477711b72a120ae086}{subclass}})
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_a5708cf5d2c044fbc3e4c1d412aea5c1c}{pci\+\_\+find\+\_\+class\+\_\+from}} (uint8\+\_\+t \mbox{\hyperlink{pci_8c_a40f3e25fe8c516c8026cc6c3b6908e12}{class}}, uint8\+\_\+t \mbox{\hyperlink{pci_8c_a8690cd2e4b0ef8477711b72a120ae086}{subclass}}, device\+\_\+t from)
\item 
int \mbox{\hyperlink{pci_8c_a71223697e6c3abc9e4c2a8f70be9ea5e}{pci\+\_\+mapsize}} (uint64\+\_\+t testval)
\item 
struct pci\+\_\+devinfo $\ast$ \mbox{\hyperlink{pci_8c_ad4a26501c80d63d523f96d76f9a2f391}{pci\+\_\+read\+\_\+device}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, int d, int b, int s, int f)
\item 
struct pci\+\_\+devinfo $\ast$ \mbox{\hyperlink{pci_8c_a19e8cedceaa3787ebb302702c8c922f2}{pci\+\_\+alloc\+\_\+devinfo\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_a4f6ed7c3afbc919990f1314e55a4e384}{pci\+\_\+ea\+\_\+fill\+\_\+info}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, \mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$cfg)
\item 
static int \mbox{\hyperlink{pci_8c_a77fb8a1fd1b91525d891704ff9ec8527}{vpd\+\_\+nextbyte}} (struct \mbox{\hyperlink{structvpd__readstate}{vpd\+\_\+readstate}} $\ast$vrs, uint8\+\_\+t $\ast$\mbox{\hyperlink{pcib__if_8m_aa1cf91039f621340f15bcd4c95f582ef}{data}})
\item 
int \mbox{\hyperlink{pci_8c_ab18d14591e95119cc602e4e94c5fca7b}{pci\+\_\+get\+\_\+vpd\+\_\+ident\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, const char $\ast$$\ast$\mbox{\hyperlink{pci__if_8m_a4b99a010d38d0792ee5f7a07bdad6051}{identptr}})
\item 
int \mbox{\hyperlink{pci_8c_ae08217f145856db7185fb469e69ba334}{pci\+\_\+get\+\_\+vpd\+\_\+readonly\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, const char $\ast$\mbox{\hyperlink{pci__if_8m_a6285c8b304820df9b40d3fbea77c7ef0}{kw}}, const char $\ast$$\ast$\mbox{\hyperlink{pci__if_8m_abe9f0e435b9e239c352e928c714aff54}{vptr}})
\item 
struct \mbox{\hyperlink{structpcicfg__vpd}{pcicfg\+\_\+vpd}} $\ast$ \mbox{\hyperlink{pci_8c_ad2ae1b8da4b37a4ded91fbf7c84bdf09}{pci\+\_\+fetch\+\_\+vpd\+\_\+list}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_ae79acdf067819a75699c266b7cbdb5a6}{pci\+\_\+find\+\_\+htcap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
int \mbox{\hyperlink{pci_8c_a84f61dc95840447d2f88582194c76b49}{pci\+\_\+find\+\_\+next\+\_\+htcap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
int \mbox{\hyperlink{pci_8c_a3f163dc9aebba6d971bae78e5e0eb318}{pci\+\_\+find\+\_\+cap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
int \mbox{\hyperlink{pci_8c_ae65fc83a7662d150a9e1d9367f37bad5}{pci\+\_\+find\+\_\+next\+\_\+cap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
int \mbox{\hyperlink{pci_8c_aa17ae5b7ad9a2725791e212cae123ff8}{pci\+\_\+find\+\_\+extcap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
int \mbox{\hyperlink{pci_8c_a43a583ff0ed10386349c13d9d8a5ca7e}{pci\+\_\+find\+\_\+next\+\_\+extcap\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_afa05b14ff7f76f303c784c00c4c63fa7}{capability}}, int \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, int $\ast$\mbox{\hyperlink{pci__if_8m_ad95e9d6358967e6b8ff4bf262740bdca}{capreg}})
\item 
static void \mbox{\hyperlink{pci_8c_a61737abda79d72ee7ea62fdad55acd03}{pci\+\_\+write\+\_\+msix\+\_\+entry}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int \mbox{\hyperlink{pci__if_8m_a1f1413a959a617beceb7e84d8e6e7534}{index}}, uint64\+\_\+t \mbox{\hyperlink{pci__if_8m_ab6b52376c1b9d81e6ea6f95a1225f832}{address}}, uint32\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa1cf91039f621340f15bcd4c95f582ef}{data}})
\item 
void \mbox{\hyperlink{pci_8c_a13760d0aff50e28c15480c2836fe54a6}{pci\+\_\+enable\+\_\+msix\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, u\+\_\+int \mbox{\hyperlink{pci__if_8m_a1f1413a959a617beceb7e84d8e6e7534}{index}}, uint64\+\_\+t \mbox{\hyperlink{pci__if_8m_ab6b52376c1b9d81e6ea6f95a1225f832}{address}}, uint32\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa1cf91039f621340f15bcd4c95f582ef}{data}})
\item 
int \mbox{\hyperlink{pci_8c_a76f605b79a9d834c7f3df1135a693348}{pci\+\_\+pending\+\_\+msix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int \mbox{\hyperlink{pci__if_8m_a1f1413a959a617beceb7e84d8e6e7534}{index}})
\item 
int \mbox{\hyperlink{pci_8c_a5177c5bd1ad00080c9a6e37be6c76193}{pci\+\_\+alloc\+\_\+msix\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int $\ast$\mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}})
\item 
int \mbox{\hyperlink{pci_8c_a0570897f5cfd60d1403f45b5bee0d8c4}{pci\+\_\+remap\+\_\+msix\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}}, const u\+\_\+int $\ast$\mbox{\hyperlink{pci__if_8m_a5110aa4c54704b93d0e667d011778791}{vectors}})
\item 
static int \mbox{\hyperlink{pci_8c_adf99a0e4cdbb3ff94ff41f1bd390cb68}{pci\+\_\+release\+\_\+msix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a0ef5afc1341c6629ac0de5ca7189edb0}{pci\+\_\+msix\+\_\+count\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a9eb4015f4de813990d0baf7760508cd6}{pci\+\_\+msix\+\_\+pba\+\_\+bar\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a992d3ed8034614ed4782bef89e4cf6c5}{pci\+\_\+msix\+\_\+table\+\_\+bar\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
void \mbox{\hyperlink{pci_8c_ae8f753a084a2e25ebe87dc7f7fb7fb83}{pci\+\_\+ht\+\_\+map\+\_\+msi}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, uint64\+\_\+t \mbox{\hyperlink{pcib__if_8m_a7345ae8680eeb32913b762d1d5e502b4}{addr}})
\item 
int \mbox{\hyperlink{pci_8c_ab210394098b11dd8420c19fd55c48505}{pci\+\_\+get\+\_\+relaxed\+\_\+ordering\+\_\+enabled}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a950511527b670ac9f67f79c7c07f4876}{pci\+\_\+get\+\_\+max\+\_\+payload}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a4ed731d8343d25727ca47a8cf0a246e3}{pci\+\_\+get\+\_\+max\+\_\+read\+\_\+req}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a6baa22adf0347ccdfc8d05c6f8183fe3}{pci\+\_\+set\+\_\+max\+\_\+read\+\_\+req}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int size)
\item 
uint32\+\_\+t \mbox{\hyperlink{pci_8c_a34776dfad33d0c35f8f1a5a35c956a0c}{pcie\+\_\+read\+\_\+config}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, int \mbox{\hyperlink{pcib__if_8m_a2474a5474cbff19523a51eb1de01cda4}{width}})
\item 
void \mbox{\hyperlink{pci_8c_aa8eaefc2940fa46e7df595f52c6ae0e5}{pcie\+\_\+write\+\_\+config}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, uint32\+\_\+t \mbox{\hyperlink{pcib__if_8m_a07e9f7072c55a3001e14b73569cdcbed}{value}}, int \mbox{\hyperlink{pcib__if_8m_a2474a5474cbff19523a51eb1de01cda4}{width}})
\item 
uint32\+\_\+t \mbox{\hyperlink{pci_8c_ac22b2f66eb402eba32c8c71bc77dfca7}{pcie\+\_\+adjust\+\_\+config}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, uint32\+\_\+t mask, uint32\+\_\+t \mbox{\hyperlink{pcib__if_8m_a07e9f7072c55a3001e14b73569cdcbed}{value}}, int \mbox{\hyperlink{pcib__if_8m_a2474a5474cbff19523a51eb1de01cda4}{width}})
\item 
void \mbox{\hyperlink{pci_8c_a1f9a3408cf5f0dea7cd619529c58e1b2}{pci\+\_\+enable\+\_\+msi\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, uint64\+\_\+t \mbox{\hyperlink{pci__if_8m_ab6b52376c1b9d81e6ea6f95a1225f832}{address}}, uint16\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa1cf91039f621340f15bcd4c95f582ef}{data}})
\item 
void \mbox{\hyperlink{pci_8c_a897c4ab9ab4ff34ddc11a78755b4821b}{pci\+\_\+disable\+\_\+msi\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a4c8bbc181c543d51a9a66e6e446067ef}{pci\+\_\+msi\+\_\+device\+\_\+blacklisted}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_ad33f29ddee30042f05af0e0057d34658}{pci\+\_\+msix\+\_\+device\+\_\+blacklisted}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_ae0e75c2af2d126361d4e6ac05a19bf7f}{pci\+\_\+alloc\+\_\+msi\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int $\ast$\mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}})
\item 
int \mbox{\hyperlink{pci_8c_a432a4a9df42a96e48732596123e5debb}{pci\+\_\+release\+\_\+msi\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a821e9e1713b3e9299b147fbd5f046817}{pci\+\_\+msi\+\_\+count\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a9ef663424c02f9d0600409665040ed9e}{pci\+\_\+freecfg}} (struct pci\+\_\+devinfo $\ast$dinfo)
\item 
int \mbox{\hyperlink{pci_8c_afa6c0741fddd01ce8ebf63af99f7b81d}{pci\+\_\+set\+\_\+powerstate\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}})
\item 
int \mbox{\hyperlink{pci_8c_a9158a3b79db3d719fe869606dc63df69}{pci\+\_\+get\+\_\+powerstate\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
static \+\_\+\+\_\+inline void \mbox{\hyperlink{pci_8c_a69bddb76cafed9a934850d1cd66c6f69}{pci\+\_\+set\+\_\+command\+\_\+bit}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, uint16\+\_\+t bit)
\item 
static \+\_\+\+\_\+inline void \mbox{\hyperlink{pci_8c_a5c87fd35daa518ba519d98f3671d598a}{pci\+\_\+clear\+\_\+command\+\_\+bit}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, uint16\+\_\+t bit)
\item 
int \mbox{\hyperlink{pci_8c_a6175f5abcf4269d76cf553857ed0d045}{pci\+\_\+enable\+\_\+busmaster\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_aafa1e60916a9b03604d687ac9608d908}{pci\+\_\+disable\+\_\+busmaster\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a82739b4298d773b21f313d05aaa787ac}{pci\+\_\+enable\+\_\+io\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_ab05991ed532329184893692211b355fa}{space}})
\item 
int \mbox{\hyperlink{pci_8c_ae2066960e6f068b8f1d3ac86c6eaf1d5}{pci\+\_\+disable\+\_\+io\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_ab05991ed532329184893692211b355fa}{space}})
\item 
void \mbox{\hyperlink{pci_8c_a2a1a14ca4a86b5428eb13ad88749e48b}{pci\+\_\+print\+\_\+verbose}} (struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_ae7fe6e23423ba53de45f4c7501d1dfbf}{pci\+\_\+read\+\_\+bar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} $\ast$mapp, \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} $\ast$testvalp, int $\ast$bar64)
\item 
static void \mbox{\hyperlink{pci_8c_a7ec2a384c24fcc46eaff6b2fb7358243}{pci\+\_\+write\+\_\+bar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$pm, \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} base)
\item 
struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$ \mbox{\hyperlink{pci_8c_a1d77234d95bdd6310a8dad8bf993a6ed}{pci\+\_\+find\+\_\+bar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}})
\item 
int \mbox{\hyperlink{pci_8c_a7ffd5f1b10058cf96b9e394579e78ce8}{pci\+\_\+bar\+\_\+enabled}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$pm)
\item 
struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$ \mbox{\hyperlink{pci_8c_ac90affada7206e9ddb3632be714468f3}{pci\+\_\+add\+\_\+bar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} \mbox{\hyperlink{pcib__if_8m_a07e9f7072c55a3001e14b73569cdcbed}{value}}, \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} size)
\item 
static void \mbox{\hyperlink{pci_8c_ad1d459c0446b35ca0df0097a4e0723d9}{pci\+\_\+restore\+\_\+bars}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_afbd50cf91b84de3b789805e573926e31}{pci\+\_\+ata\+\_\+maps}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct resource\+\_\+list $\ast$rl, int force, uint32\+\_\+t prefetchmask)
\item 
static void \mbox{\hyperlink{pci_8c_ae2a9ce03d88ee5096bc9854f53dd2b89}{ohci\+\_\+early\+\_\+takeover}} (device\+\_\+t self)
\item 
static void \mbox{\hyperlink{pci_8c_a329f0d55a1a856807c3e520cf4c072f2}{uhci\+\_\+early\+\_\+takeover}} (device\+\_\+t self)
\item 
static void \mbox{\hyperlink{pci_8c_a65f2feb718df959a64062db07371c565}{ehci\+\_\+early\+\_\+takeover}} (device\+\_\+t self)
\item 
static void \mbox{\hyperlink{pci_8c_ab73cd8ef332e98cc8b92109c7f1f2fc1}{xhci\+\_\+early\+\_\+takeover}} (device\+\_\+t self)
\item 
static int \mbox{\hyperlink{pci_8c_a0e9a34c25a64e41e14ab4fc9423efbd2}{pci\+\_\+ea\+\_\+bei\+\_\+to\+\_\+rid}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int bei)
\item 
int \mbox{\hyperlink{pci_8c_a1c7ada4dd06bfd0220f78ea061c9fa91}{pci\+\_\+ea\+\_\+is\+\_\+enabled}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int \mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}})
\item 
void \mbox{\hyperlink{pci_8c_ac06cb6c2d36568d337f4d497800d4f99}{pci\+\_\+add\+\_\+resources\+\_\+ea}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int alloc\+\_\+iov)
\item 
void \mbox{\hyperlink{pci_8c_a5f34452a3d1a1e3ef926f30223710bd1}{pci\+\_\+add\+\_\+resources}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int force, uint32\+\_\+t prefetchmask)
\item 
static struct pci\+\_\+devinfo $\ast$ \mbox{\hyperlink{pci_8c_a7d6bc3b07f27f6251179e94c0a6156cb}{pci\+\_\+identify\+\_\+function}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int domain, int busno, int \mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, int \mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}})
\item 
void \mbox{\hyperlink{pci_8c_a93833abb8b415f4b3bcff5a26fc3c032}{pci\+\_\+add\+\_\+children}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int domain, int busno)
\item 
int \mbox{\hyperlink{pci_8c_ab79e10d9d43b64b516fef2236fe609f4}{pci\+\_\+rescan\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_a59d7c74e86c671f859573b041aa34d1d}{pcie\+\_\+setup\+\_\+mps}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_ac901b19a72b754f03c7f12239091b043}{pci\+\_\+add\+\_\+child\+\_\+clear\+\_\+aer}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_ab0f6905df169d50087b11cf46d913ead}{pci\+\_\+add\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_a592f37571af40ca5eabe953267c77160}{pci\+\_\+child\+\_\+added\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_ac09dfc63ae1dd249f7cb83e7489f92b3}{pci\+\_\+attach\+\_\+common}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a58aafe447095c33fcc2d0056ef4cd44b}{pci\+\_\+attach}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a0e82a2fbeb98b92ab1301f99f37b5057}{pci\+\_\+detach}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_ab66f5ca531e7d52ef2d4f8a04ecc9414}{pci\+\_\+set\+\_\+power\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}})
\item 
int \mbox{\hyperlink{pci_8c_af684287b04aab3071c19e4d73147d038}{pci\+\_\+suspend\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_aab51222ad69d2ca8c0c0c975ef8e54dd}{pci\+\_\+resume\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_a544e39c8a08302586005d6045d4631b5}{pci\+\_\+resume}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
void \mbox{\hyperlink{pci_8c_ae369cbac13f5e780fc3f1706cdf705ae}{pci\+\_\+driver\+\_\+added}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, driver\+\_\+t $\ast$driver)
\item 
int \mbox{\hyperlink{pci_8c_a79c496a3a264cd1280cb2384eb9839db}{pci\+\_\+setup\+\_\+intr}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, struct resource $\ast$\mbox{\hyperlink{pcib__if_8m_aea22ec27eb52d3e0d744184067cbca3a}{irq}}, int flags, driver\+\_\+filter\+\_\+t $\ast$filter, driver\+\_\+intr\+\_\+t $\ast$intr, void $\ast$arg, void $\ast$$\ast$cookiep)
\item 
int \mbox{\hyperlink{pci_8c_a123c118541822af88cda66520e4ca38b}{pci\+\_\+teardown\+\_\+intr}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, struct resource $\ast$\mbox{\hyperlink{pcib__if_8m_aea22ec27eb52d3e0d744184067cbca3a}{irq}}, void $\ast$cookie)
\item 
int \mbox{\hyperlink{pci_8c_a7ea4157a828315e13933c7177c518019}{pci\+\_\+print\+\_\+child}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
void \mbox{\hyperlink{pci_8c_a0e067cba786db882bf77038a8f85170c}{pci\+\_\+probe\+\_\+nomatch}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
void \mbox{\hyperlink{pci_8c_a87541927f77a1f0a95aebe5f25e1dc82}{pci\+\_\+child\+\_\+detached}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
int \mbox{\hyperlink{pci_8c_af96ce57dbfcf635ecb89b27ec45fb9e9}{pci\+\_\+read\+\_\+ivar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int which, uintptr\+\_\+t $\ast$result)
\item 
int \mbox{\hyperlink{pci_8c_a2f5b68d8adae9554758afb925c50bfd4}{pci\+\_\+write\+\_\+ivar}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int which, uintptr\+\_\+t \mbox{\hyperlink{pcib__if_8m_a07e9f7072c55a3001e14b73569cdcbed}{value}})
\item 
struct resource $\ast$ \mbox{\hyperlink{pci_8c_a0140b630f6650b64e16184f9602dcb03}{pci\+\_\+reserve\+\_\+map}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int $\ast$\mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, rman\+\_\+res\+\_\+t end, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}}, u\+\_\+int num, u\+\_\+int flags)
\item 
struct resource $\ast$ \mbox{\hyperlink{pci_8c_a7a0b92ec4492ee5081c58fb4c2b31845}{pci\+\_\+alloc\+\_\+multi\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int $\ast$\mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, rman\+\_\+res\+\_\+t end, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}}, u\+\_\+long num, u\+\_\+int flags)
\item 
struct resource $\ast$ \mbox{\hyperlink{pci_8c_a76d609e6875b983f2e40e7900590884d}{pci\+\_\+alloc\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int $\ast$\mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pci__if_8m_a37722a150250e2a5a98e5e0d11e53449}{start}}, rman\+\_\+res\+\_\+t end, rman\+\_\+res\+\_\+t \mbox{\hyperlink{pcib__if_8m_ad43c3812e6d13e0518d9f8b8f463ffcf}{count}}, u\+\_\+int flags)
\item 
int \mbox{\hyperlink{pci_8c_a3b6ec4efb16b9e0f8765ded3740db087}{pci\+\_\+release\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int \mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, struct resource $\ast$r)
\item 
int \mbox{\hyperlink{pci_8c_a1f864168a6a1a9fb7dce53b1900e991e}{pci\+\_\+activate\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int \mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, struct resource $\ast$r)
\item 
int \mbox{\hyperlink{pci_8c_a968ffc433003458235d28e4a0c01222b}{pci\+\_\+deactivate\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int \mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}}, struct resource $\ast$r)
\item 
void \mbox{\hyperlink{pci_8c_a07684d5a91aa36d19ded00449e6fdc64}{pci\+\_\+child\+\_\+deleted}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
void \mbox{\hyperlink{pci_8c_a688fc77d06ac62a66ddbd80b8a9a311e}{pci\+\_\+delete\+\_\+resource}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a6f54a86d9ce0af8d89b24e2d159f3ec2}{type}}, int \mbox{\hyperlink{pcib__if_8m_a7f34b6ea14a6f8e1236e18de2346d297}{rid}})
\item 
struct resource\+\_\+list $\ast$ \mbox{\hyperlink{pci_8c_a687cd541e0c295f47c911da268547681}{pci\+\_\+get\+\_\+resource\+\_\+list}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
bus\+\_\+dma\+\_\+tag\+\_\+t \mbox{\hyperlink{pci_8c_abe254e666700988dfaf124c5f7bb497a}{pci\+\_\+get\+\_\+dma\+\_\+tag}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
uint32\+\_\+t \mbox{\hyperlink{pci_8c_a5f4857ab2bc3ed595b59e6faee7cf4b1}{pci\+\_\+read\+\_\+config\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, int \mbox{\hyperlink{pcib__if_8m_a2474a5474cbff19523a51eb1de01cda4}{width}})
\item 
void \mbox{\hyperlink{pci_8c_acd8dcd6f3c8331fbc957df1e3a47c36b}{pci\+\_\+write\+\_\+config\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, int \mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}}, uint32\+\_\+t \mbox{\hyperlink{pci__if_8m_a97948248dce5f62b17be15b2c9a2f961}{val}}, int \mbox{\hyperlink{pcib__if_8m_a2474a5474cbff19523a51eb1de01cda4}{width}})
\item 
int \mbox{\hyperlink{pci_8c_adc1427482a9d3b629180398e967dc46f}{pci\+\_\+child\+\_\+location\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, struct sbuf $\ast$sb)
\item 
int \mbox{\hyperlink{pci_8c_ab2d5dfad0320993eee1d8e1d5693bc46}{pci\+\_\+child\+\_\+pnpinfo\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, struct sbuf $\ast$sb)
\item 
int \mbox{\hyperlink{pci_8c_a75581175bf05c6ab57b32cffdc7a0f33}{pci\+\_\+get\+\_\+device\+\_\+path\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, const char $\ast$locator, struct sbuf $\ast$sb)
\item 
int \mbox{\hyperlink{pci_8c_a69e2134386e1d354ef1eb5779505c4c0}{pci\+\_\+assign\+\_\+interrupt\+\_\+method}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}})
\item 
static void \mbox{\hyperlink{pci_8c_a4bd463c3bdc20240a6bb6e156824343a}{pci\+\_\+lookup}} (void $\ast$arg, const char $\ast$\mbox{\hyperlink{pci__if_8m_a8f8f80d37794cde9472343e4487ba3eb}{name}}, device\+\_\+t $\ast$\mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{pci_8c_a593ae37c545a3f180dc637648c10071f}{pci\+\_\+cfg\+\_\+restore\+\_\+pcie}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
static void \mbox{\hyperlink{pci_8c_a901bbdf17a6d25485516427fa49403b4}{pci\+\_\+cfg\+\_\+restore\+\_\+pcix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_ad24267e41ffe1d8a036bb5529fded80b}{pci\+\_\+cfg\+\_\+restore}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
static void \mbox{\hyperlink{pci_8c_a63b76d5ce925c715bb8a0650a2f30d18}{pci\+\_\+cfg\+\_\+save\+\_\+pcie}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
static void \mbox{\hyperlink{pci_8c_a0a08b4347a2c9fbf301657de2c52608b}{pci\+\_\+cfg\+\_\+save\+\_\+pcix}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_a3feb0441c2883a0c70a17088042ceef8}{pci\+\_\+cfg\+\_\+save}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, struct pci\+\_\+devinfo $\ast$dinfo, int setstate)
\item 
void \mbox{\hyperlink{pci_8c_af85c6f6f443768eb6a34cd9a66f0fc31}{pci\+\_\+save\+\_\+state}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
void \mbox{\hyperlink{pci_8c_acca30e253a440cc8f53d3e70ab4ae4e7}{pci\+\_\+restore\+\_\+state}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
device\+\_\+t \mbox{\hyperlink{pci_8c_a0294f29138edf68670346f4c2f13d8f9}{pci\+\_\+find\+\_\+pcie\+\_\+root\+\_\+port}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
bool \mbox{\hyperlink{pci_8c_a6c84647892fd248636a315b4ed86fdea}{pcie\+\_\+wait\+\_\+for\+\_\+pending\+\_\+transactions}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int max\+\_\+delay)
\item 
int \mbox{\hyperlink{pci_8c_aefc2b3b888de6165c1fe0ffc960964be}{pcie\+\_\+get\+\_\+max\+\_\+completion\+\_\+timeout}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
void \mbox{\hyperlink{pci_8c_a288e7b65923a7913b0498354d020bdca}{pcie\+\_\+apei\+\_\+error}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, int sev, uint8\+\_\+t $\ast$aerp)
\item 
bool \mbox{\hyperlink{pci_8c_abec5193c7fa7212054cc69db1e1c26d3}{pcie\+\_\+flr}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, u\+\_\+int max\+\_\+delay, bool force)
\item 
int \mbox{\hyperlink{pci_8c_a907c9950f25741a7b55ea4b0a97c49bd}{pci\+\_\+power\+\_\+reset}} (device\+\_\+t \mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
int \mbox{\hyperlink{pci_8c_a18f9143d676271134703aef8090cec83}{pcie\+\_\+link\+\_\+reset}} (device\+\_\+t port, int pcie\+\_\+location)
\item 
const struct \mbox{\hyperlink{structpci__device__table}{pci\+\_\+device\+\_\+table}} $\ast$ \mbox{\hyperlink{pci_8c_ae3a91095e44db1ebec2cb32d23478bf8}{pci\+\_\+match\+\_\+device}} (device\+\_\+t \mbox{\hyperlink{pci__if_8m_a43da232f0ba41526cd69f99c555de72c}{child}}, const struct \mbox{\hyperlink{structpci__device__table}{pci\+\_\+device\+\_\+table}} $\ast$\mbox{\hyperlink{pcib__if_8m_a9dd7006884637a4322e8cf74852620c6}{id}}, size\+\_\+t nelt)
\item 
static void \mbox{\hyperlink{pci_8c_af772425b4b289d76e968cd6dc2735a52}{pci\+\_\+print\+\_\+faulted\+\_\+dev\+\_\+name}} (const struct pci\+\_\+devinfo $\ast$dinfo)
\item 
void \mbox{\hyperlink{pci_8c_a64e9bf901da71a67d9dc09711194cb97}{pci\+\_\+print\+\_\+faulted\+\_\+dev}} (void)
\end{DoxyCompactItemize}
\doxysubsection*{Variables}
\begin{DoxyCompactItemize}
\item 
static device\+\_\+method\+\_\+t \mbox{\hyperlink{pci_8c_a2fc2bb59df114cd2363b2d52a9182996}{pci\+\_\+methods}} \mbox{[}$\,$\mbox{]}
\item 
static devclass\+\_\+t \mbox{\hyperlink{pci_8c_a0d8b3600e8129d7d0011246546ebe06a}{pci\+\_\+devclass}}
\item 
static char $\ast$ \mbox{\hyperlink{pci_8c_ad198ef6309d7006ab99e482d0a0fb0bb}{pci\+\_\+vendordata}}
\item 
static size\+\_\+t \mbox{\hyperlink{pci_8c_a3a26c08f7b59fd13c522c5161067d0a1}{pci\+\_\+vendordata\+\_\+size}}
\item 
static const struct \mbox{\hyperlink{structpci__quirk}{pci\+\_\+quirk}} \mbox{\hyperlink{pci_8c_a6a3708f44d2f901f68c5f8c4fd7e0a56}{pci\+\_\+quirks}} \mbox{[}$\,$\mbox{]}
\item 
struct devlist \mbox{\hyperlink{pci_8c_a6cce0a11a0f8f21eb58e3b0551f66748}{pci\+\_\+devq}}
\item 
uint32\+\_\+t \mbox{\hyperlink{pci_8c_acb97b1af0950e7125b9ce13c22137a09}{pci\+\_\+generation}}
\item 
uint32\+\_\+t \mbox{\hyperlink{pci_8c_a0e224305f1ef1808f089be0c27a2f0a2}{pci\+\_\+numdevs}} = 0
\item 
static int \mbox{\hyperlink{pci_8c_acdf16d4eb41b9e26fe8d5149fef8b061}{pcie\+\_\+chipset}}
\item 
static int \mbox{\hyperlink{pci_8c_adc0b167997810f6d4eb4ef0073d7daec}{pcix\+\_\+chipset}}
\item 
static int \mbox{\hyperlink{pci_8c_ac26444344726a1e9acde4ad9015ab094}{pci\+\_\+enable\+\_\+io\+\_\+modes}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_af707ec0d2f1e3a544c13febe656a67a3}{pci\+\_\+do\+\_\+realloc\+\_\+bars}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_accb134df1f88ac586aeff236d0264601}{pci\+\_\+do\+\_\+power\+\_\+nodriver}} = 0
\item 
int \mbox{\hyperlink{pci_8c_a2cacf9ca1d91ab0a4c5af03d811b7e81}{pci\+\_\+do\+\_\+power\+\_\+resume}} = 1
\item 
int \mbox{\hyperlink{pci_8c_a26facb574b1a5760131c429ccef62672}{pci\+\_\+do\+\_\+power\+\_\+suspend}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_a60237f093995ca7d580674bf14913c69}{pci\+\_\+do\+\_\+msi}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_a613e346deae8926498ef9d6275468cc5}{pci\+\_\+do\+\_\+msix}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_aeb0db1584aab21dce108fecf9bb2bd5c}{pci\+\_\+msix\+\_\+rewrite\+\_\+table}} = 0
\item 
static int \mbox{\hyperlink{pci_8c_ac3e59b14ef825dc4c45434de3720b9cf}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_a1617f0f571bd9cfc3c8b3a9e9a54a225}{pci\+\_\+usb\+\_\+takeover}} = 0
\item 
static int \mbox{\hyperlink{pci_8c_afda6175fd03d67b2834d458f6778ee27}{pci\+\_\+clear\+\_\+bars}}
\item 
static int \mbox{\hyperlink{pci_8c_a9d135fd552a75c2a04590b9b347bdd85}{pci\+\_\+enable\+\_\+ari}} = 1
\item 
int \mbox{\hyperlink{pci_8c_a8469a3711f398ccb4bd1bef5491c7151}{pci\+\_\+enable\+\_\+aspm}} = 1
\item 
static int \mbox{\hyperlink{pci_8c_a56f06a192ee328dd4f382964f1373635}{pci\+\_\+clear\+\_\+aer\+\_\+on\+\_\+attach}} = 0
\item 
\begin{tabbing}
xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill
struct \{\\
\>int \mbox{\hyperlink{pci_8c_a40f3e25fe8c516c8026cc6c3b6908e12}{class}}\\
\>int \mbox{\hyperlink{pci_8c_a8690cd2e4b0ef8477711b72a120ae086}{subclass}}\\
\>int \mbox{\hyperlink{pci_8c_af8ae873dc0a6bcadf6bf4500b857288a}{report}}\\
\>const char $\ast$ \mbox{\hyperlink{pci_8c_a710bce51374aba96ab04912897666c35}{desc}}\\
\} \mbox{\hyperlink{pci_8c_ada8365000d4768345c7dbc1045dc1abc}{pci\_nomatch\_tab}} \mbox{[}$\,$\mbox{]}\\

\end{tabbing}\end{DoxyCompactItemize}


\doxysubsection{Macro Definition Documentation}
\mbox{\Hypertarget{pci_8c_a1674815ca2d033d68ef43d23a40e124d}\label{pci_8c_a1674815ca2d033d68ef43d23a40e124d}} 
\index{pci.c@{pci.c}!PCI\_MAPMEM@{PCI\_MAPMEM}}
\index{PCI\_MAPMEM@{PCI\_MAPMEM}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_MAPMEM}{PCI\_MAPMEM}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+MAPMEM~0x01 /$\ast$ memory map $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00330}{330}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a121577e590355f4248bf1fdf98d39010}\label{pci_8c_a121577e590355f4248bf1fdf98d39010}} 
\index{pci.c@{pci.c}!PCI\_MAPMEMP@{PCI\_MAPMEMP}}
\index{PCI\_MAPMEMP@{PCI\_MAPMEMP}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_MAPMEMP}{PCI\_MAPMEMP}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+MAPMEMP~0x02 /$\ast$ prefetchable memory map $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00331}{331}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a5a6f20ed6afca3ad59e90615898b2493}\label{pci_8c_a5a6f20ed6afca3ad59e90615898b2493}} 
\index{pci.c@{pci.c}!PCI\_MAPPORT@{PCI\_MAPPORT}}
\index{PCI\_MAPPORT@{PCI\_MAPPORT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_MAPPORT}{PCI\_MAPPORT}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+MAPPORT~0x04 /$\ast$ port map $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00332}{332}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a4dc5105715a79cd99f1098bd2b876700}\label{pci_8c_a4dc5105715a79cd99f1098bd2b876700}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_DISABLE\_MSI@{PCI\_QUIRK\_DISABLE\_MSI}}
\index{PCI\_QUIRK\_DISABLE\_MSI@{PCI\_QUIRK\_DISABLE\_MSI}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_DISABLE\_MSI}{PCI\_QUIRK\_DISABLE\_MSI}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSI~2 /$\ast$ Neither MSI nor MSI-\/X work $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00241}{241}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a981d2f6522c2e4ac7e2a843b9bac3abf}\label{pci_8c_a981d2f6522c2e4ac7e2a843b9bac3abf}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_DISABLE\_MSIX@{PCI\_QUIRK\_DISABLE\_MSIX}}
\index{PCI\_QUIRK\_DISABLE\_MSIX@{PCI\_QUIRK\_DISABLE\_MSIX}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_DISABLE\_MSIX}{PCI\_QUIRK\_DISABLE\_MSIX}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSIX~5 /$\ast$ MSI-\/X doesn\textquotesingle{}t work $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00244}{244}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_ad92f00d3144be12793f761a36c69d2eb}\label{pci_8c_ad92f00d3144be12793f761a36c69d2eb}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_ENABLE\_MSI\_VM@{PCI\_QUIRK\_ENABLE\_MSI\_VM}}
\index{PCI\_QUIRK\_ENABLE\_MSI\_VM@{PCI\_QUIRK\_ENABLE\_MSI\_VM}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_ENABLE\_MSI\_VM}{PCI\_QUIRK\_ENABLE\_MSI\_VM}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+ENABLE\+\_\+\+MSI\+\_\+\+VM~3 /$\ast$ Older chipset in VM where MSI works $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00242}{242}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_ad71c71d232a16cdbec969c7350dbcbf2}\label{pci_8c_ad71c71d232a16cdbec969c7350dbcbf2}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_MAP\_REG@{PCI\_QUIRK\_MAP\_REG}}
\index{PCI\_QUIRK\_MAP\_REG@{PCI\_QUIRK\_MAP\_REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_MAP\_REG}{PCI\_QUIRK\_MAP\_REG}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+MAP\+\_\+\+REG~1 /$\ast$ PCI map register in weird place $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00240}{240}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a3c6160216b4f7802ffe3dbb9a7216025}\label{pci_8c_a3c6160216b4f7802ffe3dbb9a7216025}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_MSI\_INTX\_BUG@{PCI\_QUIRK\_MSI\_INTX\_BUG}}
\index{PCI\_QUIRK\_MSI\_INTX\_BUG@{PCI\_QUIRK\_MSI\_INTX\_BUG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_MSI\_INTX\_BUG}{PCI\_QUIRK\_MSI\_INTX\_BUG}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+MSI\+\_\+\+INTX\+\_\+\+BUG~6 /$\ast$ \mbox{\hyperlink{pcireg_8h_a99e8dd5836219982660a0081c06abbd3}{PCIM\+\_\+\+CMD\+\_\+\+INTx\+DIS}} disables MSI $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00245}{245}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_ad9e5211041653c08ae1046fc0147c970}\label{pci_8c_ad9e5211041653c08ae1046fc0147c970}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_REALLOC\_BAR@{PCI\_QUIRK\_REALLOC\_BAR}}
\index{PCI\_QUIRK\_REALLOC\_BAR@{PCI\_QUIRK\_REALLOC\_BAR}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_REALLOC\_BAR}{PCI\_QUIRK\_REALLOC\_BAR}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+REALLOC\+\_\+\+BAR~7 /$\ast$ Can\textquotesingle{}t allocate memory at the default \mbox{\hyperlink{pci__if_8m_ab6b52376c1b9d81e6ea6f95a1225f832}{address}} $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00246}{246}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a9d0548c6a7da361cb1001c3c0f6c15db}\label{pci_8c_a9d0548c6a7da361cb1001c3c0f6c15db}} 
\index{pci.c@{pci.c}!PCI\_QUIRK\_UNMAP\_REG@{PCI\_QUIRK\_UNMAP\_REG}}
\index{PCI\_QUIRK\_UNMAP\_REG@{PCI\_QUIRK\_UNMAP\_REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_QUIRK\_UNMAP\_REG}{PCI\_QUIRK\_UNMAP\_REG}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+QUIRK\+\_\+\+UNMAP\+\_\+\+REG~4 /$\ast$ Ignore PCI map register $\ast$/}



Definition at line \mbox{\hyperlink{pci_8c_source_l00243}{243}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_acd448edde2c1df9b086df7747fe8c264}\label{pci_8c_acd448edde2c1df9b086df7747fe8c264}} 
\index{pci.c@{pci.c}!PCI\_VPD\_TIMEOUT@{PCI\_VPD\_TIMEOUT}}
\index{PCI\_VPD\_TIMEOUT@{PCI\_VPD\_TIMEOUT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCI\_VPD\_TIMEOUT}{PCI\_VPD\_TIMEOUT}}
{\footnotesize\ttfamily \#define PCI\+\_\+\+VPD\+\_\+\+TIMEOUT~1000000}



Definition at line \mbox{\hyperlink{pci_8c_source_l01011}{1011}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a2cb325135ae3ba5e4c8782fd9f8a62d2}\label{pci_8c_a2cb325135ae3ba5e4c8782fd9f8a62d2}} 
\index{pci.c@{pci.c}!PCIR\_IS\_BIOS@{PCIR\_IS\_BIOS}}
\index{PCIR\_IS\_BIOS@{PCIR\_IS\_BIOS}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{PCIR\_IS\_BIOS}{PCIR\_IS\_BIOS}}
{\footnotesize\ttfamily \#define PCIR\+\_\+\+IS\+\_\+\+BIOS(\begin{DoxyParamCaption}\item[{}]{cfg,  }\item[{}]{\mbox{\hyperlink{pcib__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}} }\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{        (((cfg)-\/>hdrtype == \mbox{\hyperlink{pcireg_8h_a772ae754359cf04f276ebe6afc24f2e0}{PCIM\_HDRTYPE\_NORMAL}} \&\& \mbox{\hyperlink{pci__dw__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}} == \mbox{\hyperlink{pcireg_8h_a8572796a3d394e9933dd15cd8e2043e5}{PCIR\_BIOS}}) ||  \(\backslash\)}
\DoxyCodeLine{         ((cfg)-\/>hdrtype == \mbox{\hyperlink{pcireg_8h_ab33505602545e345e8b50bc99b88df54}{PCIM\_HDRTYPE\_BRIDGE}} \&\& \mbox{\hyperlink{pci__dw__if_8m_a14e367e6f0aa227c5483dba1a7ad6cf8}{reg}} == \mbox{\hyperlink{pcireg_8h_af9f0f163361ab35fc70da83e2ded438b}{PCIR\_BIOS\_1}}))}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{pci_8c_source_l00089}{89}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [1/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, b, s, f, n, w)}

\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [2/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, b, s, f, n, w)}

\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [3/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{    PCIB\_READ\_CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, cfg-\/>bus, cfg-\/>slot, cfg-\/>func, \(\backslash\)}
\DoxyCodeLine{    cfg-\/>ea.ea\_location + (n), w)}

\end{DoxyCode}
\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [4/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}}, n, w)}

\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [5/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, busno, s, f, n, w)}

\mbox{\Hypertarget{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}\label{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}} 
\index{pci.c@{pci.c}!REG@{REG}}
\index{REG@{REG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{REG}{REG}\hspace{0.1cm}{\footnotesize\ttfamily [6/6]}}
{\footnotesize\ttfamily \#define REG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+READ\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, busno, s, f, n, w)}

\mbox{\Hypertarget{pci_8c_a7e60ce204a13df01860248ad62014b81}\label{pci_8c_a7e60ce204a13df01860248ad62014b81}} 
\index{pci.c@{pci.c}!RREG@{RREG}}
\index{RREG@{RREG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{RREG}{RREG}}
{\footnotesize\ttfamily \#define RREG(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})~pci\+\_\+read\+\_\+config(\mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, pos + (n), 2)}

\mbox{\Hypertarget{pci_8c_a2e2d07e7bf394ce023ef5ee9f4dc0c2a}\label{pci_8c_a2e2d07e7bf394ce023ef5ee9f4dc0c2a}} 
\index{pci.c@{pci.c}!WREG@{WREG}}
\index{WREG@{WREG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{WREG}{WREG}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}}
{\footnotesize\ttfamily \#define WREG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{v }\end{DoxyParamCaption})~pci\+\_\+write\+\_\+config(\mbox{\hyperlink{pcib__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}}, pos + (n), (v), 2)}

\mbox{\Hypertarget{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}\label{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}} 
\index{pci.c@{pci.c}!WREG@{WREG}}
\index{WREG@{WREG}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{WREG}{WREG}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}}
{\footnotesize\ttfamily \#define WREG(\begin{DoxyParamCaption}\item[{}]{n,  }\item[{}]{v,  }\item[{}]{w }\end{DoxyParamCaption})~PCIB\+\_\+\+WRITE\+\_\+\+CONFIG(\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_ab7c7098705a2dcd256ace97402193b96}{slot}}, cfg-\/$>$\mbox{\hyperlink{pcib__if_8m_a198cfd4b587e1e76af64038d10d5ffc7}{func}}, n, v, w)}



\doxysubsection{Function Documentation}
\mbox{\Hypertarget{pci_8c_a8c3ef283470a68cd30afe9b8a72cb60f}\label{pci_8c_a8c3ef283470a68cd30afe9b8a72cb60f}} 
\index{pci.c@{pci.c}!\_\_FBSDID@{\_\_FBSDID}}
\index{\_\_FBSDID@{\_\_FBSDID}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{\_\_FBSDID()}{\_\_FBSDID()}}
{\footnotesize\ttfamily \+\_\+\+\_\+\+FBSDID (\begin{DoxyParamCaption}\item[{\char`\"{}\$Free\+BSD\$\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a08a1d36f828344ec30c627d2e821de38}\label{pci_8c_a08a1d36f828344ec30c627d2e821de38}} 
\index{pci.c@{pci.c}!DEFINE\_CLASS\_0@{DEFINE\_CLASS\_0}}
\index{DEFINE\_CLASS\_0@{DEFINE\_CLASS\_0}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{DEFINE\_CLASS\_0()}{DEFINE\_CLASS\_0()}}
{\footnotesize\ttfamily DEFINE\+\_\+\+CLASS\+\_\+0 (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}}]{,  }\item[{pci\+\_\+driver}]{,  }\item[{\mbox{\hyperlink{pci_8c_a2fc2bb59df114cd2363b2d52a9182996}{pci\+\_\+methods}}}]{,  }\item[{sizeof(struct \mbox{\hyperlink{structpci__softc}{pci\+\_\+softc}})}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_ab5d3df4fe95bec16c96314db1c3a55e0}\label{pci_8c_ab5d3df4fe95bec16c96314db1c3a55e0}} 
\index{pci.c@{pci.c}!EARLY\_DRIVER\_MODULE@{EARLY\_DRIVER\_MODULE}}
\index{EARLY\_DRIVER\_MODULE@{EARLY\_DRIVER\_MODULE}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{EARLY\_DRIVER\_MODULE()}{EARLY\_DRIVER\_MODULE()}}
{\footnotesize\ttfamily EARLY\+\_\+\+DRIVER\+\_\+\+MODULE (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}}]{,  }\item[{\mbox{\hyperlink{pcib__if_8m_aa882c13551c449f22f0ec66dcea56a60}{pcib}}}]{,  }\item[{pci\+\_\+driver}]{,  }\item[{\mbox{\hyperlink{pci_8c_a0d8b3600e8129d7d0011246546ebe06a}{pci\+\_\+devclass}}}]{,  }\item[{\mbox{\hyperlink{pci_8c_abfeb3e04b96d2c915a90cb25296d7802}{pci\+\_\+modevent}}}]{,  }\item[{NULL}]{,  }\item[{BUS\+\_\+\+PASS\+\_\+\+BUS}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a65f2feb718df959a64062db07371c565}\label{pci_8c_a65f2feb718df959a64062db07371c565}} 
\index{pci.c@{pci.c}!ehci\_early\_takeover@{ehci\_early\_takeover}}
\index{ehci\_early\_takeover@{ehci\_early\_takeover}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{ehci\_early\_takeover()}{ehci\_early\_takeover()}}
{\footnotesize\ttfamily static void ehci\+\_\+early\+\_\+takeover (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{self }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03593}{3593}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a65f2feb718df959a64062db07371c565_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a2cad6fe383167d4c247fca44aac71490}\label{pci_8c_a2cad6fe383167d4c247fca44aac71490}} 
\index{pci.c@{pci.c}!MODULE\_VERSION@{MODULE\_VERSION}}
\index{MODULE\_VERSION@{MODULE\_VERSION}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{MODULE\_VERSION()}{MODULE\_VERSION()}}
{\footnotesize\ttfamily MODULE\+\_\+\+VERSION (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}}]{,  }\item[{1}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_ae2a9ce03d88ee5096bc9854f53dd2b89}\label{pci_8c_ae2a9ce03d88ee5096bc9854f53dd2b89}} 
\index{pci.c@{pci.c}!ohci\_early\_takeover@{ohci\_early\_takeover}}
\index{ohci\_early\_takeover@{ohci\_early\_takeover}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{ohci\_early\_takeover()}{ohci\_early\_takeover()}}
{\footnotesize\ttfamily static void ohci\+\_\+early\+\_\+takeover (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{self }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03532}{3532}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae2a9ce03d88ee5096bc9854f53dd2b89_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1f864168a6a1a9fb7dce53b1900e991e}\label{pci_8c_a1f864168a6a1a9fb7dce53b1900e991e}} 
\index{pci.c@{pci.c}!pci\_activate\_resource@{pci\_activate\_resource}}
\index{pci\_activate\_resource@{pci\_activate\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_activate\_resource()}{pci\_activate\_resource()}}
{\footnotesize\ttfamily int pci\+\_\+activate\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int}]{rid,  }\item[{struct resource $\ast$}]{r }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05694}{5694}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l03162}{pci\+\_\+find\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l03141}{pci\+\_\+write\+\_\+bar()}}, \mbox{\hyperlink{pcireg_8h_source_l00248}{PCIM\+\_\+\+BIOS\+\_\+\+ENABLE}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1f864168a6a1a9fb7dce53b1900e991e_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ac90affada7206e9ddb3632be714468f3}\label{pci_8c_ac90affada7206e9ddb3632be714468f3}} 
\index{pci.c@{pci.c}!pci\_add\_bar@{pci\_add\_bar}}
\index{pci\_add\_bar@{pci\_add\_bar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_bar()}{pci\_add\_bar()}}
{\footnotesize\ttfamily struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$ pci\+\_\+add\+\_\+bar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{\mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}}}]{value,  }\item[{\mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}}}]{size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03203}{3203}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00064}{pci\+\_\+map\+::pm\+\_\+reg}}, \mbox{\hyperlink{pcivar_8h_source_l00063}{pci\+\_\+map\+::pm\+\_\+size}}, \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00055}{value}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci__iov_8c_source_l00371}{pci\+\_\+iov\+\_\+add\+\_\+bars()}}, and \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

Here is the caller graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ac90affada7206e9ddb3632be714468f3_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ab0f6905df169d50087b11cf46d913ead}\label{pci_8c_ab0f6905df169d50087b11cf46d913ead}} 
\index{pci.c@{pci.c}!pci\_add\_child@{pci\_add\_child}}
\index{pci\_add\_child@{pci\_add\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_child()}{pci\_add\_child()}}
{\footnotesize\ttfamily void pci\+\_\+add\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04431}{4431}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l04356}{pci\+\_\+add\+\_\+child\+\_\+clear\+\_\+aer()}}, \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}, \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}, \mbox{\hyperlink{pci_8c_source_l00420}{pci\+\_\+clear\+\_\+aer\+\_\+on\+\_\+attach}}, \mbox{\hyperlink{pci_8c_source_l02995}{pci\+\_\+print\+\_\+verbose()}}, and \mbox{\hyperlink{pci_8c_source_l04320}{pcie\+\_\+setup\+\_\+mps()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04131}{pci\+\_\+identify\+\_\+function()}}.

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\mbox{\Hypertarget{pci_8c_ac901b19a72b754f03c7f12239091b043}\label{pci_8c_ac901b19a72b754f03c7f12239091b043}} 
\index{pci.c@{pci.c}!pci\_add\_child\_clear\_aer@{pci\_add\_child\_clear\_aer}}
\index{pci\_add\_child\_clear\_aer@{pci\_add\_child\_clear\_aer}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_child\_clear\_aer()}{pci\_add\_child\_clear\_aer()}}
{\footnotesize\ttfamily static void pci\+\_\+add\+\_\+child\+\_\+clear\+\_\+aer (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04356}{4356}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}, \mbox{\hyperlink{pcireg_8h_source_l00812}{PCIEM\+\_\+\+CTL\+\_\+\+COR\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00814}{PCIEM\+\_\+\+CTL\+\_\+\+FER\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00813}{PCIEM\+\_\+\+CTL\+\_\+\+NFER\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00815}{PCIEM\+\_\+\+CTL\+\_\+\+URR\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00911}{PCIEM\+\_\+\+ROOT\+\_\+\+CTL\+\_\+\+SERR\+\_\+\+CORR}}, \mbox{\hyperlink{pcireg_8h_source_l00913}{PCIEM\+\_\+\+ROOT\+\_\+\+CTL\+\_\+\+SERR\+\_\+\+FATAL}}, \mbox{\hyperlink{pcireg_8h_source_l00912}{PCIEM\+\_\+\+ROOT\+\_\+\+CTL\+\_\+\+SERR\+\_\+\+NONFATAL}}, \mbox{\hyperlink{pcireg_8h_source_l00792}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+PORT}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00910}{PCIER\+\_\+\+ROOT\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l01014}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+ADVISORY\+\_\+\+NF\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l01011}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+BAD\+\_\+\+DLLP}}, \mbox{\hyperlink{pcireg_8h_source_l01010}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+BAD\+\_\+\+TLP}}, \mbox{\hyperlink{pcireg_8h_source_l01016}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+HEADER\+\_\+\+LOG\+\_\+\+OVFLOW}}, \mbox{\hyperlink{pcireg_8h_source_l01015}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+INTERNAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l01009}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+RECEIVER\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l01012}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+REPLAY\+\_\+\+ROLLOVER}}, \mbox{\hyperlink{pcireg_8h_source_l01013}{PCIM\+\_\+\+AER\+\_\+\+COR\+\_\+\+REPLAY\+\_\+\+TIMEOUT}}, \mbox{\hyperlink{pcireg_8h_source_l01001}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+ACS\+\_\+\+VIOLATION}}, \mbox{\hyperlink{pcireg_8h_source_l01004}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+ATOMIC\+\_\+\+EGRESS\+\_\+\+BLK}}, \mbox{\hyperlink{pcireg_8h_source_l00995}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+COMPLETER\+\_\+\+ABORT}}, \mbox{\hyperlink{pcireg_8h_source_l00994}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+COMPLETION\+\_\+\+TIMEOUT}}, \mbox{\hyperlink{pcireg_8h_source_l00990}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+DL\+\_\+\+PROTOCOL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00999}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+ECRC\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00993}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+FC\+\_\+\+PROTOCOL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l01002}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+INTERNAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00998}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+MALFORMED\+\_\+\+TLP}}, \mbox{\hyperlink{pcireg_8h_source_l01003}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+MC\+\_\+\+BLOCKED\+\_\+\+TLP}}, \mbox{\hyperlink{pcireg_8h_source_l00992}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+POISONED\+\_\+\+TLP}}, \mbox{\hyperlink{pcireg_8h_source_l00997}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+RECEIVER\+\_\+\+OVERFLOW}}, \mbox{\hyperlink{pcireg_8h_source_l00991}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+SURPRISE\+\_\+\+LINK\+\_\+\+DOWN}}, \mbox{\hyperlink{pcireg_8h_source_l01005}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+TLP\+\_\+\+PREFIX\+\_\+\+BLOCKED}}, \mbox{\hyperlink{pcireg_8h_source_l00989}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+TRAINING\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00996}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+UNEXPECTED\+\_\+\+COMPLETION}}, \mbox{\hyperlink{pcireg_8h_source_l01000}{PCIM\+\_\+\+AER\+\_\+\+UC\+\_\+\+UNSUPPORTED\+\_\+\+REQUEST}}, \mbox{\hyperlink{pcireg_8h_source_l01017}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l01008}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l01006}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00988}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+STATUS}}, and \mbox{\hyperlink{pcireg_8h_source_l00168}{PCIZ\+\_\+\+AER}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ac901b19a72b754f03c7f12239091b043_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a93833abb8b415f4b3bcff5a26fc3c032}\label{pci_8c_a93833abb8b415f4b3bcff5a26fc3c032}} 
\index{pci.c@{pci.c}!pci\_add\_children@{pci\_add\_children}}
\index{pci\_add\_children@{pci\_add\_children}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_children()}{pci\_add\_children()}}
{\footnotesize\ttfamily void pci\+\_\+add\+\_\+children (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{domain,  }\item[{int}]{busno }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04144}{4144}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00058}{maxslots}}, \mbox{\hyperlink{pci_8c_source_l00412}{pci\+\_\+enable\+\_\+ari}}, \mbox{\hyperlink{pci_8c_source_l04131}{pci\+\_\+identify\+\_\+function()}}, \mbox{\hyperlink{pcireg_8h_source_l00050}{PCI\+\_\+\+MAXHDRTYPE}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00121}{PCIM\+\_\+\+MFDEV}}, \mbox{\hyperlink{pcireg_8h_source_l00116}{PCIR\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00083}{PCIR\+\_\+\+VENDOR}}, \mbox{\hyperlink{pcireg_8h_source_l00125}{PCIV\+\_\+\+INVALID}}, and \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04496}{pci\+\_\+attach()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad8cc613f9bc3cf6bd81c90510240b67a}\label{pci_8c_ad8cc613f9bc3cf6bd81c90510240b67a}} 
\index{pci.c@{pci.c}!pci\_add\_map@{pci\_add\_map}}
\index{pci\_add\_map@{pci\_add\_map}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_map()}{pci\_add\_map()}}
{\footnotesize\ttfamily static int pci\+\_\+add\+\_\+map (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{struct resource\+\_\+list $\ast$}]{rl,  }\item[{int}]{force,  }\item[{int}]{prefetch }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03252}{3252}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l03203}{pci\+\_\+add\+\_\+bar()}}, \mbox{\hyperlink{pcireg_8h_source_l00219}{PCI\+\_\+\+BAR\+\_\+\+IO}}, \mbox{\hyperlink{pcireg_8h_source_l00220}{PCI\+\_\+\+BAR\+\_\+\+MEM}}, \mbox{\hyperlink{pci_8c_source_l00402}{pci\+\_\+clear\+\_\+bars}}, \mbox{\hyperlink{pci_8c_source_l00350}{pci\+\_\+do\+\_\+realloc\+\_\+bars}}, \mbox{\hyperlink{pci_8c_source_l00343}{pci\+\_\+enable\+\_\+io\+\_\+modes}}, \mbox{\hyperlink{pci_8c_source_l03162}{pci\+\_\+find\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00536}{pci\+\_\+mapbase()}}, \mbox{\hyperlink{pci_8c_source_l00608}{pci\+\_\+maprange()}}, \mbox{\hyperlink{pci_8c_source_l00561}{pci\+\_\+mapsize()}}, \mbox{\hyperlink{pci_8c_source_l00548}{pci\+\_\+maptype()}}, \mbox{\hyperlink{pci_8c_source_l03058}{pci\+\_\+memen()}}, \mbox{\hyperlink{pci_8c_source_l03052}{pci\+\_\+porten()}}, \mbox{\hyperlink{pci_8c_source_l00246}{PCI\+\_\+\+QUIRK\+\_\+\+REALLOC\+\_\+\+BAR}}, \mbox{\hyperlink{pci_8c_source_l03064}{pci\+\_\+read\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l03141}{pci\+\_\+write\+\_\+bar()}}, \mbox{\hyperlink{pcireg_8h_source_l00230}{PCIM\+\_\+\+BAR\+\_\+\+IO\+\_\+\+RESERVED}}, \mbox{\hyperlink{pcireg_8h_source_l00228}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+\+PREFETCH}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, and \mbox{\hyperlink{pci_8c_source_l03429}{pci\+\_\+ata\+\_\+maps()}}.

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\end{figure}
\mbox{\Hypertarget{pci_8c_a5f34452a3d1a1e3ef926f30223710bd1}\label{pci_8c_a5f34452a3d1a1e3ef926f30223710bd1}} 
\index{pci.c@{pci.c}!pci\_add\_resources@{pci\_add\_resources}}
\index{pci\_add\_resources@{pci\_add\_resources}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_resources()}{pci\_add\_resources()}}
{\footnotesize\ttfamily void pci\+\_\+add\+\_\+resources (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{int}]{force,  }\item[{uint32\+\_\+t}]{prefetchmask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04038}{4038}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00247}{pci\+\_\+quirk\+::arg1}}, \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pci_8c_source_l00238}{pci\+\_\+quirk\+::devid}}, \mbox{\hyperlink{pci_8c_source_l03593}{ehci\+\_\+early\+\_\+takeover()}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcivar_8h_source_l00206}{pcicfg\+::nummaps}}, \mbox{\hyperlink{pci_8c_source_l03532}{ohci\+\_\+early\+\_\+takeover()}}, \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l03920}{pci\+\_\+add\+\_\+resources\+\_\+ea()}}, \mbox{\hyperlink{pci_8c_source_l03483}{pci\+\_\+assign\+\_\+interrupt()}}, \mbox{\hyperlink{pci_8c_source_l03429}{pci\+\_\+ata\+\_\+maps()}}, \mbox{\hyperlink{pci_8c_source_l03904}{pci\+\_\+ea\+\_\+is\+\_\+enabled()}}, \mbox{\hyperlink{pci_8c_source_l00240}{PCI\+\_\+\+QUIRK\+\_\+\+MAP\+\_\+\+REG}}, \mbox{\hyperlink{pci_8c_source_l00243}{PCI\+\_\+\+QUIRK\+\_\+\+UNMAP\+\_\+\+REG}}, \mbox{\hyperlink{pci_8c_source_l00251}{pci\+\_\+quirks}}, \mbox{\hyperlink{pci_8c_source_l00394}{pci\+\_\+usb\+\_\+takeover}}, \mbox{\hyperlink{pcireg_8h_source_l00457}{PCIC\+\_\+\+SERIALBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00334}{PCIC\+\_\+\+STORAGE}}, \mbox{\hyperlink{pcireg_8h_source_l00464}{PCIP\+\_\+\+SERIALBUS\+\_\+\+USB\+\_\+\+EHCI}}, \mbox{\hyperlink{pcireg_8h_source_l00463}{PCIP\+\_\+\+SERIALBUS\+\_\+\+USB\+\_\+\+OHCI}}, \mbox{\hyperlink{pcireg_8h_source_l00462}{PCIP\+\_\+\+SERIALBUS\+\_\+\+USB\+\_\+\+UHCI}}, \mbox{\hyperlink{pcireg_8h_source_l00465}{PCIP\+\_\+\+SERIALBUS\+\_\+\+USB\+\_\+\+XHCI}}, \mbox{\hyperlink{pcireg_8h_source_l00341}{PCIP\+\_\+\+STORAGE\+\_\+\+IDE\+\_\+\+MASTERDEV}}, \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, \mbox{\hyperlink{pcireg_8h_source_l00461}{PCIS\+\_\+\+SERIALBUS\+\_\+\+USB}}, \mbox{\hyperlink{pcireg_8h_source_l00336}{PCIS\+\_\+\+STORAGE\+\_\+\+IDE}}, \mbox{\hyperlink{pci_8c_source_l00239}{pci\+\_\+quirk\+::type}}, \mbox{\hyperlink{pci_8c_source_l03569}{uhci\+\_\+early\+\_\+takeover()}}, \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}, and \mbox{\hyperlink{pci_8c_source_l03649}{xhci\+\_\+early\+\_\+takeover()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_a5f34452a3d1a1e3ef926f30223710bd1_cgraph}
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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ac06cb6c2d36568d337f4d497800d4f99}\label{pci_8c_ac06cb6c2d36568d337f4d497800d4f99}} 
\index{pci.c@{pci.c}!pci\_add\_resources\_ea@{pci\_add\_resources\_ea}}
\index{pci\_add\_resources\_ea@{pci\_add\_resources\_ea}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_add\_resources\_ea()}{pci\_add\_resources\_ea()}}
{\footnotesize\ttfamily void pci\+\_\+add\+\_\+resources\+\_\+ea (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{int}]{alloc\+\_\+iov }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03920}{3920}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00164}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+base}}, \mbox{\hyperlink{pcivar_8h_source_l00162}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+bei}}, \mbox{\hyperlink{pcivar_8h_source_l00166}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+cfg\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00163}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+flags}}, \mbox{\hyperlink{pcivar_8h_source_l00165}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+max\+\_\+offset}}, \mbox{\hyperlink{pci__iov__private_8h_source_l00049}{pcicfg\+\_\+iov\+::iov\+\_\+num\+\_\+vfs}}, \mbox{\hyperlink{pci_8c_source_l03868}{pci\+\_\+ea\+\_\+bei\+\_\+to\+\_\+rid()}}, \mbox{\hyperlink{pcireg_8h_source_l00634}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+BAR\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00635}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+BAR\+\_\+5}}, \mbox{\hyperlink{pcireg_8h_source_l00639}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+ROM}}, \mbox{\hyperlink{pcireg_8h_source_l00641}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+VF\+\_\+\+BAR\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00642}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+VF\+\_\+\+BAR\+\_\+5}}, \mbox{\hyperlink{pcireg_8h_source_l00661}{PCIM\+\_\+\+EA\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00650}{PCIM\+\_\+\+EA\+\_\+\+P\+\_\+\+IO}}, \mbox{\hyperlink{pcireg_8h_source_l00648}{PCIM\+\_\+\+EA\+\_\+\+P\+\_\+\+MEM}}, \mbox{\hyperlink{pcireg_8h_source_l00649}{PCIM\+\_\+\+EA\+\_\+\+P\+\_\+\+MEM\+\_\+\+PREFETCH}}, \mbox{\hyperlink{pcireg_8h_source_l00652}{PCIM\+\_\+\+EA\+\_\+\+P\+\_\+\+VF\+\_\+\+MEM}}, \mbox{\hyperlink{pcireg_8h_source_l00651}{PCIM\+\_\+\+EA\+\_\+\+P\+\_\+\+VF\+\_\+\+MEM\+\_\+\+PREFETCH}}, \mbox{\hyperlink{pcireg_8h_source_l00644}{PCIM\+\_\+\+EA\+\_\+\+PP}}, \mbox{\hyperlink{pcireg_8h_source_l00645}{PCIM\+\_\+\+EA\+\_\+\+PP\+\_\+\+OFFSET}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, and \mbox{\hyperlink{pci__iov_8c_source_l00574}{pci\+\_\+iov\+\_\+setup\+\_\+bars()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=341pt]{d1/de8/pci_8c_ac06cb6c2d36568d337f4d497800d4f99_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ac06cb6c2d36568d337f4d497800d4f99_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a19e8cedceaa3787ebb302702c8c922f2}\label{pci_8c_a19e8cedceaa3787ebb302702c8c922f2}} 
\index{pci.c@{pci.c}!pci\_alloc\_devinfo\_method@{pci\_alloc\_devinfo\_method}}
\index{pci\_alloc\_devinfo\_method@{pci\_alloc\_devinfo\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_alloc\_devinfo\_method()}{pci\_alloc\_devinfo\_method()}}
{\footnotesize\ttfamily struct pci\+\_\+devinfo $\ast$ pci\+\_\+alloc\+\_\+devinfo\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00695}{695}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_ae0e75c2af2d126361d4e6ac05a19bf7f}\label{pci_8c_ae0e75c2af2d126361d4e6ac05a19bf7f}} 
\index{pci.c@{pci.c}!pci\_alloc\_msi\_method@{pci\_alloc\_msi\_method}}
\index{pci\_alloc\_msi\_method@{pci\_alloc\_msi\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_alloc\_msi\_method()}{pci\_alloc\_msi\_method()}}
{\footnotesize\ttfamily int pci\+\_\+alloc\+\_\+msi\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int $\ast$}]{count }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02587}{2587}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00125}{irqs}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00099}{pcicfg\+\_\+msi\+::msi\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00095}{pcicfg\+\_\+msi\+::msi\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pci_8c_source_l00374}{pci\+\_\+do\+\_\+msi}}, \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, and \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae0e75c2af2d126361d4e6ac05a19bf7f_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a5177c5bd1ad00080c9a6e37be6c76193}\label{pci_8c_a5177c5bd1ad00080c9a6e37be6c76193}} 
\index{pci.c@{pci.c}!pci\_alloc\_msix\_method@{pci\_alloc\_msix\_method}}
\index{pci\_alloc\_msix\_method@{pci\_alloc\_msix\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_alloc\_msix\_method()}{pci\_alloc\_msix\_method()}}
{\footnotesize\ttfamily int pci\+\_\+alloc\+\_\+msix\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int $\ast$}]{count }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01808}{1808}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00115}{pcicfg\+\_\+msix\+::msix\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00119}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+bar}}, \mbox{\hyperlink{pcivar_8h_source_l00127}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+res}}, \mbox{\hyperlink{pcivar_8h_source_l00124}{pcicfg\+\_\+msix\+::msix\+\_\+table}}, \mbox{\hyperlink{pcivar_8h_source_l00118}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+bar}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00126}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+res}}, \mbox{\hyperlink{pcivar_8h_source_l00125}{pcicfg\+\_\+msix\+::msix\+\_\+vectors}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00106}{msix\+\_\+vector\+::mv\+\_\+irq}}, \mbox{\hyperlink{pci_8c_source_l00378}{pci\+\_\+do\+\_\+msix}}, \mbox{\hyperlink{pci_8c_source_l01718}{pci\+\_\+mask\+\_\+msix()}}, \mbox{\hyperlink{pci_8c_source_l02566}{pci\+\_\+msix\+\_\+blacklisted()}}, \mbox{\hyperlink{pcireg_8h_source_l00964}{PCIM\+\_\+\+MSIXCTRL\+\_\+\+MSIX\+\_\+\+ENABLE}}, and \mbox{\hyperlink{pcireg_8h_source_l00963}{PCIR\+\_\+\+MSIX\+\_\+\+CTRL}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a5177c5bd1ad00080c9a6e37be6c76193_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a7a0b92ec4492ee5081c58fb4c2b31845}\label{pci_8c_a7a0b92ec4492ee5081c58fb4c2b31845}} 
\index{pci.c@{pci.c}!pci\_alloc\_multi\_resource@{pci\_alloc\_multi\_resource}}
\index{pci\_alloc\_multi\_resource@{pci\_alloc\_multi\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_alloc\_multi\_resource()}{pci\_alloc\_multi\_resource()}}
{\footnotesize\ttfamily struct resource $\ast$ pci\+\_\+alloc\+\_\+multi\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int $\ast$}]{rid,  }\item[{rman\+\_\+res\+\_\+t}]{start,  }\item[{rman\+\_\+res\+\_\+t}]{end,  }\item[{rman\+\_\+res\+\_\+t}]{count,  }\item[{u\+\_\+long}]{num,  }\item[{u\+\_\+int}]{flags }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05535}{5535}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pci_8c_source_l03483}{pci\+\_\+assign\+\_\+interrupt()}}, \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00266}{PCIR\+\_\+\+IOBASEL\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00274}{PCIR\+\_\+\+MEMBASE\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00277}{PCIR\+\_\+\+PMBASEL\+\_\+1}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05611}{pci\+\_\+alloc\+\_\+resource()}}, and \mbox{\hyperlink{pci__iov_8c_source_l00340}{pci\+\_\+iov\+\_\+alloc\+\_\+bar()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a7a0b92ec4492ee5081c58fb4c2b31845_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a7a0b92ec4492ee5081c58fb4c2b31845_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a76d609e6875b983f2e40e7900590884d}\label{pci_8c_a76d609e6875b983f2e40e7900590884d}} 
\index{pci.c@{pci.c}!pci\_alloc\_resource@{pci\_alloc\_resource}}
\index{pci\_alloc\_resource@{pci\_alloc\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_alloc\_resource()}{pci\_alloc\_resource()}}
{\footnotesize\ttfamily struct resource $\ast$ pci\+\_\+alloc\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int $\ast$}]{rid,  }\item[{rman\+\_\+res\+\_\+t}]{start,  }\item[{rman\+\_\+res\+\_\+t}]{end,  }\item[{rman\+\_\+res\+\_\+t}]{count,  }\item[{u\+\_\+int}]{flags }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05611}{5611}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l05535}{pci\+\_\+alloc\+\_\+multi\+\_\+resource()}}, \mbox{\hyperlink{pci__iov_8c_source_l00998}{pci\+\_\+vf\+\_\+alloc\+\_\+mem\+\_\+resource()}}, \mbox{\hyperlink{pcivar_8h_source_l00175}{PCICFG\+\_\+\+VF}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a76d609e6875b983f2e40e7900590884d_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1c1054e322fe5966cc55d907fcb91ced}\label{pci_8c_a1c1054e322fe5966cc55d907fcb91ced}} 
\index{pci.c@{pci.c}!pci\_assign\_interrupt@{pci\_assign\_interrupt}}
\index{pci\_assign\_interrupt@{pci\_assign\_interrupt}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_assign\_interrupt()}{pci\_assign\_interrupt()}}
{\footnotesize\ttfamily static void pci\+\_\+assign\+\_\+interrupt (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{int}]{force\+\_\+route }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03483}{3483}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcireg_8h_source_l00251}{PCIR\+\_\+\+INTLINE}}, and \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, and \mbox{\hyperlink{pci_8c_source_l05535}{pci\+\_\+alloc\+\_\+multi\+\_\+resource()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1c1054e322fe5966cc55d907fcb91ced_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a69e2134386e1d354ef1eb5779505c4c0}\label{pci_8c_a69e2134386e1d354ef1eb5779505c4c0}} 
\index{pci.c@{pci.c}!pci\_assign\_interrupt\_method@{pci\_assign\_interrupt\_method}}
\index{pci\_assign\_interrupt\_method@{pci\_assign\_interrupt\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_assign\_interrupt\_method()}{pci\_assign\_interrupt\_method()}}
{\footnotesize\ttfamily int pci\+\_\+assign\+\_\+interrupt\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05946}{5946}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}.

\mbox{\Hypertarget{pci_8c_afbd50cf91b84de3b789805e573926e31}\label{pci_8c_afbd50cf91b84de3b789805e573926e31}} 
\index{pci.c@{pci.c}!pci\_ata\_maps@{pci\_ata\_maps}}
\index{pci\_ata\_maps@{pci\_ata\_maps}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_ata\_maps()}{pci\_ata\_maps()}}
{\footnotesize\ttfamily static void pci\+\_\+ata\+\_\+maps (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{struct resource\+\_\+list $\ast$}]{rl,  }\item[{int}]{force,  }\item[{uint32\+\_\+t}]{prefetchmask }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03429}{3429}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l00536}{pci\+\_\+mapbase()}}, \mbox{\hyperlink{pcireg_8h_source_l00337}{PCIP\+\_\+\+STORAGE\+\_\+\+IDE\+\_\+\+MODEPRIM}}, \mbox{\hyperlink{pcireg_8h_source_l00339}{PCIP\+\_\+\+STORAGE\+\_\+\+IDE\+\_\+\+MODESEC}}, \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, \mbox{\hyperlink{pcireg_8h_source_l00111}{PCIR\+\_\+\+PROGIF}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_afbd50cf91b84de3b789805e573926e31_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_afbd50cf91b84de3b789805e573926e31_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a58aafe447095c33fcc2d0056ef4cd44b}\label{pci_8c_a58aafe447095c33fcc2d0056ef4cd44b}} 
\index{pci.c@{pci.c}!pci\_attach@{pci\_attach}}
\index{pci\_attach@{pci\_attach}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_attach()}{pci\_attach()}}
{\footnotesize\ttfamily int pci\+\_\+attach (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04496}{4496}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l04144}{pci\+\_\+add\+\_\+children()}}, and \mbox{\hyperlink{pci_8c_source_l04468}{pci\+\_\+attach\+\_\+common()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a58aafe447095c33fcc2d0056ef4cd44b_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ac09dfc63ae1dd249f7cb83e7489f92b3}\label{pci_8c_ac09dfc63ae1dd249f7cb83e7489f92b3}} 
\index{pci.c@{pci.c}!pci\_attach\_common@{pci\_attach\_common}}
\index{pci\_attach\_common@{pci\_attach\_common}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_attach\_common()}{pci\_attach\_common()}}
{\footnotesize\ttfamily int pci\+\_\+attach\+\_\+common (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04468}{4468}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__private_8h_source_l00044}{pci\+\_\+softc\+::sc\+\_\+dma\+\_\+tag}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04496}{pci\+\_\+attach()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=298pt]{d1/de8/pci_8c_ac09dfc63ae1dd249f7cb83e7489f92b3_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a7ffd5f1b10058cf96b9e394579e78ce8}\label{pci_8c_a7ffd5f1b10058cf96b9e394579e78ce8}} 
\index{pci.c@{pci.c}!pci\_bar\_enabled@{pci\_bar\_enabled}}
\index{pci\_bar\_enabled@{pci\_bar\_enabled}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_bar\_enabled()}{pci\_bar\_enabled()}}
{\footnotesize\ttfamily int pci\+\_\+bar\+\_\+enabled (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$}]{pm }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03176}{3176}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__iov__private_8h_source_l00040}{pcicfg\+\_\+iov\+::iov\+\_\+pf}}, \mbox{\hyperlink{pci__iov__private_8h_source_l00048}{pcicfg\+\_\+iov\+::iov\+\_\+pos}}, \mbox{\hyperlink{pcireg_8h_source_l00220}{PCI\+\_\+\+BAR\+\_\+\+MEM}}, \mbox{\hyperlink{pcivar_8h_source_l00175}{PCICFG\+\_\+\+VF}}, \mbox{\hyperlink{pcireg_8h_source_l00248}{PCIM\+\_\+\+BIOS\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, \mbox{\hyperlink{pcireg_8h_source_l01063}{PCIM\+\_\+\+SRIOV\+\_\+\+VF\+\_\+\+MSE}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pcireg_8h_source_l01061}{PCIR\+\_\+\+SRIOV\+\_\+\+CTL}}, \mbox{\hyperlink{pcivar_8h_source_l00064}{pci\+\_\+map\+::pm\+\_\+reg}}, and \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}.



Referenced by \mbox{\hyperlink{pci__user_8c_source_l00851}{pci\+\_\+bar\+\_\+mmap()}}, and \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a7ffd5f1b10058cf96b9e394579e78ce8_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad24267e41ffe1d8a036bb5529fded80b}\label{pci_8c_ad24267e41ffe1d8a036bb5529fded80b}} 
\index{pci.c@{pci.c}!pci\_cfg\_restore@{pci\_cfg\_restore}}
\index{pci\_cfg\_restore@{pci\_cfg\_restore}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_restore()}{pci\_cfg\_restore()}}
{\footnotesize\ttfamily void pci\+\_\+cfg\+\_\+restore (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})}

Restore the config register state. The state must be previously saved with pci\+\_\+cfg\+\_\+save. However, the pci bus driver takes care of that. This function will also return the device to PCI\+\_\+\+POWERSTATE\+\_\+\+D0 if it is currently in a lower power mode. 

Definition at line \mbox{\hyperlink{pci_8c_source_l06075}{6075}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06032}{pci\+\_\+cfg\+\_\+restore\+\_\+pcie()}}, \mbox{\hyperlink{pci_8c_source_l06068}{pci\+\_\+cfg\+\_\+restore\+\_\+pcix()}}, \mbox{\hyperlink{pci__iov_8c_source_l00796}{pci\+\_\+iov\+\_\+cfg\+\_\+restore()}}, \mbox{\hyperlink{pci_8c_source_l03228}{pci\+\_\+restore\+\_\+bars()}}, \mbox{\hyperlink{pci_8c_source_l02395}{pci\+\_\+resume\+\_\+msi()}}, \mbox{\hyperlink{pci_8c_source_l01774}{pci\+\_\+resume\+\_\+msix()}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00120}{PCIM\+\_\+\+HDRTYPE\+\_\+\+CARDBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00286}{PCIR\+\_\+\+BRIDGECTL\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00316}{PCIR\+\_\+\+BRIDGECTL\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00114}{PCIR\+\_\+\+CACHELNSZ}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00251}{PCIR\+\_\+\+INTLINE}}, \mbox{\hyperlink{pcireg_8h_source_l00252}{PCIR\+\_\+\+INTPIN}}, \mbox{\hyperlink{pcireg_8h_source_l00115}{PCIR\+\_\+\+LATTIMER}}, \mbox{\hyperlink{pcireg_8h_source_l00254}{PCIR\+\_\+\+MAXLAT}}, \mbox{\hyperlink{pcireg_8h_source_l00253}{PCIR\+\_\+\+MINGNT}}, \mbox{\hyperlink{pcireg_8h_source_l00261}{PCIR\+\_\+\+PRIBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00299}{PCIR\+\_\+\+PRIBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00111}{PCIR\+\_\+\+PROGIF}}, \mbox{\hyperlink{pcireg_8h_source_l00110}{PCIR\+\_\+\+REVID}}, \mbox{\hyperlink{pcireg_8h_source_l00262}{PCIR\+\_\+\+SECBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00300}{PCIR\+\_\+\+SECBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00264}{PCIR\+\_\+\+SECLAT\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00302}{PCIR\+\_\+\+SECLAT\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00263}{PCIR\+\_\+\+SUBBUS\+\_\+1}}, and \mbox{\hyperlink{pcireg_8h_source_l00301}{PCIR\+\_\+\+SUBBUS\+\_\+2}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}, \mbox{\hyperlink{pci_8c_source_l04716}{pci\+\_\+driver\+\_\+added()}}, \mbox{\hyperlink{pci_8c_source_l06313}{pci\+\_\+restore\+\_\+state()}}, and \mbox{\hyperlink{pci_8c_source_l04628}{pci\+\_\+resume\+\_\+child()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad24267e41ffe1d8a036bb5529fded80b_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad24267e41ffe1d8a036bb5529fded80b_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a593ae37c545a3f180dc637648c10071f}\label{pci_8c_a593ae37c545a3f180dc637648c10071f}} 
\index{pci.c@{pci.c}!pci\_cfg\_restore\_pcie@{pci\_cfg\_restore\_pcie}}
\index{pci\_cfg\_restore\_pcie@{pci\_cfg\_restore\_pcie}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_restore\_pcie()}{pci\_cfg\_restore\_pcie()}}
{\footnotesize\ttfamily static void pci\+\_\+cfg\+\_\+restore\+\_\+pcie (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06032}{6032}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00143}{pcicfg\+\_\+pcie\+::pcie\+\_\+device\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00147}{pcicfg\+\_\+pcie\+::pcie\+\_\+device\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00142}{pcicfg\+\_\+pcie\+::pcie\+\_\+flags}}, \mbox{\hyperlink{pcivar_8h_source_l00144}{pcicfg\+\_\+pcie\+::pcie\+\_\+link\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00148}{pcicfg\+\_\+pcie\+::pcie\+\_\+link\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00140}{pcicfg\+\_\+pcie\+::pcie\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00146}{pcicfg\+\_\+pcie\+::pcie\+\_\+root\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00145}{pcicfg\+\_\+pcie\+::pcie\+\_\+slot\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00149}{pcicfg\+\_\+pcie\+::pcie\+\_\+slot\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00141}{pcicfg\+\_\+pcie\+::pcie\+\_\+type}}, \mbox{\hyperlink{pcireg_8h_source_l00799}{PCIEM\+\_\+\+FLAGS\+\_\+\+SLOT}}, \mbox{\hyperlink{pcireg_8h_source_l00788}{PCIEM\+\_\+\+FLAGS\+\_\+\+VERSION}}, \mbox{\hyperlink{pcireg_8h_source_l00794}{PCIEM\+\_\+\+TYPE\+\_\+\+DOWNSTREAM\+\_\+\+PORT}}, \mbox{\hyperlink{pcireg_8h_source_l00790}{PCIEM\+\_\+\+TYPE\+\_\+\+ENDPOINT}}, \mbox{\hyperlink{pcireg_8h_source_l00791}{PCIEM\+\_\+\+TYPE\+\_\+\+LEGACY\+\_\+\+ENDPOINT}}, \mbox{\hyperlink{pcireg_8h_source_l00798}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+EC}}, \mbox{\hyperlink{pcireg_8h_source_l00792}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+PORT}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00930}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL2}}, \mbox{\hyperlink{pcireg_8h_source_l00844}{PCIER\+\_\+\+LINK\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00956}{PCIER\+\_\+\+LINK\+\_\+\+CTL2}}, \mbox{\hyperlink{pcireg_8h_source_l00910}{PCIER\+\_\+\+ROOT\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00880}{PCIER\+\_\+\+SLOT\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00959}{PCIER\+\_\+\+SLOT\+\_\+\+CTL2}}, and \mbox{\hyperlink{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}{WREG}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a593ae37c545a3f180dc637648c10071f_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a901bbdf17a6d25485516427fa49403b4}\label{pci_8c_a901bbdf17a6d25485516427fa49403b4}} 
\index{pci.c@{pci.c}!pci\_cfg\_restore\_pcix@{pci\_cfg\_restore\_pcix}}
\index{pci\_cfg\_restore\_pcix@{pci\_cfg\_restore\_pcix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_restore\_pcix()}{pci\_cfg\_restore\_pcix()}}
{\footnotesize\ttfamily static void pci\+\_\+cfg\+\_\+restore\+\_\+pcix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06068}{6068}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pcireg_8h_source_l00674}{PCIXR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}.

Here is the caller graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a901bbdf17a6d25485516427fa49403b4_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a3feb0441c2883a0c70a17088042ceef8}\label{pci_8c_a3feb0441c2883a0c70a17088042ceef8}} 
\index{pci.c@{pci.c}!pci\_cfg\_save@{pci\_cfg\_save}}
\index{pci\_cfg\_save@{pci\_cfg\_save}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_save()}{pci\_cfg\_save()}}
{\footnotesize\ttfamily void pci\+\_\+cfg\+\_\+save (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo,  }\item[{int}]{setstate }\end{DoxyParamCaption})}

Save the config register state. Optionally set the power state to D3 if the third argument is non-\/zero. 

Definition at line \mbox{\hyperlink{pci_8c_source_l06195}{6195}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06150}{pci\+\_\+cfg\+\_\+save\+\_\+pcie()}}, \mbox{\hyperlink{pci_8c_source_l06188}{pci\+\_\+cfg\+\_\+save\+\_\+pcix()}}, \mbox{\hyperlink{pci_8c_source_l00356}{pci\+\_\+do\+\_\+power\+\_\+nodriver}}, \mbox{\hyperlink{pci__iov_8c_source_l00808}{pci\+\_\+iov\+\_\+cfg\+\_\+save()}}, \mbox{\hyperlink{pcireg_8h_source_l00420}{PCIC\+\_\+\+BASEPERIPH}}, \mbox{\hyperlink{pcireg_8h_source_l00368}{PCIC\+\_\+\+DISPLAY}}, \mbox{\hyperlink{pcireg_8h_source_l00382}{PCIC\+\_\+\+MEMORY}}, \mbox{\hyperlink{pcireg_8h_source_l00334}{PCIC\+\_\+\+STORAGE}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00120}{PCIM\+\_\+\+HDRTYPE\+\_\+\+CARDBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00286}{PCIR\+\_\+\+BRIDGECTL\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00316}{PCIR\+\_\+\+BRIDGECTL\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00114}{PCIR\+\_\+\+CACHELNSZ}}, \mbox{\hyperlink{pcireg_8h_source_l00113}{PCIR\+\_\+\+CLASS}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00084}{PCIR\+\_\+\+DEVICE}}, \mbox{\hyperlink{pcireg_8h_source_l00251}{PCIR\+\_\+\+INTLINE}}, \mbox{\hyperlink{pcireg_8h_source_l00252}{PCIR\+\_\+\+INTPIN}}, \mbox{\hyperlink{pcireg_8h_source_l00115}{PCIR\+\_\+\+LATTIMER}}, \mbox{\hyperlink{pcireg_8h_source_l00254}{PCIR\+\_\+\+MAXLAT}}, \mbox{\hyperlink{pcireg_8h_source_l00253}{PCIR\+\_\+\+MINGNT}}, \mbox{\hyperlink{pcireg_8h_source_l00261}{PCIR\+\_\+\+PRIBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00299}{PCIR\+\_\+\+PRIBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00111}{PCIR\+\_\+\+PROGIF}}, \mbox{\hyperlink{pcireg_8h_source_l00110}{PCIR\+\_\+\+REVID}}, \mbox{\hyperlink{pcireg_8h_source_l00262}{PCIR\+\_\+\+SECBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00300}{PCIR\+\_\+\+SECBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00264}{PCIR\+\_\+\+SECLAT\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00302}{PCIR\+\_\+\+SECLAT\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00263}{PCIR\+\_\+\+SUBBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00301}{PCIR\+\_\+\+SUBBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00112}{PCIR\+\_\+\+SUBCLASS}}, \mbox{\hyperlink{pcireg_8h_source_l00246}{PCIR\+\_\+\+SUBDEV\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00319}{PCIR\+\_\+\+SUBDEV\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00245}{PCIR\+\_\+\+SUBVEND\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00318}{PCIR\+\_\+\+SUBVEND\+\_\+2}}, and \mbox{\hyperlink{pcireg_8h_source_l00083}{PCIR\+\_\+\+VENDOR}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}, \mbox{\hyperlink{pci_8c_source_l05084}{pci\+\_\+child\+\_\+detached()}}, \mbox{\hyperlink{pci_8c_source_l05037}{pci\+\_\+probe\+\_\+nomatch()}}, \mbox{\hyperlink{pci_8c_source_l04628}{pci\+\_\+resume\+\_\+child()}}, \mbox{\hyperlink{pci_8c_source_l06304}{pci\+\_\+save\+\_\+state()}}, and \mbox{\hyperlink{pci_8c_source_l04589}{pci\+\_\+suspend\+\_\+child()}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=301pt]{d1/de8/pci_8c_a3feb0441c2883a0c70a17088042ceef8_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a3feb0441c2883a0c70a17088042ceef8_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a63b76d5ce925c715bb8a0650a2f30d18}\label{pci_8c_a63b76d5ce925c715bb8a0650a2f30d18}} 
\index{pci.c@{pci.c}!pci\_cfg\_save\_pcie@{pci\_cfg\_save\_pcie}}
\index{pci\_cfg\_save\_pcie@{pci\_cfg\_save\_pcie}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_save\_pcie()}{pci\_cfg\_save\_pcie()}}
{\footnotesize\ttfamily static void pci\+\_\+cfg\+\_\+save\+\_\+pcie (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06150}{6150}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00143}{pcicfg\+\_\+pcie\+::pcie\+\_\+device\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00147}{pcicfg\+\_\+pcie\+::pcie\+\_\+device\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00142}{pcicfg\+\_\+pcie\+::pcie\+\_\+flags}}, \mbox{\hyperlink{pcivar_8h_source_l00144}{pcicfg\+\_\+pcie\+::pcie\+\_\+link\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00148}{pcicfg\+\_\+pcie\+::pcie\+\_\+link\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00140}{pcicfg\+\_\+pcie\+::pcie\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00146}{pcicfg\+\_\+pcie\+::pcie\+\_\+root\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00145}{pcicfg\+\_\+pcie\+::pcie\+\_\+slot\+\_\+ctl}}, \mbox{\hyperlink{pcivar_8h_source_l00149}{pcicfg\+\_\+pcie\+::pcie\+\_\+slot\+\_\+ctl2}}, \mbox{\hyperlink{pcivar_8h_source_l00141}{pcicfg\+\_\+pcie\+::pcie\+\_\+type}}, \mbox{\hyperlink{pcireg_8h_source_l00799}{PCIEM\+\_\+\+FLAGS\+\_\+\+SLOT}}, \mbox{\hyperlink{pcireg_8h_source_l00788}{PCIEM\+\_\+\+FLAGS\+\_\+\+VERSION}}, \mbox{\hyperlink{pcireg_8h_source_l00794}{PCIEM\+\_\+\+TYPE\+\_\+\+DOWNSTREAM\+\_\+\+PORT}}, \mbox{\hyperlink{pcireg_8h_source_l00790}{PCIEM\+\_\+\+TYPE\+\_\+\+ENDPOINT}}, \mbox{\hyperlink{pcireg_8h_source_l00791}{PCIEM\+\_\+\+TYPE\+\_\+\+LEGACY\+\_\+\+ENDPOINT}}, \mbox{\hyperlink{pcireg_8h_source_l00798}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+EC}}, \mbox{\hyperlink{pcireg_8h_source_l00792}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+PORT}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00930}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL2}}, \mbox{\hyperlink{pcireg_8h_source_l00787}{PCIER\+\_\+\+FLAGS}}, \mbox{\hyperlink{pcireg_8h_source_l00844}{PCIER\+\_\+\+LINK\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00956}{PCIER\+\_\+\+LINK\+\_\+\+CTL2}}, \mbox{\hyperlink{pcireg_8h_source_l00910}{PCIER\+\_\+\+ROOT\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00880}{PCIER\+\_\+\+SLOT\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00959}{PCIER\+\_\+\+SLOT\+\_\+\+CTL2}}, and \mbox{\hyperlink{pci_8c_a7e60ce204a13df01860248ad62014b81}{RREG}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a63b76d5ce925c715bb8a0650a2f30d18_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0a08b4347a2c9fbf301657de2c52608b}\label{pci_8c_a0a08b4347a2c9fbf301657de2c52608b}} 
\index{pci.c@{pci.c}!pci\_cfg\_save\_pcix@{pci\_cfg\_save\_pcix}}
\index{pci\_cfg\_save\_pcix@{pci\_cfg\_save\_pcix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_cfg\_save\_pcix()}{pci\_cfg\_save\_pcix()}}
{\footnotesize\ttfamily static void pci\+\_\+cfg\+\_\+save\+\_\+pcix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06188}{6188}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pcireg_8h_source_l00674}{PCIXR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a0a08b4347a2c9fbf301657de2c52608b_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a592f37571af40ca5eabe953267c77160}\label{pci_8c_a592f37571af40ca5eabe953267c77160}} 
\index{pci.c@{pci.c}!pci\_child\_added\_method@{pci\_child\_added\_method}}
\index{pci\_child\_added\_method@{pci\_child\_added\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_child\_added\_method()}{pci\_child\_added\_method()}}
{\footnotesize\ttfamily void pci\+\_\+child\+\_\+added\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04452}{4452}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a07684d5a91aa36d19ded00449e6fdc64}\label{pci_8c_a07684d5a91aa36d19ded00449e6fdc64}} 
\index{pci.c@{pci.c}!pci\_child\_deleted@{pci\_child\_deleted}}
\index{pci\_child\_deleted@{pci\_child\_deleted}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_child\_deleted()}{pci\_child\_deleted()}}
{\footnotesize\ttfamily void pci\+\_\+child\+\_\+deleted (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05743}{5743}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l02773}{pci\+\_\+freecfg()}}, \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=288pt]{d1/de8/pci_8c_a07684d5a91aa36d19ded00449e6fdc64_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a87541927f77a1f0a95aebe5f25e1dc82}\label{pci_8c_a87541927f77a1f0a95aebe5f25e1dc82}} 
\index{pci.c@{pci.c}!pci\_child\_detached@{pci\_child\_detached}}
\index{pci\_child\_detached@{pci\_child\_detached}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_child\_detached()}{pci\_child\_detached()}}
{\footnotesize\ttfamily void pci\+\_\+child\+\_\+detached (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05084}{5084}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}, and \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04716}{pci\+\_\+driver\+\_\+added()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a87541927f77a1f0a95aebe5f25e1dc82_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=326pt]{d1/de8/pci_8c_a87541927f77a1f0a95aebe5f25e1dc82_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_adc1427482a9d3b629180398e967dc46f}\label{pci_8c_adc1427482a9d3b629180398e967dc46f}} 
\index{pci.c@{pci.c}!pci\_child\_location\_method@{pci\_child\_location\_method}}
\index{pci\_child\_location\_method@{pci\_child\_location\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_child\_location\_method()}{pci\_child\_location\_method()}}
{\footnotesize\ttfamily int pci\+\_\+child\+\_\+location\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{struct sbuf $\ast$}]{sb }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05903}{5903}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}.

\mbox{\Hypertarget{pci_8c_ab2d5dfad0320993eee1d8e1d5693bc46}\label{pci_8c_ab2d5dfad0320993eee1d8e1d5693bc46}} 
\index{pci.c@{pci.c}!pci\_child\_pnpinfo\_method@{pci\_child\_pnpinfo\_method}}
\index{pci\_child\_pnpinfo\_method@{pci\_child\_pnpinfo\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_child\_pnpinfo\_method()}{pci\_child\_pnpinfo\_method()}}
{\footnotesize\ttfamily int pci\+\_\+child\+\_\+pnpinfo\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{struct sbuf $\ast$}]{sb }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05913}{5913}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00191}{pcicfg\+::baseclass}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pcivar_8h_source_l00193}{pcicfg\+::progif}}, \mbox{\hyperlink{pcivar_8h_source_l00192}{pcicfg\+::subclass}}, \mbox{\hyperlink{pcivar_8h_source_l00184}{pcicfg\+::subdevice}}, \mbox{\hyperlink{pcivar_8h_source_l00183}{pcicfg\+::subvendor}}, and \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}.

\mbox{\Hypertarget{pci_8c_a5c87fd35daa518ba519d98f3671d598a}\label{pci_8c_a5c87fd35daa518ba519d98f3671d598a}} 
\index{pci.c@{pci.c}!pci\_clear\_command\_bit@{pci\_clear\_command\_bit}}
\index{pci\_clear\_command\_bit@{pci\_clear\_command\_bit}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_clear\_command\_bit()}{pci\_clear\_command\_bit()}}
{\footnotesize\ttfamily static \+\_\+\+\_\+inline void pci\+\_\+clear\+\_\+command\+\_\+bit (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{uint16\+\_\+t}]{bit }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02928}{2928}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02945}{pci\+\_\+disable\+\_\+busmaster\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02971}{pci\+\_\+disable\+\_\+io\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l04745}{pci\+\_\+setup\+\_\+intr()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a5c87fd35daa518ba519d98f3671d598a_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a968ffc433003458235d28e4a0c01222b}\label{pci_8c_a968ffc433003458235d28e4a0c01222b}} 
\index{pci.c@{pci.c}!pci\_deactivate\_resource@{pci\_deactivate\_resource}}
\index{pci\_deactivate\_resource@{pci\_deactivate\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_deactivate\_resource()}{pci\_deactivate\_resource()}}
{\footnotesize\ttfamily int pci\+\_\+deactivate\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int}]{rid,  }\item[{struct resource $\ast$}]{r }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05722}{5722}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l03162}{pci\+\_\+find\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l03141}{pci\+\_\+write\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a968ffc433003458235d28e4a0c01222b_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a688fc77d06ac62a66ddbd80b8a9a311e}\label{pci_8c_a688fc77d06ac62a66ddbd80b8a9a311e}} 
\index{pci.c@{pci.c}!pci\_delete\_resource@{pci\_delete\_resource}}
\index{pci\_delete\_resource@{pci\_delete\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_delete\_resource()}{pci\_delete\_resource()}}
{\footnotesize\ttfamily void pci\+\_\+delete\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int}]{rid }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05785}{5785}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci__iov_8c_source_l00676}{pci\+\_\+iov\+\_\+config()}}, and \mbox{\hyperlink{pci__iov_8c_source_l00833}{pci\+\_\+iov\+\_\+delete\+\_\+iov\+\_\+children()}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a688fc77d06ac62a66ddbd80b8a9a311e_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a502c8a2ad9591c012b4d8d92288ca4de}\label{pci_8c_a502c8a2ad9591c012b4d8d92288ca4de}} 
\index{pci.c@{pci.c}!pci\_describe\_device@{pci\_describe\_device}}
\index{pci\_describe\_device@{pci\_describe\_device}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_describe\_device()}{pci\_describe\_device()}}
{\footnotesize\ttfamily static char $\ast$ pci\+\_\+describe\+\_\+device (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l05195}{5195}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l04943}{desc}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l05149}{pci\+\_\+describe\+\_\+parse\+\_\+line()}}, and \mbox{\hyperlink{pci_8c_source_l00234}{pci\+\_\+vendordata}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05037}{pci\+\_\+probe\+\_\+nomatch()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a502c8a2ad9591c012b4d8d92288ca4de_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=343pt]{d1/de8/pci_8c_a502c8a2ad9591c012b4d8d92288ca4de_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a9cf3ce75072bdf3ea645b824c42239ec}\label{pci_8c_a9cf3ce75072bdf3ea645b824c42239ec}} 
\index{pci.c@{pci.c}!pci\_describe\_parse\_line@{pci\_describe\_parse\_line}}
\index{pci\_describe\_parse\_line@{pci\_describe\_parse\_line}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_describe\_parse\_line()}{pci\_describe\_parse\_line()}}
{\footnotesize\ttfamily static int pci\+\_\+describe\+\_\+parse\+\_\+line (\begin{DoxyParamCaption}\item[{char $\ast$$\ast$}]{ptr,  }\item[{int $\ast$}]{vendor,  }\item[{int $\ast$}]{device,  }\item[{char $\ast$$\ast$}]{desc }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l05149}{5149}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l04943}{desc}}, \mbox{\hyperlink{pci_8c_source_l00234}{pci\+\_\+vendordata}}, and \mbox{\hyperlink{pci_8c_source_l00235}{pci\+\_\+vendordata\+\_\+size}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05195}{pci\+\_\+describe\+\_\+device()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a9cf3ce75072bdf3ea645b824c42239ec_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0e82a2fbeb98b92ab1301f99f37b5057}\label{pci_8c_a0e82a2fbeb98b92ab1301f99f37b5057}} 
\index{pci.c@{pci.c}!pci\_detach@{pci\_detach}}
\index{pci\_detach@{pci\_detach}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_detach()}{pci\_detach()}}
{\footnotesize\ttfamily int pci\+\_\+detach (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04517}{4517}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}.

\mbox{\Hypertarget{pci_8c_aafa1e60916a9b03604d687ac9608d908}\label{pci_8c_aafa1e60916a9b03604d687ac9608d908}} 
\index{pci.c@{pci.c}!pci\_disable\_busmaster\_method@{pci\_disable\_busmaster\_method}}
\index{pci\_disable\_busmaster\_method@{pci\_disable\_busmaster\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_disable\_busmaster\_method()}{pci\_disable\_busmaster\_method()}}
{\footnotesize\ttfamily int pci\+\_\+disable\+\_\+busmaster\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02945}{2945}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l02928}{pci\+\_\+clear\+\_\+command\+\_\+bit()}}, and \mbox{\hyperlink{pcireg_8h_source_l00088}{PCIM\+\_\+\+CMD\+\_\+\+BUSMASTEREN}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_aafa1e60916a9b03604d687ac9608d908_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ae2066960e6f068b8f1d3ac86c6eaf1d5}\label{pci_8c_ae2066960e6f068b8f1d3ac86c6eaf1d5}} 
\index{pci.c@{pci.c}!pci\_disable\_io\_method@{pci\_disable\_io\_method}}
\index{pci\_disable\_io\_method@{pci\_disable\_io\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_disable\_io\_method()}{pci\_disable\_io\_method()}}
{\footnotesize\ttfamily int pci\+\_\+disable\+\_\+io\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{space }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02971}{2971}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l02928}{pci\+\_\+clear\+\_\+command\+\_\+bit()}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, and \mbox{\hyperlink{pci__if_8m_source_l00123}{space}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae2066960e6f068b8f1d3ac86c6eaf1d5_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a897c4ab9ab4ff34ddc11a78755b4821b}\label{pci_8c_a897c4ab9ab4ff34ddc11a78755b4821b}} 
\index{pci.c@{pci.c}!pci\_disable\_msi\_method@{pci\_disable\_msi\_method}}
\index{pci\_disable\_msi\_method@{pci\_disable\_msi\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_disable\_msi\_method()}{pci\_disable\_msi\_method()}}
{\footnotesize\ttfamily void pci\+\_\+disable\+\_\+msi\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02375}{2375}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pci_8c_source_l02193}{pci\+\_\+ht\+\_\+map\+\_\+msi()}}, and \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=349pt]{d1/de8/pci_8c_a897c4ab9ab4ff34ddc11a78755b4821b_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ae369cbac13f5e780fc3f1706cdf705ae}\label{pci_8c_ae369cbac13f5e780fc3f1706cdf705ae}} 
\index{pci.c@{pci.c}!pci\_driver\_added@{pci\_driver\_added}}
\index{pci\_driver\_added@{pci\_driver\_added}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_driver\_added()}{pci\_driver\_added()}}
{\footnotesize\ttfamily void pci\+\_\+driver\+\_\+added (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{driver\+\_\+t $\ast$}]{driver }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04716}{4716}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}, \mbox{\hyperlink{pci_8c_source_l05084}{pci\+\_\+child\+\_\+detached()}}, \mbox{\hyperlink{pci_8c_source_l02995}{pci\+\_\+print\+\_\+verbose()}}, and \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae369cbac13f5e780fc3f1706cdf705ae_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0e9a34c25a64e41e14ab4fc9423efbd2}\label{pci_8c_a0e9a34c25a64e41e14ab4fc9423efbd2}} 
\index{pci.c@{pci.c}!pci\_ea\_bei\_to\_rid@{pci\_ea\_bei\_to\_rid}}
\index{pci\_ea\_bei\_to\_rid@{pci\_ea\_bei\_to\_rid}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_ea\_bei\_to\_rid()}{pci\_ea\_bei\_to\_rid()}}
{\footnotesize\ttfamily static int pci\+\_\+ea\+\_\+bei\+\_\+to\+\_\+rid (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{bei }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03868}{3868}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__iov__private_8h_source_l00048}{pcicfg\+\_\+iov\+::iov\+\_\+pos}}, \mbox{\hyperlink{pcireg_8h_source_l00634}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+BAR\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00635}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+BAR\+\_\+5}}, \mbox{\hyperlink{pcireg_8h_source_l00639}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+ROM}}, \mbox{\hyperlink{pcireg_8h_source_l00641}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+VF\+\_\+\+BAR\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00642}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+VF\+\_\+\+BAR\+\_\+5}}, \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, \mbox{\hyperlink{pcireg_8h_source_l00247}{PCIR\+\_\+\+BIOS}}, and \mbox{\hyperlink{pcireg_8h_source_l01076}{PCIR\+\_\+\+SRIOV\+\_\+\+BAR}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03920}{pci\+\_\+add\+\_\+resources\+\_\+ea()}}, and \mbox{\hyperlink{pci_8c_source_l03904}{pci\+\_\+ea\+\_\+is\+\_\+enabled()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a0e9a34c25a64e41e14ab4fc9423efbd2_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a4f6ed7c3afbc919990f1314e55a4e384}\label{pci_8c_a4f6ed7c3afbc919990f1314e55a4e384}} 
\index{pci.c@{pci.c}!pci\_ea\_fill\_info@{pci\_ea\_fill\_info}}
\index{pci\_ea\_fill\_info@{pci\_ea\_fill\_info}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_ea\_fill\_info()}{pci\_ea\_fill\_info()}}
{\footnotesize\ttfamily static void pci\+\_\+ea\+\_\+fill\+\_\+info (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00769}{769}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pcivar_8h_source_l00225}{pcicfg\+::ea}}, \mbox{\hyperlink{pcivar_8h_source_l00171}{pcicfg\+\_\+ea\+::ea\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00164}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+base}}, \mbox{\hyperlink{pcivar_8h_source_l00162}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+bei}}, \mbox{\hyperlink{pcivar_8h_source_l00166}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+cfg\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00163}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+flags}}, \mbox{\hyperlink{pcivar_8h_source_l00165}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+max\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcireg_8h_source_l00631}{PCIM\+\_\+\+EA\+\_\+\+BEI}}, \mbox{\hyperlink{pcireg_8h_source_l00632}{PCIM\+\_\+\+EA\+\_\+\+BEI\+\_\+\+OFFSET}}, \mbox{\hyperlink{pcireg_8h_source_l00630}{PCIM\+\_\+\+EA\+\_\+\+ES}}, \mbox{\hyperlink{pcireg_8h_source_l00666}{PCIM\+\_\+\+EA\+\_\+\+FIELD\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00665}{PCIM\+\_\+\+EA\+\_\+\+IS\+\_\+64}}, \mbox{\hyperlink{pcireg_8h_source_l00627}{PCIM\+\_\+\+EA\+\_\+\+NUM\+\_\+\+ENT\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00628}{PCIR\+\_\+\+EA\+\_\+\+FIRST\+\_\+\+ENT}}, \mbox{\hyperlink{pcireg_8h_source_l00626}{PCIR\+\_\+\+EA\+\_\+\+NUM\+\_\+\+ENT}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}, and \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00843}{pci\+\_\+read\+\_\+cap()}}.

Here is the caller graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a4f6ed7c3afbc919990f1314e55a4e384_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1c7ada4dd06bfd0220f78ea061c9fa91}\label{pci_8c_a1c7ada4dd06bfd0220f78ea061c9fa91}} 
\index{pci.c@{pci.c}!pci\_ea\_is\_enabled@{pci\_ea\_is\_enabled}}
\index{pci\_ea\_is\_enabled@{pci\_ea\_is\_enabled}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_ea\_is\_enabled()}{pci\_ea\_is\_enabled()}}
{\footnotesize\ttfamily int pci\+\_\+ea\+\_\+is\+\_\+enabled (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{rid }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03904}{3904}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00162}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+bei}}, \mbox{\hyperlink{pcivar_8h_source_l00163}{pci\+\_\+ea\+\_\+entry\+::eae\+\_\+flags}}, \mbox{\hyperlink{pci_8c_source_l03868}{pci\+\_\+ea\+\_\+bei\+\_\+to\+\_\+rid()}}, \mbox{\hyperlink{pcireg_8h_source_l00661}{PCIM\+\_\+\+EA\+\_\+\+ENABLE}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, \mbox{\hyperlink{pci__iov_8c_source_l00574}{pci\+\_\+iov\+\_\+setup\+\_\+bars()}}, and \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

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\begin{center}
\leavevmode
\includegraphics[width=323pt]{d1/de8/pci_8c_a1c7ada4dd06bfd0220f78ea061c9fa91_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1c7ada4dd06bfd0220f78ea061c9fa91_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a6175f5abcf4269d76cf553857ed0d045}\label{pci_8c_a6175f5abcf4269d76cf553857ed0d045}} 
\index{pci.c@{pci.c}!pci\_enable\_busmaster\_method@{pci\_enable\_busmaster\_method}}
\index{pci\_enable\_busmaster\_method@{pci\_enable\_busmaster\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_busmaster\_method()}{pci\_enable\_busmaster\_method()}}
{\footnotesize\ttfamily int pci\+\_\+enable\+\_\+busmaster\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02938}{2938}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l02918}{pci\+\_\+set\+\_\+command\+\_\+bit()}}, and \mbox{\hyperlink{pcireg_8h_source_l00088}{PCIM\+\_\+\+CMD\+\_\+\+BUSMASTEREN}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a6175f5abcf4269d76cf553857ed0d045_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a82739b4298d773b21f313d05aaa787ac}\label{pci_8c_a82739b4298d773b21f313d05aaa787ac}} 
\index{pci.c@{pci.c}!pci\_enable\_io\_method@{pci\_enable\_io\_method}}
\index{pci\_enable\_io\_method@{pci\_enable\_io\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_io\_method()}{pci\_enable\_io\_method()}}
{\footnotesize\ttfamily int pci\+\_\+enable\+\_\+io\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{space }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02952}{2952}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l02918}{pci\+\_\+set\+\_\+command\+\_\+bit()}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, and \mbox{\hyperlink{pci__if_8m_source_l00123}{space}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a82739b4298d773b21f313d05aaa787ac_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1f9a3408cf5f0dea7cd619529c58e1b2}\label{pci_8c_a1f9a3408cf5f0dea7cd619529c58e1b2}} 
\index{pci.c@{pci.c}!pci\_enable\_msi\_method@{pci\_enable\_msi\_method}}
\index{pci\_enable\_msi\_method@{pci\_enable\_msi\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_msi\_method()}{pci\_enable\_msi\_method()}}
{\footnotesize\ttfamily void pci\+\_\+enable\+\_\+msi\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{uint64\+\_\+t}]{address,  }\item[{uint16\+\_\+t}]{data }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02347}{2347}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00197}{address}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pci_8c_source_l02193}{pci\+\_\+ht\+\_\+map\+\_\+msi()}}, \mbox{\hyperlink{pcireg_8h_source_l00602}{PCIM\+\_\+\+MSICTRL\+\_\+64\+BIT}}, \mbox{\hyperlink{pcireg_8h_source_l00617}{PCIM\+\_\+\+MSICTRL\+\_\+\+MSI\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00618}{PCIR\+\_\+\+MSI\+\_\+\+ADDR}}, \mbox{\hyperlink{pcireg_8h_source_l00619}{PCIR\+\_\+\+MSI\+\_\+\+ADDR\+\_\+\+HIGH}}, \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}, \mbox{\hyperlink{pcireg_8h_source_l00620}{PCIR\+\_\+\+MSI\+\_\+\+DATA}}, and \mbox{\hyperlink{pcireg_8h_source_l00621}{PCIR\+\_\+\+MSI\+\_\+\+DATA\+\_\+64\+BIT}}.

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\begin{center}
\leavevmode
\includegraphics[width=347pt]{d1/de8/pci_8c_a1f9a3408cf5f0dea7cd619529c58e1b2_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a13760d0aff50e28c15480c2836fe54a6}\label{pci_8c_a13760d0aff50e28c15480c2836fe54a6}} 
\index{pci.c@{pci.c}!pci\_enable\_msix\_method@{pci\_enable\_msix\_method}}
\index{pci\_enable\_msix\_method@{pci\_enable\_msix\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_msix\_method()}{pci\_enable\_msix\_method()}}
{\footnotesize\ttfamily void pci\+\_\+enable\+\_\+msix\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{u\+\_\+int}]{index,  }\item[{uint64\+\_\+t}]{address,  }\item[{uint32\+\_\+t}]{data }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01690}{1690}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00197}{address}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pci__if_8m_source_l00204}{index}}, \mbox{\hyperlink{pcivar_8h_source_l00115}{pcicfg\+\_\+msix\+::msix\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pci_8c_source_l02193}{pci\+\_\+ht\+\_\+map\+\_\+msi()}}, \mbox{\hyperlink{pci_8c_source_l00382}{pci\+\_\+msix\+\_\+rewrite\+\_\+table}}, \mbox{\hyperlink{pci_8c_source_l01774}{pci\+\_\+resume\+\_\+msix()}}, \mbox{\hyperlink{pci_8c_source_l01676}{pci\+\_\+write\+\_\+msix\+\_\+entry()}}, \mbox{\hyperlink{pcireg_8h_source_l00964}{PCIM\+\_\+\+MSIXCTRL\+\_\+\+MSIX\+\_\+\+ENABLE}}, and \mbox{\hyperlink{pcireg_8h_source_l00963}{PCIR\+\_\+\+MSIX\+\_\+\+CTRL}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a13760d0aff50e28c15480c2836fe54a6_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad2ae1b8da4b37a4ded91fbf7c84bdf09}\label{pci_8c_ad2ae1b8da4b37a4ded91fbf7c84bdf09}} 
\index{pci.c@{pci.c}!pci\_fetch\_vpd\_list@{pci\_fetch\_vpd\_list}}
\index{pci\_fetch\_vpd\_list@{pci\_fetch\_vpd\_list}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_fetch\_vpd\_list()}{pci\_fetch\_vpd\_list()}}
{\footnotesize\ttfamily struct \mbox{\hyperlink{structpcicfg__vpd}{pcicfg\+\_\+vpd}} $\ast$ pci\+\_\+fetch\+\_\+vpd\+\_\+list (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01429}{1429}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l01088}{pci\+\_\+read\+\_\+vpd()}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00083}{pcicfg\+\_\+vpd\+::vpd\+\_\+cached}}, and \mbox{\hyperlink{pcivar_8h_source_l00082}{pcicfg\+\_\+vpd\+::vpd\+\_\+reg}}.



Referenced by \mbox{\hyperlink{pci__user_8c_source_l00561}{pci\+\_\+list\+\_\+vpd()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_ad2ae1b8da4b37a4ded91fbf7c84bdf09_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad2ae1b8da4b37a4ded91fbf7c84bdf09_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1076914926d10dd4dab66477bab0c9b3}\label{pci_8c_a1076914926d10dd4dab66477bab0c9b3}} 
\index{pci.c@{pci.c}!pci\_fill\_devinfo@{pci\_fill\_devinfo}}
\index{pci\_fill\_devinfo@{pci\_fill\_devinfo}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_fill\_devinfo()}{pci\_fill\_devinfo()}}
{\footnotesize\ttfamily static struct pci\+\_\+devinfo $\ast$ pci\+\_\+fill\+\_\+devinfo (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{device\+\_\+t}]{bus,  }\item[{int}]{d,  }\item[{int}]{b,  }\item[{int}]{s,  }\item[{int}]{f,  }\item[{uint16\+\_\+t}]{vid,  }\item[{uint16\+\_\+t}]{did }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00703}{703}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00191}{pcicfg\+::baseclass}}, \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcivar_8h_source_l00197}{pcicfg\+::cachelnsz}}, \mbox{\hyperlink{pcivar_8h_source_l00188}{pcicfg\+::cmdreg}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pci__if_8m_source_l00280}{did}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcivar_8h_source_l00223}{pcicfg\+::iov}}, \mbox{\hyperlink{pcivar_8h_source_l00203}{pcicfg\+::lattimer}}, \mbox{\hyperlink{pcivar_8h_source_l00205}{pcicfg\+::mfdev}}, \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, \mbox{\hyperlink{pci_8c_source_l00632}{pci\+\_\+fixancient()}}, \mbox{\hyperlink{pci_8c_source_l00335}{pci\+\_\+generation}}, \mbox{\hyperlink{pci_8c_source_l00645}{pci\+\_\+hdrtypedata()}}, \mbox{\hyperlink{pci_8c_source_l00336}{pci\+\_\+numdevs}}, \mbox{\hyperlink{pci_8c_source_l00843}{pci\+\_\+read\+\_\+cap()}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcireg_8h_source_l00121}{PCIM\+\_\+\+MFDEV}}, \mbox{\hyperlink{pcireg_8h_source_l00097}{PCIM\+\_\+\+STATUS\+\_\+\+CAPPRESENT}}, \mbox{\hyperlink{pcireg_8h_source_l00114}{PCIR\+\_\+\+CACHELNSZ}}, \mbox{\hyperlink{pcireg_8h_source_l00113}{PCIR\+\_\+\+CLASS}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00116}{PCIR\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00251}{PCIR\+\_\+\+INTLINE}}, \mbox{\hyperlink{pcireg_8h_source_l00252}{PCIR\+\_\+\+INTPIN}}, \mbox{\hyperlink{pcireg_8h_source_l00115}{PCIR\+\_\+\+LATTIMER}}, \mbox{\hyperlink{pcireg_8h_source_l00111}{PCIR\+\_\+\+PROGIF}}, \mbox{\hyperlink{pcireg_8h_source_l00110}{PCIR\+\_\+\+REVID}}, \mbox{\hyperlink{pcireg_8h_source_l00095}{PCIR\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l00112}{PCIR\+\_\+\+SUBCLASS}}, \mbox{\hyperlink{pcivar_8h_source_l00193}{pcicfg\+::progif}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, \mbox{\hyperlink{pcivar_8h_source_l00194}{pcicfg\+::revid}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pcivar_8h_source_l00189}{pcicfg\+::statreg}}, \mbox{\hyperlink{pcivar_8h_source_l00192}{pcicfg\+::subclass}}, \mbox{\hyperlink{pcivar_8h_source_l00184}{pcicfg\+::subdevice}}, \mbox{\hyperlink{pcivar_8h_source_l00183}{pcicfg\+::subvendor}}, \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}, and \mbox{\hyperlink{pci__if_8m_source_l00279}{vid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00680}{pci\+\_\+read\+\_\+device()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1d77234d95bdd6310a8dad8bf993a6ed}\label{pci_8c_a1d77234d95bdd6310a8dad8bf993a6ed}} 
\index{pci.c@{pci.c}!pci\_find\_bar@{pci\_find\_bar}}
\index{pci\_find\_bar@{pci\_find\_bar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_bar()}{pci\_find\_bar()}}
{\footnotesize\ttfamily struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$ pci\+\_\+find\+\_\+bar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03162}{3162}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00064}{pci\+\_\+map\+::pm\+\_\+reg}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05694}{pci\+\_\+activate\+\_\+resource()}}, \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci__user_8c_source_l00928}{pci\+\_\+bar\+\_\+io()}}, \mbox{\hyperlink{pci__user_8c_source_l00851}{pci\+\_\+bar\+\_\+mmap()}}, \mbox{\hyperlink{pci_8c_source_l05722}{pci\+\_\+deactivate\+\_\+resource()}}, \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}, \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}, and \mbox{\hyperlink{pci__iov_8c_source_l00998}{pci\+\_\+vf\+\_\+alloc\+\_\+mem\+\_\+resource()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1d77234d95bdd6310a8dad8bf993a6ed_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad51277642b8bd55cae069c52431022dc}\label{pci_8c_ad51277642b8bd55cae069c52431022dc}} 
\index{pci.c@{pci.c}!pci\_find\_bsf@{pci\_find\_bsf}}
\index{pci\_find\_bsf@{pci\_find\_bsf}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_bsf()}{pci\_find\_bsf()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+bsf (\begin{DoxyParamCaption}\item[{uint8\+\_\+t}]{bus,  }\item[{uint8\+\_\+t}]{slot,  }\item[{uint8\+\_\+t}]{func }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00440}{440}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00081}{func}}, \mbox{\hyperlink{pci_8c_source_l00449}{pci\+\_\+find\+\_\+dbsf()}}, and \mbox{\hyperlink{pcib__if_8m_source_l00080}{slot}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l02566}{pci\+\_\+msix\+\_\+blacklisted()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=270pt]{d1/de8/pci_8c_ad51277642b8bd55cae069c52431022dc_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad51277642b8bd55cae069c52431022dc_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a3f163dc9aebba6d971bae78e5e0eb318}\label{pci_8c_a3f163dc9aebba6d971bae78e5e0eb318}} 
\index{pci.c@{pci.c}!pci\_find\_cap\_method@{pci\_find\_cap\_method}}
\index{pci\_find\_cap\_method@{pci\_find\_cap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_cap\_method()}{pci\_find\_cap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+cap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01526}{1526}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcireg_8h_source_l00129}{PCICAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00130}{PCICAP\+\_\+\+NEXTPTR}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00120}{PCIM\+\_\+\+HDRTYPE\+\_\+\+CARDBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00097}{PCIM\+\_\+\+STATUS\+\_\+\+CAPPRESENT}}, \mbox{\hyperlink{pcireg_8h_source_l00250}{PCIR\+\_\+\+CAP\+\_\+\+PTR}}, \mbox{\hyperlink{pcireg_8h_source_l00296}{PCIR\+\_\+\+CAP\+\_\+\+PTR\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00095}{PCIR\+\_\+\+STATUS}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00072}{status}}.

\mbox{\Hypertarget{pci_8c_a367b8a636e5bc54704a229668d472c1a}\label{pci_8c_a367b8a636e5bc54704a229668d472c1a}} 
\index{pci.c@{pci.c}!pci\_find\_class@{pci\_find\_class}}
\index{pci\_find\_class@{pci\_find\_class}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_class()}{pci\_find\_class()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+class (\begin{DoxyParamCaption}\item[{uint8\+\_\+t}]{class,  }\item[{uint8\+\_\+t}]{subclass }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00483}{483}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, and \mbox{\hyperlink{pci_8c_source_l04941}{subclass}}.

\mbox{\Hypertarget{pci_8c_a5708cf5d2c044fbc3e4c1d412aea5c1c}\label{pci_8c_a5708cf5d2c044fbc3e4c1d412aea5c1c}} 
\index{pci.c@{pci.c}!pci\_find\_class\_from@{pci\_find\_class\_from}}
\index{pci\_find\_class\_from@{pci\_find\_class\_from}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_class\_from()}{pci\_find\_class\_from()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+class\+\_\+from (\begin{DoxyParamCaption}\item[{uint8\+\_\+t}]{class,  }\item[{uint8\+\_\+t}]{subclass,  }\item[{device\+\_\+t}]{from }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00498}{498}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, and \mbox{\hyperlink{pci_8c_source_l04941}{subclass}}.

\mbox{\Hypertarget{pci_8c_a3461348b63f80de8b62f3b01813b9268}\label{pci_8c_a3461348b63f80de8b62f3b01813b9268}} 
\index{pci.c@{pci.c}!pci\_find\_dbsf@{pci\_find\_dbsf}}
\index{pci\_find\_dbsf@{pci\_find\_dbsf}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_dbsf()}{pci\_find\_dbsf()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+dbsf (\begin{DoxyParamCaption}\item[{uint32\+\_\+t}]{domain,  }\item[{uint8\+\_\+t}]{bus,  }\item[{uint8\+\_\+t}]{slot,  }\item[{uint8\+\_\+t}]{func }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00449}{449}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00081}{func}}, \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, and \mbox{\hyperlink{pcib__if_8m_source_l00080}{slot}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00440}{pci\+\_\+find\+\_\+bsf()}}, \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}, and \mbox{\hyperlink{pci_8c_source_l05956}{pci\+\_\+lookup()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a3461348b63f80de8b62f3b01813b9268_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a8df2273beb0f21a6a8c7942f249fda39}\label{pci_8c_a8df2273beb0f21a6a8c7942f249fda39}} 
\index{pci.c@{pci.c}!pci\_find\_device@{pci\_find\_device}}
\index{pci\_find\_device@{pci\_find\_device}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_device()}{pci\_find\_device()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+device (\begin{DoxyParamCaption}\item[{uint16\+\_\+t}]{vendor,  }\item[{uint16\+\_\+t}]{device }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00468}{468}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}.

\mbox{\Hypertarget{pci_8c_aa17ae5b7ad9a2725791e212cae123ff8}\label{pci_8c_aa17ae5b7ad9a2725791e212cae123ff8}} 
\index{pci.c@{pci.c}!pci\_find\_extcap\_method@{pci\_find\_extcap\_method}}
\index{pci\_find\_extcap\_method@{pci\_find\_extcap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_extcap\_method()}{pci\_find\_extcap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+extcap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01606}{1606}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcireg_8h_source_l00162}{PCI\+\_\+\+EXTCAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00164}{PCI\+\_\+\+EXTCAP\+\_\+\+NEXTPTR}}, \mbox{\hyperlink{pcivar_8h_source_l00221}{pcicfg\+::pcie}}, \mbox{\hyperlink{pcivar_8h_source_l00140}{pcicfg\+\_\+pcie\+::pcie\+\_\+location}}, and \mbox{\hyperlink{pcireg_8h_source_l00158}{PCIR\+\_\+\+EXTCAP}}.

\mbox{\Hypertarget{pci_8c_ae79acdf067819a75699c266b7cbdb5a6}\label{pci_8c_ae79acdf067819a75699c266b7cbdb5a6}} 
\index{pci.c@{pci.c}!pci\_find\_htcap\_method@{pci\_find\_htcap\_method}}
\index{pci\_find\_htcap\_method@{pci\_find\_htcap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_htcap\_method()}{pci\_find\_htcap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+htcap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01445}{1445}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcireg_8h_source_l00748}{PCIM\+\_\+\+HTCAP\+\_\+\+HOST}}, \mbox{\hyperlink{pcireg_8h_source_l00747}{PCIM\+\_\+\+HTCAP\+\_\+\+SLAVE}}, \mbox{\hyperlink{pcireg_8h_source_l00746}{PCIM\+\_\+\+HTCMD\+\_\+\+CAP\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00745}{PCIR\+\_\+\+HT\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00141}{PCIY\+\_\+\+HT}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_ae65fc83a7662d150a9e1d9367f37bad5}\label{pci_8c_ae65fc83a7662d150a9e1d9367f37bad5}} 
\index{pci.c@{pci.c}!pci\_find\_next\_cap\_method@{pci\_find\_next\_cap\_method}}
\index{pci\_find\_next\_cap\_method@{pci\_find\_next\_cap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_next\_cap\_method()}{pci\_find\_next\_cap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+next\+\_\+cap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int}]{start,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01579}{1579}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcireg_8h_source_l00129}{PCICAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00130}{PCICAP\+\_\+\+NEXTPTR}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}.

\mbox{\Hypertarget{pci_8c_a43a583ff0ed10386349c13d9d8a5ca7e}\label{pci_8c_a43a583ff0ed10386349c13d9d8a5ca7e}} 
\index{pci.c@{pci.c}!pci\_find\_next\_extcap\_method@{pci\_find\_next\_extcap\_method}}
\index{pci\_find\_next\_extcap\_method@{pci\_find\_next\_extcap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_next\_extcap\_method()}{pci\_find\_next\_extcap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+next\+\_\+extcap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int}]{start,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01643}{1643}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcireg_8h_source_l00162}{PCI\+\_\+\+EXTCAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00164}{PCI\+\_\+\+EXTCAP\+\_\+\+NEXTPTR}}, \mbox{\hyperlink{pcivar_8h_source_l00221}{pcicfg\+::pcie}}, \mbox{\hyperlink{pcivar_8h_source_l00140}{pcicfg\+\_\+pcie\+::pcie\+\_\+location}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}.

\mbox{\Hypertarget{pci_8c_a84f61dc95840447d2f88582194c76b49}\label{pci_8c_a84f61dc95840447d2f88582194c76b49}} 
\index{pci.c@{pci.c}!pci\_find\_next\_htcap\_method@{pci\_find\_next\_htcap\_method}}
\index{pci\_find\_next\_htcap\_method@{pci\_find\_next\_htcap\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_next\_htcap\_method()}{pci\_find\_next\_htcap\_method()}}
{\footnotesize\ttfamily int pci\+\_\+find\+\_\+next\+\_\+htcap\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{capability,  }\item[{int}]{start,  }\item[{int $\ast$}]{capreg }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01485}{1485}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00140}{capability}}, \mbox{\hyperlink{pci__if_8m_source_l00141}{capreg}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcireg_8h_source_l00129}{PCICAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00748}{PCIM\+\_\+\+HTCAP\+\_\+\+HOST}}, \mbox{\hyperlink{pcireg_8h_source_l00747}{PCIM\+\_\+\+HTCAP\+\_\+\+SLAVE}}, \mbox{\hyperlink{pcireg_8h_source_l00746}{PCIM\+\_\+\+HTCMD\+\_\+\+CAP\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00745}{PCIR\+\_\+\+HT\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00141}{PCIY\+\_\+\+HT}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_a0294f29138edf68670346f4c2f13d8f9}\label{pci_8c_a0294f29138edf68670346f4c2f13d8f9}} 
\index{pci.c@{pci.c}!pci\_find\_pcie\_root\_port@{pci\_find\_pcie\_root\_port}}
\index{pci\_find\_pcie\_root\_port@{pci\_find\_pcie\_root\_port}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_find\_pcie\_root\_port()}{pci\_find\_pcie\_root\_port()}}
{\footnotesize\ttfamily device\+\_\+t pci\+\_\+find\+\_\+pcie\+\_\+root\+\_\+port (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06331}{6331}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, and \mbox{\hyperlink{pcireg_8h_source_l00792}{PCIEM\+\_\+\+TYPE\+\_\+\+ROOT\+\_\+\+PORT}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04320}{pcie\+\_\+setup\+\_\+mps()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a0294f29138edf68670346f4c2f13d8f9_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_aa126158ea610682a7290c919588bdd29}\label{pci_8c_aa126158ea610682a7290c919588bdd29}} 
\index{pci.c@{pci.c}!pci\_fixancient@{pci\_fixancient}}
\index{pci\_fixancient@{pci\_fixancient}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_fixancient()}{pci\_fixancient()}}
{\footnotesize\ttfamily static void pci\+\_\+fixancient (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00632}{632}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00191}{pcicfg\+::baseclass}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcireg_8h_source_l00387}{PCIC\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00392}{PCIS\+\_\+\+BRIDGE\+\_\+\+PCI}}, and \mbox{\hyperlink{pcivar_8h_source_l00192}{pcicfg\+::subclass}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_aa126158ea610682a7290c919588bdd29_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a9ef663424c02f9d0600409665040ed9e}\label{pci_8c_a9ef663424c02f9d0600409665040ed9e}} 
\index{pci.c@{pci.c}!pci\_freecfg@{pci\_freecfg}}
\index{pci\_freecfg@{pci\_freecfg}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_freecfg()}{pci\_freecfg()}}
{\footnotesize\ttfamily int pci\+\_\+freecfg (\begin{DoxyParamCaption}\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02773}{2773}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, \mbox{\hyperlink{pci_8c_source_l00335}{pci\+\_\+generation}}, and \mbox{\hyperlink{pci_8c_source_l00336}{pci\+\_\+numdevs}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05743}{pci\+\_\+child\+\_\+deleted()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=288pt]{d1/de8/pci_8c_a9ef663424c02f9d0600409665040ed9e_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a75581175bf05c6ab57b32cffdc7a0f33}\label{pci_8c_a75581175bf05c6ab57b32cffdc7a0f33}} 
\index{pci.c@{pci.c}!pci\_get\_device\_path\_method@{pci\_get\_device\_path\_method}}
\index{pci\_get\_device\_path\_method@{pci\_get\_device\_path\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_device\_path\_method()}{pci\_get\_device\_path\_method()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+device\+\_\+path\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{child,  }\item[{const char $\ast$}]{locator,  }\item[{struct sbuf $\ast$}]{sb }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05928}{5928}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, and \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}.

\mbox{\Hypertarget{pci_8c_abe254e666700988dfaf124c5f7bb497a}\label{pci_8c_abe254e666700988dfaf124c5f7bb497a}} 
\index{pci.c@{pci.c}!pci\_get\_dma\_tag@{pci\_get\_dma\_tag}}
\index{pci\_get\_dma\_tag@{pci\_get\_dma\_tag}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_dma\_tag()}{pci\_get\_dma\_tag()}}
{\footnotesize\ttfamily bus\+\_\+dma\+\_\+tag\+\_\+t pci\+\_\+get\+\_\+dma\+\_\+tag (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05842}{5842}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, and \mbox{\hyperlink{pci__private_8h_source_l00044}{pci\+\_\+softc\+::sc\+\_\+dma\+\_\+tag}}.

\mbox{\Hypertarget{pci_8c_a1548c1cbc3af76dbc61535802d13a1ce}\label{pci_8c_a1548c1cbc3af76dbc61535802d13a1ce}} 
\index{pci.c@{pci.c}!pci\_get\_id\_method@{pci\_get\_id\_method}}
\index{pci\_get\_id\_method@{pci\_get\_id\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_id\_method()}{pci\_get\_id\_method()}}
{\footnotesize\ttfamily static int pci\+\_\+get\+\_\+id\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{enum \mbox{\hyperlink{pci__if_8m_ae1632668e86b936e88cc39cadd71d161}{pci\+\_\+id\+\_\+type}}}]{type,  }\item[{uintptr\+\_\+t $\ast$}]{rid }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06322}{6322}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.

\mbox{\Hypertarget{pci_8c_a950511527b670ac9f67f79c7c07f4876}\label{pci_8c_a950511527b670ac9f67f79c7c07f4876}} 
\index{pci.c@{pci.c}!pci\_get\_max\_payload@{pci\_get\_max\_payload}}
\index{pci\_get\_max\_payload@{pci\_get\_max\_payload}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_max\_payload()}{pci\_get\_max\_payload()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+max\+\_\+payload (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02233}{2233}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00817}{PCIEM\+\_\+\+CTL\+\_\+\+MAX\+\_\+\+PAYLOAD}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_a4ed731d8343d25727ca47a8cf0a246e3}\label{pci_8c_a4ed731d8343d25727ca47a8cf0a246e3}} 
\index{pci.c@{pci.c}!pci\_get\_max\_read\_req@{pci\_get\_max\_read\_req}}
\index{pci\_get\_max\_read\_req@{pci\_get\_max\_read\_req}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_max\_read\_req()}{pci\_get\_max\_read\_req()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+max\+\_\+read\+\_\+req (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02249}{2249}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00822}{PCIEM\+\_\+\+CTL\+\_\+\+MAX\+\_\+\+READ\+\_\+\+REQUEST}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_a9158a3b79db3d719fe869606dc63df69}\label{pci_8c_a9158a3b79db3d719fe869606dc63df69}} 
\index{pci.c@{pci.c}!pci\_get\_powerstate\_method@{pci\_get\_powerstate\_method}}
\index{pci\_get\_powerstate\_method@{pci\_get\_powerstate\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_powerstate\_method()}{pci\_get\_powerstate\_method()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+powerstate\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02880}{2880}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00565}{PCIM\+\_\+\+PSTAT\+\_\+\+D0}}, \mbox{\hyperlink{pcireg_8h_source_l00566}{PCIM\+\_\+\+PSTAT\+\_\+\+D1}}, \mbox{\hyperlink{pcireg_8h_source_l00567}{PCIM\+\_\+\+PSTAT\+\_\+\+D2}}, \mbox{\hyperlink{pcireg_8h_source_l00568}{PCIM\+\_\+\+PSTAT\+\_\+\+D3}}, \mbox{\hyperlink{pcireg_8h_source_l00569}{PCIM\+\_\+\+PSTAT\+\_\+\+DMASK}}, \mbox{\hyperlink{pcivar_8h_source_l00216}{pcicfg\+::pp}}, \mbox{\hyperlink{pcivar_8h_source_l00055}{pcicfg\+\_\+pp\+::pp\+\_\+cap}}, \mbox{\hyperlink{pcivar_8h_source_l00056}{pcicfg\+\_\+pp\+::pp\+\_\+status}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00072}{status}}.

\mbox{\Hypertarget{pci_8c_ab210394098b11dd8420c19fd55c48505}\label{pci_8c_ab210394098b11dd8420c19fd55c48505}} 
\index{pci.c@{pci.c}!pci\_get\_relaxed\_ordering\_enabled@{pci\_get\_relaxed\_ordering\_enabled}}
\index{pci\_get\_relaxed\_ordering\_enabled@{pci\_get\_relaxed\_ordering\_enabled}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_relaxed\_ordering\_enabled()}{pci\_get\_relaxed\_ordering\_enabled()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+relaxed\+\_\+ordering\+\_\+enabled (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02218}{2218}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00816}{PCIEM\+\_\+\+CTL\+\_\+\+RELAXED\+\_\+\+ORD\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_a687cd541e0c295f47c911da268547681}\label{pci_8c_a687cd541e0c295f47c911da268547681}} 
\index{pci.c@{pci.c}!pci\_get\_resource\_list@{pci\_get\_resource\_list}}
\index{pci\_get\_resource\_list@{pci\_get\_resource\_list}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_resource\_list()}{pci\_get\_resource\_list()}}
{\footnotesize\ttfamily struct resource\+\_\+list $\ast$ pci\+\_\+get\+\_\+resource\+\_\+list (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05815}{5815}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}.

\mbox{\Hypertarget{pci_8c_ab18d14591e95119cc602e4e94c5fca7b}\label{pci_8c_ab18d14591e95119cc602e4e94c5fca7b}} 
\index{pci.c@{pci.c}!pci\_get\_vpd\_ident\_method@{pci\_get\_vpd\_ident\_method}}
\index{pci\_get\_vpd\_ident\_method@{pci\_get\_vpd\_ident\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_vpd\_ident\_method()}{pci\_get\_vpd\_ident\_method()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+vpd\+\_\+ident\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{const char $\ast$$\ast$}]{identptr }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01390}{1390}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00100}{identptr}}, \mbox{\hyperlink{pci_8c_source_l01088}{pci\+\_\+read\+\_\+vpd()}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00083}{pcicfg\+\_\+vpd\+::vpd\+\_\+cached}}, \mbox{\hyperlink{pcivar_8h_source_l00084}{pcicfg\+\_\+vpd\+::vpd\+\_\+ident}}, and \mbox{\hyperlink{pcivar_8h_source_l00082}{pcicfg\+\_\+vpd\+::vpd\+\_\+reg}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ab18d14591e95119cc602e4e94c5fca7b_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ae08217f145856db7185fb469e69ba334}\label{pci_8c_ae08217f145856db7185fb469e69ba334}} 
\index{pci.c@{pci.c}!pci\_get\_vpd\_readonly\_method@{pci\_get\_vpd\_readonly\_method}}
\index{pci\_get\_vpd\_readonly\_method@{pci\_get\_vpd\_readonly\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_get\_vpd\_readonly\_method()}{pci\_get\_vpd\_readonly\_method()}}
{\footnotesize\ttfamily int pci\+\_\+get\+\_\+vpd\+\_\+readonly\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{const char $\ast$}]{kw,  }\item[{const char $\ast$$\ast$}]{vptr }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01407}{1407}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00069}{vpd\+\_\+readonly\+::keyword}}, \mbox{\hyperlink{pci__if_8m_source_l00106}{kw}}, \mbox{\hyperlink{pci_8c_source_l01088}{pci\+\_\+read\+\_\+vpd()}}, \mbox{\hyperlink{pcivar_8h_source_l00070}{vpd\+\_\+readonly\+::value}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00083}{pcicfg\+\_\+vpd\+::vpd\+\_\+cached}}, \mbox{\hyperlink{pcivar_8h_source_l00082}{pcicfg\+\_\+vpd\+::vpd\+\_\+reg}}, \mbox{\hyperlink{pcivar_8h_source_l00085}{pcicfg\+\_\+vpd\+::vpd\+\_\+rocnt}}, \mbox{\hyperlink{pcivar_8h_source_l00086}{pcicfg\+\_\+vpd\+::vpd\+\_\+ros}}, and \mbox{\hyperlink{pci__if_8m_source_l00107}{vptr}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae08217f145856db7185fb469e69ba334_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a44848107ccf1d7bab049e971c0d04170}\label{pci_8c_a44848107ccf1d7bab049e971c0d04170}} 
\index{pci.c@{pci.c}!pci\_has\_quirk@{pci\_has\_quirk}}
\index{pci\_has\_quirk@{pci\_has\_quirk}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_has\_quirk()}{pci\_has\_quirk()}}
{\footnotesize\ttfamily static int pci\+\_\+has\+\_\+quirk (\begin{DoxyParamCaption}\item[{uint32\+\_\+t}]{devid,  }\item[{int}]{quirk }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00426}{426}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00238}{pci\+\_\+quirk\+::devid}}, \mbox{\hyperlink{pci_8c_source_l00251}{pci\+\_\+quirks}}, and \mbox{\hyperlink{pci_8c_source_l00239}{pci\+\_\+quirk\+::type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02497}{pci\+\_\+msi\+\_\+device\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02566}{pci\+\_\+msix\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02548}{pci\+\_\+msix\+\_\+device\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l04745}{pci\+\_\+setup\+\_\+intr()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a44848107ccf1d7bab049e971c0d04170_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_afe8b116b2ca59407853acfdb983076e5}\label{pci_8c_afe8b116b2ca59407853acfdb983076e5}} 
\index{pci.c@{pci.c}!pci\_hdrtypedata@{pci\_hdrtypedata}}
\index{pci\_hdrtypedata@{pci\_hdrtypedata}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_hdrtypedata()}{pci\_hdrtypedata()}}
{\footnotesize\ttfamily static void pci\+\_\+hdrtypedata (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{int}]{b,  }\item[{int}]{s,  }\item[{int}]{f,  }\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00645}{645}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00050}{pcicfg\+\_\+bridge\+::br\+\_\+control}}, \mbox{\hyperlink{pcivar_8h_source_l00049}{pcicfg\+\_\+bridge\+::br\+\_\+pribus}}, \mbox{\hyperlink{pcivar_8h_source_l00048}{pcicfg\+\_\+bridge\+::br\+\_\+secbus}}, \mbox{\hyperlink{pcivar_8h_source_l00046}{pcicfg\+\_\+bridge\+::br\+\_\+seclat}}, \mbox{\hyperlink{pcivar_8h_source_l00047}{pcicfg\+\_\+bridge\+::br\+\_\+subbus}}, \mbox{\hyperlink{pcivar_8h_source_l00215}{pcicfg\+::bridge}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00202}{pcicfg\+::maxlat}}, \mbox{\hyperlink{pcivar_8h_source_l00201}{pcicfg\+::mingnt}}, \mbox{\hyperlink{pcivar_8h_source_l00206}{pcicfg\+::nummaps}}, \mbox{\hyperlink{pcivar_8h_source_l00038}{PCI\+\_\+\+MAXMAPS\+\_\+0}}, \mbox{\hyperlink{pcivar_8h_source_l00039}{PCI\+\_\+\+MAXMAPS\+\_\+1}}, \mbox{\hyperlink{pcivar_8h_source_l00040}{PCI\+\_\+\+MAXMAPS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00120}{PCIM\+\_\+\+HDRTYPE\+\_\+\+CARDBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00286}{PCIR\+\_\+\+BRIDGECTL\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00316}{PCIR\+\_\+\+BRIDGECTL\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00254}{PCIR\+\_\+\+MAXLAT}}, \mbox{\hyperlink{pcireg_8h_source_l00253}{PCIR\+\_\+\+MINGNT}}, \mbox{\hyperlink{pcireg_8h_source_l00261}{PCIR\+\_\+\+PRIBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00299}{PCIR\+\_\+\+PRIBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00262}{PCIR\+\_\+\+SECBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00300}{PCIR\+\_\+\+SECBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00264}{PCIR\+\_\+\+SECLAT\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00302}{PCIR\+\_\+\+SECLAT\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00263}{PCIR\+\_\+\+SUBBUS\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00301}{PCIR\+\_\+\+SUBBUS\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00246}{PCIR\+\_\+\+SUBDEV\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00319}{PCIR\+\_\+\+SUBDEV\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00245}{PCIR\+\_\+\+SUBVEND\+\_\+0}}, \mbox{\hyperlink{pcireg_8h_source_l00318}{PCIR\+\_\+\+SUBVEND\+\_\+2}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, \mbox{\hyperlink{pcivar_8h_source_l00184}{pcicfg\+::subdevice}}, and \mbox{\hyperlink{pcivar_8h_source_l00183}{pcicfg\+::subvendor}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_afe8b116b2ca59407853acfdb983076e5_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a2a572cf7b81d9316cdce91d5fd782bea}\label{pci_8c_a2a572cf7b81d9316cdce91d5fd782bea}} 
\index{pci.c@{pci.c}!pci\_hint\_device\_unit@{pci\_hint\_device\_unit}}
\index{pci\_hint\_device\_unit@{pci\_hint\_device\_unit}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_hint\_device\_unit()}{pci\_hint\_device\_unit()}}
{\footnotesize\ttfamily static void pci\+\_\+hint\+\_\+device\+\_\+unit (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{acdev,  }\item[{device\+\_\+t}]{child,  }\item[{const char $\ast$}]{name,  }\item[{int $\ast$}]{unitp }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04537}{4537}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, and \mbox{\hyperlink{pci__if_8m_source_l00267}{name}}.

\mbox{\Hypertarget{pci_8c_ae8f753a084a2e25ebe87dc7f7fb7fb83}\label{pci_8c_ae8f753a084a2e25ebe87dc7f7fb7fb83}} 
\index{pci.c@{pci.c}!pci\_ht\_map\_msi@{pci\_ht\_map\_msi}}
\index{pci\_ht\_map\_msi@{pci\_ht\_map\_msi}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_ht\_map\_msi()}{pci\_ht\_map\_msi()}}
{\footnotesize\ttfamily void pci\+\_\+ht\+\_\+map\+\_\+msi (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint64\+\_\+t}]{addr }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02193}{2193}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00165}{addr}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00135}{pcicfg\+\_\+ht\+::ht\+\_\+msiaddr}}, \mbox{\hyperlink{pcivar_8h_source_l00134}{pcicfg\+\_\+ht\+::ht\+\_\+msictrl}}, \mbox{\hyperlink{pcivar_8h_source_l00133}{pcicfg\+\_\+ht\+::ht\+\_\+msimap}}, \mbox{\hyperlink{pcireg_8h_source_l00766}{PCIM\+\_\+\+HTCMD\+\_\+\+MSI\+\_\+\+ENABLE}}, and \mbox{\hyperlink{pcireg_8h_source_l00745}{PCIR\+\_\+\+HT\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02375}{pci\+\_\+disable\+\_\+msi\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02347}{pci\+\_\+enable\+\_\+msi\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l01690}{pci\+\_\+enable\+\_\+msix\+\_\+method()}}, and \mbox{\hyperlink{pci__pci_8c_source_l02820}{pcib\+\_\+map\+\_\+msi()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae8f753a084a2e25ebe87dc7f7fb7fb83_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a7d6bc3b07f27f6251179e94c0a6156cb}\label{pci_8c_a7d6bc3b07f27f6251179e94c0a6156cb}} 
\index{pci.c@{pci.c}!pci\_identify\_function@{pci\_identify\_function}}
\index{pci\_identify\_function@{pci\_identify\_function}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_identify\_function()}{pci\_identify\_function()}}
{\footnotesize\ttfamily static struct pci\+\_\+devinfo $\ast$ pci\+\_\+identify\+\_\+function (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{device\+\_\+t}]{dev,  }\item[{int}]{domain,  }\item[{int}]{busno,  }\item[{int}]{slot,  }\item[{int}]{func }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04131}{4131}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00081}{func}}, \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}, \mbox{\hyperlink{pci_8c_source_l00680}{pci\+\_\+read\+\_\+device()}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, and \mbox{\hyperlink{pcib__if_8m_source_l00080}{slot}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04144}{pci\+\_\+add\+\_\+children()}}, and \mbox{\hyperlink{pci_8c_source_l04191}{pci\+\_\+rescan\+\_\+method()}}.

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\mbox{\Hypertarget{pci_8c_addfc7380b10e667b8b7a1d9c4bcc5f88}\label{pci_8c_addfc7380b10e667b8b7a1d9c4bcc5f88}} 
\index{pci.c@{pci.c}!pci\_load\_vendor\_data@{pci\_load\_vendor\_data}}
\index{pci\_load\_vendor\_data@{pci\_load\_vendor\_data}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_load\_vendor\_data()}{pci\_load\_vendor\_data()}}
{\footnotesize\ttfamily static void pci\+\_\+load\+\_\+vendor\+\_\+data (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04696}{4696}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pci_8c_source_l00234}{pci\+\_\+vendordata}}, and \mbox{\hyperlink{pci_8c_source_l00235}{pci\+\_\+vendordata\+\_\+size}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06005}{pci\+\_\+modevent()}}.

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\mbox{\Hypertarget{pci_8c_a4bd463c3bdc20240a6bb6e156824343a}\label{pci_8c_a4bd463c3bdc20240a6bb6e156824343a}} 
\index{pci.c@{pci.c}!pci\_lookup@{pci\_lookup}}
\index{pci\_lookup@{pci\_lookup}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_lookup()}{pci\_lookup()}}
{\footnotesize\ttfamily static void pci\+\_\+lookup (\begin{DoxyParamCaption}\item[{void $\ast$}]{arg,  }\item[{const char $\ast$}]{name,  }\item[{device\+\_\+t $\ast$}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l05956}{5956}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00081}{func}}, \mbox{\hyperlink{pci__if_8m_source_l00267}{name}}, \mbox{\hyperlink{pcireg_8h_source_l00045}{PCI\+\_\+\+BUSMAX}}, \mbox{\hyperlink{pcireg_8h_source_l00044}{PCI\+\_\+\+DOMAINMAX}}, \mbox{\hyperlink{pci_8c_source_l00449}{pci\+\_\+find\+\_\+dbsf()}}, \mbox{\hyperlink{pcireg_8h_source_l00047}{PCI\+\_\+\+FUNCMAX}}, \mbox{\hyperlink{pcireg_8h_source_l00046}{PCI\+\_\+\+SLOTMAX}}, \mbox{\hyperlink{pcireg_8h_source_l00053}{PCIE\+\_\+\+ARI\+\_\+\+FUNCMAX}}, \mbox{\hyperlink{pcib__if_8m_source_l00080}{slot}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06005}{pci\+\_\+modevent()}}.

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\mbox{\Hypertarget{pci_8c_a3785d14fcd3e7c0dac56ad7165627783}\label{pci_8c_a3785d14fcd3e7c0dac56ad7165627783}} 
\index{pci.c@{pci.c}!pci\_mapbase@{pci\_mapbase}}
\index{pci\_mapbase@{pci\_mapbase}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_mapbase()}{pci\_mapbase()}}
{\footnotesize\ttfamily static \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} pci\+\_\+mapbase (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{mapreg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00536}{536}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00220}{PCI\+\_\+\+BAR\+\_\+\+MEM}}, \mbox{\hyperlink{pcireg_8h_source_l00231}{PCIM\+\_\+\+BAR\+\_\+\+IO\+\_\+\+BASE}}, and \mbox{\hyperlink{pcireg_8h_source_l00229}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+\+BASE}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l03429}{pci\+\_\+ata\+\_\+maps()}}, and \mbox{\hyperlink{pci_8c_source_l00561}{pci\+\_\+mapsize()}}.

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\end{figure}
\mbox{\Hypertarget{pci_8c_ac6a13619b6ada519295eaecb726625e1}\label{pci_8c_ac6a13619b6ada519295eaecb726625e1}} 
\index{pci.c@{pci.c}!pci\_maprange@{pci\_maprange}}
\index{pci\_maprange@{pci\_maprange}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_maprange()}{pci\_maprange()}}
{\footnotesize\ttfamily static int pci\+\_\+maprange (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{mapreg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00608}{608}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00219}{PCI\+\_\+\+BAR\+\_\+\+IO}}, \mbox{\hyperlink{pcireg_8h_source_l00226}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+1\+MB}}, \mbox{\hyperlink{pcireg_8h_source_l00225}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+32}}, \mbox{\hyperlink{pcireg_8h_source_l00227}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+64}}, and \mbox{\hyperlink{pcireg_8h_source_l00224}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+\+TYPE}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l03064}{pci\+\_\+read\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l03228}{pci\+\_\+restore\+\_\+bars()}}, and \mbox{\hyperlink{pci_8c_source_l03141}{pci\+\_\+write\+\_\+bar()}}.

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\end{figure}
\mbox{\Hypertarget{pci_8c_a71223697e6c3abc9e4c2a8f70be9ea5e}\label{pci_8c_a71223697e6c3abc9e4c2a8f70be9ea5e}} 
\index{pci.c@{pci.c}!pci\_mapsize@{pci\_mapsize}}
\index{pci\_mapsize@{pci\_mapsize}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_mapsize()}{pci\_mapsize()}}
{\footnotesize\ttfamily int pci\+\_\+mapsize (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{testval }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00561}{561}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00536}{pci\+\_\+mapbase()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci__iov_8c_source_l00543}{pci\+\_\+iov\+\_\+alloc\+\_\+bar\+\_\+ea()}}, \mbox{\hyperlink{pci__iov_8c_source_l00574}{pci\+\_\+iov\+\_\+setup\+\_\+bars()}}, and \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

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\mbox{\Hypertarget{pci_8c_af223a7ac70786dff6609f45cfd718ac8}\label{pci_8c_af223a7ac70786dff6609f45cfd718ac8}} 
\index{pci.c@{pci.c}!pci\_maptype@{pci\_maptype}}
\index{pci\_maptype@{pci\_maptype}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_maptype()}{pci\_maptype()}}
{\footnotesize\ttfamily static const char $\ast$ pci\+\_\+maptype (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{mapreg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00548}{548}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00219}{PCI\+\_\+\+BAR\+\_\+\+IO}}, and \mbox{\hyperlink{pcireg_8h_source_l00228}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+\+PREFETCH}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

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\mbox{\Hypertarget{pci_8c_a46b9beaf9bbb19656aa660f06c34f3b4}\label{pci_8c_a46b9beaf9bbb19656aa660f06c34f3b4}} 
\index{pci.c@{pci.c}!pci\_mask\_msix@{pci\_mask\_msix}}
\index{pci\_mask\_msix@{pci\_mask\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_mask\_msix()}{pci\_mask\_msix()}}
{\footnotesize\ttfamily void pci\+\_\+mask\+\_\+msix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{index }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01718}{1718}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00204}{index}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00120}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00126}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+res}}, \mbox{\hyperlink{pcireg_8h_source_l00976}{PCIM\+\_\+\+MSIX\+\_\+\+VCTRL\+\_\+\+MASK}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01808}{pci\+\_\+alloc\+\_\+msix\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02421}{pci\+\_\+remap\+\_\+intr\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l01774}{pci\+\_\+resume\+\_\+msix()}}, and \mbox{\hyperlink{pci_8c_source_l04853}{pci\+\_\+teardown\+\_\+intr()}}.

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\mbox{\Hypertarget{pci_8c_ae3a91095e44db1ebec2cb32d23478bf8}\label{pci_8c_ae3a91095e44db1ebec2cb32d23478bf8}} 
\index{pci.c@{pci.c}!pci\_match\_device@{pci\_match\_device}}
\index{pci\_match\_device@{pci\_match\_device}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_match\_device()}{pci\_match\_device()}}
{\footnotesize\ttfamily const struct \mbox{\hyperlink{structpci__device__table}{pci\+\_\+device\+\_\+table}} $\ast$ pci\+\_\+match\+\_\+device (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{child,  }\item[{const struct \mbox{\hyperlink{structpci__device__table}{pci\+\_\+device\+\_\+table}} $\ast$}]{id,  }\item[{size\+\_\+t}]{nelt }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06682}{6682}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00292}{pci\+\_\+device\+\_\+table\+::device}}, \mbox{\hyperlink{pci__if_8m_source_l00250}{id}}, \mbox{\hyperlink{pcivar_8h_source_l00297}{pci\+\_\+device\+\_\+table\+::revid}}, \mbox{\hyperlink{pci_8c_source_l04941}{subclass}}, \mbox{\hyperlink{pcivar_8h_source_l00294}{pci\+\_\+device\+\_\+table\+::subdevice}}, \mbox{\hyperlink{pcivar_8h_source_l00293}{pci\+\_\+device\+\_\+table\+::subvendor}}, and \mbox{\hyperlink{pcivar_8h_source_l00291}{pci\+\_\+device\+\_\+table\+::vendor}}.

\mbox{\Hypertarget{pci_8c_ab21a5faf9ac66f7ac0c0e24869c25849}\label{pci_8c_ab21a5faf9ac66f7ac0c0e24869c25849}} 
\index{pci.c@{pci.c}!pci\_memen@{pci\_memen}}
\index{pci\_memen@{pci\_memen}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_memen()}{pci\_memen()}}
{\footnotesize\ttfamily static int pci\+\_\+memen (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03058}{3058}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

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\mbox{\Hypertarget{pci_8c_abfeb3e04b96d2c915a90cb25296d7802}\label{pci_8c_abfeb3e04b96d2c915a90cb25296d7802}} 
\index{pci.c@{pci.c}!pci\_modevent@{pci\_modevent}}
\index{pci\_modevent@{pci\_modevent}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_modevent()}{pci\_modevent()}}
{\footnotesize\ttfamily static int pci\+\_\+modevent (\begin{DoxyParamCaption}\item[{module\+\_\+t}]{mod,  }\item[{int}]{what,  }\item[{void $\ast$}]{arg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06005}{6005}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, \mbox{\hyperlink{pci_8c_source_l00335}{pci\+\_\+generation}}, \mbox{\hyperlink{pci_8c_source_l04696}{pci\+\_\+load\+\_\+vendor\+\_\+data()}}, \mbox{\hyperlink{pci_8c_source_l05956}{pci\+\_\+lookup()}}, and \mbox{\hyperlink{pci__user_8c_source_l00119}{pcicdev}}.

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\mbox{\Hypertarget{pci_8c_a0458cdddce625bfd8b2858cb46dc9b12}\label{pci_8c_a0458cdddce625bfd8b2858cb46dc9b12}} 
\index{pci.c@{pci.c}!pci\_msi\_blacklisted@{pci\_msi\_blacklisted}}
\index{pci\_msi\_blacklisted@{pci\_msi\_blacklisted}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msi\_blacklisted()}{pci\_msi\_blacklisted()}}
{\footnotesize\ttfamily static int pci\+\_\+msi\+\_\+blacklisted (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02514}{2514}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00440}{pci\+\_\+find\+\_\+bsf()}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00387}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}}, \mbox{\hyperlink{pci_8c_source_l02497}{pci\+\_\+msi\+\_\+device\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l00242}{PCI\+\_\+\+QUIRK\+\_\+\+ENABLE\+\_\+\+MSI\+\_\+\+VM}}, \mbox{\hyperlink{pci_8c_source_l00337}{pcie\+\_\+chipset}}, and \mbox{\hyperlink{pci_8c_source_l00337}{pcix\+\_\+chipset}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02587}{pci\+\_\+alloc\+\_\+msi\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l02566}{pci\+\_\+msix\+\_\+blacklisted()}}.

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\mbox{\Hypertarget{pci_8c_a821e9e1713b3e9299b147fbd5f046817}\label{pci_8c_a821e9e1713b3e9299b147fbd5f046817}} 
\index{pci.c@{pci.c}!pci\_msi\_count\_method@{pci\_msi\_count\_method}}
\index{pci\_msi\_count\_method@{pci\_msi\_count\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msi\_count\_method()}{pci\_msi\_count\_method()}}
{\footnotesize\ttfamily int pci\+\_\+msi\+\_\+count\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02760}{2760}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00095}{pcicfg\+\_\+msi\+::msi\+\_\+msgnum}}, and \mbox{\hyperlink{pci_8c_source_l00374}{pci\+\_\+do\+\_\+msi}}.

\mbox{\Hypertarget{pci_8c_a4c8bbc181c543d51a9a66e6e446067ef}\label{pci_8c_a4c8bbc181c543d51a9a66e6e446067ef}} 
\index{pci.c@{pci.c}!pci\_msi\_device\_blacklisted@{pci\_msi\_device\_blacklisted}}
\index{pci\_msi\_device\_blacklisted@{pci\_msi\_device\_blacklisted}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msi\_device\_blacklisted()}{pci\_msi\_device\_blacklisted()}}
{\footnotesize\ttfamily int pci\+\_\+msi\+\_\+device\+\_\+blacklisted (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02497}{2497}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00387}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}}, and \mbox{\hyperlink{pci_8c_source_l00241}{PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSI}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02548}{pci\+\_\+msix\+\_\+device\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci__pci_8c_source_l01537}{pcib\+\_\+attach\+\_\+common()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=349pt]{d1/de8/pci_8c_a4c8bbc181c543d51a9a66e6e446067ef_cgraph}
\end{center}
\end{figure}
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a4c8bbc181c543d51a9a66e6e446067ef_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a1d97bc22c3980045405d3f50264c15b8}\label{pci_8c_a1d97bc22c3980045405d3f50264c15b8}} 
\index{pci.c@{pci.c}!pci\_msix\_blacklisted@{pci\_msix\_blacklisted}}
\index{pci\_msix\_blacklisted@{pci\_msix\_blacklisted}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_blacklisted()}{pci\_msix\_blacklisted()}}
{\footnotesize\ttfamily static int pci\+\_\+msix\+\_\+blacklisted (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02566}{2566}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00440}{pci\+\_\+find\+\_\+bsf()}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00387}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}}, \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l00244}{PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSIX}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01808}{pci\+\_\+alloc\+\_\+msix\+\_\+method()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1d97bc22c3980045405d3f50264c15b8_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a1d97bc22c3980045405d3f50264c15b8_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0ef5afc1341c6629ac0de5ca7189edb0}\label{pci_8c_a0ef5afc1341c6629ac0de5ca7189edb0}} 
\index{pci.c@{pci.c}!pci\_msix\_count\_method@{pci\_msix\_count\_method}}
\index{pci\_msix\_count\_method@{pci\_msix\_count\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_count\_method()}{pci\_msix\_count\_method()}}
{\footnotesize\ttfamily int pci\+\_\+msix\+\_\+count\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02157}{2157}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, and \mbox{\hyperlink{pci_8c_source_l00378}{pci\+\_\+do\+\_\+msix}}.

\mbox{\Hypertarget{pci_8c_ad33f29ddee30042f05af0e0057d34658}\label{pci_8c_ad33f29ddee30042f05af0e0057d34658}} 
\index{pci.c@{pci.c}!pci\_msix\_device\_blacklisted@{pci\_msix\_device\_blacklisted}}
\index{pci\_msix\_device\_blacklisted@{pci\_msix\_device\_blacklisted}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_device\_blacklisted()}{pci\_msix\_device\_blacklisted()}}
{\footnotesize\ttfamily int pci\+\_\+msix\+\_\+device\+\_\+blacklisted (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02548}{2548}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00387}{pci\+\_\+honor\+\_\+msi\+\_\+blacklist}}, \mbox{\hyperlink{pci_8c_source_l02497}{pci\+\_\+msi\+\_\+device\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l00244}{PCI\+\_\+\+QUIRK\+\_\+\+DISABLE\+\_\+\+MSIX}}.



Referenced by \mbox{\hyperlink{pci__pci_8c_source_l01537}{pcib\+\_\+attach\+\_\+common()}}.

Here is the call graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad33f29ddee30042f05af0e0057d34658_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad33f29ddee30042f05af0e0057d34658_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a9eb4015f4de813990d0baf7760508cd6}\label{pci_8c_a9eb4015f4de813990d0baf7760508cd6}} 
\index{pci.c@{pci.c}!pci\_msix\_pba\_bar\_method@{pci\_msix\_pba\_bar\_method}}
\index{pci\_msix\_pba\_bar\_method@{pci\_msix\_pba\_bar\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_pba\_bar\_method()}{pci\_msix\_pba\_bar\_method()}}
{\footnotesize\ttfamily int pci\+\_\+msix\+\_\+pba\+\_\+bar\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02168}{2168}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00119}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+bar}}, and \mbox{\hyperlink{pci_8c_source_l00378}{pci\+\_\+do\+\_\+msix}}.

\mbox{\Hypertarget{pci_8c_a992d3ed8034614ed4782bef89e4cf6c5}\label{pci_8c_a992d3ed8034614ed4782bef89e4cf6c5}} 
\index{pci.c@{pci.c}!pci\_msix\_table\_bar\_method@{pci\_msix\_table\_bar\_method}}
\index{pci\_msix\_table\_bar\_method@{pci\_msix\_table\_bar\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_table\_bar\_method()}{pci\_msix\_table\_bar\_method()}}
{\footnotesize\ttfamily int pci\+\_\+msix\+\_\+table\+\_\+bar\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02179}{2179}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00118}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+bar}}, and \mbox{\hyperlink{pci_8c_source_l00378}{pci\+\_\+do\+\_\+msix}}.

\mbox{\Hypertarget{pci_8c_a76f605b79a9d834c7f3df1135a693348}\label{pci_8c_a76f605b79a9d834c7f3df1135a693348}} 
\index{pci.c@{pci.c}!pci\_pending\_msix@{pci\_pending\_msix}}
\index{pci\_pending\_msix@{pci\_pending\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_pending\_msix()}{pci\_pending\_msix()}}
{\footnotesize\ttfamily int pci\+\_\+pending\+\_\+msix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{index }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01756}{1756}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00204}{index}}, \mbox{\hyperlink{pcivar_8h_source_l00121}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00127}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+res}}, and \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}.

\mbox{\Hypertarget{pci_8c_a139c8cc02beb3bb443fc36da4046c94c}\label{pci_8c_a139c8cc02beb3bb443fc36da4046c94c}} 
\index{pci.c@{pci.c}!pci\_porten@{pci\_porten}}
\index{pci\_porten@{pci\_porten}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_porten()}{pci\_porten()}}
{\footnotesize\ttfamily static int pci\+\_\+porten (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03052}{3052}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

Here is the caller graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a139c8cc02beb3bb443fc36da4046c94c_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a907c9950f25741a7b55ea4b0a97c49bd}\label{pci_8c_a907c9950f25741a7b55ea4b0a97c49bd}} 
\index{pci.c@{pci.c}!pci\_power\_reset@{pci\_power\_reset}}
\index{pci\_power\_reset@{pci\_power\_reset}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_power\_reset()}{pci\_power\_reset()}}
{\footnotesize\ttfamily int pci\+\_\+power\+\_\+reset (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06599}{6599}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06654}{pci\+\_\+reset\+\_\+child()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=301pt]{d1/de8/pci_8c_a907c9950f25741a7b55ea4b0a97c49bd_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a7ea4157a828315e13933c7177c518019}\label{pci_8c_a7ea4157a828315e13933c7177c518019}} 
\index{pci.c@{pci.c}!pci\_print\_child@{pci\_print\_child}}
\index{pci\_print\_child@{pci\_print\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_print\_child()}{pci\_print\_child()}}
{\footnotesize\ttfamily int pci\+\_\+print\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04912}{4912}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, and \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}.

\mbox{\Hypertarget{pci_8c_a64e9bf901da71a67d9dc09711194cb97}\label{pci_8c_a64e9bf901da71a67d9dc09711194cb97}} 
\index{pci.c@{pci.c}!pci\_print\_faulted\_dev@{pci\_print\_faulted\_dev}}
\index{pci\_print\_faulted\_dev@{pci\_print\_faulted\_dev}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_print\_faulted\_dev()}{pci\_print\_faulted\_dev()}}
{\footnotesize\ttfamily void pci\+\_\+print\+\_\+faulted\+\_\+dev (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06732}{6732}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00334}{pci\+\_\+devq}}, \mbox{\hyperlink{pci_8c_source_l06718}{pci\+\_\+print\+\_\+faulted\+\_\+dev\+\_\+name()}}, \mbox{\hyperlink{pcireg_8h_source_l00826}{PCIEM\+\_\+\+STA\+\_\+\+CORRECTABLE\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00828}{PCIEM\+\_\+\+STA\+\_\+\+FATAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00827}{PCIEM\+\_\+\+STA\+\_\+\+NON\+\_\+\+FATAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00829}{PCIEM\+\_\+\+STA\+\_\+\+UNSUPPORTED\+\_\+\+REQ}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00825}{PCIER\+\_\+\+DEVICE\+\_\+\+STA}}, \mbox{\hyperlink{pcireg_8h_source_l00100}{PCIM\+\_\+\+STATUS\+\_\+\+MDPERR}}, \mbox{\hyperlink{pcireg_8h_source_l00109}{PCIM\+\_\+\+STATUS\+\_\+\+PERR}}, \mbox{\hyperlink{pcireg_8h_source_l00107}{PCIM\+\_\+\+STATUS\+\_\+\+RMABORT}}, \mbox{\hyperlink{pcireg_8h_source_l00106}{PCIM\+\_\+\+STATUS\+\_\+\+RTABORT}}, \mbox{\hyperlink{pcireg_8h_source_l00108}{PCIM\+\_\+\+STATUS\+\_\+\+SERR}}, \mbox{\hyperlink{pcireg_8h_source_l00105}{PCIM\+\_\+\+STATUS\+\_\+\+STABORT}}, \mbox{\hyperlink{pcireg_8h_source_l01018}{PCIR\+\_\+\+AER\+\_\+\+CAP\+\_\+\+CONTROL}}, \mbox{\hyperlink{pcireg_8h_source_l01017}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l01008}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l01027}{PCIR\+\_\+\+AER\+\_\+\+HEADER\+\_\+\+LOG}}, \mbox{\hyperlink{pcireg_8h_source_l01006}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l01007}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+SEVERITY}}, \mbox{\hyperlink{pcireg_8h_source_l00988}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l00095}{PCIR\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l00168}{PCIZ\+\_\+\+AER}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00072}{status}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a64e9bf901da71a67d9dc09711194cb97_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_af772425b4b289d76e968cd6dc2735a52}\label{pci_8c_af772425b4b289d76e968cd6dc2735a52}} 
\index{pci.c@{pci.c}!pci\_print\_faulted\_dev\_name@{pci\_print\_faulted\_dev\_name}}
\index{pci\_print\_faulted\_dev\_name@{pci\_print\_faulted\_dev\_name}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_print\_faulted\_dev\_name()}{pci\_print\_faulted\_dev\_name()}}
{\footnotesize\ttfamily static void pci\+\_\+print\+\_\+faulted\+\_\+dev\+\_\+name (\begin{DoxyParamCaption}\item[{const struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06718}{6718}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06732}{pci\+\_\+print\+\_\+faulted\+\_\+dev()}}.

Here is the caller graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_af772425b4b289d76e968cd6dc2735a52_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a2a1a14ca4a86b5428eb13ad88749e48b}\label{pci_8c_a2a1a14ca4a86b5428eb13ad88749e48b}} 
\index{pci.c@{pci.c}!pci\_print\_verbose@{pci\_print\_verbose}}
\index{pci\_print\_verbose@{pci\_print\_verbose}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_print\_verbose()}{pci\_print\_verbose()}}
{\footnotesize\ttfamily void pci\+\_\+print\+\_\+verbose (\begin{DoxyParamCaption}\item[{struct pci\+\_\+devinfo $\ast$}]{dinfo }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02995}{2995}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00191}{pcicfg\+::baseclass}}, \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcivar_8h_source_l00197}{pcicfg\+::cachelnsz}}, \mbox{\hyperlink{pcivar_8h_source_l00188}{pcicfg\+::cmdreg}}, \mbox{\hyperlink{pcivar_8h_source_l00179}{pcicfg\+::dev}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcivar_8h_source_l00203}{pcicfg\+::lattimer}}, \mbox{\hyperlink{pcivar_8h_source_l00202}{pcicfg\+::maxlat}}, \mbox{\hyperlink{pcivar_8h_source_l00205}{pcicfg\+::mfdev}}, \mbox{\hyperlink{pcivar_8h_source_l00201}{pcicfg\+::mingnt}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00095}{pcicfg\+\_\+msi\+::msi\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00119}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+bar}}, \mbox{\hyperlink{pcivar_8h_source_l00118}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+bar}}, \mbox{\hyperlink{pcireg_8h_source_l00602}{PCIM\+\_\+\+MSICTRL\+\_\+64\+BIT}}, \mbox{\hyperlink{pcireg_8h_source_l00601}{PCIM\+\_\+\+MSICTRL\+\_\+\+VECTOR}}, \mbox{\hyperlink{pcireg_8h_source_l00556}{PCIM\+\_\+\+PCAP\+\_\+\+D1\+SUPP}}, \mbox{\hyperlink{pcireg_8h_source_l00557}{PCIM\+\_\+\+PCAP\+\_\+\+D2\+SUPP}}, \mbox{\hyperlink{pcireg_8h_source_l00544}{PCIM\+\_\+\+PCAP\+\_\+\+SPEC}}, \mbox{\hyperlink{pcireg_8h_source_l00569}{PCIM\+\_\+\+PSTAT\+\_\+\+DMASK}}, \mbox{\hyperlink{pcivar_8h_source_l00216}{pcicfg\+::pp}}, \mbox{\hyperlink{pcivar_8h_source_l00055}{pcicfg\+\_\+pp\+::pp\+\_\+cap}}, \mbox{\hyperlink{pcivar_8h_source_l00056}{pcicfg\+\_\+pp\+::pp\+\_\+status}}, \mbox{\hyperlink{pcivar_8h_source_l00193}{pcicfg\+::progif}}, \mbox{\hyperlink{pcivar_8h_source_l00194}{pcicfg\+::revid}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pcivar_8h_source_l00189}{pcicfg\+::statreg}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00072}{status}}, \mbox{\hyperlink{pcivar_8h_source_l00192}{pcicfg\+::subclass}}, and \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}, and \mbox{\hyperlink{pci_8c_source_l04716}{pci\+\_\+driver\+\_\+added()}}.

Here is the caller graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a2a1a14ca4a86b5428eb13ad88749e48b_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_abadbf043b16b3fd045a67723cd30a70c}\label{pci_8c_abadbf043b16b3fd045a67723cd30a70c}} 
\index{pci.c@{pci.c}!pci\_printf@{pci\_printf}}
\index{pci\_printf@{pci\_printf}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_printf()}{pci\_printf()}}
{\footnotesize\ttfamily static int pci\+\_\+printf (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg,  }\item[{const char $\ast$}]{fmt,  }\item[{}]{... }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00520}{520}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, and \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04356}{pci\+\_\+add\+\_\+child\+\_\+clear\+\_\+aer()}}, \mbox{\hyperlink{pci_8c_source_l05743}{pci\+\_\+child\+\_\+deleted()}}, \mbox{\hyperlink{pci_8c_source_l05084}{pci\+\_\+child\+\_\+detached()}}, \mbox{\hyperlink{pci_8c_source_l04716}{pci\+\_\+driver\+\_\+added()}}, \mbox{\hyperlink{pci_8c_source_l01088}{pci\+\_\+read\+\_\+vpd()}}, \mbox{\hyperlink{pci_8c_source_l02808}{pci\+\_\+set\+\_\+powerstate\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l06536}{pcie\+\_\+flr()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_abadbf043b16b3fd045a67723cd30a70c_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_af66a91ed02fd763097636264aed16dd2}\label{pci_8c_af66a91ed02fd763097636264aed16dd2}} 
\index{pci.c@{pci.c}!pci\_probe@{pci\_probe}}
\index{pci\_probe@{pci\_probe}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_probe()}{pci\_probe()}}
{\footnotesize\ttfamily static int pci\+\_\+probe (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04458}{4458}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}.

\mbox{\Hypertarget{pci_8c_a0e067cba786db882bf77038a8f85170c}\label{pci_8c_a0e067cba786db882bf77038a8f85170c}} 
\index{pci.c@{pci.c}!pci\_probe\_nomatch@{pci\_probe\_nomatch}}
\index{pci\_probe\_nomatch@{pci\_probe\_nomatch}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_probe\_nomatch()}{pci\_probe\_nomatch()}}
{\footnotesize\ttfamily void pci\+\_\+probe\+\_\+nomatch (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05037}{5037}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}, \mbox{\hyperlink{pci_8c_source_l05195}{pci\+\_\+describe\+\_\+device()}}, \mbox{\hyperlink{pci_8c_ada8365000d4768345c7dbc1045dc1abc}{pci\+\_\+nomatch\+\_\+tab}}, \mbox{\hyperlink{pci_8c_source_l04942}{report}}, and \mbox{\hyperlink{pci_8c_source_l04941}{subclass}}.

Here is the call graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a0e067cba786db882bf77038a8f85170c_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ae7fe6e23423ba53de45f4c7501d1dfbf}\label{pci_8c_ae7fe6e23423ba53de45f4c7501d1dfbf}} 
\index{pci.c@{pci.c}!pci\_read\_bar@{pci\_read\_bar}}
\index{pci\_read\_bar@{pci\_read\_bar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_bar()}{pci\_read\_bar()}}
{\footnotesize\ttfamily void pci\+\_\+read\+\_\+bar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{\mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} $\ast$}]{mapp,  }\item[{\mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} $\ast$}]{testvalp,  }\item[{int $\ast$}]{bar64 }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l03064}{3064}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00220}{PCI\+\_\+\+BAR\+\_\+\+MEM}}, \mbox{\hyperlink{pci_8c_source_l00608}{pci\+\_\+maprange()}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci__iov_8c_source_l00574}{pci\+\_\+iov\+\_\+setup\+\_\+bars()}}, and \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

Here is the call graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=281pt]{d1/de8/pci_8c_ae7fe6e23423ba53de45f4c7501d1dfbf_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ae7fe6e23423ba53de45f4c7501d1dfbf_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a9cc9d31a2b7ebd56cf9fe47eb64b60b2}\label{pci_8c_a9cc9d31a2b7ebd56cf9fe47eb64b60b2}} 
\index{pci.c@{pci.c}!pci\_read\_cap@{pci\_read\_cap}}
\index{pci\_read\_cap@{pci\_read\_cap}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_cap()}{pci\_read\_cap()}}
{\footnotesize\ttfamily static void pci\+\_\+read\+\_\+cap (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00843}{843}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00165}{addr}}, \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00225}{pcicfg\+::ea}}, \mbox{\hyperlink{pcivar_8h_source_l00171}{pcicfg\+\_\+ea\+::ea\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00220}{pcicfg\+::ht}}, \mbox{\hyperlink{pcivar_8h_source_l00135}{pcicfg\+\_\+ht\+::ht\+\_\+msiaddr}}, \mbox{\hyperlink{pcivar_8h_source_l00134}{pcicfg\+\_\+ht\+::ht\+\_\+msictrl}}, \mbox{\hyperlink{pcivar_8h_source_l00133}{pcicfg\+\_\+ht\+::ht\+\_\+msimap}}, \mbox{\hyperlink{pcivar_8h_source_l00132}{pcicfg\+\_\+ht\+::ht\+\_\+slave}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00095}{pcicfg\+\_\+msi\+::msi\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00115}{pcicfg\+\_\+msix\+::msix\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00119}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+bar}}, \mbox{\hyperlink{pcivar_8h_source_l00121}{pcicfg\+\_\+msix\+::msix\+\_\+pba\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00118}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+bar}}, \mbox{\hyperlink{pcivar_8h_source_l00120}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+offset}}, \mbox{\hyperlink{pci_8c_source_l00769}{pci\+\_\+ea\+\_\+fill\+\_\+info()}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcireg_8h_source_l00129}{PCICAP\+\_\+\+ID}}, \mbox{\hyperlink{pcireg_8h_source_l00130}{PCICAP\+\_\+\+NEXTPTR}}, \mbox{\hyperlink{pcivar_8h_source_l00221}{pcicfg\+::pcie}}, \mbox{\hyperlink{pci_8c_source_l00337}{pcie\+\_\+chipset}}, \mbox{\hyperlink{pcivar_8h_source_l00140}{pcicfg\+\_\+pcie\+::pcie\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00141}{pcicfg\+\_\+pcie\+::pcie\+\_\+type}}, \mbox{\hyperlink{pcireg_8h_source_l00789}{PCIEM\+\_\+\+FLAGS\+\_\+\+TYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00787}{PCIER\+\_\+\+FLAGS}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00120}{PCIM\+\_\+\+HDRTYPE\+\_\+\+CARDBUS}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcireg_8h_source_l00755}{PCIM\+\_\+\+HTCAP\+\_\+\+MSI\+\_\+\+MAPPING}}, \mbox{\hyperlink{pcireg_8h_source_l00747}{PCIM\+\_\+\+HTCAP\+\_\+\+SLAVE}}, \mbox{\hyperlink{pcireg_8h_source_l00746}{PCIM\+\_\+\+HTCMD\+\_\+\+CAP\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00766}{PCIM\+\_\+\+HTCMD\+\_\+\+MSI\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00767}{PCIM\+\_\+\+HTCMD\+\_\+\+MSI\+\_\+\+FIXED}}, \mbox{\hyperlink{pcireg_8h_source_l00610}{PCIM\+\_\+\+MSICTRL\+\_\+\+MMC\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00969}{PCIM\+\_\+\+MSIX\+\_\+\+BIR\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l00966}{PCIM\+\_\+\+MSIXCTRL\+\_\+\+TABLE\+\_\+\+SIZE}}, \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, \mbox{\hyperlink{pcireg_8h_source_l00250}{PCIR\+\_\+\+CAP\+\_\+\+PTR}}, \mbox{\hyperlink{pcireg_8h_source_l00296}{PCIR\+\_\+\+CAP\+\_\+\+PTR\+\_\+2}}, \mbox{\hyperlink{pcireg_8h_source_l00745}{PCIR\+\_\+\+HT\+\_\+\+COMMAND}}, \mbox{\hyperlink{pcireg_8h_source_l00769}{PCIR\+\_\+\+HTMSI\+\_\+\+ADDRESS\+\_\+\+HI}}, \mbox{\hyperlink{pcireg_8h_source_l00768}{PCIR\+\_\+\+HTMSI\+\_\+\+ADDRESS\+\_\+\+LO}}, \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}, \mbox{\hyperlink{pcireg_8h_source_l00963}{PCIR\+\_\+\+MSIX\+\_\+\+CTRL}}, \mbox{\hyperlink{pcireg_8h_source_l00968}{PCIR\+\_\+\+MSIX\+\_\+\+PBA}}, \mbox{\hyperlink{pcireg_8h_source_l00967}{PCIR\+\_\+\+MSIX\+\_\+\+TABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00588}{PCIR\+\_\+\+POWER\+\_\+\+BSE}}, \mbox{\hyperlink{pcireg_8h_source_l00543}{PCIR\+\_\+\+POWER\+\_\+\+CAP}}, \mbox{\hyperlink{pcireg_8h_source_l00593}{PCIR\+\_\+\+POWER\+\_\+\+DATA}}, \mbox{\hyperlink{pcireg_8h_source_l00564}{PCIR\+\_\+\+POWER\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l00784}{PCIR\+\_\+\+SUBVENDCAP\+\_\+\+ID}}, \mbox{\hyperlink{pcivar_8h_source_l00222}{pcicfg\+::pcix}}, \mbox{\hyperlink{pci_8c_source_l00337}{pcix\+\_\+chipset}}, \mbox{\hyperlink{pcivar_8h_source_l00154}{pcicfg\+\_\+pcix\+::pcix\+\_\+location}}, \mbox{\hyperlink{pcireg_8h_source_l00153}{PCIY\+\_\+\+EA}}, \mbox{\hyperlink{pcireg_8h_source_l00149}{PCIY\+\_\+\+EXPRESS}}, \mbox{\hyperlink{pcireg_8h_source_l00141}{PCIY\+\_\+\+HT}}, \mbox{\hyperlink{pcireg_8h_source_l00138}{PCIY\+\_\+\+MSI}}, \mbox{\hyperlink{pcireg_8h_source_l00150}{PCIY\+\_\+\+MSIX}}, \mbox{\hyperlink{pcireg_8h_source_l00140}{PCIY\+\_\+\+PCIX}}, \mbox{\hyperlink{pcireg_8h_source_l00134}{PCIY\+\_\+\+PMG}}, \mbox{\hyperlink{pcireg_8h_source_l00146}{PCIY\+\_\+\+SUBVENDOR}}, \mbox{\hyperlink{pcireg_8h_source_l00136}{PCIY\+\_\+\+VPD}}, \mbox{\hyperlink{pcivar_8h_source_l00216}{pcicfg\+::pp}}, \mbox{\hyperlink{pcivar_8h_source_l00057}{pcicfg\+\_\+pp\+::pp\+\_\+bse}}, \mbox{\hyperlink{pcivar_8h_source_l00055}{pcicfg\+\_\+pp\+::pp\+\_\+cap}}, \mbox{\hyperlink{pcivar_8h_source_l00058}{pcicfg\+\_\+pp\+::pp\+\_\+data}}, \mbox{\hyperlink{pcivar_8h_source_l00056}{pcicfg\+\_\+pp\+::pp\+\_\+status}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pcivar_8h_source_l00184}{pcicfg\+::subdevice}}, \mbox{\hyperlink{pcivar_8h_source_l00183}{pcicfg\+::subvendor}}, \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00082}{pcicfg\+\_\+vpd\+::vpd\+\_\+reg}}, and \mbox{\hyperlink{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}{WREG}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}.

Here is the call graph for this function\+:
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=285pt]{d1/de8/pci_8c_a9cc9d31a2b7ebd56cf9fe47eb64b60b2_cgraph}
\end{center}
\end{figure}
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a9cc9d31a2b7ebd56cf9fe47eb64b60b2_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a5f4857ab2bc3ed595b59e6faee7cf4b1}\label{pci_8c_a5f4857ab2bc3ed595b59e6faee7cf4b1}} 
\index{pci.c@{pci.c}!pci\_read\_config\_method@{pci\_read\_config\_method}}
\index{pci\_read\_config\_method@{pci\_read\_config\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_config\_method()}{pci\_read\_config\_method()}}
{\footnotesize\ttfamily uint32\+\_\+t pci\+\_\+read\+\_\+config\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{reg,  }\item[{int}]{width }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05851}{5851}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pcivar_8h_source_l00213}{pcicfg\+::flags}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pcivar_8h_source_l00175}{PCICFG\+\_\+\+VF}}, \mbox{\hyperlink{pcireg_8h_source_l00084}{PCIR\+\_\+\+DEVICE}}, \mbox{\hyperlink{pcireg_8h_source_l00083}{PCIR\+\_\+\+VENDOR}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00043}{width}}.

\mbox{\Hypertarget{pci_8c_ad4a26501c80d63d523f96d76f9a2f391}\label{pci_8c_ad4a26501c80d63d523f96d76f9a2f391}} 
\index{pci.c@{pci.c}!pci\_read\_device@{pci\_read\_device}}
\index{pci\_read\_device@{pci\_read\_device}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_device()}{pci\_read\_device()}}
{\footnotesize\ttfamily struct pci\+\_\+devinfo $\ast$ pci\+\_\+read\+\_\+device (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{device\+\_\+t}]{bus,  }\item[{int}]{d,  }\item[{int}]{b,  }\item[{int}]{s,  }\item[{int}]{f }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l00680}{680}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pci__if_8m_source_l00280}{did}}, \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcireg_8h_source_l00084}{PCIR\+\_\+\+DEVICE}}, \mbox{\hyperlink{pcireg_8h_source_l00083}{PCIR\+\_\+\+VENDOR}}, \mbox{\hyperlink{pcireg_8h_source_l00125}{PCIV\+\_\+\+INVALID}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, and \mbox{\hyperlink{pci__if_8m_source_l00279}{vid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04131}{pci\+\_\+identify\+\_\+function()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad4a26501c80d63d523f96d76f9a2f391_cgraph}
\end{center}
\end{figure}
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad4a26501c80d63d523f96d76f9a2f391_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_af96ce57dbfcf635ecb89b27ec45fb9e9}\label{pci_8c_af96ce57dbfcf635ecb89b27ec45fb9e9}} 
\index{pci.c@{pci.c}!pci\_read\_ivar@{pci\_read\_ivar}}
\index{pci\_read\_ivar@{pci\_read\_ivar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_ivar()}{pci\_read\_ivar()}}
{\footnotesize\ttfamily int pci\+\_\+read\+\_\+ivar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{which,  }\item[{uintptr\+\_\+t $\ast$}]{result }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05248}{5248}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00191}{pcicfg\+::baseclass}}, \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pcivar_8h_source_l00197}{pcicfg\+::cachelnsz}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcivar_8h_source_l00188}{pcicfg\+::cmdreg}}, \mbox{\hyperlink{pcivar_8h_source_l00186}{pcicfg\+::device}}, \mbox{\hyperlink{pcivar_8h_source_l00208}{pcicfg\+::domain}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pcivar_8h_source_l00199}{pcicfg\+::intline}}, \mbox{\hyperlink{pcivar_8h_source_l00198}{pcicfg\+::intpin}}, \mbox{\hyperlink{pcivar_8h_source_l00203}{pcicfg\+::lattimer}}, \mbox{\hyperlink{pcivar_8h_source_l00202}{pcicfg\+::maxlat}}, \mbox{\hyperlink{pcivar_8h_source_l00201}{pcicfg\+::mingnt}}, \mbox{\hyperlink{pcireg_8h_source_l00118}{PCIM\+\_\+\+HDRTYPE\+\_\+\+NORMAL}}, \mbox{\hyperlink{pcivar_8h_source_l00193}{pcicfg\+::progif}}, \mbox{\hyperlink{pcivar_8h_source_l00194}{pcicfg\+::revid}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pcivar_8h_source_l00192}{pcicfg\+::subclass}}, \mbox{\hyperlink{pcivar_8h_source_l00184}{pcicfg\+::subdevice}}, \mbox{\hyperlink{pcivar_8h_source_l00183}{pcicfg\+::subvendor}}, and \mbox{\hyperlink{pcivar_8h_source_l00185}{pcicfg\+::vendor}}.

\mbox{\Hypertarget{pci_8c_a84f3bbefe6743cd339105ab6fe8d14ad}\label{pci_8c_a84f3bbefe6743cd339105ab6fe8d14ad}} 
\index{pci.c@{pci.c}!pci\_read\_vpd@{pci\_read\_vpd}}
\index{pci\_read\_vpd@{pci\_read\_vpd}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_vpd()}{pci\_read\_vpd()}}
{\footnotesize\ttfamily static void pci\+\_\+read\+\_\+vpd (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01088}{1088}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l01058}{vpd\+\_\+readstate\+::bytesinval}}, \mbox{\hyperlink{pci_8c_source_l01056}{vpd\+\_\+readstate\+::cfg}}, \mbox{\hyperlink{pci_8c_source_l01060}{vpd\+\_\+readstate\+::cksum}}, \mbox{\hyperlink{pcivar_8h_source_l00069}{vpd\+\_\+readonly\+::keyword}}, \mbox{\hyperlink{pcivar_8h_source_l00075}{vpd\+\_\+write\+::keyword}}, \mbox{\hyperlink{pcivar_8h_source_l00071}{vpd\+\_\+readonly\+::len}}, \mbox{\hyperlink{pcivar_8h_source_l00078}{vpd\+\_\+write\+::len}}, \mbox{\hyperlink{pci__if_8m_source_l00267}{name}}, \mbox{\hyperlink{pci_8c_source_l01059}{vpd\+\_\+readstate\+::off}}, \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}, \mbox{\hyperlink{pci_8c_source_l01055}{vpd\+\_\+readstate\+::pcib}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcivar_8h_source_l00077}{vpd\+\_\+write\+::start}}, \mbox{\hyperlink{pci__if_8m_source_l00094}{state}}, \mbox{\hyperlink{pci_8c_source_l01057}{vpd\+\_\+readstate\+::val}}, \mbox{\hyperlink{pcivar_8h_source_l00070}{vpd\+\_\+readonly\+::value}}, \mbox{\hyperlink{pcivar_8h_source_l00076}{vpd\+\_\+write\+::value}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00083}{pcicfg\+\_\+vpd\+::vpd\+\_\+cached}}, \mbox{\hyperlink{pcivar_8h_source_l00084}{pcicfg\+\_\+vpd\+::vpd\+\_\+ident}}, \mbox{\hyperlink{pci_8c_source_l01064}{vpd\+\_\+nextbyte()}}, \mbox{\hyperlink{pcivar_8h_source_l00085}{pcicfg\+\_\+vpd\+::vpd\+\_\+rocnt}}, \mbox{\hyperlink{pcivar_8h_source_l00086}{pcicfg\+\_\+vpd\+::vpd\+\_\+ros}}, \mbox{\hyperlink{pcivar_8h_source_l00088}{pcicfg\+\_\+vpd\+::vpd\+\_\+w}}, and \mbox{\hyperlink{pcivar_8h_source_l00087}{pcicfg\+\_\+vpd\+::vpd\+\_\+wcnt}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01429}{pci\+\_\+fetch\+\_\+vpd\+\_\+list()}}, \mbox{\hyperlink{pci_8c_source_l01390}{pci\+\_\+get\+\_\+vpd\+\_\+ident\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l01407}{pci\+\_\+get\+\_\+vpd\+\_\+readonly\+\_\+method()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_a84f3bbefe6743cd339105ab6fe8d14ad_cgraph}
\end{center}
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\begin{center}
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\includegraphics[width=350pt]{d1/de8/pci_8c_a84f3bbefe6743cd339105ab6fe8d14ad_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a206056af0a51ecda22999c8624578960}\label{pci_8c_a206056af0a51ecda22999c8624578960}} 
\index{pci.c@{pci.c}!pci\_read\_vpd\_reg@{pci\_read\_vpd\_reg}}
\index{pci\_read\_vpd\_reg@{pci\_read\_vpd\_reg}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_read\_vpd\_reg()}{pci\_read\_vpd\_reg()}}
{\footnotesize\ttfamily static int pci\+\_\+read\+\_\+vpd\+\_\+reg (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{pcib,  }\item[{\mbox{\hyperlink{pcivar_8h_a0dc52cf3b22c125eb0047d444602959c}{pcicfgregs}} $\ast$}]{cfg,  }\item[{int}]{reg,  }\item[{uint32\+\_\+t $\ast$}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01014}{1014}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pci_8c_source_l01011}{PCI\+\_\+\+VPD\+\_\+\+TIMEOUT}}, \mbox{\hyperlink{pcireg_8h_source_l00596}{PCIR\+\_\+\+VPD\+\_\+\+ADDR}}, \mbox{\hyperlink{pcireg_8h_source_l00597}{PCIR\+\_\+\+VPD\+\_\+\+DATA}}, \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pcivar_8h_source_l00217}{pcicfg\+::vpd}}, \mbox{\hyperlink{pcivar_8h_source_l00082}{pcicfg\+\_\+vpd\+::vpd\+\_\+reg}}, and \mbox{\hyperlink{pci_8c_a1f18c3d740a321f3efcec50cb58075b2}{WREG}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01064}{vpd\+\_\+nextbyte()}}.

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\begin{center}
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\includegraphics[width=350pt]{d1/de8/pci_8c_a206056af0a51ecda22999c8624578960_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a432a4a9df42a96e48732596123e5debb}\label{pci_8c_a432a4a9df42a96e48732596123e5debb}} 
\index{pci.c@{pci.c}!pci\_release\_msi\_method@{pci\_release\_msi\_method}}
\index{pci\_release\_msi\_method@{pci\_release\_msi\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_release\_msi\_method()}{pci\_release\_msi\_method()}}
{\footnotesize\ttfamily int pci\+\_\+release\+\_\+msi\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02706}{2706}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00125}{irqs}}, \mbox{\hyperlink{pcivar_8h_source_l00097}{pcicfg\+\_\+msi\+::msi\+\_\+addr}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00098}{pcicfg\+\_\+msi\+::msi\+\_\+data}}, \mbox{\hyperlink{pcivar_8h_source_l00099}{pcicfg\+\_\+msi\+::msi\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pci_8c_source_l02104}{pci\+\_\+release\+\_\+msix()}}, \mbox{\hyperlink{pcireg_8h_source_l00617}{PCIM\+\_\+\+MSICTRL\+\_\+\+MSI\+\_\+\+ENABLE}}, and \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_a432a4a9df42a96e48732596123e5debb_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_adf99a0e4cdbb3ff94ff41f1bd390cb68}\label{pci_8c_adf99a0e4cdbb3ff94ff41f1bd390cb68}} 
\index{pci.c@{pci.c}!pci\_release\_msix@{pci\_release\_msix}}
\index{pci\_release\_msix@{pci\_release\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_release\_msix()}{pci\_release\_msix()}}
{\footnotesize\ttfamily static int pci\+\_\+release\+\_\+msix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02104}{2104}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00115}{pcicfg\+\_\+msix\+::msix\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00124}{pcicfg\+\_\+msix\+::msix\+\_\+table}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00125}{pcicfg\+\_\+msix\+::msix\+\_\+vectors}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00106}{msix\+\_\+vector\+::mv\+\_\+irq}}, and \mbox{\hyperlink{pcireg_8h_source_l00963}{PCIR\+\_\+\+MSIX\+\_\+\+CTRL}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02706}{pci\+\_\+release\+\_\+msi\+\_\+method()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_adf99a0e4cdbb3ff94ff41f1bd390cb68_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a3b6ec4efb16b9e0f8765ded3740db087}\label{pci_8c_a3b6ec4efb16b9e0f8765ded3740db087}} 
\index{pci.c@{pci.c}!pci\_release\_resource@{pci\_release\_resource}}
\index{pci\_release\_resource@{pci\_release\_resource}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_release\_resource()}{pci\_release\_resource()}}
{\footnotesize\ttfamily int pci\+\_\+release\+\_\+resource (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int}]{rid,  }\item[{struct resource $\ast$}]{r }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05643}{5643}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00196}{pcicfg\+::hdrtype}}, \mbox{\hyperlink{pci__iov_8c_source_l01061}{pci\+\_\+vf\+\_\+release\+\_\+mem\+\_\+resource()}}, \mbox{\hyperlink{pcivar_8h_source_l00175}{PCICFG\+\_\+\+VF}}, \mbox{\hyperlink{pcireg_8h_source_l00119}{PCIM\+\_\+\+HDRTYPE\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00266}{PCIR\+\_\+\+IOBASEL\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00274}{PCIR\+\_\+\+MEMBASE\+\_\+1}}, \mbox{\hyperlink{pcireg_8h_source_l00277}{PCIR\+\_\+\+PMBASEL\+\_\+1}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci__iov_8c_source_l00676}{pci\+\_\+iov\+\_\+config()}}, and \mbox{\hyperlink{pci__iov_8c_source_l00833}{pci\+\_\+iov\+\_\+delete\+\_\+iov\+\_\+children()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_a3b6ec4efb16b9e0f8765ded3740db087_cgraph}
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\includegraphics[width=350pt]{d1/de8/pci_8c_a3b6ec4efb16b9e0f8765ded3740db087_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad457d44a48fd53c958d2d3dc84321ab5}\label{pci_8c_ad457d44a48fd53c958d2d3dc84321ab5}} 
\index{pci.c@{pci.c}!pci\_remap\_intr\_method@{pci\_remap\_intr\_method}}
\index{pci\_remap\_intr\_method@{pci\_remap\_intr\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_remap\_intr\_method()}{pci\_remap\_intr\_method()}}
{\footnotesize\ttfamily static int pci\+\_\+remap\+\_\+intr\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{bus,  }\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{irq }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02421}{2421}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00165}{addr}}, \mbox{\hyperlink{pcib__if_8m_source_l00079}{bus}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00099}{pcicfg\+\_\+msi\+::msi\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00124}{pcicfg\+\_\+msix\+::msix\+\_\+table}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00125}{pcicfg\+\_\+msix\+::msix\+\_\+vectors}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00104}{msix\+\_\+vector\+::mv\+\_\+address}}, \mbox{\hyperlink{pcivar_8h_source_l00105}{msix\+\_\+vector\+::mv\+\_\+data}}, \mbox{\hyperlink{pcivar_8h_source_l00106}{msix\+\_\+vector\+::mv\+\_\+irq}}, \mbox{\hyperlink{pci_8c_source_l01718}{pci\+\_\+mask\+\_\+msix()}}, and \mbox{\hyperlink{pci_8c_source_l01737}{pci\+\_\+unmask\+\_\+msix()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ad457d44a48fd53c958d2d3dc84321ab5_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0570897f5cfd60d1403f45b5bee0d8c4}\label{pci_8c_a0570897f5cfd60d1403f45b5bee0d8c4}} 
\index{pci.c@{pci.c}!pci\_remap\_msix\_method@{pci\_remap\_msix\_method}}
\index{pci\_remap\_msix\_method@{pci\_remap\_msix\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_remap\_msix\_method()}{pci\_remap\_msix\_method()}}
{\footnotesize\ttfamily int pci\+\_\+remap\+\_\+msix\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{count,  }\item[{const u\+\_\+int $\ast$}]{vectors }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l01982}{1982}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00124}{pcicfg\+\_\+msix\+::msix\+\_\+table}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00125}{pcicfg\+\_\+msix\+::msix\+\_\+vectors}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00106}{msix\+\_\+vector\+::mv\+\_\+irq}}, and \mbox{\hyperlink{pci__if_8m_source_l00218}{vectors}}.

\mbox{\Hypertarget{pci_8c_ab79e10d9d43b64b516fef2236fe609f4}\label{pci_8c_ab79e10d9d43b64b516fef2236fe609f4}} 
\index{pci.c@{pci.c}!pci\_rescan\_method@{pci\_rescan\_method}}
\index{pci\_rescan\_method@{pci\_rescan\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_rescan\_method()}{pci\_rescan\_method()}}
{\footnotesize\ttfamily int pci\+\_\+rescan\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04191}{4191}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00058}{maxslots}}, \mbox{\hyperlink{pci_8c_source_l04131}{pci\+\_\+identify\+\_\+function()}}, \mbox{\hyperlink{pcireg_8h_source_l00050}{PCI\+\_\+\+MAXHDRTYPE}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, \mbox{\hyperlink{pcireg_8h_source_l00117}{PCIM\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00121}{PCIM\+\_\+\+MFDEV}}, \mbox{\hyperlink{pcireg_8h_source_l00116}{PCIR\+\_\+\+HDRTYPE}}, \mbox{\hyperlink{pcireg_8h_source_l00083}{PCIR\+\_\+\+VENDOR}}, \mbox{\hyperlink{pcireg_8h_source_l00125}{PCIV\+\_\+\+INVALID}}, and \mbox{\hyperlink{pci_8c_a4c0e375fd7dbd6723a4ac16997ad926b}{REG}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ab79e10d9d43b64b516fef2236fe609f4_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0140b630f6650b64e16184f9602dcb03}\label{pci_8c_a0140b630f6650b64e16184f9602dcb03}} 
\index{pci.c@{pci.c}!pci\_reserve\_map@{pci\_reserve\_map}}
\index{pci\_reserve\_map@{pci\_reserve\_map}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_reserve\_map()}{pci\_reserve\_map()}}
{\footnotesize\ttfamily struct resource $\ast$ pci\+\_\+reserve\+\_\+map (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{type,  }\item[{int $\ast$}]{rid,  }\item[{rman\+\_\+res\+\_\+t}]{start,  }\item[{rman\+\_\+res\+\_\+t}]{end,  }\item[{rman\+\_\+res\+\_\+t}]{count,  }\item[{u\+\_\+int}]{num,  }\item[{u\+\_\+int}]{flags }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05421}{5421}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00185}{count}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l03203}{pci\+\_\+add\+\_\+bar()}}, \mbox{\hyperlink{pcireg_8h_source_l00220}{PCI\+\_\+\+BAR\+\_\+\+MEM}}, \mbox{\hyperlink{pci_8c_source_l03904}{pci\+\_\+ea\+\_\+is\+\_\+enabled()}}, \mbox{\hyperlink{pci_8c_source_l03162}{pci\+\_\+find\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l00561}{pci\+\_\+mapsize()}}, \mbox{\hyperlink{pci_8c_source_l03064}{pci\+\_\+read\+\_\+bar()}}, \mbox{\hyperlink{pci_8c_source_l00589}{pci\+\_\+romsize()}}, \mbox{\hyperlink{pci_8c_source_l03141}{pci\+\_\+write\+\_\+bar()}}, \mbox{\hyperlink{pcireg_8h_source_l00228}{PCIM\+\_\+\+BAR\+\_\+\+MEM\+\_\+\+PREFETCH}}, \mbox{\hyperlink{pcireg_8h_source_l00087}{PCIM\+\_\+\+CMD\+\_\+\+MEMEN}}, \mbox{\hyperlink{pcireg_8h_source_l00086}{PCIM\+\_\+\+CMD\+\_\+\+PORTEN}}, \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pcivar_8h_source_l00063}{pci\+\_\+map\+::pm\+\_\+size}}, \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}, \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00064}{start}}, and \mbox{\hyperlink{pci__if_8m_source_l00249}{type}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05535}{pci\+\_\+alloc\+\_\+multi\+\_\+resource()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a0140b630f6650b64e16184f9602dcb03_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a998c29fb25189ed4da74d9f84bf83473}\label{pci_8c_a998c29fb25189ed4da74d9f84bf83473}} 
\index{pci.c@{pci.c}!pci\_reset\_child@{pci\_reset\_child}}
\index{pci\_reset\_child@{pci\_reset\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_reset\_child()}{pci\_reset\_child()}}
{\footnotesize\ttfamily static int pci\+\_\+reset\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{flags }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06654}{6654}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06599}{pci\+\_\+power\+\_\+reset()}}, and \mbox{\hyperlink{pci_8c_source_l06536}{pcie\+\_\+flr()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a998c29fb25189ed4da74d9f84bf83473_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a0d0e2b172faddddf80103540038fe0c8}\label{pci_8c_a0d0e2b172faddddf80103540038fe0c8}} 
\index{pci.c@{pci.c}!pci\_reset\_post@{pci\_reset\_post}}
\index{pci\_reset\_post@{pci\_reset\_post}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_reset\_post()}{pci\_reset\_post()}}
{\footnotesize\ttfamily static int pci\+\_\+reset\+\_\+post (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06636}{6636}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pci_8c_source_l06313}{pci\+\_\+restore\+\_\+state()}}.

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\begin{center}
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\includegraphics[width=350pt]{d1/de8/pci_8c_a0d0e2b172faddddf80103540038fe0c8_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a35b63e459f4244008af9e056538b5dac}\label{pci_8c_a35b63e459f4244008af9e056538b5dac}} 
\index{pci.c@{pci.c}!pci\_reset\_prepare@{pci\_reset\_prepare}}
\index{pci\_reset\_prepare@{pci\_reset\_prepare}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_reset\_prepare()}{pci\_reset\_prepare()}}
{\footnotesize\ttfamily static int pci\+\_\+reset\+\_\+prepare (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l06645}{6645}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pci_8c_source_l06304}{pci\+\_\+save\+\_\+state()}}.

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\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a35b63e459f4244008af9e056538b5dac_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ad1d459c0446b35ca0df0097a4e0723d9}\label{pci_8c_ad1d459c0446b35ca0df0097a4e0723d9}} 
\index{pci.c@{pci.c}!pci\_restore\_bars@{pci\_restore\_bars}}
\index{pci\_restore\_bars@{pci\_restore\_bars}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_restore\_bars()}{pci\_restore\_bars()}}
{\footnotesize\ttfamily static void pci\+\_\+restore\+\_\+bars (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03228}{3228}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00608}{pci\+\_\+maprange()}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pcivar_8h_source_l00064}{pci\+\_\+map\+::pm\+\_\+reg}}, and \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_acca30e253a440cc8f53d3e70ab4ae4e7}\label{pci_8c_acca30e253a440cc8f53d3e70ab4ae4e7}} 
\index{pci.c@{pci.c}!pci\_restore\_state@{pci\_restore\_state}}
\index{pci\_restore\_state@{pci\_restore\_state}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_restore\_state()}{pci\_restore\_state()}}
{\footnotesize\ttfamily void pci\+\_\+restore\+\_\+state (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06313}{6313}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06636}{pci\+\_\+reset\+\_\+post()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a544e39c8a08302586005d6045d4631b5}\label{pci_8c_a544e39c8a08302586005d6045d4631b5}} 
\index{pci.c@{pci.c}!pci\_resume@{pci\_resume}}
\index{pci\_resume@{pci\_resume}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_resume()}{pci\_resume()}}
{\footnotesize\ttfamily int pci\+\_\+resume (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04657}{4657}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00420}{PCIC\+\_\+\+BASEPERIPH}}, \mbox{\hyperlink{pcireg_8h_source_l00387}{PCIC\+\_\+\+BRIDGE}}, \mbox{\hyperlink{pcireg_8h_source_l00368}{PCIC\+\_\+\+DISPLAY}}, and \mbox{\hyperlink{pcireg_8h_source_l00382}{PCIC\+\_\+\+MEMORY}}.

\mbox{\Hypertarget{pci_8c_aab51222ad69d2ca8c0c0c975ef8e54dd}\label{pci_8c_aab51222ad69d2ca8c0c0c975ef8e54dd}} 
\index{pci.c@{pci.c}!pci\_resume\_child@{pci\_resume\_child}}
\index{pci\_resume\_child@{pci\_resume\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_resume\_child()}{pci\_resume\_child()}}
{\footnotesize\ttfamily int pci\+\_\+resume\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04628}{4628}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}, \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}, \mbox{\hyperlink{pci_8c_source_l00364}{pci\+\_\+do\+\_\+power\+\_\+resume}}, \mbox{\hyperlink{pci_8c_source_l00369}{pci\+\_\+do\+\_\+power\+\_\+suspend}}, and \mbox{\hyperlink{pci_8c_source_l04569}{pci\+\_\+set\+\_\+power\+\_\+child()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_aab51222ad69d2ca8c0c0c975ef8e54dd_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_aaa0ecb80a213e78e163acb8682a1d45e}\label{pci_8c_aaa0ecb80a213e78e163acb8682a1d45e}} 
\index{pci.c@{pci.c}!pci\_resume\_msi@{pci\_resume\_msi}}
\index{pci\_resume\_msi@{pci\_resume\_msi}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_resume\_msi()}{pci\_resume\_msi()}}
{\footnotesize\ttfamily static void pci\+\_\+resume\+\_\+msi (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02395}{2395}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00197}{address}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00097}{pcicfg\+\_\+msi\+::msi\+\_\+addr}}, \mbox{\hyperlink{pcivar_8h_source_l00093}{pcicfg\+\_\+msi\+::msi\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00098}{pcicfg\+\_\+msi\+::msi\+\_\+data}}, \mbox{\hyperlink{pcivar_8h_source_l00094}{pcicfg\+\_\+msi\+::msi\+\_\+location}}, \mbox{\hyperlink{pcireg_8h_source_l00602}{PCIM\+\_\+\+MSICTRL\+\_\+64\+BIT}}, \mbox{\hyperlink{pcireg_8h_source_l00617}{PCIM\+\_\+\+MSICTRL\+\_\+\+MSI\+\_\+\+ENABLE}}, \mbox{\hyperlink{pcireg_8h_source_l00618}{PCIR\+\_\+\+MSI\+\_\+\+ADDR}}, \mbox{\hyperlink{pcireg_8h_source_l00619}{PCIR\+\_\+\+MSI\+\_\+\+ADDR\+\_\+\+HIGH}}, \mbox{\hyperlink{pcireg_8h_source_l00600}{PCIR\+\_\+\+MSI\+\_\+\+CTRL}}, \mbox{\hyperlink{pcireg_8h_source_l00620}{PCIR\+\_\+\+MSI\+\_\+\+DATA}}, and \mbox{\hyperlink{pcireg_8h_source_l00621}{PCIR\+\_\+\+MSI\+\_\+\+DATA\+\_\+64\+BIT}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_aaa0ecb80a213e78e163acb8682a1d45e_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a85011c1600ee4c8268691bf397f3d4bc}\label{pci_8c_a85011c1600ee4c8268691bf397f3d4bc}} 
\index{pci.c@{pci.c}!pci\_resume\_msix@{pci\_resume\_msix}}
\index{pci\_resume\_msix@{pci\_resume\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_resume\_msix()}{pci\_resume\_msix()}}
{\footnotesize\ttfamily static void pci\+\_\+resume\+\_\+msix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01774}{1774}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00122}{pcicfg\+\_\+msix\+::msix\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00115}{pcicfg\+\_\+msix\+::msix\+\_\+ctrl}}, \mbox{\hyperlink{pcivar_8h_source_l00117}{pcicfg\+\_\+msix\+::msix\+\_\+location}}, \mbox{\hyperlink{pcivar_8h_source_l00116}{pcicfg\+\_\+msix\+::msix\+\_\+msgnum}}, \mbox{\hyperlink{pcivar_8h_source_l00124}{pcicfg\+\_\+msix\+::msix\+\_\+table}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00125}{pcicfg\+\_\+msix\+::msix\+\_\+vectors}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00104}{msix\+\_\+vector\+::mv\+\_\+address}}, \mbox{\hyperlink{pcivar_8h_source_l00105}{msix\+\_\+vector\+::mv\+\_\+data}}, \mbox{\hyperlink{pci_8c_source_l01718}{pci\+\_\+mask\+\_\+msix()}}, \mbox{\hyperlink{pci_8c_source_l01737}{pci\+\_\+unmask\+\_\+msix()}}, \mbox{\hyperlink{pci_8c_source_l01676}{pci\+\_\+write\+\_\+msix\+\_\+entry()}}, and \mbox{\hyperlink{pcireg_8h_source_l00963}{PCIR\+\_\+\+MSIX\+\_\+\+CTRL}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06075}{pci\+\_\+cfg\+\_\+restore()}}, and \mbox{\hyperlink{pci_8c_source_l01690}{pci\+\_\+enable\+\_\+msix\+\_\+method()}}.

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\includegraphics[width=339pt]{d1/de8/pci_8c_a85011c1600ee4c8268691bf397f3d4bc_cgraph}
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\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_aa090cb700da57816a6bc85532ed8fc52}\label{pci_8c_aa090cb700da57816a6bc85532ed8fc52}} 
\index{pci.c@{pci.c}!pci\_rombase@{pci\_rombase}}
\index{pci\_rombase@{pci\_rombase}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_rombase()}{pci\_rombase()}}
{\footnotesize\ttfamily static \mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}} pci\+\_\+rombase (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{mapreg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00580}{580}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00249}{PCIM\+\_\+\+BIOS\+\_\+\+ADDR\+\_\+\+MASK}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00589}{pci\+\_\+romsize()}}.

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\includegraphics[width=350pt]{d1/de8/pci_8c_aa090cb700da57816a6bc85532ed8fc52_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ac485421c79ff5c476b96c50fd8e634d7}\label{pci_8c_ac485421c79ff5c476b96c50fd8e634d7}} 
\index{pci.c@{pci.c}!pci\_romsize@{pci\_romsize}}
\index{pci\_romsize@{pci\_romsize}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_romsize()}{pci\_romsize()}}
{\footnotesize\ttfamily static int pci\+\_\+romsize (\begin{DoxyParamCaption}\item[{uint64\+\_\+t}]{testval }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00589}{589}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l00580}{pci\+\_\+rombase()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

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\end{figure}
\mbox{\Hypertarget{pci_8c_af85c6f6f443768eb6a34cd9a66f0fc31}\label{pci_8c_af85c6f6f443768eb6a34cd9a66f0fc31}} 
\index{pci.c@{pci.c}!pci\_save\_state@{pci\_save\_state}}
\index{pci\_save\_state@{pci\_save\_state}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_save\_state()}{pci\_save\_state()}}
{\footnotesize\ttfamily void pci\+\_\+save\+\_\+state (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06304}{6304}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06645}{pci\+\_\+reset\+\_\+prepare()}}.

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\begin{center}
\leavevmode
\includegraphics[width=309pt]{d1/de8/pci_8c_af85c6f6f443768eb6a34cd9a66f0fc31_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a69bddb76cafed9a934850d1cd66c6f69}\label{pci_8c_a69bddb76cafed9a934850d1cd66c6f69}} 
\index{pci.c@{pci.c}!pci\_set\_command\_bit@{pci\_set\_command\_bit}}
\index{pci\_set\_command\_bit@{pci\_set\_command\_bit}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_set\_command\_bit()}{pci\_set\_command\_bit()}}
{\footnotesize\ttfamily static \+\_\+\+\_\+inline void pci\+\_\+set\+\_\+command\+\_\+bit (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{uint16\+\_\+t}]{bit }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l02918}{2918}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02938}{pci\+\_\+enable\+\_\+busmaster\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02952}{pci\+\_\+enable\+\_\+io\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l04745}{pci\+\_\+setup\+\_\+intr()}}, and \mbox{\hyperlink{pci_8c_source_l04853}{pci\+\_\+teardown\+\_\+intr()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a69bddb76cafed9a934850d1cd66c6f69_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a6baa22adf0347ccdfc8d05c6f8183fe3}\label{pci_8c_a6baa22adf0347ccdfc8d05c6f8183fe3}} 
\index{pci.c@{pci.c}!pci\_set\_max\_read\_req@{pci\_set\_max\_read\_req}}
\index{pci\_set\_max\_read\_req@{pci\_set\_max\_read\_req}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_set\_max\_read\_req()}{pci\_set\_max\_read\_req()}}
{\footnotesize\ttfamily int pci\+\_\+set\+\_\+max\+\_\+read\+\_\+req (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02265}{2265}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.

\mbox{\Hypertarget{pci_8c_ab66f5ca531e7d52ef2d4f8a04ecc9414}\label{pci_8c_ab66f5ca531e7d52ef2d4f8a04ecc9414}} 
\index{pci.c@{pci.c}!pci\_set\_power\_child@{pci\_set\_power\_child}}
\index{pci\_set\_power\_child@{pci\_set\_power\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_set\_power\_child()}{pci\_set\_power\_child()}}
{\footnotesize\ttfamily static void pci\+\_\+set\+\_\+power\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{state }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04569}{4569}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00034}{pcib}}, and \mbox{\hyperlink{pci__if_8m_source_l00094}{state}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04628}{pci\+\_\+resume\+\_\+child()}}, and \mbox{\hyperlink{pci_8c_source_l04589}{pci\+\_\+suspend\+\_\+child()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=336pt]{d1/de8/pci_8c_ab66f5ca531e7d52ef2d4f8a04ecc9414_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_afa6c0741fddd01ce8ebf63af99f7b81d}\label{pci_8c_afa6c0741fddd01ce8ebf63af99f7b81d}} 
\index{pci.c@{pci.c}!pci\_set\_powerstate\_method@{pci\_set\_powerstate\_method}}
\index{pci\_set\_powerstate\_method@{pci\_set\_powerstate\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_set\_powerstate\_method()}{pci\_set\_powerstate\_method()}}
{\footnotesize\ttfamily int pci\+\_\+set\+\_\+powerstate\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{state }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02808}{2808}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}, \mbox{\hyperlink{pcireg_8h_source_l00556}{PCIM\+\_\+\+PCAP\+\_\+\+D1\+SUPP}}, \mbox{\hyperlink{pcireg_8h_source_l00557}{PCIM\+\_\+\+PCAP\+\_\+\+D2\+SUPP}}, \mbox{\hyperlink{pcireg_8h_source_l00565}{PCIM\+\_\+\+PSTAT\+\_\+\+D0}}, \mbox{\hyperlink{pcireg_8h_source_l00566}{PCIM\+\_\+\+PSTAT\+\_\+\+D1}}, \mbox{\hyperlink{pcireg_8h_source_l00567}{PCIM\+\_\+\+PSTAT\+\_\+\+D2}}, \mbox{\hyperlink{pcireg_8h_source_l00568}{PCIM\+\_\+\+PSTAT\+\_\+\+D3}}, \mbox{\hyperlink{pcivar_8h_source_l00216}{pcicfg\+::pp}}, \mbox{\hyperlink{pcivar_8h_source_l00055}{pcicfg\+\_\+pp\+::pp\+\_\+cap}}, \mbox{\hyperlink{pcivar_8h_source_l00056}{pcicfg\+\_\+pp\+::pp\+\_\+status}}, \mbox{\hyperlink{pci__if_8m_source_l00094}{state}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00072}{status}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=289pt]{d1/de8/pci_8c_afa6c0741fddd01ce8ebf63af99f7b81d_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a79c496a3a264cd1280cb2384eb9839db}\label{pci_8c_a79c496a3a264cd1280cb2384eb9839db}} 
\index{pci.c@{pci.c}!pci\_setup\_intr@{pci\_setup\_intr}}
\index{pci\_setup\_intr@{pci\_setup\_intr}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_setup\_intr()}{pci\_setup\_intr()}}
{\footnotesize\ttfamily int pci\+\_\+setup\+\_\+intr (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{struct resource $\ast$}]{irq,  }\item[{int}]{flags,  }\item[{driver\+\_\+filter\+\_\+t $\ast$}]{filter,  }\item[{driver\+\_\+intr\+\_\+t $\ast$}]{intr,  }\item[{void $\ast$}]{arg,  }\item[{void $\ast$$\ast$}]{cookiep }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04745}{4745}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00165}{addr}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pcivar_8h_source_l00110}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+vector}}, \mbox{\hyperlink{pcivar_8h_source_l00104}{msix\+\_\+vector\+::mv\+\_\+address}}, \mbox{\hyperlink{pcivar_8h_source_l00105}{msix\+\_\+vector\+::mv\+\_\+data}}, \mbox{\hyperlink{pcivar_8h_source_l00106}{msix\+\_\+vector\+::mv\+\_\+irq}}, \mbox{\hyperlink{pci_8c_source_l02928}{pci\+\_\+clear\+\_\+command\+\_\+bit()}}, \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}, \mbox{\hyperlink{pci_8c_source_l00245}{PCI\+\_\+\+QUIRK\+\_\+\+MSI\+\_\+\+INTX\+\_\+\+BUG}}, \mbox{\hyperlink{pci_8c_source_l02918}{pci\+\_\+set\+\_\+command\+\_\+bit()}}, \mbox{\hyperlink{pci_8c_source_l01737}{pci\+\_\+unmask\+\_\+msix()}}, \mbox{\hyperlink{pcireg_8h_source_l00094}{PCIM\+\_\+\+CMD\+\_\+\+INTx\+DIS}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=333pt]{d1/de8/pci_8c_a79c496a3a264cd1280cb2384eb9839db_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_af684287b04aab3071c19e4d73147d038}\label{pci_8c_af684287b04aab3071c19e4d73147d038}} 
\index{pci.c@{pci.c}!pci\_suspend\_child@{pci\_suspend\_child}}
\index{pci\_suspend\_child@{pci\_suspend\_child}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_suspend\_child()}{pci\_suspend\_child()}}
{\footnotesize\ttfamily int pci\+\_\+suspend\+\_\+child (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04589}{4589}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}, \mbox{\hyperlink{pci_8c_source_l00369}{pci\+\_\+do\+\_\+power\+\_\+suspend}}, and \mbox{\hyperlink{pci_8c_source_l04569}{pci\+\_\+set\+\_\+power\+\_\+child()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_af684287b04aab3071c19e4d73147d038_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a123c118541822af88cda66520e4ca38b}\label{pci_8c_a123c118541822af88cda66520e4ca38b}} 
\index{pci.c@{pci.c}!pci\_teardown\_intr@{pci\_teardown\_intr}}
\index{pci\_teardown\_intr@{pci\_teardown\_intr}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_teardown\_intr()}{pci\_teardown\_intr()}}
{\footnotesize\ttfamily int pci\+\_\+teardown\+\_\+intr (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{struct resource $\ast$}]{irq,  }\item[{void $\ast$}]{cookie }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l04853}{4853}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcib__if_8m_source_l00145}{irq}}, \mbox{\hyperlink{pcivar_8h_source_l00218}{pcicfg\+::msi}}, \mbox{\hyperlink{pcivar_8h_source_l00096}{pcicfg\+\_\+msi\+::msi\+\_\+alloc}}, \mbox{\hyperlink{pcivar_8h_source_l00219}{pcicfg\+::msix}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00111}{msix\+\_\+table\+\_\+entry\+::mte\+\_\+handlers}}, \mbox{\hyperlink{pci_8c_source_l01718}{pci\+\_\+mask\+\_\+msix()}}, \mbox{\hyperlink{pci_8c_source_l02918}{pci\+\_\+set\+\_\+command\+\_\+bit()}}, \mbox{\hyperlink{pcireg_8h_source_l00094}{PCIM\+\_\+\+CMD\+\_\+\+INTx\+DIS}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=343pt]{d1/de8/pci_8c_a123c118541822af88cda66520e4ca38b_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_af545598928776e8771053c76a3a66492}\label{pci_8c_af545598928776e8771053c76a3a66492}} 
\index{pci.c@{pci.c}!pci\_unmask\_msix@{pci\_unmask\_msix}}
\index{pci\_unmask\_msix@{pci\_unmask\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_unmask\_msix()}{pci\_unmask\_msix()}}
{\footnotesize\ttfamily void pci\+\_\+unmask\+\_\+msix (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{index }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01737}{1737}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00204}{index}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00120}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+offset}}, \mbox{\hyperlink{pcivar_8h_source_l00126}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+res}}, and \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02421}{pci\+\_\+remap\+\_\+intr\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l01774}{pci\+\_\+resume\+\_\+msix()}}, and \mbox{\hyperlink{pci_8c_source_l04745}{pci\+\_\+setup\+\_\+intr()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_af545598928776e8771053c76a3a66492_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a7ec2a384c24fcc46eaff6b2fb7358243}\label{pci_8c_a7ec2a384c24fcc46eaff6b2fb7358243}} 
\index{pci.c@{pci.c}!pci\_write\_bar@{pci\_write\_bar}}
\index{pci\_write\_bar@{pci\_write\_bar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_write\_bar()}{pci\_write\_bar()}}
{\footnotesize\ttfamily static void pci\+\_\+write\+\_\+bar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{struct \mbox{\hyperlink{structpci__map}{pci\+\_\+map}} $\ast$}]{pm,  }\item[{\mbox{\hyperlink{pcivar_8h_a85fbaa6bea7c93a97f1d61cb716a17b4}{pci\+\_\+addr\+\_\+t}}}]{base }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03141}{3141}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00608}{pci\+\_\+maprange()}}, \mbox{\hyperlink{pci_8c_source_l00089}{PCIR\+\_\+\+IS\+\_\+\+BIOS}}, \mbox{\hyperlink{pcivar_8h_source_l00064}{pci\+\_\+map\+::pm\+\_\+reg}}, and \mbox{\hyperlink{pcivar_8h_source_l00062}{pci\+\_\+map\+::pm\+\_\+value}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05694}{pci\+\_\+activate\+\_\+resource()}}, \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}, \mbox{\hyperlink{pci_8c_source_l05722}{pci\+\_\+deactivate\+\_\+resource()}}, and \mbox{\hyperlink{pci_8c_source_l05421}{pci\+\_\+reserve\+\_\+map()}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=284pt]{d1/de8/pci_8c_a7ec2a384c24fcc46eaff6b2fb7358243_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a7ec2a384c24fcc46eaff6b2fb7358243_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_acd8dcd6f3c8331fbc957df1e3a47c36b}\label{pci_8c_acd8dcd6f3c8331fbc957df1e3a47c36b}} 
\index{pci.c@{pci.c}!pci\_write\_config\_method@{pci\_write\_config\_method}}
\index{pci\_write\_config\_method@{pci\_write\_config\_method}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_write\_config\_method()}{pci\_write\_config\_method()}}
{\footnotesize\ttfamily void pci\+\_\+write\+\_\+config\+\_\+method (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{reg,  }\item[{uint32\+\_\+t}]{val,  }\item[{int}]{width }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05892}{5892}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcivar_8h_source_l00209}{pcicfg\+::bus}}, \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcivar_8h_source_l00211}{pcicfg\+::func}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pcivar_8h_source_l00210}{pcicfg\+::slot}}, \mbox{\hyperlink{pci__if_8m_source_l00082}{val}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00043}{width}}.

\mbox{\Hypertarget{pci_8c_a2f5b68d8adae9554758afb925c50bfd4}\label{pci_8c_a2f5b68d8adae9554758afb925c50bfd4}} 
\index{pci.c@{pci.c}!pci\_write\_ivar@{pci\_write\_ivar}}
\index{pci\_write\_ivar@{pci\_write\_ivar}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_write\_ivar()}{pci\_write\_ivar()}}
{\footnotesize\ttfamily int pci\+\_\+write\+\_\+ivar (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{device\+\_\+t}]{child,  }\item[{int}]{which,  }\item[{uintptr\+\_\+t}]{value }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l05339}{5339}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00073}{child}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00055}{value}}.

\mbox{\Hypertarget{pci_8c_a61737abda79d72ee7ea62fdad55acd03}\label{pci_8c_a61737abda79d72ee7ea62fdad55acd03}} 
\index{pci.c@{pci.c}!pci\_write\_msix\_entry@{pci\_write\_msix\_entry}}
\index{pci\_write\_msix\_entry@{pci\_write\_msix\_entry}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_write\_msix\_entry()}{pci\_write\_msix\_entry()}}
{\footnotesize\ttfamily static void pci\+\_\+write\+\_\+msix\+\_\+entry (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{index,  }\item[{uint64\+\_\+t}]{address,  }\item[{uint32\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01676}{1676}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00197}{address}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__if_8m_source_l00204}{index}}, \mbox{\hyperlink{pcivar_8h_source_l00123}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+len}}, \mbox{\hyperlink{pcivar_8h_source_l00120}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+offset}}, and \mbox{\hyperlink{pcivar_8h_source_l00126}{pcicfg\+\_\+msix\+::msix\+\_\+table\+\_\+res}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01690}{pci\+\_\+enable\+\_\+msix\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l01774}{pci\+\_\+resume\+\_\+msix()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a61737abda79d72ee7ea62fdad55acd03_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ac22b2f66eb402eba32c8c71bc77dfca7}\label{pci_8c_ac22b2f66eb402eba32c8c71bc77dfca7}} 
\index{pci.c@{pci.c}!pcie\_adjust\_config@{pcie\_adjust\_config}}
\index{pcie\_adjust\_config@{pcie\_adjust\_config}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_adjust\_config()}{pcie\_adjust\_config()}}
{\footnotesize\ttfamily uint32\+\_\+t pcie\+\_\+adjust\+\_\+config (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{uint32\+\_\+t}]{mask,  }\item[{uint32\+\_\+t}]{value,  }\item[{int}]{width }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02322}{2322}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00055}{value}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00043}{width}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04320}{pcie\+\_\+setup\+\_\+mps()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ac22b2f66eb402eba32c8c71bc77dfca7_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a288e7b65923a7913b0498354d020bdca}\label{pci_8c_a288e7b65923a7913b0498354d020bdca}} 
\index{pci.c@{pci.c}!pcie\_apei\_error@{pcie\_apei\_error}}
\index{pcie\_apei\_error@{pcie\_apei\_error}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_apei\_error()}{pcie\_apei\_error()}}
{\footnotesize\ttfamily void pcie\+\_\+apei\+\_\+error (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{sev,  }\item[{uint8\+\_\+t $\ast$}]{aerp }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06459}{6459}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00826}{PCIEM\+\_\+\+STA\+\_\+\+CORRECTABLE\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00828}{PCIEM\+\_\+\+STA\+\_\+\+FATAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00827}{PCIEM\+\_\+\+STA\+\_\+\+NON\+\_\+\+FATAL\+\_\+\+ERROR}}, \mbox{\hyperlink{pcireg_8h_source_l00829}{PCIEM\+\_\+\+STA\+\_\+\+UNSUPPORTED\+\_\+\+REQ}}, \mbox{\hyperlink{pcireg_8h_source_l00825}{PCIER\+\_\+\+DEVICE\+\_\+\+STA}}, \mbox{\hyperlink{pcireg_8h_source_l01018}{PCIR\+\_\+\+AER\+\_\+\+CAP\+\_\+\+CONTROL}}, \mbox{\hyperlink{pcireg_8h_source_l01017}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l01008}{PCIR\+\_\+\+AER\+\_\+\+COR\+\_\+\+STATUS}}, \mbox{\hyperlink{pcireg_8h_source_l01006}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+MASK}}, \mbox{\hyperlink{pcireg_8h_source_l01007}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+SEVERITY}}, \mbox{\hyperlink{pcireg_8h_source_l00988}{PCIR\+\_\+\+AER\+\_\+\+UC\+\_\+\+STATUS}}, and \mbox{\hyperlink{pcireg_8h_source_l00168}{PCIZ\+\_\+\+AER}}.

\mbox{\Hypertarget{pci_8c_abec5193c7fa7212054cc69db1e1c26d3}\label{pci_8c_abec5193c7fa7212054cc69db1e1c26d3}} 
\index{pci.c@{pci.c}!pcie\_flr@{pcie\_flr}}
\index{pcie\_flr@{pcie\_flr}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_flr()}{pcie\_flr()}}
{\footnotesize\ttfamily bool pcie\+\_\+flr (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{max\+\_\+delay,  }\item[{bool}]{force }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06536}{6536}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l00520}{pci\+\_\+printf()}}, \mbox{\hyperlink{pci_8c_source_l06416}{pcie\+\_\+get\+\_\+max\+\_\+completion\+\_\+timeout()}}, \mbox{\hyperlink{pci_8c_source_l06380}{pcie\+\_\+wait\+\_\+for\+\_\+pending\+\_\+transactions()}}, \mbox{\hyperlink{pcireg_8h_source_l00810}{PCIEM\+\_\+\+CAP\+\_\+\+FLR}}, \mbox{\hyperlink{pcireg_8h_source_l00824}{PCIEM\+\_\+\+CTL\+\_\+\+INITIATE\+\_\+\+FLR}}, \mbox{\hyperlink{pcireg_8h_source_l00831}{PCIEM\+\_\+\+STA\+\_\+\+TRANSACTION\+\_\+\+PND}}, \mbox{\hyperlink{pcireg_8h_source_l00801}{PCIER\+\_\+\+DEVICE\+\_\+\+CAP}}, \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}, \mbox{\hyperlink{pcireg_8h_source_l00825}{PCIER\+\_\+\+DEVICE\+\_\+\+STA}}, \mbox{\hyperlink{pcireg_8h_source_l00088}{PCIM\+\_\+\+CMD\+\_\+\+BUSMASTEREN}}, and \mbox{\hyperlink{pcireg_8h_source_l00085}{PCIR\+\_\+\+COMMAND}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06654}{pci\+\_\+reset\+\_\+child()}}.

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\begin{center}
\leavevmode
\includegraphics[width=313pt]{d1/de8/pci_8c_abec5193c7fa7212054cc69db1e1c26d3_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=257pt]{d1/de8/pci_8c_abec5193c7fa7212054cc69db1e1c26d3_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_aefc2b3b888de6165c1fe0ffc960964be}\label{pci_8c_aefc2b3b888de6165c1fe0ffc960964be}} 
\index{pci.c@{pci.c}!pcie\_get\_max\_completion\_timeout@{pcie\_get\_max\_completion\_timeout}}
\index{pcie\_get\_max\_completion\_timeout@{pcie\_get\_max\_completion\_timeout}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_get\_max\_completion\_timeout()}{pcie\_get\_max\_completion\_timeout()}}
{\footnotesize\ttfamily int pcie\+\_\+get\+\_\+max\+\_\+completion\+\_\+timeout (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06416}{6416}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00923}{PCIEM\+\_\+\+CAP2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+\+RANGES}}, \mbox{\hyperlink{pcireg_8h_source_l00933}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+100\+US}}, \mbox{\hyperlink{pcireg_8h_source_l00934}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+10\+MS}}, \mbox{\hyperlink{pcireg_8h_source_l00939}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+13S}}, \mbox{\hyperlink{pcireg_8h_source_l00936}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+210\+MS}}, \mbox{\hyperlink{pcireg_8h_source_l00938}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+3500\+MS}}, \mbox{\hyperlink{pcireg_8h_source_l00935}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+55\+MS}}, \mbox{\hyperlink{pcireg_8h_source_l00940}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+64S}}, \mbox{\hyperlink{pcireg_8h_source_l00937}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+900\+MS}}, \mbox{\hyperlink{pcireg_8h_source_l00931}{PCIEM\+\_\+\+CTL2\+\_\+\+COMP\+\_\+\+TIMO\+\_\+\+VAL}}, \mbox{\hyperlink{pcireg_8h_source_l00788}{PCIEM\+\_\+\+FLAGS\+\_\+\+VERSION}}, \mbox{\hyperlink{pcireg_8h_source_l00922}{PCIER\+\_\+\+DEVICE\+\_\+\+CAP2}}, and \mbox{\hyperlink{pcireg_8h_source_l00930}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL2}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06536}{pcie\+\_\+flr()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_aefc2b3b888de6165c1fe0ffc960964be_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a18f9143d676271134703aef8090cec83}\label{pci_8c_a18f9143d676271134703aef8090cec83}} 
\index{pci.c@{pci.c}!pcie\_link\_reset@{pcie\_link\_reset}}
\index{pcie\_link\_reset@{pcie\_link\_reset}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_link\_reset()}{pcie\_link\_reset()}}
{\footnotesize\ttfamily int pcie\+\_\+link\+\_\+reset (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{port,  }\item[{int}]{pcie\+\_\+location }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06619}{6619}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00850}{PCIEM\+\_\+\+LINK\+\_\+\+CTL\+\_\+\+LINK\+\_\+\+DIS}}, \mbox{\hyperlink{pcireg_8h_source_l00851}{PCIEM\+\_\+\+LINK\+\_\+\+CTL\+\_\+\+RETRAIN\+\_\+\+LINK}}, \mbox{\hyperlink{pcireg_8h_source_l00862}{PCIEM\+\_\+\+LINK\+\_\+\+STA\+\_\+\+TRAINING}}, \mbox{\hyperlink{pcireg_8h_source_l00844}{PCIER\+\_\+\+LINK\+\_\+\+CTL}}, and \mbox{\hyperlink{pcireg_8h_source_l00858}{PCIER\+\_\+\+LINK\+\_\+\+STA}}.



Referenced by \mbox{\hyperlink{pci__pci_8c_source_l02996}{pcib\+\_\+reset\+\_\+child()}}.

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\begin{center}
\leavevmode
\includegraphics[width=301pt]{d1/de8/pci_8c_a18f9143d676271134703aef8090cec83_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a34776dfad33d0c35f8f1a5a35c956a0c}\label{pci_8c_a34776dfad33d0c35f8f1a5a35c956a0c}} 
\index{pci.c@{pci.c}!pcie\_read\_config@{pcie\_read\_config}}
\index{pcie\_read\_config@{pcie\_read\_config}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_read\_config()}{pcie\_read\_config()}}
{\footnotesize\ttfamily uint32\+\_\+t pcie\+\_\+read\+\_\+config (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{int}]{width }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02287}{2287}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00043}{width}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04320}{pcie\+\_\+setup\+\_\+mps()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a34776dfad33d0c35f8f1a5a35c956a0c_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a59d7c74e86c671f859573b041aa34d1d}\label{pci_8c_a59d7c74e86c671f859573b041aa34d1d}} 
\index{pci.c@{pci.c}!pcie\_setup\_mps@{pcie\_setup\_mps}}
\index{pcie\_setup\_mps@{pcie\_setup\_mps}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_setup\_mps()}{pcie\_setup\_mps()}}
{\footnotesize\ttfamily static void pcie\+\_\+setup\+\_\+mps (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l04320}{4320}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci_8c_source_l06331}{pci\+\_\+find\+\_\+pcie\+\_\+root\+\_\+port()}}, \mbox{\hyperlink{pci_8c_source_l02322}{pcie\+\_\+adjust\+\_\+config()}}, \mbox{\hyperlink{pci_8c_source_l02287}{pcie\+\_\+read\+\_\+config()}}, \mbox{\hyperlink{pcireg_8h_source_l00802}{PCIEM\+\_\+\+CAP\+\_\+\+MAX\+\_\+\+PAYLOAD}}, \mbox{\hyperlink{pcireg_8h_source_l00817}{PCIEM\+\_\+\+CTL\+\_\+\+MAX\+\_\+\+PAYLOAD}}, \mbox{\hyperlink{pcireg_8h_source_l00801}{PCIER\+\_\+\+DEVICE\+\_\+\+CAP}}, and \mbox{\hyperlink{pcireg_8h_source_l00811}{PCIER\+\_\+\+DEVICE\+\_\+\+CTL}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}.

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\includegraphics[width=340pt]{d1/de8/pci_8c_a59d7c74e86c671f859573b041aa34d1d_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a59d7c74e86c671f859573b041aa34d1d_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a6c84647892fd248636a315b4ed86fdea}\label{pci_8c_a6c84647892fd248636a315b4ed86fdea}} 
\index{pci.c@{pci.c}!pcie\_wait\_for\_pending\_transactions@{pcie\_wait\_for\_pending\_transactions}}
\index{pcie\_wait\_for\_pending\_transactions@{pcie\_wait\_for\_pending\_transactions}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_wait\_for\_pending\_transactions()}{pcie\_wait\_for\_pending\_transactions()}}
{\footnotesize\ttfamily bool pcie\+\_\+wait\+\_\+for\+\_\+pending\+\_\+transactions (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{u\+\_\+int}]{max\+\_\+delay }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l06380}{6380}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pcireg_8h_source_l00831}{PCIEM\+\_\+\+STA\+\_\+\+TRANSACTION\+\_\+\+PND}}, and \mbox{\hyperlink{pcireg_8h_source_l00825}{PCIER\+\_\+\+DEVICE\+\_\+\+STA}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06536}{pcie\+\_\+flr()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a6c84647892fd248636a315b4ed86fdea_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_aa8eaefc2940fa46e7df595f52c6ae0e5}\label{pci_8c_aa8eaefc2940fa46e7df595f52c6ae0e5}} 
\index{pci.c@{pci.c}!pcie\_write\_config@{pcie\_write\_config}}
\index{pcie\_write\_config@{pcie\_write\_config}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_write\_config()}{pcie\_write\_config()}}
{\footnotesize\ttfamily void pcie\+\_\+write\+\_\+config (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int}]{reg,  }\item[{uint32\+\_\+t}]{value,  }\item[{int}]{width }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{pci_8c_source_l02303}{2303}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcib__if_8m_source_l00109}{dev}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00055}{value}}, and \mbox{\hyperlink{pci__dw__if_8m_source_l00043}{width}}.

\mbox{\Hypertarget{pci_8c_a3ecccf663be8ba0739e1602f2fdde9d5}\label{pci_8c_a3ecccf663be8ba0739e1602f2fdde9d5}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [1/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{clear\+\_\+aer\+\_\+on\+\_\+attach}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+clear\+\_\+aer\+\_\+on\+\_\+attach,  }\item[{0}]{,  }\item[{\char`\"{}Clear port and device AER \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}} on driver attach\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a3bca2a3e7bd0515fdd18ca6f4a216f3f}\label{pci_8c_a3bca2a3e7bd0515fdd18ca6f4a216f3f}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [2/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{clear\+\_\+bars}]{,  }\item[{CTLFLAG\+\_\+\+RDTUN}]{,  }\item[{\&}]{pci\+\_\+clear\+\_\+bars,  }\item[{0}]{,  }\item[{\char`\"{}Ignore firmware-\/assigned resources for BARs.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a9b2025a79421c17f7a3223010bd0fed3}\label{pci_8c_a9b2025a79421c17f7a3223010bd0fed3}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [3/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{do\+\_\+power\+\_\+nodriver}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+power\+\_\+nodriver,  }\item[{0}]{,  }\item[{\char`\"{}Place a function into D3 \mbox{\hyperlink{pci__if_8m_a89f234133d3efe315836311cbf21c64b}{state}} when no driver attaches to it. 0 means\char`\"{} \char`\"{} disable. 1 means conservatively place devices into D3 state. 2 means\char`\"{} \char`\"{} aggressively place devices into D3 state. 3 means put absolutely\char`\"{} \char`\"{} everything in D3 state.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a1345521fbe128a13989db8162ac32a96}\label{pci_8c_a1345521fbe128a13989db8162ac32a96}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [4/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{do\+\_\+power\+\_\+resume}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+power\+\_\+resume,  }\item[{1}]{,  }\item[{\char`\"{}Transition from D3 -\/$>$ D0 on resume.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a93d2406756d8b114e68244bc7240a676}\label{pci_8c_a93d2406756d8b114e68244bc7240a676}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [5/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{do\+\_\+power\+\_\+suspend}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+power\+\_\+suspend,  }\item[{1}]{,  }\item[{\char`\"{}Transition from D0 -\/$>$ D3 on suspend.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_aea0198771f4ee3d10710adb6e9a9feec}\label{pci_8c_aea0198771f4ee3d10710adb6e9a9feec}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [6/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{enable\+\_\+ari}]{,  }\item[{CTLFLAG\+\_\+\+RDTUN}]{,  }\item[{\&}]{pci\+\_\+enable\+\_\+ari,  }\item[{0}]{,  }\item[{\char`\"{}Enable support for PCIe Alternative RID Interpretation\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_ac0b7eb24e9ed553c6fce4f1d7b7888ea}\label{pci_8c_ac0b7eb24e9ed553c6fce4f1d7b7888ea}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [7/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{enable\+\_\+aspm}]{,  }\item[{CTLFLAG\+\_\+\+RDTUN}]{,  }\item[{\&}]{pci\+\_\+enable\+\_\+aspm,  }\item[{0}]{,  }\item[{\char`\"{}Enable support for PCIe Active State Power Management\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_af9073548bb69c29d5fb5c1cf9b810747}\label{pci_8c_af9073548bb69c29d5fb5c1cf9b810747}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [8/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{enable\+\_\+io\+\_\+modes}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+enable\+\_\+io\+\_\+modes,  }\item[{1}]{,  }\item[{\char`\"{}Enable I/O and memory bits in the \mbox{\hyperlink{pci__iov__if_8m_a6d28928fc54ea8c772521fd4c7eb45a7}{config}} register. Some BIOSes do not\char`\"{} \char`\"{} enable these bits correctly. We\textquotesingle{}d like to do this all the}]{time,  }\item[{but\char`\"{} \char`\"{} there are some peripherals that this causes problems with.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a43986b7c52a425a1800076f23283bd13}\label{pci_8c_a43986b7c52a425a1800076f23283bd13}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [9/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{\mbox{\hyperlink{pci__if_8m_add11cc1e0e4f784e46b4df608f5721c9}{enable\+\_\+msi}}}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+msi,  }\item[{1}]{,  }\item[{\char`\"{}Enable support for MSI interrupts\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a4ca5c2eb7cc6168bcd96653c4cc9cc70}\label{pci_8c_a4ca5c2eb7cc6168bcd96653c4cc9cc70}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [10/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{\mbox{\hyperlink{pci__if_8m_a42fe6f08b5e241812aa9f785a38acae1}{enable\+\_\+msix}}}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+msix,  }\item[{1}]{,  }\item[{\char`\"{}Enable support for MSI-\/X interrupts\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_aa1a5bb093f7101ed04e3ac9ea4496cf7}\label{pci_8c_aa1a5bb093f7101ed04e3ac9ea4496cf7}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [11/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{honor\+\_\+msi\+\_\+blacklist}]{,  }\item[{CTLFLAG\+\_\+\+RDTUN}]{,  }\item[{\&}]{pci\+\_\+honor\+\_\+msi\+\_\+blacklist,  }\item[{1}]{,  }\item[{\char`\"{}Honor chipset blacklist for MSI/MSI-\/X\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a329b085fda2be9b79803e3cae85739bc}\label{pci_8c_a329b085fda2be9b79803e3cae85739bc}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [12/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{msix\+\_\+rewrite\+\_\+table}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+msix\+\_\+rewrite\+\_\+table,  }\item[{0}]{,  }\item[{\char`\"{}Rewrite entire MSI-\/X table when updating MSI-\/X entries\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a19fddd36a7c2d7d9008bd050bd092146}\label{pci_8c_a19fddd36a7c2d7d9008bd050bd092146}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [13/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{realloc\+\_\+bars}]{,  }\item[{CTLFLAG\+\_\+\+RWTUN}]{,  }\item[{\&}]{pci\+\_\+do\+\_\+realloc\+\_\+bars,  }\item[{0}]{,  }\item[{\char`\"{}Attempt to allocate a new range for any BARs whose original \char`\"{} \char`\"{}firmware-\/assigned ranges fail to allocate during the initial device scan.\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a0d15bce2505eefb04eeb00c8df679f8e}\label{pci_8c_a0d15bce2505eefb04eeb00c8df679f8e}} 
\index{pci.c@{pci.c}!SYSCTL\_INT@{SYSCTL\_INT}}
\index{SYSCTL\_INT@{SYSCTL\_INT}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_INT()}{SYSCTL\_INT()}\hspace{0.1cm}{\footnotesize\ttfamily [14/14]}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+INT (\begin{DoxyParamCaption}\item[{\+\_\+hw\+\_\+pci}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{usb\+\_\+early\+\_\+takeover}]{,  }\item[{CTLFLAG\+\_\+\+RDTUN}]{,  }\item[{\&}]{pci\+\_\+usb\+\_\+takeover,  }\item[{1}]{,  }\item[{\char`\"{}Enable early takeover of USB controllers. Disable this if you depend on\char`\"{} \char`\"{} BIOS emulation of USB}]{devices,  }\item[{that is you use USB devices(like\char`\"{} \char`\"{} keyboard or mouse) but do not load USB drivers\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a8e6d6e4090a99c0d969046f4bb75ccc5}\label{pci_8c_a8e6d6e4090a99c0d969046f4bb75ccc5}} 
\index{pci.c@{pci.c}!SYSCTL\_NODE@{SYSCTL\_NODE}}
\index{SYSCTL\_NODE@{SYSCTL\_NODE}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{SYSCTL\_NODE()}{SYSCTL\_NODE()}}
{\footnotesize\ttfamily SYSCTL\+\_\+\+NODE (\begin{DoxyParamCaption}\item[{\+\_\+hw}]{,  }\item[{OID\+\_\+\+AUTO}]{,  }\item[{\mbox{\hyperlink{pci__if_8m_a5035da57e5a3809063d531b02181c8cd}{pci}}}]{,  }\item[{CTLFLAG\+\_\+\+RD$\vert$}]{CTLFLAG\+\_\+\+MPSAFE,  }\item[{0}]{,  }\item[{\char`\"{}PCI \mbox{\hyperlink{pcib__if_8m_a513d8424fb5683cf968375aff817a292}{bus}} tuning parameters\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{pci_8c_a329f0d55a1a856807c3e520cf4c072f2}\label{pci_8c_a329f0d55a1a856807c3e520cf4c072f2}} 
\index{pci.c@{pci.c}!uhci\_early\_takeover@{uhci\_early\_takeover}}
\index{uhci\_early\_takeover@{uhci\_early\_takeover}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{uhci\_early\_takeover()}{uhci\_early\_takeover()}}
{\footnotesize\ttfamily static void uhci\+\_\+early\+\_\+takeover (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{self }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03569}{3569}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

Here is the caller graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a329f0d55a1a856807c3e520cf4c072f2_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_a77fb8a1fd1b91525d891704ff9ec8527}\label{pci_8c_a77fb8a1fd1b91525d891704ff9ec8527}} 
\index{pci.c@{pci.c}!vpd\_nextbyte@{vpd\_nextbyte}}
\index{vpd\_nextbyte@{vpd\_nextbyte}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{vpd\_nextbyte()}{vpd\_nextbyte()}}
{\footnotesize\ttfamily static int vpd\+\_\+nextbyte (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structvpd__readstate}{vpd\+\_\+readstate}} $\ast$}]{vrs,  }\item[{uint8\+\_\+t $\ast$}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l01064}{1064}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pci_8c_source_l01058}{vpd\+\_\+readstate\+::bytesinval}}, \mbox{\hyperlink{pci_8c_source_l01056}{vpd\+\_\+readstate\+::cfg}}, \mbox{\hyperlink{pci_8c_source_l01060}{vpd\+\_\+readstate\+::cksum}}, \mbox{\hyperlink{pci__if_8m_source_l00198}{data}}, \mbox{\hyperlink{pci_8c_source_l01059}{vpd\+\_\+readstate\+::off}}, \mbox{\hyperlink{pci_8c_source_l01014}{pci\+\_\+read\+\_\+vpd\+\_\+reg()}}, \mbox{\hyperlink{pci_8c_source_l01055}{vpd\+\_\+readstate\+::pcib}}, \mbox{\hyperlink{pci__dw__if_8m_source_l00042}{reg}}, and \mbox{\hyperlink{pci_8c_source_l01057}{vpd\+\_\+readstate\+::val}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01088}{pci\+\_\+read\+\_\+vpd()}}.

Here is the call graph for this function\+:
\nopagebreak
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\begin{center}
\leavevmode
\includegraphics[width=301pt]{d1/de8/pci_8c_a77fb8a1fd1b91525d891704ff9ec8527_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_a77fb8a1fd1b91525d891704ff9ec8527_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{pci_8c_ab73cd8ef332e98cc8b92109c7f1f2fc1}\label{pci_8c_ab73cd8ef332e98cc8b92109c7f1f2fc1}} 
\index{pci.c@{pci.c}!xhci\_early\_takeover@{xhci\_early\_takeover}}
\index{xhci\_early\_takeover@{xhci\_early\_takeover}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{xhci\_early\_takeover()}{xhci\_early\_takeover()}}
{\footnotesize\ttfamily static void xhci\+\_\+early\+\_\+takeover (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{self }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l03649}{3649}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



References \mbox{\hyperlink{pcireg_8h_source_l00216}{PCIR\+\_\+\+BAR}}, and \mbox{\hyperlink{pci__if_8m_source_l00278}{rid}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d1/de8/pci_8c_ab73cd8ef332e98cc8b92109c7f1f2fc1_icgraph}
\end{center}
\end{figure}


\doxysubsection{Variable Documentation}
\mbox{\Hypertarget{pci_8c_a40f3e25fe8c516c8026cc6c3b6908e12}\label{pci_8c_a40f3e25fe8c516c8026cc6c3b6908e12}} 
\index{pci.c@{pci.c}!class@{class}}
\index{class@{class}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{class}{class}}
{\footnotesize\ttfamily int class}



Definition at line \mbox{\hyperlink{pci_8c_source_l04940}{4940}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a710bce51374aba96ab04912897666c35}\label{pci_8c_a710bce51374aba96ab04912897666c35}} 
\index{pci.c@{pci.c}!desc@{desc}}
\index{desc@{desc}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{desc}{desc}}
{\footnotesize\ttfamily const char$\ast$ desc}



Definition at line \mbox{\hyperlink{pci_8c_source_l04943}{4943}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05195}{pci\+\_\+describe\+\_\+device()}}, and \mbox{\hyperlink{pci_8c_source_l05149}{pci\+\_\+describe\+\_\+parse\+\_\+line()}}.

\mbox{\Hypertarget{pci_8c_a56f06a192ee328dd4f382964f1373635}\label{pci_8c_a56f06a192ee328dd4f382964f1373635}} 
\index{pci.c@{pci.c}!pci\_clear\_aer\_on\_attach@{pci\_clear\_aer\_on\_attach}}
\index{pci\_clear\_aer\_on\_attach@{pci\_clear\_aer\_on\_attach}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_clear\_aer\_on\_attach}{pci\_clear\_aer\_on\_attach}}
{\footnotesize\ttfamily int pci\+\_\+clear\+\_\+aer\+\_\+on\+\_\+attach = 0\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00420}{420}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04431}{pci\+\_\+add\+\_\+child()}}.

\mbox{\Hypertarget{pci_8c_afda6175fd03d67b2834d458f6778ee27}\label{pci_8c_afda6175fd03d67b2834d458f6778ee27}} 
\index{pci.c@{pci.c}!pci\_clear\_bars@{pci\_clear\_bars}}
\index{pci\_clear\_bars@{pci\_clear\_bars}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_clear\_bars}{pci\_clear\_bars}}
{\footnotesize\ttfamily int pci\+\_\+clear\+\_\+bars\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00402}{402}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

\mbox{\Hypertarget{pci_8c_a0d8b3600e8129d7d0011246546ebe06a}\label{pci_8c_a0d8b3600e8129d7d0011246546ebe06a}} 
\index{pci.c@{pci.c}!pci\_devclass@{pci\_devclass}}
\index{pci\_devclass@{pci\_devclass}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_devclass}{pci\_devclass}}
{\footnotesize\ttfamily devclass\+\_\+t pci\+\_\+devclass\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00229}{229}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_a6cce0a11a0f8f21eb58e3b0551f66748}\label{pci_8c_a6cce0a11a0f8f21eb58e3b0551f66748}} 
\index{pci.c@{pci.c}!pci\_devq@{pci\_devq}}
\index{pci\_devq@{pci\_devq}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_devq}{pci\_devq}}
{\footnotesize\ttfamily struct devlist pci\+\_\+devq}



Definition at line \mbox{\hyperlink{pci_8c_source_l00334}{334}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}, \mbox{\hyperlink{pci_8c_source_l00483}{pci\+\_\+find\+\_\+class()}}, \mbox{\hyperlink{pci_8c_source_l00498}{pci\+\_\+find\+\_\+class\+\_\+from()}}, \mbox{\hyperlink{pci_8c_source_l00449}{pci\+\_\+find\+\_\+dbsf()}}, \mbox{\hyperlink{pci_8c_source_l00468}{pci\+\_\+find\+\_\+device()}}, \mbox{\hyperlink{pci_8c_source_l02773}{pci\+\_\+freecfg()}}, \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}, \mbox{\hyperlink{pci_8c_source_l06005}{pci\+\_\+modevent()}}, and \mbox{\hyperlink{pci_8c_source_l06732}{pci\+\_\+print\+\_\+faulted\+\_\+dev()}}.

\mbox{\Hypertarget{pci_8c_a60237f093995ca7d580674bf14913c69}\label{pci_8c_a60237f093995ca7d580674bf14913c69}} 
\index{pci.c@{pci.c}!pci\_do\_msi@{pci\_do\_msi}}
\index{pci\_do\_msi@{pci\_do\_msi}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_msi}{pci\_do\_msi}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+msi = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00374}{374}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02587}{pci\+\_\+alloc\+\_\+msi\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l02760}{pci\+\_\+msi\+\_\+count\+\_\+method()}}.

\mbox{\Hypertarget{pci_8c_a613e346deae8926498ef9d6275468cc5}\label{pci_8c_a613e346deae8926498ef9d6275468cc5}} 
\index{pci.c@{pci.c}!pci\_do\_msix@{pci\_do\_msix}}
\index{pci\_do\_msix@{pci\_do\_msix}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_msix}{pci\_do\_msix}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+msix = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00378}{378}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01808}{pci\+\_\+alloc\+\_\+msix\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02157}{pci\+\_\+msix\+\_\+count\+\_\+method()}}, \mbox{\hyperlink{pci_8c_source_l02168}{pci\+\_\+msix\+\_\+pba\+\_\+bar\+\_\+method()}}, and \mbox{\hyperlink{pci_8c_source_l02179}{pci\+\_\+msix\+\_\+table\+\_\+bar\+\_\+method()}}.

\mbox{\Hypertarget{pci_8c_accb134df1f88ac586aeff236d0264601}\label{pci_8c_accb134df1f88ac586aeff236d0264601}} 
\index{pci.c@{pci.c}!pci\_do\_power\_nodriver@{pci\_do\_power\_nodriver}}
\index{pci\_do\_power\_nodriver@{pci\_do\_power\_nodriver}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_power\_nodriver}{pci\_do\_power\_nodriver}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+power\+\_\+nodriver = 0\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00356}{356}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l06195}{pci\+\_\+cfg\+\_\+save()}}.

\mbox{\Hypertarget{pci_8c_a2cacf9ca1d91ab0a4c5af03d811b7e81}\label{pci_8c_a2cacf9ca1d91ab0a4c5af03d811b7e81}} 
\index{pci.c@{pci.c}!pci\_do\_power\_resume@{pci\_do\_power\_resume}}
\index{pci\_do\_power\_resume@{pci\_do\_power\_resume}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_power\_resume}{pci\_do\_power\_resume}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+power\+\_\+resume = 1}



Definition at line \mbox{\hyperlink{pci_8c_source_l00364}{364}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04628}{pci\+\_\+resume\+\_\+child()}}.

\mbox{\Hypertarget{pci_8c_a26facb574b1a5760131c429ccef62672}\label{pci_8c_a26facb574b1a5760131c429ccef62672}} 
\index{pci.c@{pci.c}!pci\_do\_power\_suspend@{pci\_do\_power\_suspend}}
\index{pci\_do\_power\_suspend@{pci\_do\_power\_suspend}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_power\_suspend}{pci\_do\_power\_suspend}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+power\+\_\+suspend = 1}



Definition at line \mbox{\hyperlink{pci_8c_source_l00369}{369}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04628}{pci\+\_\+resume\+\_\+child()}}, and \mbox{\hyperlink{pci_8c_source_l04589}{pci\+\_\+suspend\+\_\+child()}}.

\mbox{\Hypertarget{pci_8c_af707ec0d2f1e3a544c13febe656a67a3}\label{pci_8c_af707ec0d2f1e3a544c13febe656a67a3}} 
\index{pci.c@{pci.c}!pci\_do\_realloc\_bars@{pci\_do\_realloc\_bars}}
\index{pci\_do\_realloc\_bars@{pci\_do\_realloc\_bars}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_do\_realloc\_bars}{pci\_do\_realloc\_bars}}
{\footnotesize\ttfamily int pci\+\_\+do\+\_\+realloc\+\_\+bars = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00350}{350}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

\mbox{\Hypertarget{pci_8c_a9d135fd552a75c2a04590b9b347bdd85}\label{pci_8c_a9d135fd552a75c2a04590b9b347bdd85}} 
\index{pci.c@{pci.c}!pci\_enable\_ari@{pci\_enable\_ari}}
\index{pci\_enable\_ari@{pci\_enable\_ari}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_ari}{pci\_enable\_ari}}
{\footnotesize\ttfamily int pci\+\_\+enable\+\_\+ari = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00412}{412}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04144}{pci\+\_\+add\+\_\+children()}}.

\mbox{\Hypertarget{pci_8c_a8469a3711f398ccb4bd1bef5491c7151}\label{pci_8c_a8469a3711f398ccb4bd1bef5491c7151}} 
\index{pci.c@{pci.c}!pci\_enable\_aspm@{pci\_enable\_aspm}}
\index{pci\_enable\_aspm@{pci\_enable\_aspm}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_aspm}{pci\_enable\_aspm}}
{\footnotesize\ttfamily int pci\+\_\+enable\+\_\+aspm = 1}



Definition at line \mbox{\hyperlink{pci_8c_source_l00416}{416}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_ac26444344726a1e9acde4ad9015ab094}\label{pci_8c_ac26444344726a1e9acde4ad9015ab094}} 
\index{pci.c@{pci.c}!pci\_enable\_io\_modes@{pci\_enable\_io\_modes}}
\index{pci\_enable\_io\_modes@{pci\_enable\_io\_modes}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_enable\_io\_modes}{pci\_enable\_io\_modes}}
{\footnotesize\ttfamily int pci\+\_\+enable\+\_\+io\+\_\+modes = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00343}{343}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l03252}{pci\+\_\+add\+\_\+map()}}.

\mbox{\Hypertarget{pci_8c_acb97b1af0950e7125b9ce13c22137a09}\label{pci_8c_acb97b1af0950e7125b9ce13c22137a09}} 
\index{pci.c@{pci.c}!pci\_generation@{pci\_generation}}
\index{pci\_generation@{pci\_generation}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_generation}{pci\_generation}}
{\footnotesize\ttfamily uint32\+\_\+t pci\+\_\+generation}



Definition at line \mbox{\hyperlink{pci_8c_source_l00335}{335}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}, \mbox{\hyperlink{pci_8c_source_l02773}{pci\+\_\+freecfg()}}, \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}, and \mbox{\hyperlink{pci_8c_source_l06005}{pci\+\_\+modevent()}}.

\mbox{\Hypertarget{pci_8c_ac3e59b14ef825dc4c45434de3720b9cf}\label{pci_8c_ac3e59b14ef825dc4c45434de3720b9cf}} 
\index{pci.c@{pci.c}!pci\_honor\_msi\_blacklist@{pci\_honor\_msi\_blacklist}}
\index{pci\_honor\_msi\_blacklist@{pci\_honor\_msi\_blacklist}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_honor\_msi\_blacklist}{pci\_honor\_msi\_blacklist}}
{\footnotesize\ttfamily int pci\+\_\+honor\+\_\+msi\+\_\+blacklist = 1\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00387}{387}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02497}{pci\+\_\+msi\+\_\+device\+\_\+blacklisted()}}, \mbox{\hyperlink{pci_8c_source_l02566}{pci\+\_\+msix\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l02548}{pci\+\_\+msix\+\_\+device\+\_\+blacklisted()}}.

\mbox{\Hypertarget{pci_8c_a2fc2bb59df114cd2363b2d52a9182996}\label{pci_8c_a2fc2bb59df114cd2363b2d52a9182996}} 
\index{pci.c@{pci.c}!pci\_methods@{pci\_methods}}
\index{pci\_methods@{pci\_methods}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_methods}{pci\_methods}}
{\footnotesize\ttfamily device\+\_\+method\+\_\+t pci\+\_\+methods\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00144}{144}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.

\mbox{\Hypertarget{pci_8c_aeb0db1584aab21dce108fecf9bb2bd5c}\label{pci_8c_aeb0db1584aab21dce108fecf9bb2bd5c}} 
\index{pci.c@{pci.c}!pci\_msix\_rewrite\_table@{pci\_msix\_rewrite\_table}}
\index{pci\_msix\_rewrite\_table@{pci\_msix\_rewrite\_table}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_msix\_rewrite\_table}{pci\_msix\_rewrite\_table}}
{\footnotesize\ttfamily int pci\+\_\+msix\+\_\+rewrite\+\_\+table = 0\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00382}{382}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l01690}{pci\+\_\+enable\+\_\+msix\+\_\+method()}}.

\mbox{\Hypertarget{pci_8c_ada8365000d4768345c7dbc1045dc1abc}\label{pci_8c_ada8365000d4768345c7dbc1045dc1abc}} 
\index{pci.c@{pci.c}!pci\_nomatch\_tab@{pci\_nomatch\_tab}}
\index{pci\_nomatch\_tab@{pci\_nomatch\_tab}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{}{}}
{\footnotesize\ttfamily const struct  \{ ... \}  pci\+\_\+nomatch\+\_\+tab\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}



Referenced by \mbox{\hyperlink{pci_8c_source_l05037}{pci\+\_\+probe\+\_\+nomatch()}}.

\mbox{\Hypertarget{pci_8c_a0e224305f1ef1808f089be0c27a2f0a2}\label{pci_8c_a0e224305f1ef1808f089be0c27a2f0a2}} 
\index{pci.c@{pci.c}!pci\_numdevs@{pci\_numdevs}}
\index{pci\_numdevs@{pci\_numdevs}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_numdevs}{pci\_numdevs}}
{\footnotesize\ttfamily uint32\+\_\+t pci\+\_\+numdevs = 0}



Definition at line \mbox{\hyperlink{pci_8c_source_l00336}{336}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00703}{pci\+\_\+fill\+\_\+devinfo()}}, \mbox{\hyperlink{pci_8c_source_l02773}{pci\+\_\+freecfg()}}, and \mbox{\hyperlink{pci__user_8c_source_l01014}{pci\+\_\+ioctl()}}.

\mbox{\Hypertarget{pci_8c_a6a3708f44d2f901f68c5f8c4fd7e0a56}\label{pci_8c_a6a3708f44d2f901f68c5f8c4fd7e0a56}} 
\index{pci.c@{pci.c}!pci\_quirks@{pci\_quirks}}
\index{pci\_quirks@{pci\_quirks}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_quirks}{pci\_quirks}}
{\footnotesize\ttfamily const struct \mbox{\hyperlink{structpci__quirk}{pci\+\_\+quirk}} pci\+\_\+quirks\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00251}{251}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}, and \mbox{\hyperlink{pci_8c_source_l00426}{pci\+\_\+has\+\_\+quirk()}}.

\mbox{\Hypertarget{pci_8c_a1617f0f571bd9cfc3c8b3a9e9a54a225}\label{pci_8c_a1617f0f571bd9cfc3c8b3a9e9a54a225}} 
\index{pci.c@{pci.c}!pci\_usb\_takeover@{pci\_usb\_takeover}}
\index{pci\_usb\_takeover@{pci\_usb\_takeover}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_usb\_takeover}{pci\_usb\_takeover}}
{\footnotesize\ttfamily int pci\+\_\+usb\+\_\+takeover = 0\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00394}{394}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l04038}{pci\+\_\+add\+\_\+resources()}}.

\mbox{\Hypertarget{pci_8c_ad198ef6309d7006ab99e482d0a0fb0bb}\label{pci_8c_ad198ef6309d7006ab99e482d0a0fb0bb}} 
\index{pci.c@{pci.c}!pci\_vendordata@{pci\_vendordata}}
\index{pci\_vendordata@{pci\_vendordata}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_vendordata}{pci\_vendordata}}
{\footnotesize\ttfamily char$\ast$ pci\+\_\+vendordata\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00234}{234}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05195}{pci\+\_\+describe\+\_\+device()}}, \mbox{\hyperlink{pci_8c_source_l05149}{pci\+\_\+describe\+\_\+parse\+\_\+line()}}, and \mbox{\hyperlink{pci_8c_source_l04696}{pci\+\_\+load\+\_\+vendor\+\_\+data()}}.

\mbox{\Hypertarget{pci_8c_a3a26c08f7b59fd13c522c5161067d0a1}\label{pci_8c_a3a26c08f7b59fd13c522c5161067d0a1}} 
\index{pci.c@{pci.c}!pci\_vendordata\_size@{pci\_vendordata\_size}}
\index{pci\_vendordata\_size@{pci\_vendordata\_size}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pci\_vendordata\_size}{pci\_vendordata\_size}}
{\footnotesize\ttfamily size\+\_\+t pci\+\_\+vendordata\+\_\+size\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00235}{235}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05149}{pci\+\_\+describe\+\_\+parse\+\_\+line()}}, and \mbox{\hyperlink{pci_8c_source_l04696}{pci\+\_\+load\+\_\+vendor\+\_\+data()}}.

\mbox{\Hypertarget{pci_8c_acdf16d4eb41b9e26fe8d5149fef8b061}\label{pci_8c_acdf16d4eb41b9e26fe8d5149fef8b061}} 
\index{pci.c@{pci.c}!pcie\_chipset@{pcie\_chipset}}
\index{pcie\_chipset@{pcie\_chipset}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcie\_chipset}{pcie\_chipset}}
{\footnotesize\ttfamily int pcie\+\_\+chipset\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00337}{337}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l00843}{pci\+\_\+read\+\_\+cap()}}.

\mbox{\Hypertarget{pci_8c_adc0b167997810f6d4eb4ef0073d7daec}\label{pci_8c_adc0b167997810f6d4eb4ef0073d7daec}} 
\index{pci.c@{pci.c}!pcix\_chipset@{pcix\_chipset}}
\index{pcix\_chipset@{pcix\_chipset}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{pcix\_chipset}{pcix\_chipset}}
{\footnotesize\ttfamily int pcix\+\_\+chipset\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{pci_8c_source_l00337}{337}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l02514}{pci\+\_\+msi\+\_\+blacklisted()}}, and \mbox{\hyperlink{pci_8c_source_l00843}{pci\+\_\+read\+\_\+cap()}}.

\mbox{\Hypertarget{pci_8c_af8ae873dc0a6bcadf6bf4500b857288a}\label{pci_8c_af8ae873dc0a6bcadf6bf4500b857288a}} 
\index{pci.c@{pci.c}!report@{report}}
\index{report@{report}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{report}{report}}
{\footnotesize\ttfamily int report}



Definition at line \mbox{\hyperlink{pci_8c_source_l04942}{4942}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l05037}{pci\+\_\+probe\+\_\+nomatch()}}.

\mbox{\Hypertarget{pci_8c_a8690cd2e4b0ef8477711b72a120ae086}\label{pci_8c_a8690cd2e4b0ef8477711b72a120ae086}} 
\index{pci.c@{pci.c}!subclass@{subclass}}
\index{subclass@{subclass}!pci.c@{pci.c}}
\doxysubsubsection{\texorpdfstring{subclass}{subclass}}
{\footnotesize\ttfamily int subclass}



Definition at line \mbox{\hyperlink{pci_8c_source_l04941}{4941}} of file \mbox{\hyperlink{pci_8c_source}{pci.\+c}}.



Referenced by \mbox{\hyperlink{pci_8c_source_l00483}{pci\+\_\+find\+\_\+class()}}, \mbox{\hyperlink{pci_8c_source_l00498}{pci\+\_\+find\+\_\+class\+\_\+from()}}, \mbox{\hyperlink{pci_8c_source_l06682}{pci\+\_\+match\+\_\+device()}}, and \mbox{\hyperlink{pci_8c_source_l05037}{pci\+\_\+probe\+\_\+nomatch()}}.

