\hypertarget{mlx5__port_8c}{}\doxysection{dev/mlx5/mlx5\+\_\+core/mlx5\+\_\+port.c File Reference}
\label{mlx5__port_8c}\index{dev/mlx5/mlx5\_core/mlx5\_port.c@{dev/mlx5/mlx5\_core/mlx5\_port.c}}
{\ttfamily \#include \char`\"{}opt\+\_\+rss.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}opt\+\_\+ratelimit.\+h\char`\"{}}\newline
{\ttfamily \#include $<$linux/module.\+h$>$}\newline
{\ttfamily \#include $<$dev/mlx5/port.\+h$>$}\newline
{\ttfamily \#include $<$dev/mlx5/mlx5\+\_\+core/mlx5\+\_\+core.\+h$>$}\newline
Include dependency graph for mlx5\+\_\+port.\+c\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d6/dd4/mlx5__port_8c__incl}
\end{center}
\end{figure}
\doxysubsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{structmlx5__reg__pcap}{mlx5\+\_\+reg\+\_\+pcap}}
\end{DoxyCompactItemize}
\doxysubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
int \mbox{\hyperlink{mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\+\_\+core\+\_\+access\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, void $\ast$data\+\_\+in, int size\+\_\+in, void $\ast$data\+\_\+out, int size\+\_\+out, u16 reg\+\_\+num, int arg, int write)
\item 
\mbox{\hyperlink{mlx5__port_8c_aadc19873e04a11376d4d81b8dcb465c2}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\+\_\+core\+\_\+access\+\_\+reg}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc}{mlx5\+\_\+query\+\_\+qcam\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 $\ast$qcam, u8 feature\+\_\+group, u8 access\+\_\+reg\+\_\+group)
\item 
\mbox{\hyperlink{mlx5__port_8c_a57df5a07ba0e2fcda6d695f3901205a6}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc}{mlx5\+\_\+query\+\_\+qcam\+\_\+reg}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_af2112cbf5091b075f972dc74a44ea1f7}{mlx5\+\_\+query\+\_\+pcam\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$pcam, u8 feature\+\_\+group, u8 access\+\_\+reg\+\_\+group)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a09eec2500cd72587529a1063460d07da}{mlx5\+\_\+query\+\_\+mcam\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$mcam, u8 feature\+\_\+group, u8 access\+\_\+reg\+\_\+group)
\item 
void \mbox{\hyperlink{mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c}{mlx5\+\_\+toggle\+\_\+port\+\_\+link}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev)
\item 
\mbox{\hyperlink{mlx5__port_8c_a1cbf406c5503d80b13ae321d03020a0b}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c}{mlx5\+\_\+toggle\+\_\+port\+\_\+link}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_aedb5a503f9312b510754fe363a99c27e}{mlx5\+\_\+set\+\_\+port\+\_\+caps}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 port\+\_\+num, u32 caps)
\item 
\mbox{\hyperlink{mlx5__port_8c_a29c527ab4376d451ef80d46b7a72efa9}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_aedb5a503f9312b510754fe363a99c27e}{mlx5\+\_\+set\+\_\+port\+\_\+caps}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a8f0cbf29a10097b179dd9e3a4df0b873}{mlx5\+\_\+query\+\_\+port\+\_\+ptys}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$ptys, int ptys\+\_\+size, int proto\+\_\+mask, u8 local\+\_\+port)
\item 
\mbox{\hyperlink{mlx5__port_8c_a894f7a5861f51fc78914c34b2158489c}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a8f0cbf29a10097b179dd9e3a4df0b873}{mlx5\+\_\+query\+\_\+port\+\_\+ptys}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_ad9607ac18934ee28ea596856e72b8895}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+cap, int proto\+\_\+mask)
\item 
\mbox{\hyperlink{mlx5__port_8c_a845e0a281b7d098eaefed396b8f6f09f}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_ad9607ac18934ee28ea596856e72b8895}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_abd68757fec6c356f065d94a476c28c65}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int proto\+\_\+mask, u8 $\ast$an\+\_\+disable\+\_\+cap, u8 $\ast$an\+\_\+disable\+\_\+status)
\item 
\mbox{\hyperlink{mlx5__port_8c_a14872591322b992e83074f4420d4a3c3}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_abd68757fec6c356f065d94a476c28c65}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_af40ba1470375da922437a2d42ec10701}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, bool disable, u32 eth\+\_\+proto\+\_\+admin, int proto\+\_\+mask)
\item 
\mbox{\hyperlink{mlx5__port_8c_a4c6fe1a7fc3a46bcaa05d2b1ebb541d4}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_af40ba1470375da922437a2d42ec10701}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_aced7454cbd10f56a2415f76633bd9a47}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+admin, int proto\+\_\+mask)
\item 
\mbox{\hyperlink{mlx5__port_8c_a2e2c3282548354790be9fd3eaace0e83}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_aced7454cbd10f56a2415f76633bd9a47}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_ac03a740d947a2d92b1b677fe0830f8d4}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+oper, u8 local\+\_\+port)
\item 
\mbox{\hyperlink{mlx5__port_8c_a3c2af679fa0271f4a969ecfa1495401c}{EXPORT\+\_\+\+SYMBOL}} (\mbox{\hyperlink{port_8h_ac03a740d947a2d92b1b677fe0830f8d4}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a8e61837d509b7d0f854f031e69002249}{mlx5\+\_\+set\+\_\+port\+\_\+proto}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 proto\+\_\+admin, int proto\+\_\+mask, bool ext)
\item 
\mbox{\hyperlink{mlx5__port_8c_a71c1f1c071b174f74914a00a0a6219e4}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a8e61837d509b7d0f854f031e69002249}{mlx5\+\_\+set\+\_\+port\+\_\+proto}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_af420caf0db7e1b8cbf69651fbe3d98d7}{mlx5\+\_\+set\+\_\+port\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} status)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a5a527984e12e519f8e4a436f3d4f0a7d}{mlx5\+\_\+query\+\_\+port\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 $\ast$status)
\item 
int \mbox{\hyperlink{mlx5__port_8c_ab0a0f0a0d6683482c1072fab351f72fc}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} $\ast$status)
\item 
\mbox{\hyperlink{mlx5__port_8c_a80e8d753bebdebfa23e1ca2bae9ea901}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_ab0a0f0a0d6683482c1072fab351f72fc}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status}})
\item 
static int \mbox{\hyperlink{mlx5__port_8c_ae001db5373f3c87a69c2e3c102549a50}{mlx5\+\_\+query\+\_\+port\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$admin\+\_\+mtu, int $\ast$max\+\_\+mtu, int $\ast$oper\+\_\+mtu)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a678235a0bf7e8e0cb35e0ce8ee96c5c9}{mlx5\+\_\+set\+\_\+port\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int mtu)
\item 
\mbox{\hyperlink{mlx5__port_8c_aa8cbaf4331729a5fa1a988d5896dce69}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a678235a0bf7e8e0cb35e0ce8ee96c5c9}{mlx5\+\_\+set\+\_\+port\+\_\+mtu}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a621c7ea77766c5fea50a28224084966a}{mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$max\+\_\+mtu)
\item 
\mbox{\hyperlink{mlx5__port_8c_a7ee3185d525cdb6bdf0a50d97e96a97f}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a621c7ea77766c5fea50a28224084966a}{mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_ae8bafa77713ec40473235db0e29b230f}{mlx5\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 port, u8 rx\+\_\+pause, u8 tx\+\_\+pause, u8 pfc\+\_\+en\+\_\+rx, u8 pfc\+\_\+en\+\_\+tx)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a81bd9d53a4b98130eb63d2c5c357d1ea}{mlx5\+\_\+query\+\_\+port\+\_\+pause}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 port, u32 $\ast$rx\+\_\+pause, u32 $\ast$tx\+\_\+pause)
\item 
int \mbox{\hyperlink{mlx5__port_8c_afda73217c985de0c61c6c3e32b1b3b06}{mlx5\+\_\+query\+\_\+port\+\_\+pfc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 $\ast$pfc\+\_\+en\+\_\+tx, u8 $\ast$pfc\+\_\+en\+\_\+rx)
\item 
\mbox{\hyperlink{mlx5__port_8c_a52cfb04b8a94c5b47582168b449e3640}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_afda73217c985de0c61c6c3e32b1b3b06}{mlx5\+\_\+query\+\_\+port\+\_\+pfc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_abac20c4d9ef517252456717d991413b0}{mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$oper\+\_\+mtu)
\item 
\mbox{\hyperlink{mlx5__port_8c_a32b81ebceda60cff60d4a7370362ffe9}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_abac20c4d9ef517252456717d991413b0}{mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu}})
\item 
u8 \mbox{\hyperlink{mlx5__port_8c_aa5769fc35d48240bd4da4be66fbeace0}{mlx5\+\_\+is\+\_\+wol\+\_\+supported}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev)
\item 
\mbox{\hyperlink{mlx5__port_8c_a06e57a5eec1fcf1cc6b87ac52f75349d}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_aa5769fc35d48240bd4da4be66fbeace0}{mlx5\+\_\+is\+\_\+wol\+\_\+supported}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a0500c03124e21491718637c608ed5b47}{mlx5\+\_\+set\+\_\+wol}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 wol\+\_\+mode)
\item 
\mbox{\hyperlink{mlx5__port_8c_af191ec23e963bf8b95575d72ff4b8081}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a0500c03124e21491718637c608ed5b47}{mlx5\+\_\+set\+\_\+wol}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf}{mlx5\+\_\+query\+\_\+dropless\+\_\+mode}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u16 $\ast$timeout)
\item 
\mbox{\hyperlink{mlx5__port_8c_adc2c0d304ce61541e3f6680e8484118f}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf}{mlx5\+\_\+query\+\_\+dropless\+\_\+mode}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81}{mlx5\+\_\+set\+\_\+dropless\+\_\+mode}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u16 timeout)
\item 
\mbox{\hyperlink{mlx5__port_8c_ab6f378c260c5aef4bf778505c8308506}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81}{mlx5\+\_\+set\+\_\+dropless\+\_\+mode}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_afdde4fabcf6d4cb43114de9b198b341d}{mlx5\+\_\+core\+\_\+access\+\_\+pvlc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, struct \mbox{\hyperlink{structmlx5__pvlc__reg}{mlx5\+\_\+pvlc\+\_\+reg}} $\ast$pvlc, int write)
\item 
\mbox{\hyperlink{mlx5__port_8c_ad63c95a432c5a4de41f5e07df0d8dfa3}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_afdde4fabcf6d4cb43114de9b198b341d}{mlx5\+\_\+core\+\_\+access\+\_\+pvlc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_aaf6341e9edb4b643a9dc3a78347bae73}{mlx5\+\_\+core\+\_\+access\+\_\+ptys}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, struct \mbox{\hyperlink{structmlx5__ptys__reg}{mlx5\+\_\+ptys\+\_\+reg}} $\ast$ptys, int write)
\item 
\mbox{\hyperlink{mlx5__port_8c_ae37be8d50dfc00c77b302d7c3e646bdf}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_aaf6341e9edb4b643a9dc3a78347bae73}{mlx5\+\_\+core\+\_\+access\+\_\+ptys}})
\item 
static int \mbox{\hyperlink{mlx5__port_8c_a5d734690900cf84024e1f35c7973d405}{mtu\+\_\+to\+\_\+ib\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int mtu)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a0caa23cc00d4e168071ff6341ae49604}{mlx5\+\_\+core\+\_\+access\+\_\+pmtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, struct \mbox{\hyperlink{structmlx5__pmtu__reg}{mlx5\+\_\+pmtu\+\_\+reg}} $\ast$pmtu, int write)
\item 
\mbox{\hyperlink{mlx5__port_8c_a610ac90d45c8b649b2f43860b75c0e98}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_a0caa23cc00d4e168071ff6341ae49604}{mlx5\+\_\+core\+\_\+access\+\_\+pmtu}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a79915817bf848b70fa91e71a4890a669}{mlx5\+\_\+query\+\_\+module\+\_\+num}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$module\+\_\+num)
\item 
\mbox{\hyperlink{mlx5__port_8c_a06878aab4baf79c85dff25a15615735e}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a79915817bf848b70fa91e71a4890a669}{mlx5\+\_\+query\+\_\+module\+\_\+num}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a68b553361f112504e6c7e0b875e2feff}{mlx5\+\_\+query\+\_\+eeprom}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int i2c\+\_\+addr, int page\+\_\+num, int device\+\_\+addr, int size, int module\+\_\+num, u32 $\ast$\mbox{\hyperlink{mlx5__en__tx_8c_af943c26117683b64b9cd6943e2c496e5}{data}}, int $\ast$size\+\_\+read)
\item 
\mbox{\hyperlink{mlx5__port_8c_ae3e768515c385b65edb9253dde88b815}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a68b553361f112504e6c7e0b875e2feff}{mlx5\+\_\+query\+\_\+eeprom}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_abe0618b565e0309fb16f8cda19739702}{mlx5\+\_\+vxlan\+\_\+udp\+\_\+port\+\_\+add}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u16 port)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a937bee6341de9d04883f260ad7e8709d}{mlx5\+\_\+vxlan\+\_\+udp\+\_\+port\+\_\+delete}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u16 port)
\item 
int \mbox{\hyperlink{mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7}{mlx5\+\_\+query\+\_\+wol}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 $\ast$wol\+\_\+mode)
\item 
\mbox{\hyperlink{mlx5__port_8c_a3210e5b3945f45ce5cf9db4d9d980222}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7}{mlx5\+\_\+query\+\_\+wol}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a42b776e2ece7d18b07f73c05ce2ceb95}{mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int protocol, int priority, int $\ast$is\+\_\+enable)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a2c748bbc61f9e1c2a16e1217ffba1d54}{mlx5\+\_\+modify\+\_\+port\+\_\+cong\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int protocol, int priority, int enable)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a57cfdc485d1761b3978dce749a4a7582}{mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+params}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int protocol, void $\ast$out, int out\+\_\+size)
\item 
static int \mbox{\hyperlink{mlx5__port_8c_a6498db7a28bbd7104621f5432599d0af}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 $\ast$out, int outlen)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a8eea1a4b68e68fda00f586588c09f045}{mlx5\+\_\+max\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev)
\item 
\mbox{\hyperlink{mlx5__port_8c_ae0f27213f69f186770d614fe7d964d04}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a8eea1a4b68e68fda00f586588c09f045}{mlx5\+\_\+max\+\_\+tc}})
\item 
static int \mbox{\hyperlink{mlx5__port_8c_a4fd7b9a42b17ccb08ed6c0d29bc2c0de}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 $\ast$in, int inlen)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a1e9dd0d7320c408a211ca9040488a41d}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$max\+\_\+bw\+\_\+value, u8 $\ast$max\+\_\+bw\+\_\+units)
\item 
\mbox{\hyperlink{mlx5__port_8c_a94391c44c7679a813e0c4a1c05b51ba6}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a1e9dd0d7320c408a211ca9040488a41d}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_aec4e85f531e077cf816101a0026ad225}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$max\+\_\+bw\+\_\+value, const u8 $\ast$max\+\_\+bw\+\_\+units)
\item 
\mbox{\hyperlink{mlx5__port_8c_a264c8c45705883b0da2a172efb6d576b}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_aec4e85f531e077cf816101a0026ad225}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_ae0dd290d698ec73c31e72788ac917eec}{mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 prio, u8 $\ast$\mbox{\hyperlink{en_8h_a0cea5104d05c6d3949115ddd0eed432e}{tc}})
\item 
\mbox{\hyperlink{mlx5__port_8c_a9d357f6b75398a6aa3a64bd7ca0cd231}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_ae0dd290d698ec73c31e72788ac917eec}{mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a0a52893d89d21c33052292f05e2d3618}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int prio\+\_\+index, const u8 prio\+\_\+tc)
\item 
\mbox{\hyperlink{mlx5__port_8c_a7dd8f8aa711c9560c3646d910d073d3d}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a0a52893d89d21c33052292f05e2d3618}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a1824b2318af707b6146d7c431e305694}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$tc\+\_\+group)
\item 
\mbox{\hyperlink{mlx5__port_8c_a2fe382987d98ce7c2796d7c7f61c3c85}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a1824b2318af707b6146d7c431e305694}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a5bc1d6be45b568bf44747236844b8959}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 \mbox{\hyperlink{en_8h_a0cea5104d05c6d3949115ddd0eed432e}{tc}}, u8 $\ast$tc\+\_\+group)
\item 
\mbox{\hyperlink{mlx5__port_8c_a960c657f0f0d319c14b3a99fe2886684}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a5bc1d6be45b568bf44747236844b8959}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a1f21911cbbc6a806d4f165efd6711de1}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$tc\+\_\+bw)
\item 
\mbox{\hyperlink{mlx5__port_8c_a70d6edcde3dac71eb985b06ec53955f4}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a1f21911cbbc6a806d4f165efd6711de1}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a3bff739bb1d26721baac627ba595236e}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$bw\+\_\+pct)
\item 
\mbox{\hyperlink{mlx5__port_8c_a1cc7816636612018bc1d987c4ca3939e}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a3bff739bb1d26721baac627ba595236e}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a7fd9708647bfc0a48bc12ce79baf2ef4}{mlx5\+\_\+modify\+\_\+port\+\_\+cong\+\_\+params}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$in, int in\+\_\+size)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a8a26b14a2aefedd2dc70cf5d0f30feb9}{mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+statistics}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int clear, void $\ast$out, int out\+\_\+size)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a9c524c6d3bce42c90eb4ff2d4297455b}{mlx5\+\_\+set\+\_\+diagnostic\+\_\+params}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$in, int in\+\_\+size)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a0e73dc5444d1ef37219430959be09460}{mlx5\+\_\+query\+\_\+diagnostic\+\_\+counters}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 num\+\_\+of\+\_\+samples, u16 sample\+\_\+index, void $\ast$out, int out\+\_\+size)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a7c22c110dca7d84adcdaade920784192}{mlx5\+\_\+set\+\_\+trust\+\_\+state}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 trust\+\_\+state)
\item 
int \mbox{\hyperlink{mlx5__port_8c_afcaee87f88eaa778d725f66812f561ba}{mlx5\+\_\+query\+\_\+trust\+\_\+state}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$trust\+\_\+state)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a97c245e50598b16dcb43cb32cbc37423}{mlx5\+\_\+set\+\_\+dscp2prio}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$dscp2prio)
\item 
int \mbox{\hyperlink{mlx5__port_8c_aa003c31ff5f5f6dae8728880dd8392db}{mlx5\+\_\+query\+\_\+dscp2prio}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$dscp2prio)
\item 
static int \mbox{\hyperlink{mlx5__port_8c_a906eb4aeb43db4d5385183f0d1a0e7df}{mlx5\+\_\+query\+\_\+pddr}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 local\+\_\+port, int page\+\_\+select, u32 $\ast$out, int outlen)
\item 
int \mbox{\hyperlink{mlx5__port_8c_ac7afe3e33144e7a3e096599ce95c5e36}{mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 local\+\_\+port, u8 $\ast$is\+\_\+er\+\_\+type)
\item 
\mbox{\hyperlink{mlx5__port_8c_ac9f36a244a9dc5e5dc0c5c0a49bc12ac}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_ac7afe3e33144e7a3e096599ce95c5e36}{mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a7c89eb44382a69714c0d74ef5fe56b20}{mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 local\+\_\+port, u8 $\ast$cable\+\_\+type)
\item 
\mbox{\hyperlink{mlx5__port_8c_a78e872d1b68c765d3c03b208d156f552}{EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL}} (\mbox{\hyperlink{port_8h_a7c89eb44382a69714c0d74ef5fe56b20}{mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type}})
\item 
int \mbox{\hyperlink{mlx5__port_8c_a88b95de65bb94f09336a96244b52f69e}{mlx5\+\_\+query\+\_\+pddr\+\_\+troubleshooting\+\_\+info}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u16 $\ast$monitor\+\_\+opcode, u8 $\ast$status\+\_\+message, size\+\_\+t sm\+\_\+len)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a5a6024f486716265b7dc536a8beeb84a}{mlx5\+\_\+query\+\_\+mfrl\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$reset\+\_\+level)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a025afaa148364d99d8e430346505c001}{mlx5\+\_\+set\+\_\+mfrl\+\_\+reg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 reset\+\_\+level)
\item 
static void \mbox{\hyperlink{mlx5__port_8c_a91b098dccbe2383e732840af5076b9ff}{mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u32 $\ast$$\ast$arr, u32 $\ast$size)
\item 
u32 \mbox{\hyperlink{mlx5__port_8c_a9aa2cea85e96ba55f84c53b193a3d546}{mlx5e\+\_\+port\+\_\+ptys2speed}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 eth\+\_\+proto\+\_\+oper)
\item 
int \mbox{\hyperlink{mlx5__port_8c_abc3477405acfbb95183852d9c779374f}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 port, bool ext, struct \mbox{\hyperlink{structmlx5e__port__eth__proto}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto}} $\ast$eproto)
\item 
int \mbox{\hyperlink{mlx5__port_8c_aa748929af17fa9534b61812f2878a6f8}{mlx5e\+\_\+port\+\_\+linkspeed}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 $\ast$speed)
\item 
int \mbox{\hyperlink{mlx5__port_8c_ad84aea8b1a6c4167ae5dbc0ce01b203e}{mlx5e\+\_\+port\+\_\+query\+\_\+pbmc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$out)
\item 
int \mbox{\hyperlink{mlx5__port_8c_ae185a737aa1d8a65c1bc231c7a379d71}{mlx5e\+\_\+port\+\_\+set\+\_\+pbmc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$in)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a3deead3af97d84e34bffc1065fa4263f}{mlx5e\+\_\+port\+\_\+query\+\_\+priority2buffer}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$buffer)
\item 
int \mbox{\hyperlink{mlx5__port_8c_a24b3d47fcb69f1d6ba0237a1891e0657}{mlx5e\+\_\+port\+\_\+set\+\_\+priority2buffer}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$buffer)
\end{DoxyCompactItemize}
\doxysubsection*{Variables}
\begin{DoxyCompactItemize}
\item 
static const u32 \mbox{\hyperlink{mlx5__port_8c_a2153f714da5c6a862ebdeda15fc864a6}{mlx5e\+\_\+link\+\_\+speed}} \mbox{[}$\,$\mbox{]}
\item 
static const u32 \mbox{\hyperlink{mlx5__port_8c_af6272fec04d4a106971b9360f7cbaba2}{mlx5e\+\_\+ext\+\_\+link\+\_\+speed}} \mbox{[}$\,$\mbox{]}
\end{DoxyCompactItemize}


\doxysubsection{Function Documentation}
\mbox{\Hypertarget{mlx5__port_8c_a3c2af679fa0271f4a969ecfa1495401c}\label{mlx5__port_8c_a3c2af679fa0271f4a969ecfa1495401c}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL@{EXPORT\_SYMBOL}}
\index{EXPORT\_SYMBOL@{EXPORT\_SYMBOL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL()}{EXPORT\_SYMBOL()}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_ac03a740d947a2d92b1b677fe0830f8d4}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a610ac90d45c8b649b2f43860b75c0e98}\label{mlx5__port_8c_a610ac90d45c8b649b2f43860b75c0e98}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [1/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a0caa23cc00d4e168071ff6341ae49604}{mlx5\+\_\+core\+\_\+access\+\_\+pmtu}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ae37be8d50dfc00c77b302d7c3e646bdf}\label{mlx5__port_8c_ae37be8d50dfc00c77b302d7c3e646bdf}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [2/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_aaf6341e9edb4b643a9dc3a78347bae73}{mlx5\+\_\+core\+\_\+access\+\_\+ptys}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ad63c95a432c5a4de41f5e07df0d8dfa3}\label{mlx5__port_8c_ad63c95a432c5a4de41f5e07df0d8dfa3}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [3/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_afdde4fabcf6d4cb43114de9b198b341d}{mlx5\+\_\+core\+\_\+access\+\_\+pvlc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_aadc19873e04a11376d4d81b8dcb465c2}\label{mlx5__port_8c_aadc19873e04a11376d4d81b8dcb465c2}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [4/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\+\_\+core\+\_\+access\+\_\+reg}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a06e57a5eec1fcf1cc6b87ac52f75349d}\label{mlx5__port_8c_a06e57a5eec1fcf1cc6b87ac52f75349d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [5/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_aa5769fc35d48240bd4da4be66fbeace0}{mlx5\+\_\+is\+\_\+wol\+\_\+supported}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ae0f27213f69f186770d614fe7d964d04}\label{mlx5__port_8c_ae0f27213f69f186770d614fe7d964d04}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [6/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a8eea1a4b68e68fda00f586588c09f045}{mlx5\+\_\+max\+\_\+tc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a264c8c45705883b0da2a172efb6d576b}\label{mlx5__port_8c_a264c8c45705883b0da2a172efb6d576b}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [7/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_aec4e85f531e077cf816101a0026ad225}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_adc2c0d304ce61541e3f6680e8484118f}\label{mlx5__port_8c_adc2c0d304ce61541e3f6680e8484118f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [8/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf}{mlx5\+\_\+query\+\_\+dropless\+\_\+mode}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ae3e768515c385b65edb9253dde88b815}\label{mlx5__port_8c_ae3e768515c385b65edb9253dde88b815}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [9/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a68b553361f112504e6c7e0b875e2feff}{mlx5\+\_\+query\+\_\+eeprom}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a06878aab4baf79c85dff25a15615735e}\label{mlx5__port_8c_a06878aab4baf79c85dff25a15615735e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [10/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a79915817bf848b70fa91e71a4890a669}{mlx5\+\_\+query\+\_\+module\+\_\+num}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a78e872d1b68c765d3c03b208d156f552}\label{mlx5__port_8c_a78e872d1b68c765d3c03b208d156f552}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [11/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a7c89eb44382a69714c0d74ef5fe56b20}{mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ac9f36a244a9dc5e5dc0c5c0a49bc12ac}\label{mlx5__port_8c_ac9f36a244a9dc5e5dc0c5c0a49bc12ac}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [12/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_ac7afe3e33144e7a3e096599ce95c5e36}{mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a80e8d753bebdebfa23e1ca2bae9ea901}\label{mlx5__port_8c_a80e8d753bebdebfa23e1ca2bae9ea901}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [13/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_ab0a0f0a0d6683482c1072fab351f72fc}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a14872591322b992e83074f4420d4a3c3}\label{mlx5__port_8c_a14872591322b992e83074f4420d4a3c3}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [14/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_abd68757fec6c356f065d94a476c28c65}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a7ee3185d525cdb6bdf0a50d97e96a97f}\label{mlx5__port_8c_a7ee3185d525cdb6bdf0a50d97e96a97f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [15/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a621c7ea77766c5fea50a28224084966a}{mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a32b81ebceda60cff60d4a7370362ffe9}\label{mlx5__port_8c_a32b81ebceda60cff60d4a7370362ffe9}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [16/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_abac20c4d9ef517252456717d991413b0}{mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a52cfb04b8a94c5b47582168b449e3640}\label{mlx5__port_8c_a52cfb04b8a94c5b47582168b449e3640}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [17/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_afda73217c985de0c61c6c3e32b1b3b06}{mlx5\+\_\+query\+\_\+port\+\_\+pfc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a9d357f6b75398a6aa3a64bd7ca0cd231}\label{mlx5__port_8c_a9d357f6b75398a6aa3a64bd7ca0cd231}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [18/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_ae0dd290d698ec73c31e72788ac917eec}{mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a2e2c3282548354790be9fd3eaace0e83}\label{mlx5__port_8c_a2e2c3282548354790be9fd3eaace0e83}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [19/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_aced7454cbd10f56a2415f76633bd9a47}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a845e0a281b7d098eaefed396b8f6f09f}\label{mlx5__port_8c_a845e0a281b7d098eaefed396b8f6f09f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [20/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_ad9607ac18934ee28ea596856e72b8895}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a894f7a5861f51fc78914c34b2158489c}\label{mlx5__port_8c_a894f7a5861f51fc78914c34b2158489c}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [21/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a8f0cbf29a10097b179dd9e3a4df0b873}{mlx5\+\_\+query\+\_\+port\+\_\+ptys}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a1cc7816636612018bc1d987c4ca3939e}\label{mlx5__port_8c_a1cc7816636612018bc1d987c4ca3939e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [22/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a3bff739bb1d26721baac627ba595236e}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a960c657f0f0d319c14b3a99fe2886684}\label{mlx5__port_8c_a960c657f0f0d319c14b3a99fe2886684}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [23/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a5bc1d6be45b568bf44747236844b8959}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a94391c44c7679a813e0c4a1c05b51ba6}\label{mlx5__port_8c_a94391c44c7679a813e0c4a1c05b51ba6}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [24/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a1e9dd0d7320c408a211ca9040488a41d}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a57df5a07ba0e2fcda6d695f3901205a6}\label{mlx5__port_8c_a57df5a07ba0e2fcda6d695f3901205a6}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [25/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc}{mlx5\+\_\+query\+\_\+qcam\+\_\+reg}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a3210e5b3945f45ce5cf9db4d9d980222}\label{mlx5__port_8c_a3210e5b3945f45ce5cf9db4d9d980222}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [26/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7}{mlx5\+\_\+query\+\_\+wol}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_ab6f378c260c5aef4bf778505c8308506}\label{mlx5__port_8c_ab6f378c260c5aef4bf778505c8308506}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [27/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81}{mlx5\+\_\+set\+\_\+dropless\+\_\+mode}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a4c6fe1a7fc3a46bcaa05d2b1ebb541d4}\label{mlx5__port_8c_a4c6fe1a7fc3a46bcaa05d2b1ebb541d4}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [28/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_af40ba1470375da922437a2d42ec10701}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a29c527ab4376d451ef80d46b7a72efa9}\label{mlx5__port_8c_a29c527ab4376d451ef80d46b7a72efa9}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [29/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_aedb5a503f9312b510754fe363a99c27e}{mlx5\+\_\+set\+\_\+port\+\_\+caps}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_aa8cbaf4331729a5fa1a988d5896dce69}\label{mlx5__port_8c_aa8cbaf4331729a5fa1a988d5896dce69}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [30/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a678235a0bf7e8e0cb35e0ce8ee96c5c9}{mlx5\+\_\+set\+\_\+port\+\_\+mtu}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a7dd8f8aa711c9560c3646d910d073d3d}\label{mlx5__port_8c_a7dd8f8aa711c9560c3646d910d073d3d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [31/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a0a52893d89d21c33052292f05e2d3618}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a71c1f1c071b174f74914a00a0a6219e4}\label{mlx5__port_8c_a71c1f1c071b174f74914a00a0a6219e4}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [32/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a8e61837d509b7d0f854f031e69002249}{mlx5\+\_\+set\+\_\+port\+\_\+proto}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a70d6edcde3dac71eb985b06ec53955f4}\label{mlx5__port_8c_a70d6edcde3dac71eb985b06ec53955f4}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [33/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a1f21911cbbc6a806d4f165efd6711de1}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a2fe382987d98ce7c2796d7c7f61c3c85}\label{mlx5__port_8c_a2fe382987d98ce7c2796d7c7f61c3c85}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [34/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{port_8h_a1824b2318af707b6146d7c431e305694}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_af191ec23e963bf8b95575d72ff4b8081}\label{mlx5__port_8c_af191ec23e963bf8b95575d72ff4b8081}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [35/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_a0500c03124e21491718637c608ed5b47}{mlx5\+\_\+set\+\_\+wol}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a1cbf406c5503d80b13ae321d03020a0b}\label{mlx5__port_8c_a1cbf406c5503d80b13ae321d03020a0b}} 
\index{mlx5\_port.c@{mlx5\_port.c}!EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}}
\index{EXPORT\_SYMBOL\_GPL@{EXPORT\_SYMBOL\_GPL}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{EXPORT\_SYMBOL\_GPL()}{EXPORT\_SYMBOL\_GPL()}\hspace{0.1cm}{\footnotesize\ttfamily [36/36]}}
{\footnotesize\ttfamily EXPORT\+\_\+\+SYMBOL\+\_\+\+GPL (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c}{mlx5\+\_\+toggle\+\_\+port\+\_\+link}}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{mlx5__port_8c_a0caa23cc00d4e168071ff6341ae49604}\label{mlx5__port_8c_a0caa23cc00d4e168071ff6341ae49604}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_core\_access\_pmtu@{mlx5\_core\_access\_pmtu}}
\index{mlx5\_core\_access\_pmtu@{mlx5\_core\_access\_pmtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_core\_access\_pmtu()}{mlx5\_core\_access\_pmtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+core\+\_\+access\+\_\+pmtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{struct \mbox{\hyperlink{structmlx5__pmtu__reg}{mlx5\+\_\+pmtu\+\_\+reg}} $\ast$}]{pmtu,  }\item[{int}]{write }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00638}{638}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{driver_8h_source_l00775}{mlx5\+\_\+pmtu\+\_\+reg\+::admin\+\_\+mtu}}, \mbox{\hyperlink{driver_8h_source_l00773}{mlx5\+\_\+pmtu\+\_\+reg\+::local\+\_\+port}}, \mbox{\hyperlink{driver_8h_source_l00774}{mlx5\+\_\+pmtu\+\_\+reg\+::max\+\_\+mtu}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00138}{MLX5\+\_\+\+REG\+\_\+\+PMTU}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, \mbox{\hyperlink{driver_8h_source_l00914}{mlx5\+\_\+vzalloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00624}{mtu\+\_\+to\+\_\+ib\+\_\+mtu()}}, and \mbox{\hyperlink{driver_8h_source_l00776}{mlx5\+\_\+pmtu\+\_\+reg\+::oper\+\_\+mtu}}.



Referenced by \mbox{\hyperlink{mlx5__ib__main_8c_source_l00912}{mlx5\+\_\+query\+\_\+hca\+\_\+port()}}.

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\mbox{\Hypertarget{mlx5__port_8c_aaf6341e9edb4b643a9dc3a78347bae73}\label{mlx5__port_8c_aaf6341e9edb4b643a9dc3a78347bae73}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_core\_access\_ptys@{mlx5\_core\_access\_ptys}}
\index{mlx5\_core\_access\_ptys@{mlx5\_core\_access\_ptys}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_core\_access\_ptys()}{mlx5\_core\_access\_ptys()}}
{\footnotesize\ttfamily int mlx5\+\_\+core\+\_\+access\+\_\+ptys (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{struct \mbox{\hyperlink{structmlx5__ptys__reg}{mlx5\+\_\+ptys\+\_\+reg}} $\ast$}]{ptys,  }\item[{int}]{write }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00551}{551}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{driver_8h_source_l00756}{mlx5\+\_\+ptys\+\_\+reg\+::eth\+\_\+proto\+\_\+admin}}, \mbox{\hyperlink{driver_8h_source_l00753}{mlx5\+\_\+ptys\+\_\+reg\+::eth\+\_\+proto\+\_\+cap}}, \mbox{\hyperlink{driver_8h_source_l00762}{mlx5\+\_\+ptys\+\_\+reg\+::eth\+\_\+proto\+\_\+lp\+\_\+advertise}}, \mbox{\hyperlink{driver_8h_source_l00759}{mlx5\+\_\+ptys\+\_\+reg\+::eth\+\_\+proto\+\_\+oper}}, \mbox{\hyperlink{driver_8h_source_l00757}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+link\+\_\+width\+\_\+admin}}, \mbox{\hyperlink{driver_8h_source_l00754}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+link\+\_\+width\+\_\+cap}}, \mbox{\hyperlink{driver_8h_source_l00760}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+link\+\_\+width\+\_\+oper}}, \mbox{\hyperlink{driver_8h_source_l00758}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+proto\+\_\+admin}}, \mbox{\hyperlink{driver_8h_source_l00755}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+proto\+\_\+cap}}, \mbox{\hyperlink{driver_8h_source_l00761}{mlx5\+\_\+ptys\+\_\+reg\+::ib\+\_\+proto\+\_\+oper}}, \mbox{\hyperlink{driver_8h_source_l00751}{mlx5\+\_\+ptys\+\_\+reg\+::local\+\_\+port}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, \mbox{\hyperlink{driver_8h_source_l00914}{mlx5\+\_\+vzalloc()}}, and \mbox{\hyperlink{driver_8h_source_l00752}{mlx5\+\_\+ptys\+\_\+reg\+::proto\+\_\+mask}}.



Referenced by \mbox{\hyperlink{mlx5__ib__main_8c_source_l00912}{mlx5\+\_\+query\+\_\+hca\+\_\+port()}}.

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\mbox{\Hypertarget{mlx5__port_8c_afdde4fabcf6d4cb43114de9b198b341d}\label{mlx5__port_8c_afdde4fabcf6d4cb43114de9b198b341d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_core\_access\_pvlc@{mlx5\_core\_access\_pvlc}}
\index{mlx5\_core\_access\_pvlc@{mlx5\_core\_access\_pvlc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_core\_access\_pvlc()}{mlx5\_core\_access\_pvlc()}}
{\footnotesize\ttfamily int mlx5\+\_\+core\+\_\+access\+\_\+pvlc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{struct \mbox{\hyperlink{structmlx5__pvlc__reg}{mlx5\+\_\+pvlc\+\_\+reg}} $\ast$}]{pvlc,  }\item[{int}]{write }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00523}{523}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{driver_8h_source_l00766}{mlx5\+\_\+pvlc\+\_\+reg\+::local\+\_\+port}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00147}{MLX5\+\_\+\+REG\+\_\+\+PVLC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, \mbox{\hyperlink{driver_8h_source_l00768}{mlx5\+\_\+pvlc\+\_\+reg\+::vl\+\_\+admin}}, \mbox{\hyperlink{driver_8h_source_l00767}{mlx5\+\_\+pvlc\+\_\+reg\+::vl\+\_\+hw\+\_\+cap}}, and \mbox{\hyperlink{driver_8h_source_l00769}{mlx5\+\_\+pvlc\+\_\+reg\+::vl\+\_\+operational}}.



Referenced by \mbox{\hyperlink{mlx5__ib__main_8c_source_l00912}{mlx5\+\_\+query\+\_\+hca\+\_\+port()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa}\label{mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_core\_access\_reg@{mlx5\_core\_access\_reg}}
\index{mlx5\_core\_access\_reg@{mlx5\_core\_access\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_core\_access\_reg()}{mlx5\_core\_access\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+core\+\_\+access\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{void $\ast$}]{data\+\_\+in,  }\item[{int}]{size\+\_\+in,  }\item[{void $\ast$}]{data\+\_\+out,  }\item[{int}]{size\+\_\+out,  }\item[{u16}]{reg\+\_\+num,  }\item[{int}]{arg,  }\item[{int}]{write }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00035}{35}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__en__tx_8c_source_l00001}{data}}, \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00203}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+ACCESS\+\_\+\+REG}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{driver_8h_source_l00914}{mlx5\+\_\+vzalloc()}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00638}{mlx5\+\_\+core\+\_\+access\+\_\+pmtu()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00551}{mlx5\+\_\+core\+\_\+access\+\_\+ptys()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00523}{mlx5\+\_\+core\+\_\+access\+\_\+pvlc()}}, \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00166}{mlx5\+\_\+core\+\_\+get\+\_\+diagnostics\+\_\+full()}}, \mbox{\hyperlink{mlx5__vport_8c_source_l01819}{mlx5\+\_\+core\+\_\+query\+\_\+ib\+\_\+ppcnt()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00045}{mlx5\+\_\+fpga\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00075}{mlx5\+\_\+fpga\+\_\+caps()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00168}{mlx5\+\_\+fpga\+\_\+ctrl\+\_\+connect()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00084}{mlx5\+\_\+fpga\+\_\+ctrl\+\_\+op()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00127}{mlx5\+\_\+fpga\+\_\+ctrl\+\_\+write()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00151}{mlx5\+\_\+fpga\+\_\+query()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00195}{mlx5\+\_\+fpga\+\_\+query\+\_\+mtmp()}}, \mbox{\hyperlink{mlx5fpga__cmd_8c_source_l00324}{mlx5\+\_\+fpga\+\_\+shell\+\_\+counters()}}, \mbox{\hyperlink{mlx5__ib__main_8c_source_l01054}{mlx5\+\_\+ib\+\_\+modify\+\_\+device()}}, \mbox{\hyperlink{mlx5__main_8c_source_l00240}{mlx5\+\_\+pci\+\_\+read\+\_\+power\+\_\+status()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01150}{mlx5\+\_\+query\+\_\+dscp2prio()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00703}{mlx5\+\_\+query\+\_\+eeprom()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00097}{mlx5\+\_\+query\+\_\+mcam\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01268}{mlx5\+\_\+query\+\_\+mfrl\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00682}{mlx5\+\_\+query\+\_\+module\+\_\+num()}}, \mbox{\hyperlink{mlx5__ib__main_8c_source_l00626}{mlx5\+\_\+query\+\_\+node\+\_\+desc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00085}{mlx5\+\_\+query\+\_\+pcam\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00323}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00340}{mlx5\+\_\+query\+\_\+port\+\_\+mtu()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00408}{mlx5\+\_\+query\+\_\+port\+\_\+pause()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00428}{mlx5\+\_\+query\+\_\+port\+\_\+pfc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00924}{mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00306}{mlx5\+\_\+query\+\_\+port\+\_\+status()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00072}{mlx5\+\_\+query\+\_\+qcam\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01097}{mlx5\+\_\+query\+\_\+trust\+\_\+state()}}, \mbox{\hyperlink{mlx5__fw_8c_source_l00394}{mlx5\+\_\+reg\+\_\+mcc\+\_\+query()}}, \mbox{\hyperlink{mlx5__fw_8c_source_l00375}{mlx5\+\_\+reg\+\_\+mcc\+\_\+set()}}, \mbox{\hyperlink{mlx5__fw_8c_source_l00419}{mlx5\+\_\+reg\+\_\+mcda\+\_\+set()}}, \mbox{\hyperlink{mlx5__fw_8c_source_l00450}{mlx5\+\_\+reg\+\_\+mcqi\+\_\+query()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01113}{mlx5\+\_\+set\+\_\+dscp2prio()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01282}{mlx5\+\_\+set\+\_\+mfrl\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00201}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00131}{mlx5\+\_\+set\+\_\+port\+\_\+caps()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00364}{mlx5\+\_\+set\+\_\+port\+\_\+mtu()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00383}{mlx5\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00946}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00265}{mlx5\+\_\+set\+\_\+port\+\_\+proto()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00289}{mlx5\+\_\+set\+\_\+port\+\_\+status()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01083}{mlx5\+\_\+set\+\_\+trust\+\_\+state()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00441}{mlx5e\+\_\+fec\+\_\+mask\+\_\+10x\+\_\+25x\+\_\+handler()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00546}{mlx5e\+\_\+fec\+\_\+mask\+\_\+50x\+\_\+handler()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00372}{mlx5e\+\_\+fec\+\_\+update()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00844}{mlx5e\+\_\+hw\+\_\+temperature\+\_\+update()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01402}{mlx5e\+\_\+port\+\_\+query\+\_\+pbmc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01437}{mlx5e\+\_\+port\+\_\+query\+\_\+priority2buffer()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01419}{mlx5e\+\_\+port\+\_\+set\+\_\+pbmc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01469}{mlx5e\+\_\+port\+\_\+set\+\_\+priority2buffer()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00634}{mlx5e\+\_\+update\+\_\+pcie\+\_\+counters()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00684}{mlx5e\+\_\+update\+\_\+pport\+\_\+counters()}}, and \mbox{\hyperlink{mlx5__main_8c_source_l00541}{set\+\_\+hca\+\_\+ctrl()}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a588ab969bb7070e2dc60df62da38c8fa_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_aa5769fc35d48240bd4da4be66fbeace0}\label{mlx5__port_8c_aa5769fc35d48240bd4da4be66fbeace0}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_is\_wol\_supported@{mlx5\_is\_wol\_supported}}
\index{mlx5\_is\_wol\_supported@{mlx5\_is\_wol\_supported}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_is\_wol\_supported()}{mlx5\_is\_wol\_supported()}}
{\footnotesize\ttfamily u8 mlx5\+\_\+is\+\_\+wol\+\_\+supported (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00454}{454}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01027}{MLX5\+\_\+\+CAP\+\_\+\+GEN}}, \mbox{\hyperlink{driver_8h_source_l00726}{MLX5\+\_\+\+WOL\+\_\+\+ARP}}, \mbox{\hyperlink{driver_8h_source_l00727}{MLX5\+\_\+\+WOL\+\_\+\+BROADCAST}}, \mbox{\hyperlink{driver_8h_source_l00725}{MLX5\+\_\+\+WOL\+\_\+\+MAGIC}}, \mbox{\hyperlink{driver_8h_source_l00728}{MLX5\+\_\+\+WOL\+\_\+\+MULTICAST}}, \mbox{\hyperlink{driver_8h_source_l00730}{MLX5\+\_\+\+WOL\+\_\+\+PHY\+\_\+\+ACTIVITY}}, \mbox{\hyperlink{driver_8h_source_l00724}{MLX5\+\_\+\+WOL\+\_\+\+SECURED\+\_\+\+MAGIC}}, and \mbox{\hyperlink{driver_8h_source_l00729}{MLX5\+\_\+\+WOL\+\_\+\+UNICAST}}.

\mbox{\Hypertarget{mlx5__port_8c_a8eea1a4b68e68fda00f586588c09f045}\label{mlx5__port_8c_a8eea1a4b68e68fda00f586588c09f045}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_max\_tc@{mlx5\_max\_tc}}
\index{mlx5\_max\_tc@{mlx5\_max\_tc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_max\_tc()}{mlx5\_max\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+max\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00854}{854}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01027}{MLX5\+\_\+\+CAP\+\_\+\+GEN}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00900}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01015}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00874}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00946}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01001}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00966}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00111}{mlx5e\+\_\+getmaxrate()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00334}{mlx5e\+\_\+prio\+\_\+to\+\_\+tc\+\_\+handler()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00194}{mlx5e\+\_\+tc\+\_\+get\+\_\+parameters()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00224}{mlx5e\+\_\+tc\+\_\+maxrate\+\_\+handler()}}, and \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00267}{mlx5e\+\_\+tc\+\_\+rate\+\_\+share\+\_\+handler()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a8eea1a4b68e68fda00f586588c09f045_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a7fd9708647bfc0a48bc12ce79baf2ef4}\label{mlx5__port_8c_a7fd9708647bfc0a48bc12ce79baf2ef4}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_modify\_port\_cong\_params@{mlx5\_modify\_port\_cong\_params}}
\index{mlx5\_modify\_port\_cong\_params@{mlx5\_modify\_port\_cong\_params}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_modify\_port\_cong\_params()}{mlx5\_modify\_port\_cong\_params()}}
{\footnotesize\ttfamily int mlx5\+\_\+modify\+\_\+port\+\_\+cong\+\_\+params (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{in,  }\item[{int}]{in\+\_\+size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01034}{1034}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00224}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+MODIFY\+\_\+\+CONG\+\_\+\+PARAMS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a7fd9708647bfc0a48bc12ce79baf2ef4_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a2c748bbc61f9e1c2a16e1217ffba1d54}\label{mlx5__port_8c_a2c748bbc61f9e1c2a16e1217ffba1d54}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_modify\_port\_cong\_status@{mlx5\_modify\_port\_cong\_status}}
\index{mlx5\_modify\_port\_cong\_status@{mlx5\_modify\_port\_cong\_status}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_modify\_port\_cong\_status()}{mlx5\_modify\_port\_cong\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+modify\+\_\+port\+\_\+cong\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{protocol,  }\item[{int}]{priority,  }\item[{int}]{enable }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00814}{814}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00222}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+MODIFY\+\_\+\+CONG\+\_\+\+STATUS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_aec4e85f531e077cf816101a0026ad225}\label{mlx5__port_8c_aec4e85f531e077cf816101a0026ad225}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_modify\_port\_tc\_rate\_limit@{mlx5\_modify\_port\_tc\_rate\_limit}}
\index{mlx5\_modify\_port\_tc\_rate\_limit@{mlx5\_modify\_port\_tc\_rate\_limit}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_modify\_port\_tc\_rate\_limit()}{mlx5\_modify\_port\_tc\_rate\_limit()}}
{\footnotesize\ttfamily int mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{max\+\_\+bw\+\_\+value,  }\item[{const u8 $\ast$}]{max\+\_\+bw\+\_\+units }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00900}{900}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00224}{mlx5e\+\_\+tc\+\_\+maxrate\+\_\+handler()}}.

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\mbox{\Hypertarget{mlx5__port_8c_abc3477405acfbb95183852d9c779374f}\label{mlx5__port_8c_abc3477405acfbb95183852d9c779374f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_port\_query\_eth\_proto@{mlx5\_port\_query\_eth\_proto}}
\index{mlx5\_port\_query\_eth\_proto@{mlx5\_port\_query\_eth\_proto}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_port\_query\_eth\_proto()}{mlx5\_port\_query\_eth\_proto()}}
{\footnotesize\ttfamily int mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8}]{port,  }\item[{bool}]{ext,  }\item[{struct \mbox{\hyperlink{structmlx5e__port__eth__proto}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto}} $\ast$}]{eproto }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01363}{1363}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{port_8h_source_l00150}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::admin}}, \mbox{\hyperlink{port_8h_source_l00149}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::cap}}, \mbox{\hyperlink{port_8h_source_l00163}{MLX5\+\_\+\+GET\+\_\+\+ETH\+\_\+\+PROTO}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{port_8h_source_l00151}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::oper}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01383}{mlx5e\+\_\+port\+\_\+linkspeed()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a0e73dc5444d1ef37219430959be09460}\label{mlx5__port_8c_a0e73dc5444d1ef37219430959be09460}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_diagnostic\_counters@{mlx5\_query\_diagnostic\_counters}}
\index{mlx5\_query\_diagnostic\_counters@{mlx5\_query\_diagnostic\_counters}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_diagnostic\_counters()}{mlx5\_query\_diagnostic\_counters()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+diagnostic\+\_\+counters (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{num\+\_\+of\+\_\+samples,  }\item[{u16}]{sample\+\_\+index,  }\item[{void $\ast$}]{out,  }\item[{int}]{out\+\_\+size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01068}{1068}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00220}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+DIAGNOSTICS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00166}{mlx5\+\_\+core\+\_\+get\+\_\+diagnostics\+\_\+full()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf}\label{mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_dropless\_mode@{mlx5\_query\_dropless\_mode}}
\index{mlx5\_query\_dropless\_mode@{mlx5\_query\_dropless\_mode}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_dropless\_mode()}{mlx5\_query\_dropless\_mode()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+dropless\+\_\+mode (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u16 $\ast$}]{timeout }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00490}{490}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00256}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+DELAY\+\_\+\+DROP\+\_\+\+PARAMS}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a24093f581ec0a964e6de46ac48d15caf_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_aa003c31ff5f5f6dae8728880dd8392db}\label{mlx5__port_8c_aa003c31ff5f5f6dae8728880dd8392db}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_dscp2prio@{mlx5\_query\_dscp2prio}}
\index{mlx5\_query\_dscp2prio@{mlx5\_query\_dscp2prio}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_dscp2prio()}{mlx5\_query\_dscp2prio()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+dscp2prio (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{dscp2prio }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01150}{1150}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00118}{MLX5\+\_\+\+GET16}}, \mbox{\hyperlink{port_8h_source_l00224}{MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP}}, \mbox{\hyperlink{driver_8h_source_l00127}{MLX5\+\_\+\+REG\+\_\+\+QPDPM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00170}{mlx5e\+\_\+get\+\_\+dscp()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a68b553361f112504e6c7e0b875e2feff}\label{mlx5__port_8c_a68b553361f112504e6c7e0b875e2feff}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_eeprom@{mlx5\_query\_eeprom}}
\index{mlx5\_query\_eeprom@{mlx5\_query\_eeprom}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_eeprom()}{mlx5\_query\_eeprom()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+eeprom (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{i2c\+\_\+addr,  }\item[{int}]{page\+\_\+num,  }\item[{int}]{device\+\_\+addr,  }\item[{int}]{size,  }\item[{int}]{module\+\_\+num,  }\item[{u32 $\ast$}]{data,  }\item[{int $\ast$}]{size\+\_\+read }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00703}{703}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__en__tx_8c_source_l00001}{data}}, \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00057}{MLX5\+\_\+\+EEPROM\+\_\+\+MAX\+\_\+\+BYTES}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00157}{MLX5\+\_\+\+REG\+\_\+\+MCIA}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00357}{mlx5\+\_\+get\+\_\+eeprom()}}, \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00302}{mlx5\+\_\+get\+\_\+eeprom\+\_\+info()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a09eec2500cd72587529a1063460d07da}\label{mlx5__port_8c_a09eec2500cd72587529a1063460d07da}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_mcam\_reg@{mlx5\_query\_mcam\_reg}}
\index{mlx5\_query\_mcam\_reg@{mlx5\_query\_mcam\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_mcam\_reg()}{mlx5\_query\_mcam\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+mcam\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{mcam,  }\item[{u8}]{feature\+\_\+group,  }\item[{u8}]{access\+\_\+reg\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00097}{97}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00163}{MLX5\+\_\+\+REG\+\_\+\+MCAM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__fw_8c_source_l00130}{mlx5\+\_\+get\+\_\+mcam\+\_\+reg()}}.

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\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a5a6024f486716265b7dc536a8beeb84a}\label{mlx5__port_8c_a5a6024f486716265b7dc536a8beeb84a}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_mfrl\_reg@{mlx5\_query\_mfrl\_reg}}
\index{mlx5\_query\_mfrl\_reg@{mlx5\_query\_mfrl\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_mfrl\_reg()}{mlx5\_query\_mfrl\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+mfrl\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{reset\+\_\+level }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01268}{1268}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00158}{MLX5\+\_\+\+REG\+\_\+\+MFRL}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a5a6024f486716265b7dc536a8beeb84a_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a79915817bf848b70fa91e71a4890a669}\label{mlx5__port_8c_a79915817bf848b70fa91e71a4890a669}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_module\_num@{mlx5\_query\_module\_num}}
\index{mlx5\_query\_module\_num@{mlx5\_query\_module\_num}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_module\_num()}{mlx5\_query\_module\_num()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+module\+\_\+num (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{module\+\_\+num }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00682}{682}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00058}{MLX5\+\_\+\+EEPROM\+\_\+\+IDENTIFIER\+\_\+\+BYTE\+\_\+\+MASK}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00137}{MLX5\+\_\+\+REG\+\_\+\+PMLP}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00302}{mlx5\+\_\+get\+\_\+eeprom\+\_\+info()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{mlx5__port_8c_af2112cbf5091b075f972dc74a44ea1f7}\label{mlx5__port_8c_af2112cbf5091b075f972dc74a44ea1f7}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_pcam\_reg@{mlx5\_query\_pcam\_reg}}
\index{mlx5\_query\_pcam\_reg@{mlx5\_query\_pcam\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pcam\_reg()}{mlx5\_query\_pcam\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pcam\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{pcam,  }\item[{u8}]{feature\+\_\+group,  }\item[{u8}]{access\+\_\+reg\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00085}{85}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00153}{MLX5\+\_\+\+REG\+\_\+\+PCAM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__fw_8c_source_l00123}{mlx5\+\_\+get\+\_\+pcam\+\_\+reg()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a906eb4aeb43db4d5385183f0d1a0e7df}\label{mlx5__port_8c_a906eb4aeb43db4d5385183f0d1a0e7df}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_pddr@{mlx5\_query\_pddr}}
\index{mlx5\_query\_pddr@{mlx5\_query\_pddr}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr()}{mlx5\_query\_pddr()}}
{\footnotesize\ttfamily static int mlx5\+\_\+query\+\_\+pddr (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{local\+\_\+port,  }\item[{int}]{page\+\_\+select,  }\item[{u32 $\ast$}]{out,  }\item[{int}]{outlen }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01181}{1181}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01143}{MLX5\+\_\+\+CAP\+\_\+\+PCAM\+\_\+\+REG}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00151}{MLX5\+\_\+\+REG\+\_\+\+PDDR}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01227}{mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01195}{mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info()}}, and \mbox{\hyperlink{mlx5__port_8c_source_l01242}{mlx5\+\_\+query\+\_\+pddr\+\_\+troubleshooting\+\_\+info()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a7c89eb44382a69714c0d74ef5fe56b20}\label{mlx5__port_8c_a7c89eb44382a69714c0d74ef5fe56b20}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_pddr\_cable\_type@{mlx5\_query\_pddr\_cable\_type}}
\index{mlx5\_query\_pddr\_cable\_type@{mlx5\_query\_pddr\_cable\_type}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr\_cable\_type()}{mlx5\_query\_pddr\_cable\_type()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{local\+\_\+port,  }\item[{u8 $\ast$}]{cable\+\_\+type }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01227}{1227}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__core_8h_source_l00085}{MLX5\+\_\+\+PDDR\+\_\+\+MODULE\+\_\+\+INFO\+\_\+\+PAGE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\mbox{\Hypertarget{mlx5__port_8c_ac7afe3e33144e7a3e096599ce95c5e36}\label{mlx5__port_8c_ac7afe3e33144e7a3e096599ce95c5e36}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_pddr\_range\_info@{mlx5\_query\_pddr\_range\_info}}
\index{mlx5\_query\_pddr\_range\_info@{mlx5\_query\_pddr\_range\_info}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr\_range\_info()}{mlx5\_query\_pddr\_range\_info()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{local\+\_\+port,  }\item[{u8 $\ast$}]{is\+\_\+er\+\_\+type }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01195}{1195}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__core_8h_source_l00085}{MLX5\+\_\+\+PDDR\+\_\+\+MODULE\+\_\+\+INFO\+\_\+\+PAGE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a88b95de65bb94f09336a96244b52f69e}\label{mlx5__port_8c_a88b95de65bb94f09336a96244b52f69e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_pddr\_troubleshooting\_info@{mlx5\_query\_pddr\_troubleshooting\_info}}
\index{mlx5\_query\_pddr\_troubleshooting\_info@{mlx5\_query\_pddr\_troubleshooting\_info}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr\_troubleshooting\_info()}{mlx5\_query\_pddr\_troubleshooting\_info()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pddr\+\_\+troubleshooting\+\_\+info (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u16 $\ast$}]{monitor\+\_\+opcode,  }\item[{u8 $\ast$}]{status\+\_\+message,  }\item[{size\+\_\+t}]{sm\+\_\+len }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01242}{1242}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__core_8h_source_l00084}{MLX5\+\_\+\+PDDR\+\_\+\+TROUBLESHOOTING\+\_\+\+INFO\+\_\+\+PAGE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{mlx5__port_8c_ab0a0f0a0d6683482c1072fab351f72fc}\label{mlx5__port_8c_ab0a0f0a0d6683482c1072fab351f72fc}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_admin\_status@{mlx5\_query\_port\_admin\_status}}
\index{mlx5\_query\_port\_admin\_status@{mlx5\_query\_port\_admin\_status}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_admin\_status()}{mlx5\_query\_port\_admin\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} $\ast$}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00323}{323}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00120}{mlx5\+\_\+toggle\+\_\+port\+\_\+link()}}.

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\mbox{\Hypertarget{mlx5__port_8c_abd68757fec6c356f065d94a476c28c65}\label{mlx5__port_8c_abd68757fec6c356f065d94a476c28c65}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_autoneg@{mlx5\_query\_port\_autoneg}}
\index{mlx5\_query\_port\_autoneg@{mlx5\_query\_port\_autoneg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_autoneg()}{mlx5\_query\_port\_autoneg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+autoneg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{proto\+\_\+mask,  }\item[{u8 $\ast$}]{an\+\_\+disable\+\_\+cap,  }\item[{u8 $\ast$}]{an\+\_\+disable\+\_\+status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00184}{184}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00201}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a57cfdc485d1761b3978dce749a4a7582}\label{mlx5__port_8c_a57cfdc485d1761b3978dce749a4a7582}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_cong\_params@{mlx5\_query\_port\_cong\_params}}
\index{mlx5\_query\_port\_cong\_params@{mlx5\_query\_port\_cong\_params}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_cong\_params()}{mlx5\_query\_port\_cong\_params()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+params (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{protocol,  }\item[{void $\ast$}]{out,  }\item[{int}]{out\+\_\+size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00829}{829}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00223}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+CONG\+\_\+\+PARAMS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a8a26b14a2aefedd2dc70cf5d0f30feb9}\label{mlx5__port_8c_a8a26b14a2aefedd2dc70cf5d0f30feb9}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_cong\_statistics@{mlx5\_query\_port\_cong\_statistics}}
\index{mlx5\_query\_port\_cong\_statistics@{mlx5\_query\_port\_cong\_statistics}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_cong\_statistics()}{mlx5\_query\_port\_cong\_statistics()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+statistics (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{clear,  }\item[{void $\ast$}]{out,  }\item[{int}]{out\+\_\+size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01045}{1045}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00225}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+CONG\+\_\+\+STATISTICS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a8a26b14a2aefedd2dc70cf5d0f30feb9_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a42b776e2ece7d18b07f73c05ce2ceb95}\label{mlx5__port_8c_a42b776e2ece7d18b07f73c05ce2ceb95}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_cong\_status@{mlx5\_query\_port\_cong\_status}}
\index{mlx5\_query\_port\_cong\_status@{mlx5\_query\_port\_cong\_status}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_cong\_status()}{mlx5\_query\_port\_cong\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+cong\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{protocol,  }\item[{int}]{priority,  }\item[{int $\ast$}]{is\+\_\+enable }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00794}{794}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00221}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+CONG\+\_\+\+STATUS}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a42b776e2ece7d18b07f73c05ce2ceb95_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_ac03a740d947a2d92b1b677fe0830f8d4}\label{mlx5__port_8c_ac03a740d947a2d92b1b677fe0830f8d4}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_eth\_proto\_oper@{mlx5\_query\_port\_eth\_proto\_oper}}
\index{mlx5\_query\_port\_eth\_proto\_oper@{mlx5\_query\_port\_eth\_proto\_oper}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_eth\_proto\_oper()}{mlx5\_query\_port\_eth\_proto\_oper()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+oper,  }\item[{u8}]{local\+\_\+port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00248}{248}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ac03a740d947a2d92b1b677fe0830f8d4_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a621c7ea77766c5fea50a28224084966a}\label{mlx5__port_8c_a621c7ea77766c5fea50a28224084966a}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_max\_mtu@{mlx5\_query\_port\_max\_mtu}}
\index{mlx5\_query\_port\_max\_mtu@{mlx5\_query\_port\_max\_mtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_max\_mtu()}{mlx5\_query\_port\_max\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{max\+\_\+mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00377}{377}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00340}{mlx5\+\_\+query\+\_\+port\+\_\+mtu()}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a621c7ea77766c5fea50a28224084966a_cgraph}
\end{center}
\end{figure}
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a621c7ea77766c5fea50a28224084966a_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_ae001db5373f3c87a69c2e3c102549a50}\label{mlx5__port_8c_ae001db5373f3c87a69c2e3c102549a50}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_mtu@{mlx5\_query\_port\_mtu}}
\index{mlx5\_query\_port\_mtu@{mlx5\_query\_port\_mtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_mtu()}{mlx5\_query\_port\_mtu()}}
{\footnotesize\ttfamily static int mlx5\+\_\+query\+\_\+port\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{admin\+\_\+mtu,  }\item[{int $\ast$}]{max\+\_\+mtu,  }\item[{int $\ast$}]{oper\+\_\+mtu }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00340}{340}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00138}{MLX5\+\_\+\+REG\+\_\+\+PMTU}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00377}{mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu()}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00448}{mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu()}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ae001db5373f3c87a69c2e3c102549a50_cgraph}
\end{center}
\end{figure}
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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ae001db5373f3c87a69c2e3c102549a50_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_abac20c4d9ef517252456717d991413b0}\label{mlx5__port_8c_abac20c4d9ef517252456717d991413b0}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_oper\_mtu@{mlx5\_query\_port\_oper\_mtu}}
\index{mlx5\_query\_port\_oper\_mtu@{mlx5\_query\_port\_oper\_mtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_oper\_mtu()}{mlx5\_query\_port\_oper\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{oper\+\_\+mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00448}{448}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00340}{mlx5\+\_\+query\+\_\+port\+\_\+mtu()}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03210}{mlx5e\+\_\+set\+\_\+dev\+\_\+port\+\_\+mtu()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_abac20c4d9ef517252456717d991413b0_cgraph}
\end{center}
\end{figure}
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\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_abac20c4d9ef517252456717d991413b0_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a81bd9d53a4b98130eb63d2c5c357d1ea}\label{mlx5__port_8c_a81bd9d53a4b98130eb63d2c5c357d1ea}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_pause@{mlx5\_query\_port\_pause}}
\index{mlx5\_query\_port\_pause@{mlx5\_query\_port\_pause}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_pause()}{mlx5\_query\_port\_pause()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+pause (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{port,  }\item[{u32 $\ast$}]{rx\+\_\+pause,  }\item[{u32 $\ast$}]{tx\+\_\+pause }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00408}{408}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a81bd9d53a4b98130eb63d2c5c357d1ea_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_afda73217c985de0c61c6c3e32b1b3b06}\label{mlx5__port_8c_afda73217c985de0c61c6c3e32b1b3b06}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_pfc@{mlx5\_query\_port\_pfc}}
\index{mlx5\_query\_port\_pfc@{mlx5\_query\_port\_pfc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_pfc()}{mlx5\_query\_port\_pfc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+pfc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8 $\ast$}]{pfc\+\_\+en\+\_\+tx,  }\item[{u8 $\ast$}]{pfc\+\_\+en\+\_\+rx }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00428}{428}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_afda73217c985de0c61c6c3e32b1b3b06_cgraph}
\end{center}
\end{figure}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_afda73217c985de0c61c6c3e32b1b3b06_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_ae0dd290d698ec73c31e72788ac917eec}\label{mlx5__port_8c_ae0dd290d698ec73c31e72788ac917eec}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_prio\_tc@{mlx5\_query\_port\_prio\_tc}}
\index{mlx5\_query\_port\_prio\_tc@{mlx5\_query\_port\_prio\_tc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_prio\_tc()}{mlx5\_query\_port\_prio\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{prio,  }\item[{u8 $\ast$}]{tc }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00924}{924}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00126}{MLX5\+\_\+\+REG\+\_\+\+QTCT}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{en_8h_source_l00049}{tc}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00312}{mlx5e\+\_\+get\+\_\+prio\+\_\+tc()}}.

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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ae0dd290d698ec73c31e72788ac917eec_cgraph}
\end{center}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ae0dd290d698ec73c31e72788ac917eec_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_aced7454cbd10f56a2415f76633bd9a47}\label{mlx5__port_8c_aced7454cbd10f56a2415f76633bd9a47}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_proto\_admin@{mlx5\_query\_port\_proto\_admin}}
\index{mlx5\_query\_port\_proto\_admin@{mlx5\_query\_port\_proto\_admin}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_proto\_admin()}{mlx5\_query\_port\_proto\_admin()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00229}{229}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_aced7454cbd10f56a2415f76633bd9a47_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_ad9607ac18934ee28ea596856e72b8895}\label{mlx5__port_8c_ad9607ac18934ee28ea596856e72b8895}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_proto\_cap@{mlx5\_query\_port\_proto\_cap}}
\index{mlx5\_query\_port\_proto\_cap@{mlx5\_query\_port\_proto\_cap}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_proto\_cap()}{mlx5\_query\_port\_proto\_cap()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+cap,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00165}{165}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ad9607ac18934ee28ea596856e72b8895_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a8f0cbf29a10097b179dd9e3a4df0b873}\label{mlx5__port_8c_a8f0cbf29a10097b179dd9e3a4df0b873}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_ptys@{mlx5\_query\_port\_ptys}}
\index{mlx5\_query\_port\_ptys@{mlx5\_query\_port\_ptys}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_ptys()}{mlx5\_query\_port\_ptys()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+ptys (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{ptys,  }\item[{int}]{ptys\+\_\+size,  }\item[{int}]{proto\+\_\+mask,  }\item[{u8}]{local\+\_\+port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00148}{148}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01363}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00184}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00248}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00229}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00165}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap()}}, \mbox{\hyperlink{mlx5__ib__main_8c_source_l00287}{mlx5\+\_\+query\+\_\+port\+\_\+roce()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l04468}{mlx5e\+\_\+create\+\_\+ifp()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a8f0cbf29a10097b179dd9e3a4df0b873_cgraph}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a8f0cbf29a10097b179dd9e3a4df0b873_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a6498db7a28bbd7104621f5432599d0af}\label{mlx5__port_8c_a6498db7a28bbd7104621f5432599d0af}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_qetcr\_reg@{mlx5\_query\_port\_qetcr\_reg}}
\index{mlx5\_query\_port\_qetcr\_reg@{mlx5\_query\_port\_qetcr\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_qetcr\_reg()}{mlx5\_query\_port\_qetcr\_reg()}}
{\footnotesize\ttfamily static int mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32 $\ast$}]{out,  }\item[{int}]{outlen }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00841}{841}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01027}{MLX5\+\_\+\+CAP\+\_\+\+GEN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00124}{MLX5\+\_\+\+REG\+\_\+\+QETCR}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01015}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00980}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group()}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00874}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a5a527984e12e519f8e4a436f3d4f0a7d}\label{mlx5__port_8c_a5a527984e12e519f8e4a436f3d4f0a7d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_status@{mlx5\_query\_port\_status}}
\index{mlx5\_query\_port\_status@{mlx5\_query\_port\_status}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_status()}{mlx5\_query\_port\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8 $\ast$}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00306}{306}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a5a527984e12e519f8e4a436f3d4f0a7d_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a3bff739bb1d26721baac627ba595236e}\label{mlx5__port_8c_a3bff739bb1d26721baac627ba595236e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_tc\_bw\_alloc@{mlx5\_query\_port\_tc\_bw\_alloc}}
\index{mlx5\_query\_port\_tc\_bw\_alloc@{mlx5\_query\_port\_tc\_bw\_alloc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_bw\_alloc()}{mlx5\_query\_port\_tc\_bw\_alloc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{bw\+\_\+pct }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01015}{1015}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00147}{mlx5e\+\_\+get\+\_\+max\+\_\+alloc()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a3bff739bb1d26721baac627ba595236e_cgraph}
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\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a5bc1d6be45b568bf44747236844b8959}\label{mlx5__port_8c_a5bc1d6be45b568bf44747236844b8959}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_tc\_group@{mlx5\_query\_port\_tc\_group}}
\index{mlx5\_query\_port\_tc\_group@{mlx5\_query\_port\_tc\_group}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_group()}{mlx5\_query\_port\_tc\_group()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{tc,  }\item[{u8 $\ast$}]{tc\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00980}{980}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{en_8h_source_l00049}{tc}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a5bc1d6be45b568bf44747236844b8959_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a1e9dd0d7320c408a211ca9040488a41d}\label{mlx5__port_8c_a1e9dd0d7320c408a211ca9040488a41d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_port\_tc\_rate\_limit@{mlx5\_query\_port\_tc\_rate\_limit}}
\index{mlx5\_query\_port\_tc\_rate\_limit@{mlx5\_query\_port\_tc\_rate\_limit}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_rate\_limit()}{mlx5\_query\_port\_tc\_rate\_limit()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{max\+\_\+bw\+\_\+value,  }\item[{u8 $\ast$}]{max\+\_\+bw\+\_\+units }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00874}{874}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00111}{mlx5e\+\_\+getmaxrate()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a1e9dd0d7320c408a211ca9040488a41d_cgraph}
\end{center}
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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc}\label{mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_qcam\_reg@{mlx5\_query\_qcam\_reg}}
\index{mlx5\_query\_qcam\_reg@{mlx5\_query\_qcam\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_qcam\_reg()}{mlx5\_query\_qcam\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+qcam\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32 $\ast$}]{qcam,  }\item[{u8}]{feature\+\_\+group,  }\item[{u8}]{access\+\_\+reg\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00072}{72}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00129}{MLX5\+\_\+\+REG\+\_\+\+QCAM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__fw_8c_source_l00116}{mlx5\+\_\+get\+\_\+qcam\+\_\+reg()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a50b8ade218817982630735ac3d7c9dfc_cgraph}
\end{center}
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\end{center}
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\mbox{\Hypertarget{mlx5__port_8c_afcaee87f88eaa778d725f66812f561ba}\label{mlx5__port_8c_afcaee87f88eaa778d725f66812f561ba}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_trust\_state@{mlx5\_query\_trust\_state}}
\index{mlx5\_query\_trust\_state@{mlx5\_query\_trust\_state}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_trust\_state()}{mlx5\_query\_trust\_state()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+trust\+\_\+state (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{trust\+\_\+state }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01097}{1097}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00123}{MLX5\+\_\+\+REG\+\_\+\+QPTS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00170}{mlx5e\+\_\+get\+\_\+dscp()}}.

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\mbox{\Hypertarget{mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7}\label{mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_query\_wol@{mlx5\_query\_wol}}
\index{mlx5\_query\_wol@{mlx5\_query\_wol}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_wol()}{mlx5\_query\_wol()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+wol (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8 $\ast$}]{wol\+\_\+mode }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00777}{777}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00232}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+QUERY\+\_\+\+WOL\+\_\+\+ROL}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ab8d4516670a06390dce7f05f84146ee7_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a9c524c6d3bce42c90eb4ff2d4297455b}\label{mlx5__port_8c_a9c524c6d3bce42c90eb4ff2d4297455b}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_diagnostic\_params@{mlx5\_set\_diagnostic\_params}}
\index{mlx5\_set\_diagnostic\_params@{mlx5\_set\_diagnostic\_params}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_diagnostic\_params()}{mlx5\_set\_diagnostic\_params()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+diagnostic\+\_\+params (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{in,  }\item[{int}]{in\+\_\+size }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01057}{1057}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00219}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+SET\+\_\+\+DIAGNOSTICS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00086}{mlx5\+\_\+core\+\_\+set\+\_\+diagnostics\+\_\+full()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a9c524c6d3bce42c90eb4ff2d4297455b_cgraph}
\end{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a9c524c6d3bce42c90eb4ff2d4297455b_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81}\label{mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_dropless\_mode@{mlx5\_set\_dropless\_mode}}
\index{mlx5\_set\_dropless\_mode@{mlx5\_set\_dropless\_mode}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_dropless\_mode()}{mlx5\_set\_dropless\_mode()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+dropless\+\_\+mode (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u16}]{timeout }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00510}{510}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00255}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+SET\+\_\+\+DELAY\+\_\+\+DROP\+\_\+\+PARAMS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a3eaec1b2228fe89521a73833c77d7f81_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a97c245e50598b16dcb43cb32cbc37423}\label{mlx5__port_8c_a97c245e50598b16dcb43cb32cbc37423}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_dscp2prio@{mlx5\_set\_dscp2prio}}
\index{mlx5\_set\_dscp2prio@{mlx5\_set\_dscp2prio}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_dscp2prio()}{mlx5\_set\_dscp2prio()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+dscp2prio (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{dscp2prio }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01113}{1113}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00224}{MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP}}, \mbox{\hyperlink{driver_8h_source_l00127}{MLX5\+\_\+\+REG\+\_\+\+QPDPM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00122}{MLX5\+\_\+\+SET16}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00697}{mlx5e\+\_\+dscp\+\_\+prio\+\_\+handler()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a025afaa148364d99d8e430346505c001}\label{mlx5__port_8c_a025afaa148364d99d8e430346505c001}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_mfrl\_reg@{mlx5\_set\_mfrl\_reg}}
\index{mlx5\_set\_mfrl\_reg@{mlx5\_set\_mfrl\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_mfrl\_reg()}{mlx5\_set\_mfrl\_reg()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+mfrl\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{reset\+\_\+level }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01282}{1282}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00158}{MLX5\+\_\+\+REG\+\_\+\+MFRL}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__fwdump_8c_source_l00338}{mlx5\+\_\+fw\+\_\+reset()}}.

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\mbox{\Hypertarget{mlx5__port_8c_af40ba1470375da922437a2d42ec10701}\label{mlx5__port_8c_af40ba1470375da922437a2d42ec10701}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_autoneg@{mlx5\_set\_port\_autoneg}}
\index{mlx5\_set\_port\_autoneg@{mlx5\_set\_port\_autoneg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_autoneg()}{mlx5\_set\_port\_autoneg()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+autoneg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{bool}]{disable,  }\item[{u32}]{eth\+\_\+proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00201}{201}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00184}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg()}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{mlx5__port_8c_aedb5a503f9312b510754fe363a99c27e}\label{mlx5__port_8c_aedb5a503f9312b510754fe363a99c27e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_caps@{mlx5\_set\_port\_caps}}
\index{mlx5\_set\_port\_caps@{mlx5\_set\_port\_caps}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_caps()}{mlx5\_set\_port\_caps()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+caps (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8}]{port\+\_\+num,  }\item[{u32}]{caps }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00131}{131}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00113}{mlx5\+\_\+reg\+\_\+pcap\+::caps\+\_\+127\+\_\+96}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00136}{MLX5\+\_\+\+REG\+\_\+\+PCAP}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00111}{mlx5\+\_\+reg\+\_\+pcap\+::port\+\_\+num}}.



Referenced by \mbox{\hyperlink{mlx5__ib__main_8c_source_l01083}{mlx5\+\_\+ib\+\_\+modify\+\_\+port()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a678235a0bf7e8e0cb35e0ce8ee96c5c9}\label{mlx5__port_8c_a678235a0bf7e8e0cb35e0ce8ee96c5c9}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_mtu@{mlx5\_set\_port\_mtu}}
\index{mlx5\_set\_port\_mtu@{mlx5\_set\_port\_mtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_mtu()}{mlx5\_set\_port\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00364}{364}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00138}{MLX5\+\_\+\+REG\+\_\+\+PMTU}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03210}{mlx5e\+\_\+set\+\_\+dev\+\_\+port\+\_\+mtu()}}.

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\mbox{\Hypertarget{mlx5__port_8c_ae8bafa77713ec40473235db0e29b230f}\label{mlx5__port_8c_ae8bafa77713ec40473235db0e29b230f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_pause\_and\_pfc@{mlx5\_set\_port\_pause\_and\_pfc}}
\index{mlx5\_set\_port\_pause\_and\_pfc@{mlx5\_set\_port\_pause\_and\_pfc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_pause\_and\_pfc()}{mlx5\_set\_port\_pause\_and\_pfc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{port,  }\item[{u8}]{rx\+\_\+pause,  }\item[{u8}]{tx\+\_\+pause,  }\item[{u8}]{pfc\+\_\+en\+\_\+rx,  }\item[{u8}]{pfc\+\_\+en\+\_\+tx }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00383}{383}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00505}{mlx5e\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a0a52893d89d21c33052292f05e2d3618}\label{mlx5__port_8c_a0a52893d89d21c33052292f05e2d3618}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_prio\_tc@{mlx5\_set\_port\_prio\_tc}}
\index{mlx5\_set\_port\_prio\_tc@{mlx5\_set\_port\_prio\_tc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_prio\_tc()}{mlx5\_set\_port\_prio\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{prio\+\_\+index,  }\item[{const u8}]{prio\+\_\+tc }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00946}{946}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{driver_8h_source_l00126}{MLX5\+\_\+\+REG\+\_\+\+QTCT}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00334}{mlx5e\+\_\+prio\+\_\+to\+\_\+tc\+\_\+handler()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a8e61837d509b7d0f854f031e69002249}\label{mlx5__port_8c_a8e61837d509b7d0f854f031e69002249}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_proto@{mlx5\_set\_port\_proto}}
\index{mlx5\_set\_port\_proto@{mlx5\_set\_port\_proto}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_proto()}{mlx5\_set\_port\_proto()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+proto (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask,  }\item[{bool}]{ext }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00265}{265}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a4fd7b9a42b17ccb08ed6c0d29bc2c0de}\label{mlx5__port_8c_a4fd7b9a42b17ccb08ed6c0d29bc2c0de}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_qetcr\_reg@{mlx5\_set\_port\_qetcr\_reg}}
\index{mlx5\_set\_port\_qetcr\_reg@{mlx5\_set\_port\_qetcr\_reg}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_qetcr\_reg()}{mlx5\_set\_port\_qetcr\_reg()}}
{\footnotesize\ttfamily static int mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32 $\ast$}]{in,  }\item[{int}]{inlen }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00862}{862}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01027}{MLX5\+\_\+\+CAP\+\_\+\+GEN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00124}{MLX5\+\_\+\+REG\+\_\+\+QETCR}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00900}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01001}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00966}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group()}}.

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\mbox{\Hypertarget{mlx5__port_8c_af420caf0db7e1b8cbf69651fbe3d98d7}\label{mlx5__port_8c_af420caf0db7e1b8cbf69651fbe3d98d7}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_status@{mlx5\_set\_port\_status}}
\index{mlx5\_set\_port\_status@{mlx5\_set\_port\_status}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_status()}{mlx5\_set\_port\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}}}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00289}{289}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00120}{mlx5\+\_\+toggle\+\_\+port\+\_\+link()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03331}{mlx5e\+\_\+open()}}.

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\begin{center}
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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_af420caf0db7e1b8cbf69651fbe3d98d7_cgraph}
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\mbox{\Hypertarget{mlx5__port_8c_a1f21911cbbc6a806d4f165efd6711de1}\label{mlx5__port_8c_a1f21911cbbc6a806d4f165efd6711de1}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_tc\_bw\_alloc@{mlx5\_set\_port\_tc\_bw\_alloc}}
\index{mlx5\_set\_port\_tc\_bw\_alloc@{mlx5\_set\_port\_tc\_bw\_alloc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_tc\_bw\_alloc()}{mlx5\_set\_port\_tc\_bw\_alloc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{tc\+\_\+bw }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01001}{1001}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00147}{mlx5e\+\_\+get\+\_\+max\+\_\+alloc()}}, and \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00267}{mlx5e\+\_\+tc\+\_\+rate\+\_\+share\+\_\+handler()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a1f21911cbbc6a806d4f165efd6711de1_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a1824b2318af707b6146d7c431e305694}\label{mlx5__port_8c_a1824b2318af707b6146d7c431e305694}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_port\_tc\_group@{mlx5\_set\_port\_tc\_group}}
\index{mlx5\_set\_port\_tc\_group@{mlx5\_set\_port\_tc\_group}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_tc\_group()}{mlx5\_set\_port\_tc\_group()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{tc\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00966}{966}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_a7c22c110dca7d84adcdaade920784192}\label{mlx5__port_8c_a7c22c110dca7d84adcdaade920784192}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_trust\_state@{mlx5\_set\_trust\_state}}
\index{mlx5\_set\_trust\_state@{mlx5\_set\_trust\_state}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_trust\_state()}{mlx5\_set\_trust\_state()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+trust\+\_\+state (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{trust\+\_\+state }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01083}{1083}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00123}{MLX5\+\_\+\+REG\+\_\+\+QPTS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00651}{mlx5e\+\_\+trust\+\_\+state\+\_\+handler()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a0500c03124e21491718637c608ed5b47}\label{mlx5__port_8c_a0500c03124e21491718637c608ed5b47}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_set\_wol@{mlx5\_set\_wol}}
\index{mlx5\_set\_wol@{mlx5\_set\_wol}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_wol()}{mlx5\_set\_wol()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+wol (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8}]{wol\+\_\+mode }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00477}{477}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00231}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+SET\+\_\+\+WOL\+\_\+\+ROL}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\end{figure}
\mbox{\Hypertarget{mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c}\label{mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_toggle\_port\_link@{mlx5\_toggle\_port\_link}}
\index{mlx5\_toggle\_port\_link@{mlx5\_toggle\_port\_link}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_toggle\_port\_link()}{mlx5\_toggle\_port\_link()}}
{\footnotesize\ttfamily void mlx5\+\_\+toggle\+\_\+port\+\_\+link (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00120}{120}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{driver_8h_source_l00209}{MLX5\+\_\+\+PORT\+\_\+\+DOWN}}, \mbox{\hyperlink{driver_8h_source_l00208}{MLX5\+\_\+\+PORT\+\_\+\+UP}}, \mbox{\hyperlink{mlx5__port_8c_source_l00323}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status()}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00289}{mlx5\+\_\+set\+\_\+port\+\_\+status()}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00441}{mlx5e\+\_\+fec\+\_\+mask\+\_\+10x\+\_\+25x\+\_\+handler()}}, and \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00546}{mlx5e\+\_\+fec\+\_\+mask\+\_\+50x\+\_\+handler()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_ab3a7e9f68df8c7aaf1d9e25c13de644c_icgraph}
\end{center}
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\mbox{\Hypertarget{mlx5__port_8c_abe0618b565e0309fb16f8cda19739702}\label{mlx5__port_8c_abe0618b565e0309fb16f8cda19739702}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_vxlan\_udp\_port\_add@{mlx5\_vxlan\_udp\_port\_add}}
\index{mlx5\_vxlan\_udp\_port\_add@{mlx5\_vxlan\_udp\_port\_add}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_vxlan\_udp\_port\_add()}{mlx5\_vxlan\_udp\_port\_add()}}
{\footnotesize\ttfamily int mlx5\+\_\+vxlan\+\_\+udp\+\_\+port\+\_\+add (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u16}]{port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00737}{737}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00226}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+ADD\+\_\+\+VXLAN\+\_\+\+UDP\+\_\+\+DPORT}}, \mbox{\hyperlink{mlx5__cmd_8c_source_l00477}{mlx5\+\_\+command\+\_\+str()}}, \mbox{\hyperlink{mlx5__core_8h_source_l00056}{mlx5\+\_\+core\+\_\+err}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__flow__table_8c_source_l02026}{mlx5e\+\_\+vxlan\+\_\+start()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a937bee6341de9d04883f260ad7e8709d}\label{mlx5__port_8c_a937bee6341de9d04883f260ad7e8709d}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5\_vxlan\_udp\_port\_delete@{mlx5\_vxlan\_udp\_port\_delete}}
\index{mlx5\_vxlan\_udp\_port\_delete@{mlx5\_vxlan\_udp\_port\_delete}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5\_vxlan\_udp\_port\_delete()}{mlx5\_vxlan\_udp\_port\_delete()}}
{\footnotesize\ttfamily int mlx5\+\_\+vxlan\+\_\+udp\+\_\+port\+\_\+delete (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u16}]{port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00757}{757}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__cmd_8c_source_l01347}{mlx5\+\_\+cmd\+\_\+exec()}}, \mbox{\hyperlink{mlx5__ifc_8h_source_l00227}{MLX5\+\_\+\+CMD\+\_\+\+OP\+\_\+\+DELETE\+\_\+\+VXLAN\+\_\+\+UDP\+\_\+\+DPORT}}, \mbox{\hyperlink{mlx5__cmd_8c_source_l00477}{mlx5\+\_\+command\+\_\+str()}}, \mbox{\hyperlink{mlx5__core_8h_source_l00056}{mlx5\+\_\+core\+\_\+err}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__flow__table_8c_source_l02040}{mlx5e\+\_\+vxlan\+\_\+stop()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a91b098dccbe2383e732840af5076b9ff}\label{mlx5__port_8c_a91b098dccbe2383e732840af5076b9ff}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_get\_speed\_arr@{mlx5e\_port\_get\_speed\_arr}}
\index{mlx5e\_port\_get\_speed\_arr@{mlx5e\_port\_get\_speed\_arr}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_get\_speed\_arr()}{mlx5e\_port\_get\_speed\_arr()}}
{\footnotesize\ttfamily static void mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u32 $\ast$$\ast$}]{arr,  }\item[{u32 $\ast$}]{size }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01338}{1338}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01140}{MLX5\+\_\+\+CAP\+\_\+\+PCAM\+\_\+\+FEATURE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01324}{mlx5e\+\_\+ext\+\_\+link\+\_\+speed}}, and \mbox{\hyperlink{mlx5__port_8c_source_l01294}{mlx5e\+\_\+link\+\_\+speed}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01348}{mlx5e\+\_\+port\+\_\+ptys2speed()}}.

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\mbox{\Hypertarget{mlx5__port_8c_aa748929af17fa9534b61812f2878a6f8}\label{mlx5__port_8c_aa748929af17fa9534b61812f2878a6f8}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_linkspeed@{mlx5e\_port\_linkspeed}}
\index{mlx5e\_port\_linkspeed@{mlx5e\_port\_linkspeed}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_linkspeed()}{mlx5e\_port\_linkspeed()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+linkspeed (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32 $\ast$}]{speed }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01383}{1383}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01140}{MLX5\+\_\+\+CAP\+\_\+\+PCAM\+\_\+\+FEATURE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01363}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01348}{mlx5e\+\_\+port\+\_\+ptys2speed()}}, and \mbox{\hyperlink{port_8h_source_l00151}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::oper}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00127}{calculate\+\_\+xoff()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a9aa2cea85e96ba55f84c53b193a3d546}\label{mlx5__port_8c_a9aa2cea85e96ba55f84c53b193a3d546}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_ptys2speed@{mlx5e\_port\_ptys2speed}}
\index{mlx5e\_port\_ptys2speed@{mlx5e\_port\_ptys2speed}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_ptys2speed()}{mlx5e\_port\_ptys2speed()}}
{\footnotesize\ttfamily u32 mlx5e\+\_\+port\+\_\+ptys2speed (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32}]{eth\+\_\+proto\+\_\+oper }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01348}{1348}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l01338}{mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr()}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01383}{mlx5e\+\_\+port\+\_\+linkspeed()}}.

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\mbox{\Hypertarget{mlx5__port_8c_ad84aea8b1a6c4167ae5dbc0ce01b203e}\label{mlx5__port_8c_ad84aea8b1a6c4167ae5dbc0ce01b203e}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_query\_pbmc@{mlx5e\_port\_query\_pbmc}}
\index{mlx5e\_port\_query\_pbmc@{mlx5e\_port\_query\_pbmc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_query\_pbmc()}{mlx5e\_port\_query\_pbmc()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+query\+\_\+pbmc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{out }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01402}{1402}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00145}{MLX5\+\_\+\+REG\+\_\+\+PBMC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00035}{mlx5e\+\_\+port\+\_\+query\+\_\+buffer()}}, and \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00089}{port\+\_\+set\+\_\+buffer()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a3deead3af97d84e34bffc1065fa4263f}\label{mlx5__port_8c_a3deead3af97d84e34bffc1065fa4263f}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_query\_priority2buffer@{mlx5e\_port\_query\_priority2buffer}}
\index{mlx5e\_port\_query\_priority2buffer@{mlx5e\_port\_query\_priority2buffer}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_query\_priority2buffer()}{mlx5e\_port\_query\_priority2buffer()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+query\+\_\+priority2buffer (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{buffer }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01437}{1437}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{mlx5__core_8h_source_l00045}{mlx5\+\_\+core\+\_\+dbg}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00144}{MLX5\+\_\+\+REG\+\_\+\+PPTB}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00775}{mlx5e\+\_\+buf\+\_\+prio\+\_\+handler()}}, and \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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\includegraphics[width=350pt]{dd/d53/mlx5__port_8c_a3deead3af97d84e34bffc1065fa4263f_cgraph}
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\mbox{\Hypertarget{mlx5__port_8c_ae185a737aa1d8a65c1bc231c7a379d71}\label{mlx5__port_8c_ae185a737aa1d8a65c1bc231c7a379d71}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_set\_pbmc@{mlx5e\_port\_set\_pbmc}}
\index{mlx5e\_port\_set\_pbmc@{mlx5e\_port\_set\_pbmc}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_set\_pbmc()}{mlx5e\_port\_set\_pbmc()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+set\+\_\+pbmc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{in }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01419}{1419}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00145}{MLX5\+\_\+\+REG\+\_\+\+PBMC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00089}{port\+\_\+set\+\_\+buffer()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a24b3d47fcb69f1d6ba0237a1891e0657}\label{mlx5__port_8c_a24b3d47fcb69f1d6ba0237a1891e0657}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_port\_set\_priority2buffer@{mlx5e\_port\_set\_priority2buffer}}
\index{mlx5e\_port\_set\_priority2buffer@{mlx5e\_port\_set\_priority2buffer}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_set\_priority2buffer()}{mlx5e\_port\_set\_priority2buffer()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+set\+\_\+priority2buffer (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{buffer }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01469}{1469}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00144}{MLX5\+\_\+\+REG\+\_\+\+PPTB}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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\mbox{\Hypertarget{mlx5__port_8c_a5d734690900cf84024e1f35c7973d405}\label{mlx5__port_8c_a5d734690900cf84024e1f35c7973d405}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mtu\_to\_ib\_mtu@{mtu\_to\_ib\_mtu}}
\index{mtu\_to\_ib\_mtu@{mtu\_to\_ib\_mtu}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mtu\_to\_ib\_mtu()}{mtu\_to\_ib\_mtu()}}
{\footnotesize\ttfamily static int mtu\+\_\+to\+\_\+ib\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{mtu }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00624}{624}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__core_8h_source_l00061}{mlx5\+\_\+core\+\_\+warn}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00638}{mlx5\+\_\+core\+\_\+access\+\_\+pmtu()}}.

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\end{center}
\end{figure}


\doxysubsection{Variable Documentation}
\mbox{\Hypertarget{mlx5__port_8c_af6272fec04d4a106971b9360f7cbaba2}\label{mlx5__port_8c_af6272fec04d4a106971b9360f7cbaba2}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_ext\_link\_speed@{mlx5e\_ext\_link\_speed}}
\index{mlx5e\_ext\_link\_speed@{mlx5e\_ext\_link\_speed}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_ext\_link\_speed}{mlx5e\_ext\_link\_speed}}
{\footnotesize\ttfamily const u32 \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbe}{mlx5e\+\_\+ext\+\_\+link\+\_\+speed}}\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}

{\bfseries Initial value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{= \{}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaa083e5ca4dec07e3d8d5ac0c8cdc48b3}{MLX5E\_SGMII\_100M}}]                      = 100,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeacecfbdca7afd6f54af470682f6fcdc1b}{MLX5E\_1000BASE\_X\_SGMII}}]          = 1000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea3cc2fbf5e9fbf492c8cb3de3d32cdca7}{MLX5E\_5GBASE\_R}}]                  = 5000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeabd71966566b88761e02e0e9021bc0749}{MLX5E\_10GBASE\_XFI\_XAUI\_1}}]              = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea4c01f8c56f0a85f7cd1d6b33c0da429c}{MLX5E\_40GBASE\_XLAUI\_4\_XLPPI\_4}}]            = 40000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea8d16be8e488c56eef804b6d948d98226}{MLX5E\_25GAUI\_1\_25GBASE\_CR\_KR}}]              = 25000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeac8fa27a61436723b9a1ac3cd7227700a}{MLX5E\_50GAUI\_2\_LAUI\_2\_50GBASE\_CR2\_KR2}}]    = 50000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea3b704517c8e08ad15947ca20966882b9}{MLX5E\_50GAUI\_1\_LAUI\_1\_50GBASE\_CR\_KR}}]        = 50000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf35d65a2f8f239f6df455e35d69830d7}{MLX5E\_CAUI\_4\_100GBASE\_CR4\_KR4}}]            = 100000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea8a464d6c429ca6a12b980481506ede94}{MLX5E\_200GAUI\_4\_200GBASE\_CR4\_KR4}}]      = 200000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea6ef5b39f4f95c93016157760b4c41c57}{MLX5E\_400GAUI\_8}}]                        = 400000,}
\DoxyCodeLine{\}}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01324}{1324}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01338}{mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr()}}.

\mbox{\Hypertarget{mlx5__port_8c_a2153f714da5c6a862ebdeda15fc864a6}\label{mlx5__port_8c_a2153f714da5c6a862ebdeda15fc864a6}} 
\index{mlx5\_port.c@{mlx5\_port.c}!mlx5e\_link\_speed@{mlx5e\_link\_speed}}
\index{mlx5e\_link\_speed@{mlx5e\_link\_speed}!mlx5\_port.c@{mlx5\_port.c}}
\doxysubsubsection{\texorpdfstring{mlx5e\_link\_speed}{mlx5e\_link\_speed}}
{\footnotesize\ttfamily const u32 \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0c}{mlx5e\+\_\+link\+\_\+speed}}\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}

{\bfseries Initial value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{= \{}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cadd33645d9d63c095940ecca7a61df2fc}{MLX5E\_1000BASE\_CX\_SGMII}}] = 1000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca56f83eb6dc60afe29daeec61eefd26d7}{MLX5E\_1000BASE\_KX}}]       = 1000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca149967e98e14c7fe394e6b31207b8456}{MLX5E\_10GBASE\_CX4}}]       = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa58cb6e2baa8d99dad115b11af19d8c3}{MLX5E\_10GBASE\_KX4}}]       = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2c7ed84ac39a6242dbaf94187b6b4035}{MLX5E\_10GBASE\_KR}}]        = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1745f732898d4e1373757463c3825658}{MLX5E\_20GBASE\_KR2}}]       = 20000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca994767f942a4a6ad4a354d4dcf805f80}{MLX5E\_40GBASE\_CR4}}]       = 40000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1da0bf9167e893acafb772650a294842}{MLX5E\_40GBASE\_KR4}}]       = 40000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca96281473b8488f5d47c7d400b9a9e640}{MLX5E\_56GBASE\_R4}}]        = 56000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca9314d331ca5f14ba1c6ca06f3dec4fa6}{MLX5E\_10GBASE\_CR}}]        = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca326cb730005116bd960b715a4baf4f65}{MLX5E\_10GBASE\_SR}}]        = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caf73cc49bc638af091768a537dd551f45}{MLX5E\_10GBASE\_ER\_LR}}]     = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca37f4d01c6d147b656d3614e5063868b8}{MLX5E\_40GBASE\_SR4}}]       = 40000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca0561ed42006a3f4804e6086a9f6f5aec}{MLX5E\_40GBASE\_LR4\_ER4}}]   = 40000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca426cb42b0a3b549e4df1da12b6e21a1d}{MLX5E\_50GBASE\_SR2}}]       = 50000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca61da27c6adb650d9b781c3afe1a76636}{MLX5E\_100GBASE\_CR4}}]      = 100000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caacc0a83680715de778c173aab6fb49ee}{MLX5E\_100GBASE\_SR4}}]      = 100000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cae03738e558b5677d1f19708f82442066}{MLX5E\_100GBASE\_KR4}}]      = 100000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad4389791d6d3a25859f4023d54dc980b}{MLX5E\_100GBASE\_LR4}}]      = 100000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad8ae1f3ce5e7e56d9fb1fb591ce40ab3}{MLX5E\_100BASE\_TX}}]        = 100,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2bfa83bc32f73d31c1fa4dc1407e7cc3}{MLX5E\_1000BASE\_T}}]        = 1000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca5297715e850d318659b5e194673f7a98}{MLX5E\_10GBASE\_T}}]         = 10000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1b3320308e873872a54d6834d128be5a}{MLX5E\_25GBASE\_CR}}]        = 25000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa1733b52080d3e344383a8d38a41937c}{MLX5E\_25GBASE\_KR}}]        = 25000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cacf9f710b06c1a897111343451beb5ea9}{MLX5E\_25GBASE\_SR}}]        = 25000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cac1f46552570b21ca59ea0d61a3af46a3}{MLX5E\_50GBASE\_CR2}}]       = 50000,}
\DoxyCodeLine{        [\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca795618752f8e6c3901919800fb07ba98}{MLX5E\_50GBASE\_KR2}}]       = 50000,}
\DoxyCodeLine{\}}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01294}{1294}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01338}{mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr()}}.

