\hypertarget{structmlx5__ifc__fpga__create__qp__in__bits}{}\doxysection{mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits Struct Reference}
\label{structmlx5__ifc__fpga__create__qp__in__bits}\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}


{\ttfamily \#include $<$mlx5\+\_\+ifc\+\_\+fpga.\+h$>$}



Collaboration diagram for mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=211pt]{d2/dc5/structmlx5__ifc__fpga__create__qp__in__bits__coll__graph}
\end{center}
\end{figure}
\doxysubsection*{Data Fields}
\begin{DoxyCompactItemize}
\item 
u8 \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_a2fea4e7ed308f2e38db7536a4735d9cf}{opcode}} \mbox{[}0x10\mbox{]}
\item 
u8 \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_a1a7713db5192568c2d3cb567f76a2407}{reserved\+\_\+at\+\_\+10}} \mbox{[}0x10\mbox{]}
\item 
u8 \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_a1310ee7f1b4492d56741d49258b8f0eb}{reserved\+\_\+at\+\_\+20}} \mbox{[}0x10\mbox{]}
\item 
u8 \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_a7f05825f40517a9178d4198bf16070be}{op\+\_\+mod}} \mbox{[}0x10\mbox{]}
\item 
u8 \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_af45bacea9214251f0157801c852f4e85}{reserved\+\_\+at\+\_\+40}} \mbox{[}0x40\mbox{]}
\item 
struct \mbox{\hyperlink{structmlx5__ifc__fpga__qpc__bits}{mlx5\+\_\+ifc\+\_\+fpga\+\_\+qpc\+\_\+bits}} \mbox{\hyperlink{structmlx5__ifc__fpga__create__qp__in__bits_aa1eebb4ce4fc7d1a55f55a99037ed3eb}{fpga\+\_\+qpc}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}


Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00255}{255}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.



\doxysubsection{Field Documentation}
\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_aa1eebb4ce4fc7d1a55f55a99037ed3eb}\label{structmlx5__ifc__fpga__create__qp__in__bits_aa1eebb4ce4fc7d1a55f55a99037ed3eb}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!fpga\_qpc@{fpga\_qpc}}
\index{fpga\_qpc@{fpga\_qpc}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{fpga\_qpc}{fpga\_qpc}}
{\footnotesize\ttfamily struct \mbox{\hyperlink{structmlx5__ifc__fpga__qpc__bits}{mlx5\+\_\+ifc\+\_\+fpga\+\_\+qpc\+\_\+bits}} mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::fpga\+\_\+qpc}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00264}{264}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.

\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_a7f05825f40517a9178d4198bf16070be}\label{structmlx5__ifc__fpga__create__qp__in__bits_a7f05825f40517a9178d4198bf16070be}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!op\_mod@{op\_mod}}
\index{op\_mod@{op\_mod}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{op\_mod}{op\_mod}}
{\footnotesize\ttfamily u8 mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::op\+\_\+mod\mbox{[}0x10\mbox{]}}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00260}{260}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.

\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_a2fea4e7ed308f2e38db7536a4735d9cf}\label{structmlx5__ifc__fpga__create__qp__in__bits_a2fea4e7ed308f2e38db7536a4735d9cf}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!opcode@{opcode}}
\index{opcode@{opcode}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{opcode}{opcode}}
{\footnotesize\ttfamily u8 mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::opcode\mbox{[}0x10\mbox{]}}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00256}{256}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.

\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_a1a7713db5192568c2d3cb567f76a2407}\label{structmlx5__ifc__fpga__create__qp__in__bits_a1a7713db5192568c2d3cb567f76a2407}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!reserved\_at\_10@{reserved\_at\_10}}
\index{reserved\_at\_10@{reserved\_at\_10}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{reserved\_at\_10}{reserved\_at\_10}}
{\footnotesize\ttfamily u8 mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::reserved\+\_\+at\+\_\+10\mbox{[}0x10\mbox{]}}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00257}{257}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.

\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_a1310ee7f1b4492d56741d49258b8f0eb}\label{structmlx5__ifc__fpga__create__qp__in__bits_a1310ee7f1b4492d56741d49258b8f0eb}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!reserved\_at\_20@{reserved\_at\_20}}
\index{reserved\_at\_20@{reserved\_at\_20}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{reserved\_at\_20}{reserved\_at\_20}}
{\footnotesize\ttfamily u8 mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::reserved\+\_\+at\+\_\+20\mbox{[}0x10\mbox{]}}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00259}{259}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.

\mbox{\Hypertarget{structmlx5__ifc__fpga__create__qp__in__bits_af45bacea9214251f0157801c852f4e85}\label{structmlx5__ifc__fpga__create__qp__in__bits_af45bacea9214251f0157801c852f4e85}} 
\index{mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}!reserved\_at\_40@{reserved\_at\_40}}
\index{reserved\_at\_40@{reserved\_at\_40}!mlx5\_ifc\_fpga\_create\_qp\_in\_bits@{mlx5\_ifc\_fpga\_create\_qp\_in\_bits}}
\doxysubsubsection{\texorpdfstring{reserved\_at\_40}{reserved\_at\_40}}
{\footnotesize\ttfamily u8 mlx5\+\_\+ifc\+\_\+fpga\+\_\+create\+\_\+qp\+\_\+in\+\_\+bits\+::reserved\+\_\+at\+\_\+40\mbox{[}0x40\mbox{]}}



Definition at line \mbox{\hyperlink{mlx5__ifc__fpga_8h_source_l00262}{262}} of file \mbox{\hyperlink{mlx5__ifc__fpga_8h_source}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}.



The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
dev/mlx5/mlx5\+\_\+fpga/\mbox{\hyperlink{mlx5__ifc__fpga_8h}{mlx5\+\_\+ifc\+\_\+fpga.\+h}}\end{DoxyCompactItemize}
