\hypertarget{port_8h}{}\doxysection{dev/mlx5/port.h File Reference}
\label{port_8h}\index{dev/mlx5/port.h@{dev/mlx5/port.h}}
{\ttfamily \#include $<$dev/mlx5/driver.\+h$>$}\newline
Include dependency graph for port.\+h\+:
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This graph shows which files directly or indirectly include this file\+:
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\doxysubsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{structmlx5e__port__eth__proto}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto}}
\end{DoxyCompactItemize}
\doxysubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{port_8h_abdaf26fa2f7e0f2c629753b3468f1a28}{MLX5\+\_\+\+I2\+C\+\_\+\+ADDR\+\_\+\+LOW}}~0x50
\item 
\#define \mbox{\hyperlink{port_8h_ae3d5e640295d3d3610426a7d5e3b63b8}{MLX5\+\_\+\+I2\+C\+\_\+\+ADDR\+\_\+\+HIGH}}~0x51
\item 
\#define \mbox{\hyperlink{port_8h_a73d06cbb4572124a1079a15daa58293d}{MLX5\+\_\+\+EEPROM\+\_\+\+PAGE\+\_\+\+LENGTH}}~256
\item 
\#define \mbox{\hyperlink{port_8h_a4213659d88d030b66859ba2233ca5e5b}{MLX5\+\_\+\+EEPROM\+\_\+\+MAX\+\_\+\+BYTES}}~32
\item 
\#define \mbox{\hyperlink{port_8h_a3edc193814e752262519230aad591114}{MLX5\+\_\+\+EEPROM\+\_\+\+IDENTIFIER\+\_\+\+BYTE\+\_\+\+MASK}}~0x000000ff
\item 
\#define \mbox{\hyperlink{port_8h_a6f26062bef44fd9bd91f04f6f4e6787a}{MLX5\+\_\+\+EEPROM\+\_\+\+REVISION\+\_\+\+ID\+\_\+\+BYTE\+\_\+\+MASK}}~0x0000ff00
\item 
\#define \mbox{\hyperlink{port_8h_ade7e2c5c8121fb2beeeab413adec88ce}{MLX5\+\_\+\+EEPROM\+\_\+\+PAGE\+\_\+3\+\_\+\+VALID\+\_\+\+BIT\+\_\+\+MASK}}~0x00040000
\item 
\#define \mbox{\hyperlink{port_8h_a84c968cbb690311a0a6d431829dc6d98}{MLX5\+\_\+\+EEPROM\+\_\+\+LOW\+\_\+\+PAGE}}~0x0
\item 
\#define \mbox{\hyperlink{port_8h_a2beb9b511603d0e6bf770a1c34783b27}{MLX5\+\_\+\+EEPROM\+\_\+\+HIGH\+\_\+\+PAGE}}~0x3
\item 
\#define \mbox{\hyperlink{port_8h_a4366db5eb1d7f16926aae9adf4a37249}{MLX5\+\_\+\+EEPROM\+\_\+\+HIGH\+\_\+\+PAGE\+\_\+\+OFFSET}}~128
\item 
\#define \mbox{\hyperlink{port_8h_abae63956620268fcd191ce6c772fa49e}{MLX5\+\_\+\+EEPROM\+\_\+\+INFO\+\_\+\+BYTES}}~0x3
\item 
\#define \mbox{\hyperlink{port_8h_a2ff07809f81ea97cc8b85554e17efc17}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8472}}~0x1
\item 
\#define \mbox{\hyperlink{port_8h_afd52d81cfc8cbae36c89d1179d1408c2}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8472\+\_\+\+LEN}}~128
\item 
\#define \mbox{\hyperlink{port_8h_a3abde693d21d0ab3d8fce5adcabdb742}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8636}}~0x2
\item 
\#define \mbox{\hyperlink{port_8h_aa9d4a37b396f78e86d90244982d7faa5}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8636\+\_\+\+LEN}}~256
\item 
\#define \mbox{\hyperlink{port_8h_ad7d4d5d5299b0699fd28b0bd93e30e43}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8436}}~0x3
\item 
\#define \mbox{\hyperlink{port_8h_a5933fd5ced93ea0459948b88877d8d1a}{MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8436\+\_\+\+LEN}}~256
\item 
\#define \mbox{\hyperlink{port_8h_a3e32bef5619db32289542cdb7860a500}{SPEED\+\_\+40000}}~40000
\item 
\#define \mbox{\hyperlink{port_8h_acc7c39a986fc970d9f13a68f4a28fbc2}{MLX5\+E\+\_\+\+PROT\+\_\+\+MASK}}(link\+\_\+mode)~(1 $<$$<$ (link\+\_\+mode))
\item 
\#define \mbox{\hyperlink{port_8h_a207ab9cb36321fb8d5fb64b504e9bd7a}{PORT\+\_\+\+MODULE\+\_\+\+EVENT\+\_\+\+MODULE\+\_\+\+STATUS\+\_\+\+MASK}}~0xF
\item 
\#define \mbox{\hyperlink{port_8h_a9d5618aed94d9c2f18fbcd69d71e1b17}{PORT\+\_\+\+MODULE\+\_\+\+EVENT\+\_\+\+ERROR\+\_\+\+TYPE\+\_\+\+MASK}}~0xF
\item 
\#define \mbox{\hyperlink{port_8h_a85ea9be21638b172b3e363994ca8fa17}{MLX5\+\_\+\+GET\+\_\+\+ETH\+\_\+\+PROTO}}(reg,  out,  ext,  field)
\item 
\#define \mbox{\hyperlink{port_8h_a9d7d601613ffc05172f7291dad601a60}{MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP}}~64
\end{DoxyCompactItemize}
\doxysubsection*{Enumerations}
\begin{DoxyCompactItemize}
\item 
enum \mbox{\hyperlink{port_8h_ad22271152377495ba1bba5d0070f36ed}{mlx5\+\_\+beacon\+\_\+duration}} \{ \mbox{\hyperlink{port_8h_ad22271152377495ba1bba5d0070f36eda1ef5279d1f9e5f188a4b9d87c8033a17}{MLX5\+\_\+\+BEACON\+\_\+\+DURATION\+\_\+\+OFF}} = 0x0
, \mbox{\hyperlink{port_8h_ad22271152377495ba1bba5d0070f36edabd5aa7fb20e5bd599bf2c11a391e5071}{MLX5\+\_\+\+BEACON\+\_\+\+DURATION\+\_\+\+INF}} = 0xffff
 \}
\item 
enum \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aa}{mlx5\+\_\+module\+\_\+id}} \{ \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aaaa426538e185cca448b69bce64ee328fa}{MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+SFP}} = 0x3
, \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aaa614dfa728e5307699a45dc14d863ba01}{MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP}} = 0xC
, \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aaa9a90b6477ba12905cb1e0dd31f8240fc}{MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP\+\_\+\+PLUS}} = 0xD
, \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aaa8acb90af4a36932f9eecff824ea6c2ef}{MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP28}} = 0x11
 \}
\item 
enum \mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527}{mlx5\+\_\+an\+\_\+status}} \{ \newline
\mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527a1036116d6e744c846ae22eb25fd07254}{MLX5\+\_\+\+AN\+\_\+\+UNAVAILABLE}} = 0
, \mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527acf8e239541b163a3868cb6a2b34c99db}{MLX5\+\_\+\+AN\+\_\+\+COMPLETE}} = 1
, \mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527a01320cdf98efa6ba9d64ed557fd78cf8}{MLX5\+\_\+\+AN\+\_\+\+FAILED}} = 2
, \mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527acd779c6fd84fedf8e58952c8e5017823}{MLX5\+\_\+\+AN\+\_\+\+LINK\+\_\+\+UP}} = 3
, \newline
\mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527a50fffebbb034aaee25efbe486bbe1bd6}{MLX5\+\_\+\+AN\+\_\+\+LINK\+\_\+\+DOWN}} = 4
 \}
\item 
enum \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0c}{mlx5e\+\_\+link\+\_\+speed}} \{ \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cadd33645d9d63c095940ecca7a61df2fc}{MLX5\+E\+\_\+1000\+BASE\+\_\+\+CX\+\_\+\+SGMII}} = 0
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca56f83eb6dc60afe29daeec61eefd26d7}{MLX5\+E\+\_\+1000\+BASE\+\_\+\+KX}} = 1
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca149967e98e14c7fe394e6b31207b8456}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+CX4}} = 2
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa58cb6e2baa8d99dad115b11af19d8c3}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+KX4}} = 3
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2c7ed84ac39a6242dbaf94187b6b4035}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+KR}} = 4
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1745f732898d4e1373757463c3825658}{MLX5\+E\+\_\+20\+GBASE\+\_\+\+KR2}} = 5
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca994767f942a4a6ad4a354d4dcf805f80}{MLX5\+E\+\_\+40\+GBASE\+\_\+\+CR4}} = 6
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1da0bf9167e893acafb772650a294842}{MLX5\+E\+\_\+40\+GBASE\+\_\+\+KR4}} = 7
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca96281473b8488f5d47c7d400b9a9e640}{MLX5\+E\+\_\+56\+GBASE\+\_\+\+R4}} = 8
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca9314d331ca5f14ba1c6ca06f3dec4fa6}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+CR}} = 12
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca326cb730005116bd960b715a4baf4f65}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+SR}} = 13
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caf73cc49bc638af091768a537dd551f45}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+ER\+\_\+\+LR}} = 14
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca37f4d01c6d147b656d3614e5063868b8}{MLX5\+E\+\_\+40\+GBASE\+\_\+\+SR4}} = 15
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca0561ed42006a3f4804e6086a9f6f5aec}{MLX5\+E\+\_\+40\+GBASE\+\_\+\+LR4\+\_\+\+ER4}} = 16
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca426cb42b0a3b549e4df1da12b6e21a1d}{MLX5\+E\+\_\+50\+GBASE\+\_\+\+SR2}} = 18
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca3765dd8d4c6b84e23edea5e0e890298e}{MLX5\+E\+\_\+50\+GBASE\+\_\+\+KR4}} = 19
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca61da27c6adb650d9b781c3afe1a76636}{MLX5\+E\+\_\+100\+GBASE\+\_\+\+CR4}} = 20
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caacc0a83680715de778c173aab6fb49ee}{MLX5\+E\+\_\+100\+GBASE\+\_\+\+SR4}} = 21
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cae03738e558b5677d1f19708f82442066}{MLX5\+E\+\_\+100\+GBASE\+\_\+\+KR4}} = 22
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad4389791d6d3a25859f4023d54dc980b}{MLX5\+E\+\_\+100\+GBASE\+\_\+\+LR4}} = 23
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad8ae1f3ce5e7e56d9fb1fb591ce40ab3}{MLX5\+E\+\_\+100\+BASE\+\_\+\+TX}} = 24
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2bfa83bc32f73d31c1fa4dc1407e7cc3}{MLX5\+E\+\_\+1000\+BASE\+\_\+T}} = 25
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca5297715e850d318659b5e194673f7a98}{MLX5\+E\+\_\+10\+GBASE\+\_\+T}} = 26
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1b3320308e873872a54d6834d128be5a}{MLX5\+E\+\_\+25\+GBASE\+\_\+\+CR}} = 27
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa1733b52080d3e344383a8d38a41937c}{MLX5\+E\+\_\+25\+GBASE\+\_\+\+KR}} = 28
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cacf9f710b06c1a897111343451beb5ea9}{MLX5\+E\+\_\+25\+GBASE\+\_\+\+SR}} = 29
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cac1f46552570b21ca59ea0d61a3af46a3}{MLX5\+E\+\_\+50\+GBASE\+\_\+\+CR2}} = 30
, \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca795618752f8e6c3901919800fb07ba98}{MLX5\+E\+\_\+50\+GBASE\+\_\+\+KR2}} = 31
, \newline
\mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2fdd4361e15ae10fcfe95a2510ff0da4}{MLX5\+E\+\_\+\+LINK\+\_\+\+SPEEDS\+\_\+\+NUMBER}} = 32
 \}
\item 
enum \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbe}{mlx5e\+\_\+ext\+\_\+link\+\_\+speed}} \{ \newline
\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaa083e5ca4dec07e3d8d5ac0c8cdc48b3}{MLX5\+E\+\_\+\+SGMII\+\_\+100M}} = 0
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeacecfbdca7afd6f54af470682f6fcdc1b}{MLX5\+E\+\_\+1000\+BASE\+\_\+\+X\+\_\+\+SGMII}} = 1
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea3cc2fbf5e9fbf492c8cb3de3d32cdca7}{MLX5\+E\+\_\+5\+GBASE\+\_\+R}} = 3
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeabd71966566b88761e02e0e9021bc0749}{MLX5\+E\+\_\+10\+GBASE\+\_\+\+XFI\+\_\+\+XAUI\+\_\+1}} = 4
, \newline
\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea4c01f8c56f0a85f7cd1d6b33c0da429c}{MLX5\+E\+\_\+40\+GBASE\+\_\+\+XLAUI\+\_\+4\+\_\+\+XLPPI\+\_\+4}} = 5
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea8d16be8e488c56eef804b6d948d98226}{MLX5\+E\+\_\+25\+GAUI\+\_\+1\+\_\+25\+GBASE\+\_\+\+CR\+\_\+\+KR}} = 6
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeac8fa27a61436723b9a1ac3cd7227700a}{MLX5\+E\+\_\+50\+GAUI\+\_\+2\+\_\+\+LAUI\+\_\+2\+\_\+50\+GBASE\+\_\+\+CR2\+\_\+\+KR2}} = 7
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea3b704517c8e08ad15947ca20966882b9}{MLX5\+E\+\_\+50\+GAUI\+\_\+1\+\_\+\+LAUI\+\_\+1\+\_\+50\+GBASE\+\_\+\+CR\+\_\+\+KR}} = 8
, \newline
\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf35d65a2f8f239f6df455e35d69830d7}{MLX5\+E\+\_\+\+CAUI\+\_\+4\+\_\+100\+GBASE\+\_\+\+CR4\+\_\+\+KR4}} = 9
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea507da02dc836fcd8f4289e5af1df5e0e}{MLX5\+E\+\_\+100\+GAUI\+\_\+2\+\_\+100\+GBASE\+\_\+\+CR2\+\_\+\+KR2}} = 10
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaeb6e176b9622e6e1c0d887f34be6e692}{MLX5\+E\+\_\+100\+GAUI\+\_\+1\+\_\+100\+GBASE\+\_\+\+CR\+\_\+\+KR}} = 11
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea8a464d6c429ca6a12b980481506ede94}{MLX5\+E\+\_\+200\+GAUI\+\_\+4\+\_\+200\+GBASE\+\_\+\+CR4\+\_\+\+KR4}} = 12
, \newline
\mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf2ff20a4d288de8e40cf368e81ddeb33}{MLX5\+E\+\_\+200\+GAUI\+\_\+2\+\_\+200\+GBASE\+\_\+\+CR2\+\_\+\+KR2}} = 13
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea6ef5b39f4f95c93016157760b4c41c57}{MLX5\+E\+\_\+400\+GAUI\+\_\+8}} = 15
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbeae1548fbed05163fd8cfc3f30e27c3c8a}{MLX5\+E\+\_\+400\+GAUI\+\_\+4\+\_\+400\+GBASE\+\_\+\+CR4\+\_\+\+KR4}} = 16
, \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbea0eb057cb4b2dbee0787c75c500a510ee}{MLX5\+E\+\_\+\+EXT\+\_\+\+LINK\+\_\+\+SPEEDS\+\_\+\+NUMBER}} = 32
 \}
\item 
enum \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712}{mlx5e\+\_\+cable\+\_\+type}} \{ \newline
\mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a53853701cacddb2b038378caed272534}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+UNKNOWN}} = 0
, \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab4a6c6daf33259453caec35a94be942d}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+ACTIVE\+\_\+\+CABLE}} = 1
, \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a4155ce3291790abd7bfeec3abbc5c816}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+OPTICAL\+\_\+\+MODULE}} = 2
, \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ac3dc641cf79f246ac237a141d943b760}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+PASSIVE\+\_\+\+COPPER}} = 3
, \newline
\mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a045e89581e561c9d88de56f4cbe6ddb4}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+CABLE\+\_\+\+UNPLUGGED}} = 4
, \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab434c16ee9ef6071240dba41606dd92b}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+TWISTED\+\_\+\+PAIR}} = 5
, \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a151fd303a0230100fbf09fdaa0dce157}{MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+NUMBER}} = 8
 \}
\item 
enum \mbox{\hyperlink{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4}{mlx5\+\_\+qpts\+\_\+trust\+\_\+state}} \{ \mbox{\hyperlink{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a70e163a5bbc7e4e6e103aae4f7b27156}{MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+PCP}} = 1
, \mbox{\hyperlink{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a6ee5d92cd5071fab7d55550e5d5bd4e0}{MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+DSCP}} = 2
, \mbox{\hyperlink{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4aa14dda0d9bd361fc144619bc147e0d80}{MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+BOTH}} = 3
 \}
\end{DoxyCompactItemize}
\doxysubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
int \mbox{\hyperlink{port_8h_aedb5a503f9312b510754fe363a99c27e}{mlx5\+\_\+set\+\_\+port\+\_\+caps}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 port\+\_\+num, u32 caps)
\item 
int \mbox{\hyperlink{port_8h_a8f0cbf29a10097b179dd9e3a4df0b873}{mlx5\+\_\+query\+\_\+port\+\_\+ptys}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$ptys, int ptys\+\_\+size, int proto\+\_\+mask, u8 local\+\_\+port)
\item 
int \mbox{\hyperlink{port_8h_ad9607ac18934ee28ea596856e72b8895}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+cap, int proto\+\_\+mask)
\item 
int \mbox{\hyperlink{port_8h_abd68757fec6c356f065d94a476c28c65}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int proto\+\_\+mask, u8 $\ast$an\+\_\+disable\+\_\+cap, u8 $\ast$an\+\_\+disable\+\_\+status)
\item 
int \mbox{\hyperlink{port_8h_af40ba1470375da922437a2d42ec10701}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, bool disable, u32 eth\+\_\+proto\+\_\+admin, int proto\+\_\+mask)
\item 
int \mbox{\hyperlink{port_8h_aced7454cbd10f56a2415f76633bd9a47}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+admin, int proto\+\_\+mask)
\item 
int \mbox{\hyperlink{port_8h_ac03a740d947a2d92b1b677fe0830f8d4}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 $\ast$proto\+\_\+oper, u8 local\+\_\+port)
\item 
int \mbox{\hyperlink{port_8h_a8e61837d509b7d0f854f031e69002249}{mlx5\+\_\+set\+\_\+port\+\_\+proto}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 proto\+\_\+admin, int proto\+\_\+mask, bool ext)
\item 
int \mbox{\hyperlink{port_8h_af420caf0db7e1b8cbf69651fbe3d98d7}{mlx5\+\_\+set\+\_\+port\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} status)
\item 
int \mbox{\hyperlink{port_8h_a5a527984e12e519f8e4a436f3d4f0a7d}{mlx5\+\_\+query\+\_\+port\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 $\ast$status)
\item 
int \mbox{\hyperlink{port_8h_ab0a0f0a0d6683482c1072fab351f72fc}{mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} $\ast$status)
\item 
int \mbox{\hyperlink{port_8h_ae8bafa77713ec40473235db0e29b230f}{mlx5\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 port, u8 rx\+\_\+pause, u8 tx\+\_\+pause, u8 pfc\+\_\+en\+\_\+rx, u8 pfc\+\_\+en\+\_\+tx)
\item 
int \mbox{\hyperlink{port_8h_a81bd9d53a4b98130eb63d2c5c357d1ea}{mlx5\+\_\+query\+\_\+port\+\_\+pause}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u32 port, u32 $\ast$rx\+\_\+pause, u32 $\ast$tx\+\_\+pause)
\item 
int \mbox{\hyperlink{port_8h_afda73217c985de0c61c6c3e32b1b3b06}{mlx5\+\_\+query\+\_\+port\+\_\+pfc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 $\ast$pfc\+\_\+en\+\_\+tx, u8 $\ast$pfc\+\_\+en\+\_\+rx)
\item 
int \mbox{\hyperlink{port_8h_a678235a0bf7e8e0cb35e0ce8ee96c5c9}{mlx5\+\_\+set\+\_\+port\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int mtu)
\item 
int \mbox{\hyperlink{port_8h_a621c7ea77766c5fea50a28224084966a}{mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$max\+\_\+mtu)
\item 
int \mbox{\hyperlink{port_8h_abac20c4d9ef517252456717d991413b0}{mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$oper\+\_\+mtu)
\item 
unsigned int \mbox{\hyperlink{port_8h_acf9ebb41ea75374e81c7d9ca14501267}{mlx5\+\_\+query\+\_\+module\+\_\+status}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int module\+\_\+num)
\item 
int \mbox{\hyperlink{port_8h_a79915817bf848b70fa91e71a4890a669}{mlx5\+\_\+query\+\_\+module\+\_\+num}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int $\ast$module\+\_\+num)
\item 
int \mbox{\hyperlink{port_8h_a68b553361f112504e6c7e0b875e2feff}{mlx5\+\_\+query\+\_\+eeprom}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, int i2c\+\_\+addr, int page\+\_\+num, int device\+\_\+addr, int size, int module\+\_\+num, u32 $\ast$\mbox{\hyperlink{mlx5__en__tx_8c_af943c26117683b64b9cd6943e2c496e5}{data}}, int $\ast$size\+\_\+read)
\item 
int \mbox{\hyperlink{port_8h_a8eea1a4b68e68fda00f586588c09f045}{mlx5\+\_\+max\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev)
\item 
int \mbox{\hyperlink{port_8h_a1e9dd0d7320c408a211ca9040488a41d}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$max\+\_\+bw\+\_\+value, u8 $\ast$max\+\_\+bw\+\_\+units)
\item 
int \mbox{\hyperlink{port_8h_aec4e85f531e077cf816101a0026ad225}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$max\+\_\+bw\+\_\+value, const u8 $\ast$max\+\_\+bw\+\_\+units)
\item 
int \mbox{\hyperlink{port_8h_ae0dd290d698ec73c31e72788ac917eec}{mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 prio, u8 $\ast$\mbox{\hyperlink{en_8h_a0cea5104d05c6d3949115ddd0eed432e}{tc}})
\item 
int \mbox{\hyperlink{port_8h_a0a52893d89d21c33052292f05e2d3618}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, int prio\+\_\+index, const u8 prio\+\_\+tc)
\item 
int \mbox{\hyperlink{port_8h_a1824b2318af707b6146d7c431e305694}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$tc\+\_\+group)
\item 
int \mbox{\hyperlink{port_8h_a5bc1d6be45b568bf44747236844b8959}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 \mbox{\hyperlink{en_8h_a0cea5104d05c6d3949115ddd0eed432e}{tc}}, u8 $\ast$tc\+\_\+group)
\item 
int \mbox{\hyperlink{port_8h_a1f21911cbbc6a806d4f165efd6711de1}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$tc\+\_\+bw)
\item 
int \mbox{\hyperlink{port_8h_a3bff739bb1d26721baac627ba595236e}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$bw\+\_\+pct)
\item 
int \mbox{\hyperlink{port_8h_a7c22c110dca7d84adcdaade920784192}{mlx5\+\_\+set\+\_\+trust\+\_\+state}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 trust\+\_\+state)
\item 
int \mbox{\hyperlink{port_8h_afcaee87f88eaa778d725f66812f561ba}{mlx5\+\_\+query\+\_\+trust\+\_\+state}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$trust\+\_\+state)
\item 
int \mbox{\hyperlink{port_8h_a97c245e50598b16dcb43cb32cbc37423}{mlx5\+\_\+set\+\_\+dscp2prio}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, const u8 $\ast$dscp2prio)
\item 
int \mbox{\hyperlink{port_8h_aa003c31ff5f5f6dae8728880dd8392db}{mlx5\+\_\+query\+\_\+dscp2prio}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$dscp2prio)
\item 
int \mbox{\hyperlink{port_8h_ac7afe3e33144e7a3e096599ce95c5e36}{mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 local\+\_\+port, u8 $\ast$is\+\_\+er\+\_\+type)
\item 
int \mbox{\hyperlink{port_8h_a7c89eb44382a69714c0d74ef5fe56b20}{mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 local\+\_\+port, u8 $\ast$cable\+\_\+type)
\item 
u32 \mbox{\hyperlink{port_8h_a9aa2cea85e96ba55f84c53b193a3d546}{mlx5e\+\_\+port\+\_\+ptys2speed}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 eth\+\_\+proto\+\_\+oper)
\item 
int \mbox{\hyperlink{port_8h_aa748929af17fa9534b61812f2878a6f8}{mlx5e\+\_\+port\+\_\+linkspeed}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u32 $\ast$speed)
\item 
int \mbox{\hyperlink{port_8h_abc3477405acfbb95183852d9c779374f}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$dev, u8 port, bool ext, struct \mbox{\hyperlink{structmlx5e__port__eth__proto}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto}} $\ast$eproto)
\item 
int \mbox{\hyperlink{port_8h_ad84aea8b1a6c4167ae5dbc0ce01b203e}{mlx5e\+\_\+port\+\_\+query\+\_\+pbmc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$out)
\item 
int \mbox{\hyperlink{port_8h_ae185a737aa1d8a65c1bc231c7a379d71}{mlx5e\+\_\+port\+\_\+set\+\_\+pbmc}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, void $\ast$in)
\item 
int \mbox{\hyperlink{port_8h_a3deead3af97d84e34bffc1065fa4263f}{mlx5e\+\_\+port\+\_\+query\+\_\+priority2buffer}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$buffer)
\item 
int \mbox{\hyperlink{port_8h_a24b3d47fcb69f1d6ba0237a1891e0657}{mlx5e\+\_\+port\+\_\+set\+\_\+priority2buffer}} (struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$mdev, u8 $\ast$buffer)
\end{DoxyCompactItemize}


\doxysubsection{Macro Definition Documentation}
\mbox{\Hypertarget{port_8h_a2beb9b511603d0e6bf770a1c34783b27}\label{port_8h_a2beb9b511603d0e6bf770a1c34783b27}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_HIGH\_PAGE@{MLX5\_EEPROM\_HIGH\_PAGE}}
\index{MLX5\_EEPROM\_HIGH\_PAGE@{MLX5\_EEPROM\_HIGH\_PAGE}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_HIGH\_PAGE}{MLX5\_EEPROM\_HIGH\_PAGE}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+HIGH\+\_\+\+PAGE~0x3}



Definition at line \mbox{\hyperlink{port_8h_source_l00062}{62}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a4366db5eb1d7f16926aae9adf4a37249}\label{port_8h_a4366db5eb1d7f16926aae9adf4a37249}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET@{MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET}}
\index{MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET@{MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET}{MLX5\_EEPROM\_HIGH\_PAGE\_OFFSET}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+HIGH\+\_\+\+PAGE\+\_\+\+OFFSET~128}



Definition at line \mbox{\hyperlink{port_8h_source_l00063}{63}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a3edc193814e752262519230aad591114}\label{port_8h_a3edc193814e752262519230aad591114}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK@{MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK}}
\index{MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK@{MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK}{MLX5\_EEPROM\_IDENTIFIER\_BYTE\_MASK}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+IDENTIFIER\+\_\+\+BYTE\+\_\+\+MASK~0x000000ff}



Definition at line \mbox{\hyperlink{port_8h_source_l00058}{58}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_abae63956620268fcd191ce6c772fa49e}\label{port_8h_abae63956620268fcd191ce6c772fa49e}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_INFO\_BYTES@{MLX5\_EEPROM\_INFO\_BYTES}}
\index{MLX5\_EEPROM\_INFO\_BYTES@{MLX5\_EEPROM\_INFO\_BYTES}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_INFO\_BYTES}{MLX5\_EEPROM\_INFO\_BYTES}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+INFO\+\_\+\+BYTES~0x3}



Definition at line \mbox{\hyperlink{port_8h_source_l00064}{64}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a84c968cbb690311a0a6d431829dc6d98}\label{port_8h_a84c968cbb690311a0a6d431829dc6d98}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_LOW\_PAGE@{MLX5\_EEPROM\_LOW\_PAGE}}
\index{MLX5\_EEPROM\_LOW\_PAGE@{MLX5\_EEPROM\_LOW\_PAGE}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_LOW\_PAGE}{MLX5\_EEPROM\_LOW\_PAGE}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+LOW\+\_\+\+PAGE~0x0}



Definition at line \mbox{\hyperlink{port_8h_source_l00061}{61}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a4213659d88d030b66859ba2233ca5e5b}\label{port_8h_a4213659d88d030b66859ba2233ca5e5b}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_MAX\_BYTES@{MLX5\_EEPROM\_MAX\_BYTES}}
\index{MLX5\_EEPROM\_MAX\_BYTES@{MLX5\_EEPROM\_MAX\_BYTES}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_MAX\_BYTES}{MLX5\_EEPROM\_MAX\_BYTES}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+MAX\+\_\+\+BYTES~32}



Definition at line \mbox{\hyperlink{port_8h_source_l00057}{57}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_ade7e2c5c8121fb2beeeab413adec88ce}\label{port_8h_ade7e2c5c8121fb2beeeab413adec88ce}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK@{MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK}}
\index{MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK@{MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK}{MLX5\_EEPROM\_PAGE\_3\_VALID\_BIT\_MASK}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+PAGE\+\_\+3\+\_\+\+VALID\+\_\+\+BIT\+\_\+\+MASK~0x00040000}



Definition at line \mbox{\hyperlink{port_8h_source_l00060}{60}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a73d06cbb4572124a1079a15daa58293d}\label{port_8h_a73d06cbb4572124a1079a15daa58293d}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_PAGE\_LENGTH@{MLX5\_EEPROM\_PAGE\_LENGTH}}
\index{MLX5\_EEPROM\_PAGE\_LENGTH@{MLX5\_EEPROM\_PAGE\_LENGTH}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_PAGE\_LENGTH}{MLX5\_EEPROM\_PAGE\_LENGTH}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+PAGE\+\_\+\+LENGTH~256}



Definition at line \mbox{\hyperlink{port_8h_source_l00056}{56}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a6f26062bef44fd9bd91f04f6f4e6787a}\label{port_8h_a6f26062bef44fd9bd91f04f6f4e6787a}} 
\index{port.h@{port.h}!MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK@{MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK}}
\index{MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK@{MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK}{MLX5\_EEPROM\_REVISION\_ID\_BYTE\_MASK}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+EEPROM\+\_\+\+REVISION\+\_\+\+ID\+\_\+\+BYTE\+\_\+\+MASK~0x0000ff00}



Definition at line \mbox{\hyperlink{port_8h_source_l00059}{59}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_ad7d4d5d5299b0699fd28b0bd93e30e43}\label{port_8h_ad7d4d5d5299b0699fd28b0bd93e30e43}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8436@{MLX5\_ETH\_MODULE\_SFF\_8436}}
\index{MLX5\_ETH\_MODULE\_SFF\_8436@{MLX5\_ETH\_MODULE\_SFF\_8436}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8436}{MLX5\_ETH\_MODULE\_SFF\_8436}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8436~0x3}



Definition at line \mbox{\hyperlink{port_8h_source_l00078}{78}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a5933fd5ced93ea0459948b88877d8d1a}\label{port_8h_a5933fd5ced93ea0459948b88877d8d1a}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8436\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8436\_LEN}}
\index{MLX5\_ETH\_MODULE\_SFF\_8436\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8436\_LEN}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8436\_LEN}{MLX5\_ETH\_MODULE\_SFF\_8436\_LEN}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8436\+\_\+\+LEN~256}



Definition at line \mbox{\hyperlink{port_8h_source_l00079}{79}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a2ff07809f81ea97cc8b85554e17efc17}\label{port_8h_a2ff07809f81ea97cc8b85554e17efc17}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8472@{MLX5\_ETH\_MODULE\_SFF\_8472}}
\index{MLX5\_ETH\_MODULE\_SFF\_8472@{MLX5\_ETH\_MODULE\_SFF\_8472}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8472}{MLX5\_ETH\_MODULE\_SFF\_8472}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8472~0x1}



Definition at line \mbox{\hyperlink{port_8h_source_l00068}{68}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_afd52d81cfc8cbae36c89d1179d1408c2}\label{port_8h_afd52d81cfc8cbae36c89d1179d1408c2}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8472\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8472\_LEN}}
\index{MLX5\_ETH\_MODULE\_SFF\_8472\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8472\_LEN}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8472\_LEN}{MLX5\_ETH\_MODULE\_SFF\_8472\_LEN}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8472\+\_\+\+LEN~128}



Definition at line \mbox{\hyperlink{port_8h_source_l00069}{69}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a3abde693d21d0ab3d8fce5adcabdb742}\label{port_8h_a3abde693d21d0ab3d8fce5adcabdb742}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8636@{MLX5\_ETH\_MODULE\_SFF\_8636}}
\index{MLX5\_ETH\_MODULE\_SFF\_8636@{MLX5\_ETH\_MODULE\_SFF\_8636}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8636}{MLX5\_ETH\_MODULE\_SFF\_8636}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8636~0x2}



Definition at line \mbox{\hyperlink{port_8h_source_l00073}{73}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_aa9d4a37b396f78e86d90244982d7faa5}\label{port_8h_aa9d4a37b396f78e86d90244982d7faa5}} 
\index{port.h@{port.h}!MLX5\_ETH\_MODULE\_SFF\_8636\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8636\_LEN}}
\index{MLX5\_ETH\_MODULE\_SFF\_8636\_LEN@{MLX5\_ETH\_MODULE\_SFF\_8636\_LEN}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_ETH\_MODULE\_SFF\_8636\_LEN}{MLX5\_ETH\_MODULE\_SFF\_8636\_LEN}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+ETH\+\_\+\+MODULE\+\_\+\+SFF\+\_\+8636\+\_\+\+LEN~256}



Definition at line \mbox{\hyperlink{port_8h_source_l00074}{74}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a85ea9be21638b172b3e363994ca8fa17}\label{port_8h_a85ea9be21638b172b3e363994ca8fa17}} 
\index{port.h@{port.h}!MLX5\_GET\_ETH\_PROTO@{MLX5\_GET\_ETH\_PROTO}}
\index{MLX5\_GET\_ETH\_PROTO@{MLX5\_GET\_ETH\_PROTO}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_GET\_ETH\_PROTO}{MLX5\_GET\_ETH\_PROTO}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+GET\+\_\+\+ETH\+\_\+\+PROTO(\begin{DoxyParamCaption}\item[{}]{reg,  }\item[{}]{out,  }\item[{}]{ext,  }\item[{}]{field }\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{    ((ext) ? \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(reg, out, ext\_\#\#field) :        \(\backslash\)}
\DoxyCodeLine{    MLX5\_GET(reg, out, field))}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{port_8h_source_l00163}{163}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_ae3d5e640295d3d3610426a7d5e3b63b8}\label{port_8h_ae3d5e640295d3d3610426a7d5e3b63b8}} 
\index{port.h@{port.h}!MLX5\_I2C\_ADDR\_HIGH@{MLX5\_I2C\_ADDR\_HIGH}}
\index{MLX5\_I2C\_ADDR\_HIGH@{MLX5\_I2C\_ADDR\_HIGH}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_I2C\_ADDR\_HIGH}{MLX5\_I2C\_ADDR\_HIGH}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+I2\+C\+\_\+\+ADDR\+\_\+\+HIGH~0x51}



Definition at line \mbox{\hyperlink{port_8h_source_l00055}{55}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_abdaf26fa2f7e0f2c629753b3468f1a28}\label{port_8h_abdaf26fa2f7e0f2c629753b3468f1a28}} 
\index{port.h@{port.h}!MLX5\_I2C\_ADDR\_LOW@{MLX5\_I2C\_ADDR\_LOW}}
\index{MLX5\_I2C\_ADDR\_LOW@{MLX5\_I2C\_ADDR\_LOW}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_I2C\_ADDR\_LOW}{MLX5\_I2C\_ADDR\_LOW}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+I2\+C\+\_\+\+ADDR\+\_\+\+LOW~0x50}



Definition at line \mbox{\hyperlink{port_8h_source_l00054}{54}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a9d7d601613ffc05172f7291dad601a60}\label{port_8h_a9d7d601613ffc05172f7291dad601a60}} 
\index{port.h@{port.h}!MLX5\_MAX\_SUPPORTED\_DSCP@{MLX5\_MAX\_SUPPORTED\_DSCP}}
\index{MLX5\_MAX\_SUPPORTED\_DSCP@{MLX5\_MAX\_SUPPORTED\_DSCP}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5\_MAX\_SUPPORTED\_DSCP}{MLX5\_MAX\_SUPPORTED\_DSCP}}
{\footnotesize\ttfamily \#define MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP~64}



Definition at line \mbox{\hyperlink{port_8h_source_l00224}{224}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_acc7c39a986fc970d9f13a68f4a28fbc2}\label{port_8h_acc7c39a986fc970d9f13a68f4a28fbc2}} 
\index{port.h@{port.h}!MLX5E\_PROT\_MASK@{MLX5E\_PROT\_MASK}}
\index{MLX5E\_PROT\_MASK@{MLX5E\_PROT\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{MLX5E\_PROT\_MASK}{MLX5E\_PROT\_MASK}}
{\footnotesize\ttfamily \#define MLX5\+E\+\_\+\+PROT\+\_\+\+MASK(\begin{DoxyParamCaption}\item[{}]{link\+\_\+mode }\end{DoxyParamCaption})~(1 $<$$<$ (link\+\_\+mode))}



Definition at line \mbox{\hyperlink{port_8h_source_l00158}{158}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a9d5618aed94d9c2f18fbcd69d71e1b17}\label{port_8h_a9d5618aed94d9c2f18fbcd69d71e1b17}} 
\index{port.h@{port.h}!PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK@{PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK}}
\index{PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK@{PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK}{PORT\_MODULE\_EVENT\_ERROR\_TYPE\_MASK}}
{\footnotesize\ttfamily \#define PORT\+\_\+\+MODULE\+\_\+\+EVENT\+\_\+\+ERROR\+\_\+\+TYPE\+\_\+\+MASK~0xF}



Definition at line \mbox{\hyperlink{port_8h_source_l00161}{161}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a207ab9cb36321fb8d5fb64b504e9bd7a}\label{port_8h_a207ab9cb36321fb8d5fb64b504e9bd7a}} 
\index{port.h@{port.h}!PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK@{PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK}}
\index{PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK@{PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK}{PORT\_MODULE\_EVENT\_MODULE\_STATUS\_MASK}}
{\footnotesize\ttfamily \#define PORT\+\_\+\+MODULE\+\_\+\+EVENT\+\_\+\+MODULE\+\_\+\+STATUS\+\_\+\+MASK~0xF}



Definition at line \mbox{\hyperlink{port_8h_source_l00160}{160}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a3e32bef5619db32289542cdb7860a500}\label{port_8h_a3e32bef5619db32289542cdb7860a500}} 
\index{port.h@{port.h}!SPEED\_40000@{SPEED\_40000}}
\index{SPEED\_40000@{SPEED\_40000}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{SPEED\_40000}{SPEED\_40000}}
{\footnotesize\ttfamily \#define SPEED\+\_\+40000~40000}



Definition at line \mbox{\hyperlink{port_8h_source_l00155}{155}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.



\doxysubsection{Enumeration Type Documentation}
\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527}\label{port_8h_ad1ff77be1655233feb49188dcce2c527}} 
\index{port.h@{port.h}!mlx5\_an\_status@{mlx5\_an\_status}}
\index{mlx5\_an\_status@{mlx5\_an\_status}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_an\_status}{mlx5\_an\_status}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_ad1ff77be1655233feb49188dcce2c527}{mlx5\+\_\+an\+\_\+status}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_AN\_UNAVAILABLE@{MLX5\_AN\_UNAVAILABLE}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_AN\_UNAVAILABLE@{MLX5\_AN\_UNAVAILABLE}}}\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527a1036116d6e744c846ae22eb25fd07254}\label{port_8h_ad1ff77be1655233feb49188dcce2c527a1036116d6e744c846ae22eb25fd07254}} 
MLX5\+\_\+\+AN\+\_\+\+UNAVAILABLE&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_AN\_COMPLETE@{MLX5\_AN\_COMPLETE}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_AN\_COMPLETE@{MLX5\_AN\_COMPLETE}}}\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527acf8e239541b163a3868cb6a2b34c99db}\label{port_8h_ad1ff77be1655233feb49188dcce2c527acf8e239541b163a3868cb6a2b34c99db}} 
MLX5\+\_\+\+AN\+\_\+\+COMPLETE&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_AN\_FAILED@{MLX5\_AN\_FAILED}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_AN\_FAILED@{MLX5\_AN\_FAILED}}}\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527a01320cdf98efa6ba9d64ed557fd78cf8}\label{port_8h_ad1ff77be1655233feb49188dcce2c527a01320cdf98efa6ba9d64ed557fd78cf8}} 
MLX5\+\_\+\+AN\+\_\+\+FAILED&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_AN\_LINK\_UP@{MLX5\_AN\_LINK\_UP}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_AN\_LINK\_UP@{MLX5\_AN\_LINK\_UP}}}\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527acd779c6fd84fedf8e58952c8e5017823}\label{port_8h_ad1ff77be1655233feb49188dcce2c527acd779c6fd84fedf8e58952c8e5017823}} 
MLX5\+\_\+\+AN\+\_\+\+LINK\+\_\+\+UP&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_AN\_LINK\_DOWN@{MLX5\_AN\_LINK\_DOWN}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_AN\_LINK\_DOWN@{MLX5\_AN\_LINK\_DOWN}}}\mbox{\Hypertarget{port_8h_ad1ff77be1655233feb49188dcce2c527a50fffebbb034aaee25efbe486bbe1bd6}\label{port_8h_ad1ff77be1655233feb49188dcce2c527a50fffebbb034aaee25efbe486bbe1bd6}} 
MLX5\+\_\+\+AN\+\_\+\+LINK\+\_\+\+DOWN&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00045}{45}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_ad22271152377495ba1bba5d0070f36ed}\label{port_8h_ad22271152377495ba1bba5d0070f36ed}} 
\index{port.h@{port.h}!mlx5\_beacon\_duration@{mlx5\_beacon\_duration}}
\index{mlx5\_beacon\_duration@{mlx5\_beacon\_duration}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_beacon\_duration}{mlx5\_beacon\_duration}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_ad22271152377495ba1bba5d0070f36ed}{mlx5\+\_\+beacon\+\_\+duration}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_BEACON\_DURATION\_OFF@{MLX5\_BEACON\_DURATION\_OFF}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_BEACON\_DURATION\_OFF@{MLX5\_BEACON\_DURATION\_OFF}}}\mbox{\Hypertarget{port_8h_ad22271152377495ba1bba5d0070f36eda1ef5279d1f9e5f188a4b9d87c8033a17}\label{port_8h_ad22271152377495ba1bba5d0070f36eda1ef5279d1f9e5f188a4b9d87c8033a17}} 
MLX5\+\_\+\+BEACON\+\_\+\+DURATION\+\_\+\+OFF&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_BEACON\_DURATION\_INF@{MLX5\_BEACON\_DURATION\_INF}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_BEACON\_DURATION\_INF@{MLX5\_BEACON\_DURATION\_INF}}}\mbox{\Hypertarget{port_8h_ad22271152377495ba1bba5d0070f36edabd5aa7fb20e5bd599bf2c11a391e5071}\label{port_8h_ad22271152377495ba1bba5d0070f36edabd5aa7fb20e5bd599bf2c11a391e5071}} 
MLX5\+\_\+\+BEACON\+\_\+\+DURATION\+\_\+\+INF&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00033}{33}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_af1128847465a32284e059b4a6321d4aa}\label{port_8h_af1128847465a32284e059b4a6321d4aa}} 
\index{port.h@{port.h}!mlx5\_module\_id@{mlx5\_module\_id}}
\index{mlx5\_module\_id@{mlx5\_module\_id}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_module\_id}{mlx5\_module\_id}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_af1128847465a32284e059b4a6321d4aa}{mlx5\+\_\+module\+\_\+id}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_MODULE\_ID\_SFP@{MLX5\_MODULE\_ID\_SFP}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_MODULE\_ID\_SFP@{MLX5\_MODULE\_ID\_SFP}}}\mbox{\Hypertarget{port_8h_af1128847465a32284e059b4a6321d4aaaa426538e185cca448b69bce64ee328fa}\label{port_8h_af1128847465a32284e059b4a6321d4aaaa426538e185cca448b69bce64ee328fa}} 
MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+SFP&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_MODULE\_ID\_QSFP@{MLX5\_MODULE\_ID\_QSFP}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_MODULE\_ID\_QSFP@{MLX5\_MODULE\_ID\_QSFP}}}\mbox{\Hypertarget{port_8h_af1128847465a32284e059b4a6321d4aaa614dfa728e5307699a45dc14d863ba01}\label{port_8h_af1128847465a32284e059b4a6321d4aaa614dfa728e5307699a45dc14d863ba01}} 
MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_MODULE\_ID\_QSFP\_PLUS@{MLX5\_MODULE\_ID\_QSFP\_PLUS}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_MODULE\_ID\_QSFP\_PLUS@{MLX5\_MODULE\_ID\_QSFP\_PLUS}}}\mbox{\Hypertarget{port_8h_af1128847465a32284e059b4a6321d4aaa9a90b6477ba12905cb1e0dd31f8240fc}\label{port_8h_af1128847465a32284e059b4a6321d4aaa9a90b6477ba12905cb1e0dd31f8240fc}} 
MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP\+\_\+\+PLUS&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_MODULE\_ID\_QSFP28@{MLX5\_MODULE\_ID\_QSFP28}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_MODULE\_ID\_QSFP28@{MLX5\_MODULE\_ID\_QSFP28}}}\mbox{\Hypertarget{port_8h_af1128847465a32284e059b4a6321d4aaa8acb90af4a36932f9eecff824ea6c2ef}\label{port_8h_af1128847465a32284e059b4a6321d4aaa8acb90af4a36932f9eecff824ea6c2ef}} 
MLX5\+\_\+\+MODULE\+\_\+\+ID\+\_\+\+QSFP28&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00038}{38}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4}\label{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4}} 
\index{port.h@{port.h}!mlx5\_qpts\_trust\_state@{mlx5\_qpts\_trust\_state}}
\index{mlx5\_qpts\_trust\_state@{mlx5\_qpts\_trust\_state}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_qpts\_trust\_state}{mlx5\_qpts\_trust\_state}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4}{mlx5\+\_\+qpts\+\_\+trust\+\_\+state}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_QPTS\_TRUST\_PCP@{MLX5\_QPTS\_TRUST\_PCP}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_QPTS\_TRUST\_PCP@{MLX5\_QPTS\_TRUST\_PCP}}}\mbox{\Hypertarget{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a70e163a5bbc7e4e6e103aae4f7b27156}\label{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a70e163a5bbc7e4e6e103aae4f7b27156}} 
MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+PCP&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_QPTS\_TRUST\_DSCP@{MLX5\_QPTS\_TRUST\_DSCP}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_QPTS\_TRUST\_DSCP@{MLX5\_QPTS\_TRUST\_DSCP}}}\mbox{\Hypertarget{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a6ee5d92cd5071fab7d55550e5d5bd4e0}\label{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4a6ee5d92cd5071fab7d55550e5d5bd4e0}} 
MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+DSCP&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5\_QPTS\_TRUST\_BOTH@{MLX5\_QPTS\_TRUST\_BOTH}!port.h@{port.h}}\index{port.h@{port.h}!MLX5\_QPTS\_TRUST\_BOTH@{MLX5\_QPTS\_TRUST\_BOTH}}}\mbox{\Hypertarget{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4aa14dda0d9bd361fc144619bc147e0d80}\label{port_8h_a4f09af9c41d3faeeda2e2ef76abd3eb4aa14dda0d9bd361fc144619bc147e0d80}} 
MLX5\+\_\+\+QPTS\+\_\+\+TRUST\+\_\+\+BOTH&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00143}{143}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712}} 
\index{port.h@{port.h}!mlx5e\_cable\_type@{mlx5e\_cable\_type}}
\index{mlx5e\_cable\_type@{mlx5e\_cable\_type}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_cable\_type}{mlx5e\_cable\_type}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712}{mlx5e\+\_\+cable\+\_\+type}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_UNKNOWN@{MLX5E\_CABLE\_TYPE\_UNKNOWN}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_UNKNOWN@{MLX5E\_CABLE\_TYPE\_UNKNOWN}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a53853701cacddb2b038378caed272534}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a53853701cacddb2b038378caed272534}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+UNKNOWN&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_ACTIVE\_CABLE@{MLX5E\_CABLE\_TYPE\_ACTIVE\_CABLE}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_ACTIVE\_CABLE@{MLX5E\_CABLE\_TYPE\_ACTIVE\_CABLE}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab4a6c6daf33259453caec35a94be942d}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab4a6c6daf33259453caec35a94be942d}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+ACTIVE\+\_\+\+CABLE&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_OPTICAL\_MODULE@{MLX5E\_CABLE\_TYPE\_OPTICAL\_MODULE}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_OPTICAL\_MODULE@{MLX5E\_CABLE\_TYPE\_OPTICAL\_MODULE}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a4155ce3291790abd7bfeec3abbc5c816}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a4155ce3291790abd7bfeec3abbc5c816}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+OPTICAL\+\_\+\+MODULE&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_PASSIVE\_COPPER@{MLX5E\_CABLE\_TYPE\_PASSIVE\_COPPER}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_PASSIVE\_COPPER@{MLX5E\_CABLE\_TYPE\_PASSIVE\_COPPER}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ac3dc641cf79f246ac237a141d943b760}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ac3dc641cf79f246ac237a141d943b760}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+PASSIVE\+\_\+\+COPPER&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_CABLE\_UNPLUGGED@{MLX5E\_CABLE\_TYPE\_CABLE\_UNPLUGGED}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_CABLE\_UNPLUGGED@{MLX5E\_CABLE\_TYPE\_CABLE\_UNPLUGGED}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a045e89581e561c9d88de56f4cbe6ddb4}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a045e89581e561c9d88de56f4cbe6ddb4}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+CABLE\+\_\+\+UNPLUGGED&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_TWISTED\_PAIR@{MLX5E\_CABLE\_TYPE\_TWISTED\_PAIR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_TWISTED\_PAIR@{MLX5E\_CABLE\_TYPE\_TWISTED\_PAIR}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab434c16ee9ef6071240dba41606dd92b}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712ab434c16ee9ef6071240dba41606dd92b}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+TWISTED\+\_\+\+PAIR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CABLE\_TYPE\_NUMBER@{MLX5E\_CABLE\_TYPE\_NUMBER}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CABLE\_TYPE\_NUMBER@{MLX5E\_CABLE\_TYPE\_NUMBER}}}\mbox{\Hypertarget{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a151fd303a0230100fbf09fdaa0dce157}\label{port_8h_afe3a1c7bf9d0ab00734d5eb46f31b712a151fd303a0230100fbf09fdaa0dce157}} 
MLX5\+E\+\_\+\+CABLE\+\_\+\+TYPE\+\_\+\+NUMBER&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00133}{133}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbe}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbe}} 
\index{port.h@{port.h}!mlx5e\_ext\_link\_speed@{mlx5e\_ext\_link\_speed}}
\index{mlx5e\_ext\_link\_speed@{mlx5e\_ext\_link\_speed}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_ext\_link\_speed}{mlx5e\_ext\_link\_speed}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_a54f19ab7e76fe68cab0372236681bdbe}{mlx5e\+\_\+ext\+\_\+link\+\_\+speed}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_SGMII\_100M@{MLX5E\_SGMII\_100M}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_SGMII\_100M@{MLX5E\_SGMII\_100M}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeaa083e5ca4dec07e3d8d5ac0c8cdc48b3}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeaa083e5ca4dec07e3d8d5ac0c8cdc48b3}} 
MLX5\+E\+\_\+\+SGMII\+\_\+100M&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_1000BASE\_X\_SGMII@{MLX5E\_1000BASE\_X\_SGMII}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_1000BASE\_X\_SGMII@{MLX5E\_1000BASE\_X\_SGMII}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeacecfbdca7afd6f54af470682f6fcdc1b}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeacecfbdca7afd6f54af470682f6fcdc1b}} 
MLX5\+E\+\_\+1000\+BASE\+\_\+\+X\+\_\+\+SGMII&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_5GBASE\_R@{MLX5E\_5GBASE\_R}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_5GBASE\_R@{MLX5E\_5GBASE\_R}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea3cc2fbf5e9fbf492c8cb3de3d32cdca7}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea3cc2fbf5e9fbf492c8cb3de3d32cdca7}} 
MLX5\+E\+\_\+5\+GBASE\+\_\+R&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_XFI\_XAUI\_1@{MLX5E\_10GBASE\_XFI\_XAUI\_1}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_XFI\_XAUI\_1@{MLX5E\_10GBASE\_XFI\_XAUI\_1}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeabd71966566b88761e02e0e9021bc0749}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeabd71966566b88761e02e0e9021bc0749}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+XFI\+\_\+\+XAUI\+\_\+1&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_40GBASE\_XLAUI\_4\_XLPPI\_4@{MLX5E\_40GBASE\_XLAUI\_4\_XLPPI\_4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_40GBASE\_XLAUI\_4\_XLPPI\_4@{MLX5E\_40GBASE\_XLAUI\_4\_XLPPI\_4}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea4c01f8c56f0a85f7cd1d6b33c0da429c}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea4c01f8c56f0a85f7cd1d6b33c0da429c}} 
MLX5\+E\+\_\+40\+GBASE\+\_\+\+XLAUI\+\_\+4\+\_\+\+XLPPI\+\_\+4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_25GAUI\_1\_25GBASE\_CR\_KR@{MLX5E\_25GAUI\_1\_25GBASE\_CR\_KR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_25GAUI\_1\_25GBASE\_CR\_KR@{MLX5E\_25GAUI\_1\_25GBASE\_CR\_KR}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea8d16be8e488c56eef804b6d948d98226}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea8d16be8e488c56eef804b6d948d98226}} 
MLX5\+E\+\_\+25\+GAUI\+\_\+1\+\_\+25\+GBASE\+\_\+\+CR\+\_\+\+KR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GAUI\_2\_LAUI\_2\_50GBASE\_CR2\_KR2@{MLX5E\_50GAUI\_2\_LAUI\_2\_50GBASE\_CR2\_KR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GAUI\_2\_LAUI\_2\_50GBASE\_CR2\_KR2@{MLX5E\_50GAUI\_2\_LAUI\_2\_50GBASE\_CR2\_KR2}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeac8fa27a61436723b9a1ac3cd7227700a}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeac8fa27a61436723b9a1ac3cd7227700a}} 
MLX5\+E\+\_\+50\+GAUI\+\_\+2\+\_\+\+LAUI\+\_\+2\+\_\+50\+GBASE\+\_\+\+CR2\+\_\+\+KR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GAUI\_1\_LAUI\_1\_50GBASE\_CR\_KR@{MLX5E\_50GAUI\_1\_LAUI\_1\_50GBASE\_CR\_KR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GAUI\_1\_LAUI\_1\_50GBASE\_CR\_KR@{MLX5E\_50GAUI\_1\_LAUI\_1\_50GBASE\_CR\_KR}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea3b704517c8e08ad15947ca20966882b9}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea3b704517c8e08ad15947ca20966882b9}} 
MLX5\+E\+\_\+50\+GAUI\+\_\+1\+\_\+\+LAUI\+\_\+1\+\_\+50\+GBASE\+\_\+\+CR\+\_\+\+KR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_CAUI\_4\_100GBASE\_CR4\_KR4@{MLX5E\_CAUI\_4\_100GBASE\_CR4\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_CAUI\_4\_100GBASE\_CR4\_KR4@{MLX5E\_CAUI\_4\_100GBASE\_CR4\_KR4}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf35d65a2f8f239f6df455e35d69830d7}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf35d65a2f8f239f6df455e35d69830d7}} 
MLX5\+E\+\_\+\+CAUI\+\_\+4\+\_\+100\+GBASE\+\_\+\+CR4\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GAUI\_2\_100GBASE\_CR2\_KR2@{MLX5E\_100GAUI\_2\_100GBASE\_CR2\_KR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GAUI\_2\_100GBASE\_CR2\_KR2@{MLX5E\_100GAUI\_2\_100GBASE\_CR2\_KR2}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea507da02dc836fcd8f4289e5af1df5e0e}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea507da02dc836fcd8f4289e5af1df5e0e}} 
MLX5\+E\+\_\+100\+GAUI\+\_\+2\+\_\+100\+GBASE\+\_\+\+CR2\+\_\+\+KR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GAUI\_1\_100GBASE\_CR\_KR@{MLX5E\_100GAUI\_1\_100GBASE\_CR\_KR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GAUI\_1\_100GBASE\_CR\_KR@{MLX5E\_100GAUI\_1\_100GBASE\_CR\_KR}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeaeb6e176b9622e6e1c0d887f34be6e692}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeaeb6e176b9622e6e1c0d887f34be6e692}} 
MLX5\+E\+\_\+100\+GAUI\+\_\+1\+\_\+100\+GBASE\+\_\+\+CR\+\_\+\+KR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_200GAUI\_4\_200GBASE\_CR4\_KR4@{MLX5E\_200GAUI\_4\_200GBASE\_CR4\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_200GAUI\_4\_200GBASE\_CR4\_KR4@{MLX5E\_200GAUI\_4\_200GBASE\_CR4\_KR4}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea8a464d6c429ca6a12b980481506ede94}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea8a464d6c429ca6a12b980481506ede94}} 
MLX5\+E\+\_\+200\+GAUI\+\_\+4\+\_\+200\+GBASE\+\_\+\+CR4\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_200GAUI\_2\_200GBASE\_CR2\_KR2@{MLX5E\_200GAUI\_2\_200GBASE\_CR2\_KR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_200GAUI\_2\_200GBASE\_CR2\_KR2@{MLX5E\_200GAUI\_2\_200GBASE\_CR2\_KR2}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf2ff20a4d288de8e40cf368e81ddeb33}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeaf2ff20a4d288de8e40cf368e81ddeb33}} 
MLX5\+E\+\_\+200\+GAUI\+\_\+2\+\_\+200\+GBASE\+\_\+\+CR2\+\_\+\+KR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_400GAUI\_8@{MLX5E\_400GAUI\_8}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_400GAUI\_8@{MLX5E\_400GAUI\_8}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea6ef5b39f4f95c93016157760b4c41c57}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea6ef5b39f4f95c93016157760b4c41c57}} 
MLX5\+E\+\_\+400\+GAUI\+\_\+8&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_400GAUI\_4\_400GBASE\_CR4\_KR4@{MLX5E\_400GAUI\_4\_400GBASE\_CR4\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_400GAUI\_4\_400GBASE\_CR4\_KR4@{MLX5E\_400GAUI\_4\_400GBASE\_CR4\_KR4}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbeae1548fbed05163fd8cfc3f30e27c3c8a}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbeae1548fbed05163fd8cfc3f30e27c3c8a}} 
MLX5\+E\+\_\+400\+GAUI\+\_\+4\+\_\+400\+GBASE\+\_\+\+CR4\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_EXT\_LINK\_SPEEDS\_NUMBER@{MLX5E\_EXT\_LINK\_SPEEDS\_NUMBER}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_EXT\_LINK\_SPEEDS\_NUMBER@{MLX5E\_EXT\_LINK\_SPEEDS\_NUMBER}}}\mbox{\Hypertarget{port_8h_a54f19ab7e76fe68cab0372236681bdbea0eb057cb4b2dbee0787c75c500a510ee}\label{port_8h_a54f19ab7e76fe68cab0372236681bdbea0eb057cb4b2dbee0787c75c500a510ee}} 
MLX5\+E\+\_\+\+EXT\+\_\+\+LINK\+\_\+\+SPEEDS\+\_\+\+NUMBER&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00114}{114}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.

\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0c}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0c}} 
\index{port.h@{port.h}!mlx5e\_link\_speed@{mlx5e\_link\_speed}}
\index{mlx5e\_link\_speed@{mlx5e\_link\_speed}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_link\_speed}{mlx5e\_link\_speed}}
{\footnotesize\ttfamily enum \mbox{\hyperlink{port_8h_a7dfcb3631fc98516e9d7d48497ddae0c}{mlx5e\+\_\+link\+\_\+speed}}}

\begin{DoxyEnumFields}{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_1000BASE\_CX\_SGMII@{MLX5E\_1000BASE\_CX\_SGMII}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_1000BASE\_CX\_SGMII@{MLX5E\_1000BASE\_CX\_SGMII}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cadd33645d9d63c095940ecca7a61df2fc}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cadd33645d9d63c095940ecca7a61df2fc}} 
MLX5\+E\+\_\+1000\+BASE\+\_\+\+CX\+\_\+\+SGMII&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_1000BASE\_KX@{MLX5E\_1000BASE\_KX}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_1000BASE\_KX@{MLX5E\_1000BASE\_KX}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca56f83eb6dc60afe29daeec61eefd26d7}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca56f83eb6dc60afe29daeec61eefd26d7}} 
MLX5\+E\+\_\+1000\+BASE\+\_\+\+KX&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_CX4@{MLX5E\_10GBASE\_CX4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_CX4@{MLX5E\_10GBASE\_CX4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca149967e98e14c7fe394e6b31207b8456}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca149967e98e14c7fe394e6b31207b8456}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+CX4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_KX4@{MLX5E\_10GBASE\_KX4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_KX4@{MLX5E\_10GBASE\_KX4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa58cb6e2baa8d99dad115b11af19d8c3}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa58cb6e2baa8d99dad115b11af19d8c3}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+KX4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_KR@{MLX5E\_10GBASE\_KR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_KR@{MLX5E\_10GBASE\_KR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2c7ed84ac39a6242dbaf94187b6b4035}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2c7ed84ac39a6242dbaf94187b6b4035}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+KR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_20GBASE\_KR2@{MLX5E\_20GBASE\_KR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_20GBASE\_KR2@{MLX5E\_20GBASE\_KR2}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1745f732898d4e1373757463c3825658}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1745f732898d4e1373757463c3825658}} 
MLX5\+E\+\_\+20\+GBASE\+\_\+\+KR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_40GBASE\_CR4@{MLX5E\_40GBASE\_CR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_40GBASE\_CR4@{MLX5E\_40GBASE\_CR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca994767f942a4a6ad4a354d4dcf805f80}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca994767f942a4a6ad4a354d4dcf805f80}} 
MLX5\+E\+\_\+40\+GBASE\+\_\+\+CR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_40GBASE\_KR4@{MLX5E\_40GBASE\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_40GBASE\_KR4@{MLX5E\_40GBASE\_KR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1da0bf9167e893acafb772650a294842}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1da0bf9167e893acafb772650a294842}} 
MLX5\+E\+\_\+40\+GBASE\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_56GBASE\_R4@{MLX5E\_56GBASE\_R4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_56GBASE\_R4@{MLX5E\_56GBASE\_R4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca96281473b8488f5d47c7d400b9a9e640}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca96281473b8488f5d47c7d400b9a9e640}} 
MLX5\+E\+\_\+56\+GBASE\+\_\+\+R4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_CR@{MLX5E\_10GBASE\_CR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_CR@{MLX5E\_10GBASE\_CR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca9314d331ca5f14ba1c6ca06f3dec4fa6}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca9314d331ca5f14ba1c6ca06f3dec4fa6}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+CR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_SR@{MLX5E\_10GBASE\_SR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_SR@{MLX5E\_10GBASE\_SR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca326cb730005116bd960b715a4baf4f65}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca326cb730005116bd960b715a4baf4f65}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+SR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_ER\_LR@{MLX5E\_10GBASE\_ER\_LR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_ER\_LR@{MLX5E\_10GBASE\_ER\_LR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caf73cc49bc638af091768a537dd551f45}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caf73cc49bc638af091768a537dd551f45}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+\+ER\+\_\+\+LR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_40GBASE\_SR4@{MLX5E\_40GBASE\_SR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_40GBASE\_SR4@{MLX5E\_40GBASE\_SR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca37f4d01c6d147b656d3614e5063868b8}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca37f4d01c6d147b656d3614e5063868b8}} 
MLX5\+E\+\_\+40\+GBASE\+\_\+\+SR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_40GBASE\_LR4\_ER4@{MLX5E\_40GBASE\_LR4\_ER4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_40GBASE\_LR4\_ER4@{MLX5E\_40GBASE\_LR4\_ER4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca0561ed42006a3f4804e6086a9f6f5aec}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca0561ed42006a3f4804e6086a9f6f5aec}} 
MLX5\+E\+\_\+40\+GBASE\+\_\+\+LR4\+\_\+\+ER4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GBASE\_SR2@{MLX5E\_50GBASE\_SR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GBASE\_SR2@{MLX5E\_50GBASE\_SR2}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca426cb42b0a3b549e4df1da12b6e21a1d}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca426cb42b0a3b549e4df1da12b6e21a1d}} 
MLX5\+E\+\_\+50\+GBASE\+\_\+\+SR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GBASE\_KR4@{MLX5E\_50GBASE\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GBASE\_KR4@{MLX5E\_50GBASE\_KR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca3765dd8d4c6b84e23edea5e0e890298e}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca3765dd8d4c6b84e23edea5e0e890298e}} 
MLX5\+E\+\_\+50\+GBASE\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GBASE\_CR4@{MLX5E\_100GBASE\_CR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GBASE\_CR4@{MLX5E\_100GBASE\_CR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca61da27c6adb650d9b781c3afe1a76636}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca61da27c6adb650d9b781c3afe1a76636}} 
MLX5\+E\+\_\+100\+GBASE\+\_\+\+CR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GBASE\_SR4@{MLX5E\_100GBASE\_SR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GBASE\_SR4@{MLX5E\_100GBASE\_SR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caacc0a83680715de778c173aab6fb49ee}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caacc0a83680715de778c173aab6fb49ee}} 
MLX5\+E\+\_\+100\+GBASE\+\_\+\+SR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GBASE\_KR4@{MLX5E\_100GBASE\_KR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GBASE\_KR4@{MLX5E\_100GBASE\_KR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cae03738e558b5677d1f19708f82442066}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cae03738e558b5677d1f19708f82442066}} 
MLX5\+E\+\_\+100\+GBASE\+\_\+\+KR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100GBASE\_LR4@{MLX5E\_100GBASE\_LR4}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100GBASE\_LR4@{MLX5E\_100GBASE\_LR4}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad4389791d6d3a25859f4023d54dc980b}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad4389791d6d3a25859f4023d54dc980b}} 
MLX5\+E\+\_\+100\+GBASE\+\_\+\+LR4&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_100BASE\_TX@{MLX5E\_100BASE\_TX}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_100BASE\_TX@{MLX5E\_100BASE\_TX}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad8ae1f3ce5e7e56d9fb1fb591ce40ab3}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cad8ae1f3ce5e7e56d9fb1fb591ce40ab3}} 
MLX5\+E\+\_\+100\+BASE\+\_\+\+TX&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_1000BASE\_T@{MLX5E\_1000BASE\_T}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_1000BASE\_T@{MLX5E\_1000BASE\_T}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2bfa83bc32f73d31c1fa4dc1407e7cc3}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2bfa83bc32f73d31c1fa4dc1407e7cc3}} 
MLX5\+E\+\_\+1000\+BASE\+\_\+T&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_10GBASE\_T@{MLX5E\_10GBASE\_T}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_10GBASE\_T@{MLX5E\_10GBASE\_T}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca5297715e850d318659b5e194673f7a98}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca5297715e850d318659b5e194673f7a98}} 
MLX5\+E\+\_\+10\+GBASE\+\_\+T&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_25GBASE\_CR@{MLX5E\_25GBASE\_CR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_25GBASE\_CR@{MLX5E\_25GBASE\_CR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1b3320308e873872a54d6834d128be5a}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca1b3320308e873872a54d6834d128be5a}} 
MLX5\+E\+\_\+25\+GBASE\+\_\+\+CR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_25GBASE\_KR@{MLX5E\_25GBASE\_KR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_25GBASE\_KR@{MLX5E\_25GBASE\_KR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa1733b52080d3e344383a8d38a41937c}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0caa1733b52080d3e344383a8d38a41937c}} 
MLX5\+E\+\_\+25\+GBASE\+\_\+\+KR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_25GBASE\_SR@{MLX5E\_25GBASE\_SR}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_25GBASE\_SR@{MLX5E\_25GBASE\_SR}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cacf9f710b06c1a897111343451beb5ea9}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cacf9f710b06c1a897111343451beb5ea9}} 
MLX5\+E\+\_\+25\+GBASE\+\_\+\+SR&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GBASE\_CR2@{MLX5E\_50GBASE\_CR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GBASE\_CR2@{MLX5E\_50GBASE\_CR2}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cac1f46552570b21ca59ea0d61a3af46a3}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0cac1f46552570b21ca59ea0d61a3af46a3}} 
MLX5\+E\+\_\+50\+GBASE\+\_\+\+CR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_50GBASE\_KR2@{MLX5E\_50GBASE\_KR2}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_50GBASE\_KR2@{MLX5E\_50GBASE\_KR2}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca795618752f8e6c3901919800fb07ba98}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca795618752f8e6c3901919800fb07ba98}} 
MLX5\+E\+\_\+50\+GBASE\+\_\+\+KR2&\\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{MLX5E\_LINK\_SPEEDS\_NUMBER@{MLX5E\_LINK\_SPEEDS\_NUMBER}!port.h@{port.h}}\index{port.h@{port.h}!MLX5E\_LINK\_SPEEDS\_NUMBER@{MLX5E\_LINK\_SPEEDS\_NUMBER}}}\mbox{\Hypertarget{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2fdd4361e15ae10fcfe95a2510ff0da4}\label{port_8h_a7dfcb3631fc98516e9d7d48497ddae0ca2fdd4361e15ae10fcfe95a2510ff0da4}} 
MLX5\+E\+\_\+\+LINK\+\_\+\+SPEEDS\+\_\+\+NUMBER&\\
\hline

\end{DoxyEnumFields}


Definition at line \mbox{\hyperlink{port_8h_source_l00082}{82}} of file \mbox{\hyperlink{port_8h_source}{port.\+h}}.



\doxysubsection{Function Documentation}
\mbox{\Hypertarget{port_8h_a8eea1a4b68e68fda00f586588c09f045}\label{port_8h_a8eea1a4b68e68fda00f586588c09f045}} 
\index{port.h@{port.h}!mlx5\_max\_tc@{mlx5\_max\_tc}}
\index{mlx5\_max\_tc@{mlx5\_max\_tc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_max\_tc()}{mlx5\_max\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+max\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00854}{854}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01027}{MLX5\+\_\+\+CAP\+\_\+\+GEN}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00900}{mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01015}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00874}{mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00946}{mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01001}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00966}{mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00111}{mlx5e\+\_\+getmaxrate()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00334}{mlx5e\+\_\+prio\+\_\+to\+\_\+tc\+\_\+handler()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00194}{mlx5e\+\_\+tc\+\_\+get\+\_\+parameters()}}, \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00224}{mlx5e\+\_\+tc\+\_\+maxrate\+\_\+handler()}}, and \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00267}{mlx5e\+\_\+tc\+\_\+rate\+\_\+share\+\_\+handler()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_a8eea1a4b68e68fda00f586588c09f045_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_aec4e85f531e077cf816101a0026ad225}\label{port_8h_aec4e85f531e077cf816101a0026ad225}} 
\index{port.h@{port.h}!mlx5\_modify\_port\_tc\_rate\_limit@{mlx5\_modify\_port\_tc\_rate\_limit}}
\index{mlx5\_modify\_port\_tc\_rate\_limit@{mlx5\_modify\_port\_tc\_rate\_limit}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_modify\_port\_tc\_rate\_limit()}{mlx5\_modify\_port\_tc\_rate\_limit()}}
{\footnotesize\ttfamily int mlx5\+\_\+modify\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{max\+\_\+bw\+\_\+value,  }\item[{const u8 $\ast$}]{max\+\_\+bw\+\_\+units }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00900}{900}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00224}{mlx5e\+\_\+tc\+\_\+maxrate\+\_\+handler()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_aec4e85f531e077cf816101a0026ad225_cgraph}
\end{center}
\end{figure}
Here is the caller graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_aec4e85f531e077cf816101a0026ad225_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_abc3477405acfbb95183852d9c779374f}\label{port_8h_abc3477405acfbb95183852d9c779374f}} 
\index{port.h@{port.h}!mlx5\_port\_query\_eth\_proto@{mlx5\_port\_query\_eth\_proto}}
\index{mlx5\_port\_query\_eth\_proto@{mlx5\_port\_query\_eth\_proto}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_port\_query\_eth\_proto()}{mlx5\_port\_query\_eth\_proto()}}
{\footnotesize\ttfamily int mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8}]{port,  }\item[{bool}]{ext,  }\item[{struct \mbox{\hyperlink{structmlx5e__port__eth__proto}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto}} $\ast$}]{eproto }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01363}{1363}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{port_8h_source_l00150}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::admin}}, \mbox{\hyperlink{port_8h_source_l00149}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::cap}}, \mbox{\hyperlink{port_8h_source_l00163}{MLX5\+\_\+\+GET\+\_\+\+ETH\+\_\+\+PROTO}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{port_8h_source_l00151}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::oper}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01383}{mlx5e\+\_\+port\+\_\+linkspeed()}}.

Here is the call graph for this function\+:
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\begin{center}
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\includegraphics[width=350pt]{da/d00/port_8h_abc3477405acfbb95183852d9c779374f_cgraph}
\end{center}
\end{figure}
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\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_abc3477405acfbb95183852d9c779374f_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_aa003c31ff5f5f6dae8728880dd8392db}\label{port_8h_aa003c31ff5f5f6dae8728880dd8392db}} 
\index{port.h@{port.h}!mlx5\_query\_dscp2prio@{mlx5\_query\_dscp2prio}}
\index{mlx5\_query\_dscp2prio@{mlx5\_query\_dscp2prio}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_dscp2prio()}{mlx5\_query\_dscp2prio()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+dscp2prio (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{dscp2prio }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01150}{1150}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00118}{MLX5\+\_\+\+GET16}}, \mbox{\hyperlink{port_8h_source_l00224}{MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP}}, \mbox{\hyperlink{driver_8h_source_l00127}{MLX5\+\_\+\+REG\+\_\+\+QPDPM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00170}{mlx5e\+\_\+get\+\_\+dscp()}}.

Here is the call graph for this function\+:
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_aa003c31ff5f5f6dae8728880dd8392db_cgraph}
\end{center}
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\begin{center}
\leavevmode
\includegraphics[width=350pt]{da/d00/port_8h_aa003c31ff5f5f6dae8728880dd8392db_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_a68b553361f112504e6c7e0b875e2feff}\label{port_8h_a68b553361f112504e6c7e0b875e2feff}} 
\index{port.h@{port.h}!mlx5\_query\_eeprom@{mlx5\_query\_eeprom}}
\index{mlx5\_query\_eeprom@{mlx5\_query\_eeprom}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_eeprom()}{mlx5\_query\_eeprom()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+eeprom (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{i2c\+\_\+addr,  }\item[{int}]{page\+\_\+num,  }\item[{int}]{device\+\_\+addr,  }\item[{int}]{size,  }\item[{int}]{module\+\_\+num,  }\item[{u32 $\ast$}]{data,  }\item[{int $\ast$}]{size\+\_\+read }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00703}{703}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__en__tx_8c_source_l00001}{data}}, \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00057}{MLX5\+\_\+\+EEPROM\+\_\+\+MAX\+\_\+\+BYTES}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00157}{MLX5\+\_\+\+REG\+\_\+\+MCIA}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00357}{mlx5\+\_\+get\+\_\+eeprom()}}, \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00302}{mlx5\+\_\+get\+\_\+eeprom\+\_\+info()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{port_8h_a79915817bf848b70fa91e71a4890a669}\label{port_8h_a79915817bf848b70fa91e71a4890a669}} 
\index{port.h@{port.h}!mlx5\_query\_module\_num@{mlx5\_query\_module\_num}}
\index{mlx5\_query\_module\_num@{mlx5\_query\_module\_num}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_module\_num()}{mlx5\_query\_module\_num()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+module\+\_\+num (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{module\+\_\+num }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00682}{682}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00058}{MLX5\+\_\+\+EEPROM\+\_\+\+IDENTIFIER\+\_\+\+BYTE\+\_\+\+MASK}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00137}{MLX5\+\_\+\+REG\+\_\+\+PMLP}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__diagnostics_8c_source_l00302}{mlx5\+\_\+get\+\_\+eeprom\+\_\+info()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{port_8h_acf9ebb41ea75374e81c7d9ca14501267}\label{port_8h_acf9ebb41ea75374e81c7d9ca14501267}} 
\index{port.h@{port.h}!mlx5\_query\_module\_status@{mlx5\_query\_module\_status}}
\index{mlx5\_query\_module\_status@{mlx5\_query\_module\_status}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_module\_status()}{mlx5\_query\_module\_status()}}
{\footnotesize\ttfamily unsigned int mlx5\+\_\+query\+\_\+module\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{module\+\_\+num }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__eq_8c_source_l00682}{682}} of file \mbox{\hyperlink{mlx5__eq_8c_source}{mlx5\+\_\+eq.\+c}}.



References \mbox{\hyperlink{driver_8h_source_l00484}{mlx5\+\_\+eq\+\_\+table\+::dev}}, and \mbox{\hyperlink{driver_8h_source_l00079}{MLX5\+\_\+\+MAX\+\_\+\+PORTS}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{port_8h_a7c89eb44382a69714c0d74ef5fe56b20}\label{port_8h_a7c89eb44382a69714c0d74ef5fe56b20}} 
\index{port.h@{port.h}!mlx5\_query\_pddr\_cable\_type@{mlx5\_query\_pddr\_cable\_type}}
\index{mlx5\_query\_pddr\_cable\_type@{mlx5\_query\_pddr\_cable\_type}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr\_cable\_type()}{mlx5\_query\_pddr\_cable\_type()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pddr\+\_\+cable\+\_\+type (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{local\+\_\+port,  }\item[{u8 $\ast$}]{cable\+\_\+type }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01227}{1227}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__core_8h_source_l00085}{MLX5\+\_\+\+PDDR\+\_\+\+MODULE\+\_\+\+INFO\+\_\+\+PAGE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\mbox{\Hypertarget{port_8h_ac7afe3e33144e7a3e096599ce95c5e36}\label{port_8h_ac7afe3e33144e7a3e096599ce95c5e36}} 
\index{port.h@{port.h}!mlx5\_query\_pddr\_range\_info@{mlx5\_query\_pddr\_range\_info}}
\index{mlx5\_query\_pddr\_range\_info@{mlx5\_query\_pddr\_range\_info}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_pddr\_range\_info()}{mlx5\_query\_pddr\_range\_info()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+pddr\+\_\+range\+\_\+info (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{local\+\_\+port,  }\item[{u8 $\ast$}]{is\+\_\+er\+\_\+type }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01195}{1195}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__core_8h_source_l00085}{MLX5\+\_\+\+PDDR\+\_\+\+MODULE\+\_\+\+INFO\+\_\+\+PAGE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01181}{mlx5\+\_\+query\+\_\+pddr()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\mbox{\Hypertarget{port_8h_ab0a0f0a0d6683482c1072fab351f72fc}\label{port_8h_ab0a0f0a0d6683482c1072fab351f72fc}} 
\index{port.h@{port.h}!mlx5\_query\_port\_admin\_status@{mlx5\_query\_port\_admin\_status}}
\index{mlx5\_query\_port\_admin\_status@{mlx5\_query\_port\_admin\_status}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_admin\_status()}{mlx5\_query\_port\_admin\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+admin\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}} $\ast$}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00323}{323}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00120}{mlx5\+\_\+toggle\+\_\+port\+\_\+link()}}.

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\mbox{\Hypertarget{port_8h_abd68757fec6c356f065d94a476c28c65}\label{port_8h_abd68757fec6c356f065d94a476c28c65}} 
\index{port.h@{port.h}!mlx5\_query\_port\_autoneg@{mlx5\_query\_port\_autoneg}}
\index{mlx5\_query\_port\_autoneg@{mlx5\_query\_port\_autoneg}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_autoneg()}{mlx5\_query\_port\_autoneg()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+autoneg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{proto\+\_\+mask,  }\item[{u8 $\ast$}]{an\+\_\+disable\+\_\+cap,  }\item[{u8 $\ast$}]{an\+\_\+disable\+\_\+status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00184}{184}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00201}{mlx5\+\_\+set\+\_\+port\+\_\+autoneg()}}.

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\mbox{\Hypertarget{port_8h_ac03a740d947a2d92b1b677fe0830f8d4}\label{port_8h_ac03a740d947a2d92b1b677fe0830f8d4}} 
\index{port.h@{port.h}!mlx5\_query\_port\_eth\_proto\_oper@{mlx5\_query\_port\_eth\_proto\_oper}}
\index{mlx5\_query\_port\_eth\_proto\_oper@{mlx5\_query\_port\_eth\_proto\_oper}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_eth\_proto\_oper()}{mlx5\_query\_port\_eth\_proto\_oper()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+oper,  }\item[{u8}]{local\+\_\+port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00248}{248}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{port_8h_a621c7ea77766c5fea50a28224084966a}\label{port_8h_a621c7ea77766c5fea50a28224084966a}} 
\index{port.h@{port.h}!mlx5\_query\_port\_max\_mtu@{mlx5\_query\_port\_max\_mtu}}
\index{mlx5\_query\_port\_max\_mtu@{mlx5\_query\_port\_max\_mtu}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_max\_mtu()}{mlx5\_query\_port\_max\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+max\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{max\+\_\+mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00377}{377}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00340}{mlx5\+\_\+query\+\_\+port\+\_\+mtu()}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}.

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\mbox{\Hypertarget{port_8h_abac20c4d9ef517252456717d991413b0}\label{port_8h_abac20c4d9ef517252456717d991413b0}} 
\index{port.h@{port.h}!mlx5\_query\_port\_oper\_mtu@{mlx5\_query\_port\_oper\_mtu}}
\index{mlx5\_query\_port\_oper\_mtu@{mlx5\_query\_port\_oper\_mtu}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_oper\_mtu()}{mlx5\_query\_port\_oper\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+oper\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int $\ast$}]{oper\+\_\+mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00448}{448}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00340}{mlx5\+\_\+query\+\_\+port\+\_\+mtu()}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03210}{mlx5e\+\_\+set\+\_\+dev\+\_\+port\+\_\+mtu()}}.

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\mbox{\Hypertarget{port_8h_a81bd9d53a4b98130eb63d2c5c357d1ea}\label{port_8h_a81bd9d53a4b98130eb63d2c5c357d1ea}} 
\index{port.h@{port.h}!mlx5\_query\_port\_pause@{mlx5\_query\_port\_pause}}
\index{mlx5\_query\_port\_pause@{mlx5\_query\_port\_pause}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_pause()}{mlx5\_query\_port\_pause()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+pause (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{port,  }\item[{u32 $\ast$}]{rx\+\_\+pause,  }\item[{u32 $\ast$}]{tx\+\_\+pause }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00408}{408}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{port_8h_afda73217c985de0c61c6c3e32b1b3b06}\label{port_8h_afda73217c985de0c61c6c3e32b1b3b06}} 
\index{port.h@{port.h}!mlx5\_query\_port\_pfc@{mlx5\_query\_port\_pfc}}
\index{mlx5\_query\_port\_pfc@{mlx5\_query\_port\_pfc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_pfc()}{mlx5\_query\_port\_pfc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+pfc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8 $\ast$}]{pfc\+\_\+en\+\_\+tx,  }\item[{u8 $\ast$}]{pfc\+\_\+en\+\_\+rx }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00428}{428}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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\mbox{\Hypertarget{port_8h_ae0dd290d698ec73c31e72788ac917eec}\label{port_8h_ae0dd290d698ec73c31e72788ac917eec}} 
\index{port.h@{port.h}!mlx5\_query\_port\_prio\_tc@{mlx5\_query\_port\_prio\_tc}}
\index{mlx5\_query\_port\_prio\_tc@{mlx5\_query\_port\_prio\_tc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_prio\_tc()}{mlx5\_query\_port\_prio\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+prio\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{prio,  }\item[{u8 $\ast$}]{tc }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00924}{924}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00126}{MLX5\+\_\+\+REG\+\_\+\+QTCT}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{en_8h_source_l00049}{tc}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00312}{mlx5e\+\_\+get\+\_\+prio\+\_\+tc()}}.

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\mbox{\Hypertarget{port_8h_aced7454cbd10f56a2415f76633bd9a47}\label{port_8h_aced7454cbd10f56a2415f76633bd9a47}} 
\index{port.h@{port.h}!mlx5\_query\_port\_proto\_admin@{mlx5\_query\_port\_proto\_admin}}
\index{mlx5\_query\_port\_proto\_admin@{mlx5\_query\_port\_proto\_admin}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_proto\_admin()}{mlx5\_query\_port\_proto\_admin()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00229}{229}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_ad9607ac18934ee28ea596856e72b8895}\label{port_8h_ad9607ac18934ee28ea596856e72b8895}} 
\index{port.h@{port.h}!mlx5\_query\_port\_proto\_cap@{mlx5\_query\_port\_proto\_cap}}
\index{mlx5\_query\_port\_proto\_cap@{mlx5\_query\_port\_proto\_cap}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_proto\_cap()}{mlx5\_query\_port\_proto\_cap()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{proto\+\_\+cap,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00165}{165}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00148}{mlx5\+\_\+query\+\_\+port\+\_\+ptys()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{port_8h_a8f0cbf29a10097b179dd9e3a4df0b873}\label{port_8h_a8f0cbf29a10097b179dd9e3a4df0b873}} 
\index{port.h@{port.h}!mlx5\_query\_port\_ptys@{mlx5\_query\_port\_ptys}}
\index{mlx5\_query\_port\_ptys@{mlx5\_query\_port\_ptys}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_ptys()}{mlx5\_query\_port\_ptys()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+ptys (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32 $\ast$}]{ptys,  }\item[{int}]{ptys\+\_\+size,  }\item[{int}]{proto\+\_\+mask,  }\item[{u8}]{local\+\_\+port }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00148}{148}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01363}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00184}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00248}{mlx5\+\_\+query\+\_\+port\+\_\+eth\+\_\+proto\+\_\+oper()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00229}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+admin()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00165}{mlx5\+\_\+query\+\_\+port\+\_\+proto\+\_\+cap()}}, \mbox{\hyperlink{mlx5__ib__main_8c_source_l00287}{mlx5\+\_\+query\+\_\+port\+\_\+roce()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l04468}{mlx5e\+\_\+create\+\_\+ifp()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l00365}{mlx5e\+\_\+update\+\_\+carrier()}}.

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\mbox{\Hypertarget{port_8h_a5a527984e12e519f8e4a436f3d4f0a7d}\label{port_8h_a5a527984e12e519f8e4a436f3d4f0a7d}} 
\index{port.h@{port.h}!mlx5\_query\_port\_status@{mlx5\_query\_port\_status}}
\index{mlx5\_query\_port\_status@{mlx5\_query\_port\_status}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_status()}{mlx5\_query\_port\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8 $\ast$}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00306}{306}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\includegraphics[width=350pt]{da/d00/port_8h_a5a527984e12e519f8e4a436f3d4f0a7d_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{port_8h_a3bff739bb1d26721baac627ba595236e}\label{port_8h_a3bff739bb1d26721baac627ba595236e}} 
\index{port.h@{port.h}!mlx5\_query\_port\_tc\_bw\_alloc@{mlx5\_query\_port\_tc\_bw\_alloc}}
\index{mlx5\_query\_port\_tc\_bw\_alloc@{mlx5\_query\_port\_tc\_bw\_alloc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_bw\_alloc()}{mlx5\_query\_port\_tc\_bw\_alloc()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{bw\+\_\+pct }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01015}{1015}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00147}{mlx5e\+\_\+get\+\_\+max\+\_\+alloc()}}.

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\includegraphics[width=350pt]{da/d00/port_8h_a3bff739bb1d26721baac627ba595236e_cgraph}
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\mbox{\Hypertarget{port_8h_a5bc1d6be45b568bf44747236844b8959}\label{port_8h_a5bc1d6be45b568bf44747236844b8959}} 
\index{port.h@{port.h}!mlx5\_query\_port\_tc\_group@{mlx5\_query\_port\_tc\_group}}
\index{mlx5\_query\_port\_tc\_group@{mlx5\_query\_port\_tc\_group}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_group()}{mlx5\_query\_port\_tc\_group()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+group (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{tc,  }\item[{u8 $\ast$}]{tc\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00980}{980}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}, and \mbox{\hyperlink{en_8h_source_l00049}{tc}}.

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\end{center}
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\mbox{\Hypertarget{port_8h_a1e9dd0d7320c408a211ca9040488a41d}\label{port_8h_a1e9dd0d7320c408a211ca9040488a41d}} 
\index{port.h@{port.h}!mlx5\_query\_port\_tc\_rate\_limit@{mlx5\_query\_port\_tc\_rate\_limit}}
\index{mlx5\_query\_port\_tc\_rate\_limit@{mlx5\_query\_port\_tc\_rate\_limit}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_port\_tc\_rate\_limit()}{mlx5\_query\_port\_tc\_rate\_limit()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+port\+\_\+tc\+\_\+rate\+\_\+limit (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{max\+\_\+bw\+\_\+value,  }\item[{u8 $\ast$}]{max\+\_\+bw\+\_\+units }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00874}{874}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00841}{mlx5\+\_\+query\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00111}{mlx5e\+\_\+getmaxrate()}}.

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\mbox{\Hypertarget{port_8h_afcaee87f88eaa778d725f66812f561ba}\label{port_8h_afcaee87f88eaa778d725f66812f561ba}} 
\index{port.h@{port.h}!mlx5\_query\_trust\_state@{mlx5\_query\_trust\_state}}
\index{mlx5\_query\_trust\_state@{mlx5\_query\_trust\_state}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_query\_trust\_state()}{mlx5\_query\_trust\_state()}}
{\footnotesize\ttfamily int mlx5\+\_\+query\+\_\+trust\+\_\+state (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{trust\+\_\+state }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01097}{1097}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00123}{MLX5\+\_\+\+REG\+\_\+\+QPTS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00170}{mlx5e\+\_\+get\+\_\+dscp()}}.

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\mbox{\Hypertarget{port_8h_a97c245e50598b16dcb43cb32cbc37423}\label{port_8h_a97c245e50598b16dcb43cb32cbc37423}} 
\index{port.h@{port.h}!mlx5\_set\_dscp2prio@{mlx5\_set\_dscp2prio}}
\index{mlx5\_set\_dscp2prio@{mlx5\_set\_dscp2prio}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_dscp2prio()}{mlx5\_set\_dscp2prio()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+dscp2prio (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{dscp2prio }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01113}{1113}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l00070}{MLX5\+\_\+\+ADDR\+\_\+\+OF}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{port_8h_source_l00224}{MLX5\+\_\+\+MAX\+\_\+\+SUPPORTED\+\_\+\+DSCP}}, \mbox{\hyperlink{driver_8h_source_l00127}{MLX5\+\_\+\+REG\+\_\+\+QPDPM}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{device_8h_source_l00122}{MLX5\+\_\+\+SET16}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00697}{mlx5e\+\_\+dscp\+\_\+prio\+\_\+handler()}}.

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\mbox{\Hypertarget{port_8h_af40ba1470375da922437a2d42ec10701}\label{port_8h_af40ba1470375da922437a2d42ec10701}} 
\index{port.h@{port.h}!mlx5\_set\_port\_autoneg@{mlx5\_set\_port\_autoneg}}
\index{mlx5\_set\_port\_autoneg@{mlx5\_set\_port\_autoneg}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_autoneg()}{mlx5\_set\_port\_autoneg()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+autoneg (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{bool}]{disable,  }\item[{u32}]{eth\+\_\+proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00201}{201}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{mlx5__port_8c_source_l00184}{mlx5\+\_\+query\+\_\+port\+\_\+autoneg()}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{port_8h_aedb5a503f9312b510754fe363a99c27e}\label{port_8h_aedb5a503f9312b510754fe363a99c27e}} 
\index{port.h@{port.h}!mlx5\_set\_port\_caps@{mlx5\_set\_port\_caps}}
\index{mlx5\_set\_port\_caps@{mlx5\_set\_port\_caps}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_caps()}{mlx5\_set\_port\_caps()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+caps (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u8}]{port\+\_\+num,  }\item[{u32}]{caps }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00131}{131}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00113}{mlx5\+\_\+reg\+\_\+pcap\+::caps\+\_\+127\+\_\+96}}, \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00136}{MLX5\+\_\+\+REG\+\_\+\+PCAP}}, and \mbox{\hyperlink{mlx5__port_8c_source_l00111}{mlx5\+\_\+reg\+\_\+pcap\+::port\+\_\+num}}.



Referenced by \mbox{\hyperlink{mlx5__ib__main_8c_source_l01083}{mlx5\+\_\+ib\+\_\+modify\+\_\+port()}}.

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\mbox{\Hypertarget{port_8h_a678235a0bf7e8e0cb35e0ce8ee96c5c9}\label{port_8h_a678235a0bf7e8e0cb35e0ce8ee96c5c9}} 
\index{port.h@{port.h}!mlx5\_set\_port\_mtu@{mlx5\_set\_port\_mtu}}
\index{mlx5\_set\_port\_mtu@{mlx5\_set\_port\_mtu}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_mtu()}{mlx5\_set\_port\_mtu()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+mtu (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{int}]{mtu }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00364}{364}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00138}{MLX5\+\_\+\+REG\+\_\+\+PMTU}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l03210}{mlx5e\+\_\+set\+\_\+dev\+\_\+port\+\_\+mtu()}}.

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\mbox{\Hypertarget{port_8h_ae8bafa77713ec40473235db0e29b230f}\label{port_8h_ae8bafa77713ec40473235db0e29b230f}} 
\index{port.h@{port.h}!mlx5\_set\_port\_pause\_and\_pfc@{mlx5\_set\_port\_pause\_and\_pfc}}
\index{mlx5\_set\_port\_pause\_and\_pfc@{mlx5\_set\_port\_pause\_and\_pfc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_pause\_and\_pfc()}{mlx5\_set\_port\_pause\_and\_pfc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{port,  }\item[{u8}]{rx\+\_\+pause,  }\item[{u8}]{tx\+\_\+pause,  }\item[{u8}]{pfc\+\_\+en\+\_\+rx,  }\item[{u8}]{pfc\+\_\+en\+\_\+tx }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00383}{383}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00141}{MLX5\+\_\+\+REG\+\_\+\+PFCC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00505}{mlx5e\+\_\+set\+\_\+port\+\_\+pause\+\_\+and\+\_\+pfc()}}.

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\mbox{\Hypertarget{port_8h_a0a52893d89d21c33052292f05e2d3618}\label{port_8h_a0a52893d89d21c33052292f05e2d3618}} 
\index{port.h@{port.h}!mlx5\_set\_port\_prio\_tc@{mlx5\_set\_port\_prio\_tc}}
\index{mlx5\_set\_port\_prio\_tc@{mlx5\_set\_port\_prio\_tc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_prio\_tc()}{mlx5\_set\_port\_prio\_tc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+prio\+\_\+tc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{int}]{prio\+\_\+index,  }\item[{const u8}]{prio\+\_\+tc }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00946}{946}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{driver_8h_source_l00126}{MLX5\+\_\+\+REG\+\_\+\+QTCT}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00334}{mlx5e\+\_\+prio\+\_\+to\+\_\+tc\+\_\+handler()}}.

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\mbox{\Hypertarget{port_8h_a8e61837d509b7d0f854f031e69002249}\label{port_8h_a8e61837d509b7d0f854f031e69002249}} 
\index{port.h@{port.h}!mlx5\_set\_port\_proto@{mlx5\_set\_port\_proto}}
\index{mlx5\_set\_port\_proto@{mlx5\_set\_port\_proto}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_proto()}{mlx5\_set\_port\_proto()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+proto (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{u32}]{proto\+\_\+admin,  }\item[{int}]{proto\+\_\+mask,  }\item[{bool}]{ext }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00265}{265}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00814}{MLX5\+\_\+\+PTYS\+\_\+\+EN}}, \mbox{\hyperlink{driver_8h_source_l00139}{MLX5\+\_\+\+REG\+\_\+\+PTYS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}.

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\mbox{\Hypertarget{port_8h_af420caf0db7e1b8cbf69651fbe3d98d7}\label{port_8h_af420caf0db7e1b8cbf69651fbe3d98d7}} 
\index{port.h@{port.h}!mlx5\_set\_port\_status@{mlx5\_set\_port\_status}}
\index{mlx5\_set\_port\_status@{mlx5\_set\_port\_status}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_status()}{mlx5\_set\_port\_status()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+status (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{dev,  }\item[{enum \mbox{\hyperlink{driver_8h_abbd4adaee2907713cb84574e971dbbbd}{mlx5\+\_\+port\+\_\+status}}}]{status }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00289}{289}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00140}{MLX5\+\_\+\+REG\+\_\+\+PAOS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l00120}{mlx5\+\_\+toggle\+\_\+port\+\_\+link()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l03429}{mlx5e\+\_\+ioctl()}}, \mbox{\hyperlink{mlx5__en__main_8c_source_l00533}{mlx5e\+\_\+media\+\_\+change()}}, and \mbox{\hyperlink{mlx5__en__main_8c_source_l03331}{mlx5e\+\_\+open()}}.

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\mbox{\Hypertarget{port_8h_a1f21911cbbc6a806d4f165efd6711de1}\label{port_8h_a1f21911cbbc6a806d4f165efd6711de1}} 
\index{port.h@{port.h}!mlx5\_set\_port\_tc\_bw\_alloc@{mlx5\_set\_port\_tc\_bw\_alloc}}
\index{mlx5\_set\_port\_tc\_bw\_alloc@{mlx5\_set\_port\_tc\_bw\_alloc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_tc\_bw\_alloc()}{mlx5\_set\_port\_tc\_bw\_alloc()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+bw\+\_\+alloc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{tc\+\_\+bw }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01001}{1001}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00147}{mlx5e\+\_\+get\+\_\+max\+\_\+alloc()}}, and \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00267}{mlx5e\+\_\+tc\+\_\+rate\+\_\+share\+\_\+handler()}}.

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\mbox{\Hypertarget{port_8h_a1824b2318af707b6146d7c431e305694}\label{port_8h_a1824b2318af707b6146d7c431e305694}} 
\index{port.h@{port.h}!mlx5\_set\_port\_tc\_group@{mlx5\_set\_port\_tc\_group}}
\index{mlx5\_set\_port\_tc\_group@{mlx5\_set\_port\_tc\_group}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_port\_tc\_group()}{mlx5\_set\_port\_tc\_group()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+port\+\_\+tc\+\_\+group (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{const u8 $\ast$}]{tc\+\_\+group }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l00966}{966}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00854}{mlx5\+\_\+max\+\_\+tc()}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, \mbox{\hyperlink{mlx5__port_8c_source_l00862}{mlx5\+\_\+set\+\_\+port\+\_\+qetcr\+\_\+reg()}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.

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\mbox{\Hypertarget{port_8h_a7c22c110dca7d84adcdaade920784192}\label{port_8h_a7c22c110dca7d84adcdaade920784192}} 
\index{port.h@{port.h}!mlx5\_set\_trust\_state@{mlx5\_set\_trust\_state}}
\index{mlx5\_set\_trust\_state@{mlx5\_set\_trust\_state}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5\_set\_trust\_state()}{mlx5\_set\_trust\_state()}}
{\footnotesize\ttfamily int mlx5\+\_\+set\+\_\+trust\+\_\+state (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8}]{trust\+\_\+state }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01083}{1083}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00123}{MLX5\+\_\+\+REG\+\_\+\+QPTS}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00065}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+DW}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00651}{mlx5e\+\_\+trust\+\_\+state\+\_\+handler()}}.

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\mbox{\Hypertarget{port_8h_aa748929af17fa9534b61812f2878a6f8}\label{port_8h_aa748929af17fa9534b61812f2878a6f8}} 
\index{port.h@{port.h}!mlx5e\_port\_linkspeed@{mlx5e\_port\_linkspeed}}
\index{mlx5e\_port\_linkspeed@{mlx5e\_port\_linkspeed}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_linkspeed()}{mlx5e\_port\_linkspeed()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+linkspeed (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32 $\ast$}]{speed }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01383}{1383}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{device_8h_source_l01140}{MLX5\+\_\+\+CAP\+\_\+\+PCAM\+\_\+\+FEATURE}}, \mbox{\hyperlink{mlx5__port_8c_source_l01363}{mlx5\+\_\+port\+\_\+query\+\_\+eth\+\_\+proto()}}, \mbox{\hyperlink{mlx5__port_8c_source_l01348}{mlx5e\+\_\+port\+\_\+ptys2speed()}}, and \mbox{\hyperlink{port_8h_source_l00151}{mlx5e\+\_\+port\+\_\+eth\+\_\+proto\+::oper}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00127}{calculate\+\_\+xoff()}}.

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\mbox{\Hypertarget{port_8h_a9aa2cea85e96ba55f84c53b193a3d546}\label{port_8h_a9aa2cea85e96ba55f84c53b193a3d546}} 
\index{port.h@{port.h}!mlx5e\_port\_ptys2speed@{mlx5e\_port\_ptys2speed}}
\index{mlx5e\_port\_ptys2speed@{mlx5e\_port\_ptys2speed}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_ptys2speed()}{mlx5e\_port\_ptys2speed()}}
{\footnotesize\ttfamily u32 mlx5e\+\_\+port\+\_\+ptys2speed (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u32}]{eth\+\_\+proto\+\_\+oper }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01348}{1348}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l01338}{mlx5e\+\_\+port\+\_\+get\+\_\+speed\+\_\+arr()}}.



Referenced by \mbox{\hyperlink{mlx5__port_8c_source_l01383}{mlx5e\+\_\+port\+\_\+linkspeed()}}.

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\mbox{\Hypertarget{port_8h_ad84aea8b1a6c4167ae5dbc0ce01b203e}\label{port_8h_ad84aea8b1a6c4167ae5dbc0ce01b203e}} 
\index{port.h@{port.h}!mlx5e\_port\_query\_pbmc@{mlx5e\_port\_query\_pbmc}}
\index{mlx5e\_port\_query\_pbmc@{mlx5e\_port\_query\_pbmc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_query\_pbmc()}{mlx5e\_port\_query\_pbmc()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+query\+\_\+pbmc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{out }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01402}{1402}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00145}{MLX5\+\_\+\+REG\+\_\+\+PBMC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00035}{mlx5e\+\_\+port\+\_\+query\+\_\+buffer()}}, and \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00089}{port\+\_\+set\+\_\+buffer()}}.

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\mbox{\Hypertarget{port_8h_a3deead3af97d84e34bffc1065fa4263f}\label{port_8h_a3deead3af97d84e34bffc1065fa4263f}} 
\index{port.h@{port.h}!mlx5e\_port\_query\_priority2buffer@{mlx5e\_port\_query\_priority2buffer}}
\index{mlx5e\_port\_query\_priority2buffer@{mlx5e\_port\_query\_priority2buffer}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_query\_priority2buffer()}{mlx5e\_port\_query\_priority2buffer()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+query\+\_\+priority2buffer (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{buffer }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01437}{1437}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{mlx5__core_8h_source_l00045}{mlx5\+\_\+core\+\_\+dbg}}, \mbox{\hyperlink{device_8h_source_l00091}{MLX5\+\_\+\+GET}}, \mbox{\hyperlink{driver_8h_source_l00144}{MLX5\+\_\+\+REG\+\_\+\+PPTB}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__ethtool_8c_source_l00775}{mlx5e\+\_\+buf\+\_\+prio\+\_\+handler()}}, and \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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\mbox{\Hypertarget{port_8h_ae185a737aa1d8a65c1bc231c7a379d71}\label{port_8h_ae185a737aa1d8a65c1bc231c7a379d71}} 
\index{port.h@{port.h}!mlx5e\_port\_set\_pbmc@{mlx5e\_port\_set\_pbmc}}
\index{mlx5e\_port\_set\_pbmc@{mlx5e\_port\_set\_pbmc}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_set\_pbmc()}{mlx5e\_port\_set\_pbmc()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+set\+\_\+pbmc (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{void $\ast$}]{in }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01419}{1419}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00145}{MLX5\+\_\+\+REG\+\_\+\+PBMC}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00089}{port\+\_\+set\+\_\+buffer()}}.

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\mbox{\Hypertarget{port_8h_a24b3d47fcb69f1d6ba0237a1891e0657}\label{port_8h_a24b3d47fcb69f1d6ba0237a1891e0657}} 
\index{port.h@{port.h}!mlx5e\_port\_set\_priority2buffer@{mlx5e\_port\_set\_priority2buffer}}
\index{mlx5e\_port\_set\_priority2buffer@{mlx5e\_port\_set\_priority2buffer}!port.h@{port.h}}
\doxysubsubsection{\texorpdfstring{mlx5e\_port\_set\_priority2buffer()}{mlx5e\_port\_set\_priority2buffer()}}
{\footnotesize\ttfamily int mlx5e\+\_\+port\+\_\+set\+\_\+priority2buffer (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structmlx5__core__dev}{mlx5\+\_\+core\+\_\+dev}} $\ast$}]{mdev,  }\item[{u8 $\ast$}]{buffer }\end{DoxyParamCaption})}



Definition at line \mbox{\hyperlink{mlx5__port_8c_source_l01469}{1469}} of file \mbox{\hyperlink{mlx5__port_8c_source}{mlx5\+\_\+port.\+c}}.



References \mbox{\hyperlink{mlx5__port_8c_source_l00035}{mlx5\+\_\+core\+\_\+access\+\_\+reg()}}, \mbox{\hyperlink{driver_8h_source_l00144}{MLX5\+\_\+\+REG\+\_\+\+PPTB}}, \mbox{\hyperlink{device_8h_source_l00073}{MLX5\+\_\+\+SET}}, and \mbox{\hyperlink{device_8h_source_l00064}{MLX5\+\_\+\+ST\+\_\+\+SZ\+\_\+\+BYTES}}.



Referenced by \mbox{\hyperlink{mlx5__en__port__buffer_8c_source_l00241}{mlx5e\+\_\+port\+\_\+manual\+\_\+buffer\+\_\+config()}}.

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